Commit | Line | Data |
---|---|---|
3c910ecb | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0f15f500 NA |
2 | /* |
3 | * Pin controller and GPIO driver for Amlogic Meson GXL. | |
4 | * | |
5 | * Copyright (C) 2016 Endless Mobile, Inc. | |
6 | * Author: Carlo Caione <carlo@endlessm.com> | |
0f15f500 NA |
7 | */ |
8 | ||
9 | #include <dt-bindings/gpio/meson-gxl-gpio.h> | |
10 | #include "pinctrl-meson.h" | |
ce385aa2 | 11 | #include "pinctrl-meson8-pmx.h" |
0f15f500 | 12 | |
0f15f500 | 13 | static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { |
634e40b0 JB |
14 | MESON_PIN(GPIOZ_0), |
15 | MESON_PIN(GPIOZ_1), | |
16 | MESON_PIN(GPIOZ_2), | |
17 | MESON_PIN(GPIOZ_3), | |
18 | MESON_PIN(GPIOZ_4), | |
19 | MESON_PIN(GPIOZ_5), | |
20 | MESON_PIN(GPIOZ_6), | |
21 | MESON_PIN(GPIOZ_7), | |
22 | MESON_PIN(GPIOZ_8), | |
23 | MESON_PIN(GPIOZ_9), | |
24 | MESON_PIN(GPIOZ_10), | |
25 | MESON_PIN(GPIOZ_11), | |
26 | MESON_PIN(GPIOZ_12), | |
27 | MESON_PIN(GPIOZ_13), | |
28 | MESON_PIN(GPIOZ_14), | |
29 | MESON_PIN(GPIOZ_15), | |
30 | ||
31 | MESON_PIN(GPIOH_0), | |
32 | MESON_PIN(GPIOH_1), | |
33 | MESON_PIN(GPIOH_2), | |
34 | MESON_PIN(GPIOH_3), | |
35 | MESON_PIN(GPIOH_4), | |
36 | MESON_PIN(GPIOH_5), | |
37 | MESON_PIN(GPIOH_6), | |
38 | MESON_PIN(GPIOH_7), | |
39 | MESON_PIN(GPIOH_8), | |
40 | MESON_PIN(GPIOH_9), | |
41 | ||
42 | MESON_PIN(BOOT_0), | |
43 | MESON_PIN(BOOT_1), | |
44 | MESON_PIN(BOOT_2), | |
45 | MESON_PIN(BOOT_3), | |
46 | MESON_PIN(BOOT_4), | |
47 | MESON_PIN(BOOT_5), | |
48 | MESON_PIN(BOOT_6), | |
49 | MESON_PIN(BOOT_7), | |
50 | MESON_PIN(BOOT_8), | |
51 | MESON_PIN(BOOT_9), | |
52 | MESON_PIN(BOOT_10), | |
53 | MESON_PIN(BOOT_11), | |
54 | MESON_PIN(BOOT_12), | |
55 | MESON_PIN(BOOT_13), | |
56 | MESON_PIN(BOOT_14), | |
57 | MESON_PIN(BOOT_15), | |
58 | ||
59 | MESON_PIN(CARD_0), | |
60 | MESON_PIN(CARD_1), | |
61 | MESON_PIN(CARD_2), | |
62 | MESON_PIN(CARD_3), | |
63 | MESON_PIN(CARD_4), | |
64 | MESON_PIN(CARD_5), | |
65 | MESON_PIN(CARD_6), | |
66 | ||
67 | MESON_PIN(GPIODV_0), | |
68 | MESON_PIN(GPIODV_1), | |
69 | MESON_PIN(GPIODV_2), | |
70 | MESON_PIN(GPIODV_3), | |
71 | MESON_PIN(GPIODV_4), | |
72 | MESON_PIN(GPIODV_5), | |
73 | MESON_PIN(GPIODV_6), | |
74 | MESON_PIN(GPIODV_7), | |
75 | MESON_PIN(GPIODV_8), | |
76 | MESON_PIN(GPIODV_9), | |
77 | MESON_PIN(GPIODV_10), | |
78 | MESON_PIN(GPIODV_11), | |
79 | MESON_PIN(GPIODV_12), | |
80 | MESON_PIN(GPIODV_13), | |
81 | MESON_PIN(GPIODV_14), | |
82 | MESON_PIN(GPIODV_15), | |
83 | MESON_PIN(GPIODV_16), | |
84 | MESON_PIN(GPIODV_17), | |
85 | MESON_PIN(GPIODV_18), | |
86 | MESON_PIN(GPIODV_19), | |
87 | MESON_PIN(GPIODV_20), | |
88 | MESON_PIN(GPIODV_21), | |
89 | MESON_PIN(GPIODV_22), | |
90 | MESON_PIN(GPIODV_23), | |
91 | MESON_PIN(GPIODV_24), | |
92 | MESON_PIN(GPIODV_25), | |
93 | MESON_PIN(GPIODV_26), | |
94 | MESON_PIN(GPIODV_27), | |
95 | MESON_PIN(GPIODV_28), | |
96 | MESON_PIN(GPIODV_29), | |
97 | ||
98 | MESON_PIN(GPIOX_0), | |
99 | MESON_PIN(GPIOX_1), | |
100 | MESON_PIN(GPIOX_2), | |
101 | MESON_PIN(GPIOX_3), | |
102 | MESON_PIN(GPIOX_4), | |
103 | MESON_PIN(GPIOX_5), | |
104 | MESON_PIN(GPIOX_6), | |
105 | MESON_PIN(GPIOX_7), | |
106 | MESON_PIN(GPIOX_8), | |
107 | MESON_PIN(GPIOX_9), | |
108 | MESON_PIN(GPIOX_10), | |
109 | MESON_PIN(GPIOX_11), | |
110 | MESON_PIN(GPIOX_12), | |
111 | MESON_PIN(GPIOX_13), | |
112 | MESON_PIN(GPIOX_14), | |
113 | MESON_PIN(GPIOX_15), | |
114 | MESON_PIN(GPIOX_16), | |
115 | MESON_PIN(GPIOX_17), | |
116 | MESON_PIN(GPIOX_18), | |
117 | ||
118 | MESON_PIN(GPIOCLK_0), | |
119 | MESON_PIN(GPIOCLK_1), | |
0f15f500 NA |
120 | }; |
121 | ||
122 | static const unsigned int emmc_nand_d07_pins[] = { | |
634e40b0 JB |
123 | BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7, |
124 | }; | |
125 | static const unsigned int emmc_clk_pins[] = { BOOT_8 }; | |
126 | static const unsigned int emmc_cmd_pins[] = { BOOT_10 }; | |
127 | static const unsigned int emmc_ds_pins[] = { BOOT_15 }; | |
128 | ||
129 | static const unsigned int nor_d_pins[] = { BOOT_11 }; | |
130 | static const unsigned int nor_q_pins[] = { BOOT_12 }; | |
131 | static const unsigned int nor_c_pins[] = { BOOT_13 }; | |
132 | static const unsigned int nor_cs_pins[] = { BOOT_15 }; | |
133 | ||
134 | static const unsigned int spi_mosi_pins[] = { GPIOX_8 }; | |
135 | static const unsigned int spi_miso_pins[] = { GPIOX_9 }; | |
136 | static const unsigned int spi_ss0_pins[] = { GPIOX_10 }; | |
137 | static const unsigned int spi_sclk_pins[] = { GPIOX_11 }; | |
138 | ||
139 | static const unsigned int sdcard_d0_pins[] = { CARD_1 }; | |
140 | static const unsigned int sdcard_d1_pins[] = { CARD_0 }; | |
141 | static const unsigned int sdcard_d2_pins[] = { CARD_5 }; | |
142 | static const unsigned int sdcard_d3_pins[] = { CARD_4 }; | |
143 | static const unsigned int sdcard_cmd_pins[] = { CARD_3 }; | |
144 | static const unsigned int sdcard_clk_pins[] = { CARD_2 }; | |
145 | ||
146 | static const unsigned int sdio_d0_pins[] = { GPIOX_0 }; | |
147 | static const unsigned int sdio_d1_pins[] = { GPIOX_1 }; | |
148 | static const unsigned int sdio_d2_pins[] = { GPIOX_2 }; | |
149 | static const unsigned int sdio_d3_pins[] = { GPIOX_3 }; | |
150 | static const unsigned int sdio_cmd_pins[] = { GPIOX_4 }; | |
151 | static const unsigned int sdio_clk_pins[] = { GPIOX_5 }; | |
152 | static const unsigned int sdio_irq_pins[] = { GPIOX_7 }; | |
153 | ||
154 | static const unsigned int nand_ce0_pins[] = { BOOT_8 }; | |
155 | static const unsigned int nand_ce1_pins[] = { BOOT_9 }; | |
156 | static const unsigned int nand_rb0_pins[] = { BOOT_10 }; | |
157 | static const unsigned int nand_ale_pins[] = { BOOT_11 }; | |
158 | static const unsigned int nand_cle_pins[] = { BOOT_12 }; | |
159 | static const unsigned int nand_wen_clk_pins[] = { BOOT_13 }; | |
160 | static const unsigned int nand_ren_wr_pins[] = { BOOT_14 }; | |
161 | static const unsigned int nand_dqs_pins[] = { BOOT_15 }; | |
162 | ||
163 | static const unsigned int uart_tx_a_pins[] = { GPIOX_12 }; | |
164 | static const unsigned int uart_rx_a_pins[] = { GPIOX_13 }; | |
165 | static const unsigned int uart_cts_a_pins[] = { GPIOX_14 }; | |
166 | static const unsigned int uart_rts_a_pins[] = { GPIOX_15 }; | |
167 | ||
168 | static const unsigned int uart_tx_b_pins[] = { GPIODV_24 }; | |
169 | static const unsigned int uart_rx_b_pins[] = { GPIODV_25 }; | |
170 | static const unsigned int uart_cts_b_pins[] = { GPIODV_26 }; | |
171 | static const unsigned int uart_rts_b_pins[] = { GPIODV_27 }; | |
172 | ||
173 | static const unsigned int uart_tx_c_pins[] = { GPIOX_8 }; | |
174 | static const unsigned int uart_rx_c_pins[] = { GPIOX_9 }; | |
175 | static const unsigned int uart_cts_c_pins[] = { GPIOX_10 }; | |
176 | static const unsigned int uart_rts_c_pins[] = { GPIOX_11 }; | |
177 | ||
178 | static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 }; | |
179 | static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 }; | |
180 | ||
181 | static const unsigned int i2c_sck_b_pins[] = { GPIODV_27 }; | |
182 | static const unsigned int i2c_sda_b_pins[] = { GPIODV_26 }; | |
183 | ||
184 | static const unsigned int i2c_sck_c_pins[] = { GPIODV_29 }; | |
185 | static const unsigned int i2c_sda_c_pins[] = { GPIODV_28 }; | |
186 | ||
187 | static const unsigned int i2c_sck_c_dv19_pins[] = { GPIODV_19 }; | |
188 | static const unsigned int i2c_sda_c_dv18_pins[] = { GPIODV_18 }; | |
189 | ||
190 | static const unsigned int eth_mdio_pins[] = { GPIOZ_0 }; | |
191 | static const unsigned int eth_mdc_pins[] = { GPIOZ_1 }; | |
192 | static const unsigned int eth_clk_rx_clk_pins[] = { GPIOZ_2 }; | |
193 | static const unsigned int eth_rx_dv_pins[] = { GPIOZ_3 }; | |
194 | static const unsigned int eth_rxd0_pins[] = { GPIOZ_4 }; | |
195 | static const unsigned int eth_rxd1_pins[] = { GPIOZ_5 }; | |
196 | static const unsigned int eth_rxd2_pins[] = { GPIOZ_6 }; | |
197 | static const unsigned int eth_rxd3_pins[] = { GPIOZ_7 }; | |
198 | static const unsigned int eth_rgmii_tx_clk_pins[] = { GPIOZ_8 }; | |
199 | static const unsigned int eth_tx_en_pins[] = { GPIOZ_9 }; | |
200 | static const unsigned int eth_txd0_pins[] = { GPIOZ_10 }; | |
201 | static const unsigned int eth_txd1_pins[] = { GPIOZ_11 }; | |
202 | static const unsigned int eth_txd2_pins[] = { GPIOZ_12 }; | |
203 | static const unsigned int eth_txd3_pins[] = { GPIOZ_13 }; | |
204 | ||
205 | static const unsigned int pwm_a_pins[] = { GPIOX_6 }; | |
206 | ||
207 | static const unsigned int pwm_b_pins[] = { GPIODV_29 }; | |
208 | ||
209 | static const unsigned int pwm_c_pins[] = { GPIOZ_15 }; | |
210 | ||
211 | static const unsigned int pwm_d_pins[] = { GPIODV_28 }; | |
212 | ||
213 | static const unsigned int pwm_e_pins[] = { GPIOX_16 }; | |
214 | ||
215 | static const unsigned int pwm_f_clk_pins[] = { GPIOCLK_1 }; | |
216 | static const unsigned int pwm_f_x_pins[] = { GPIOX_7 }; | |
217 | ||
218 | static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 }; | |
219 | static const unsigned int hdmi_sda_pins[] = { GPIOH_1 }; | |
220 | static const unsigned int hdmi_scl_pins[] = { GPIOH_2 }; | |
221 | ||
222 | static const unsigned int i2s_am_clk_pins[] = { GPIOH_6 }; | |
223 | static const unsigned int i2s_out_ao_clk_pins[] = { GPIOH_7 }; | |
224 | static const unsigned int i2s_out_lr_clk_pins[] = { GPIOH_8 }; | |
225 | static const unsigned int i2s_out_ch01_pins[] = { GPIOH_9 }; | |
226 | static const unsigned int i2s_out_ch23_z_pins[] = { GPIOZ_5 }; | |
227 | static const unsigned int i2s_out_ch45_z_pins[] = { GPIOZ_6 }; | |
228 | static const unsigned int i2s_out_ch67_z_pins[] = { GPIOZ_7 }; | |
229 | ||
230 | static const unsigned int spdif_out_h_pins[] = { GPIOH_4 }; | |
231 | ||
232 | static const unsigned int eth_link_led_pins[] = { GPIOZ_14 }; | |
233 | static const unsigned int eth_act_led_pins[] = { GPIOZ_15 }; | |
234 | ||
235 | static const unsigned int tsin_a_d0_pins[] = { GPIODV_0 }; | |
634e40b0 | 236 | static const unsigned int tsin_a_clk_pins[] = { GPIODV_8 }; |
634e40b0 | 237 | static const unsigned int tsin_a_sop_pins[] = { GPIODV_9 }; |
634e40b0 | 238 | static const unsigned int tsin_a_d_valid_pins[] = { GPIODV_10 }; |
634e40b0 | 239 | static const unsigned int tsin_a_fail_pins[] = { GPIODV_11 }; |
5a6ae9b8 | 240 | static const unsigned int tsin_a_dp_pins[] = { |
634e40b0 | 241 | GPIODV_1, GPIODV_2, GPIODV_3, GPIODV_4, GPIODV_5, GPIODV_6, GPIODV_7, |
5a6ae9b8 JB |
242 | }; |
243 | ||
0f15f500 | 244 | static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { |
634e40b0 JB |
245 | MESON_PIN(GPIOAO_0), |
246 | MESON_PIN(GPIOAO_1), | |
247 | MESON_PIN(GPIOAO_2), | |
248 | MESON_PIN(GPIOAO_3), | |
249 | MESON_PIN(GPIOAO_4), | |
250 | MESON_PIN(GPIOAO_5), | |
251 | MESON_PIN(GPIOAO_6), | |
252 | MESON_PIN(GPIOAO_7), | |
253 | MESON_PIN(GPIOAO_8), | |
254 | MESON_PIN(GPIOAO_9), | |
e891a5a4 JB |
255 | |
256 | MESON_PIN(GPIO_TEST_N), | |
634e40b0 JB |
257 | }; |
258 | ||
259 | static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; | |
260 | static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 }; | |
261 | static const unsigned int uart_tx_ao_b_0_pins[] = { GPIOAO_0 }; | |
262 | static const unsigned int uart_rx_ao_b_1_pins[] = { GPIOAO_1 }; | |
263 | static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 }; | |
264 | static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 }; | |
265 | static const unsigned int uart_tx_ao_b_pins[] = { GPIOAO_4 }; | |
266 | static const unsigned int uart_rx_ao_b_pins[] = { GPIOAO_5 }; | |
267 | static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 }; | |
268 | static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 }; | |
269 | ||
270 | static const unsigned int i2c_sck_ao_pins[] = {GPIOAO_4 }; | |
271 | static const unsigned int i2c_sda_ao_pins[] = {GPIOAO_5 }; | |
272 | static const unsigned int i2c_slave_sck_ao_pins[] = {GPIOAO_4 }; | |
273 | static const unsigned int i2c_slave_sda_ao_pins[] = {GPIOAO_5 }; | |
274 | ||
275 | static const unsigned int remote_input_ao_pins[] = {GPIOAO_7 }; | |
276 | ||
277 | static const unsigned int pwm_ao_a_3_pins[] = { GPIOAO_3 }; | |
278 | static const unsigned int pwm_ao_a_8_pins[] = { GPIOAO_8 }; | |
279 | ||
280 | static const unsigned int pwm_ao_b_pins[] = { GPIOAO_9 }; | |
281 | static const unsigned int pwm_ao_b_6_pins[] = { GPIOAO_6 }; | |
282 | ||
283 | static const unsigned int i2s_out_ch23_ao_pins[] = { GPIOAO_8 }; | |
284 | static const unsigned int i2s_out_ch45_ao_pins[] = { GPIOAO_9 }; | |
d51b989b | 285 | static const unsigned int i2s_out_ch67_ao_pins[] = { GPIO_TEST_N }; |
634e40b0 JB |
286 | |
287 | static const unsigned int spdif_out_ao_6_pins[] = { GPIOAO_6 }; | |
288 | static const unsigned int spdif_out_ao_9_pins[] = { GPIOAO_9 }; | |
289 | ||
290 | static const unsigned int ao_cec_pins[] = { GPIOAO_8 }; | |
291 | static const unsigned int ee_cec_pins[] = { GPIOAO_8 }; | |
690dead2 | 292 | |
0f15f500 | 293 | static struct meson_pmx_group meson_gxl_periphs_groups[] = { |
634e40b0 JB |
294 | GPIO_GROUP(GPIOZ_0), |
295 | GPIO_GROUP(GPIOZ_1), | |
296 | GPIO_GROUP(GPIOZ_2), | |
297 | GPIO_GROUP(GPIOZ_3), | |
298 | GPIO_GROUP(GPIOZ_4), | |
299 | GPIO_GROUP(GPIOZ_5), | |
300 | GPIO_GROUP(GPIOZ_6), | |
301 | GPIO_GROUP(GPIOZ_7), | |
302 | GPIO_GROUP(GPIOZ_8), | |
303 | GPIO_GROUP(GPIOZ_9), | |
304 | GPIO_GROUP(GPIOZ_10), | |
305 | GPIO_GROUP(GPIOZ_11), | |
306 | GPIO_GROUP(GPIOZ_12), | |
307 | GPIO_GROUP(GPIOZ_13), | |
308 | GPIO_GROUP(GPIOZ_14), | |
309 | GPIO_GROUP(GPIOZ_15), | |
310 | ||
311 | GPIO_GROUP(GPIOH_0), | |
312 | GPIO_GROUP(GPIOH_1), | |
313 | GPIO_GROUP(GPIOH_2), | |
314 | GPIO_GROUP(GPIOH_3), | |
315 | GPIO_GROUP(GPIOH_4), | |
316 | GPIO_GROUP(GPIOH_5), | |
317 | GPIO_GROUP(GPIOH_6), | |
318 | GPIO_GROUP(GPIOH_7), | |
319 | GPIO_GROUP(GPIOH_8), | |
320 | GPIO_GROUP(GPIOH_9), | |
321 | ||
322 | GPIO_GROUP(BOOT_0), | |
323 | GPIO_GROUP(BOOT_1), | |
324 | GPIO_GROUP(BOOT_2), | |
325 | GPIO_GROUP(BOOT_3), | |
326 | GPIO_GROUP(BOOT_4), | |
327 | GPIO_GROUP(BOOT_5), | |
328 | GPIO_GROUP(BOOT_6), | |
329 | GPIO_GROUP(BOOT_7), | |
330 | GPIO_GROUP(BOOT_8), | |
331 | GPIO_GROUP(BOOT_9), | |
332 | GPIO_GROUP(BOOT_10), | |
333 | GPIO_GROUP(BOOT_11), | |
334 | GPIO_GROUP(BOOT_12), | |
335 | GPIO_GROUP(BOOT_13), | |
336 | GPIO_GROUP(BOOT_14), | |
337 | GPIO_GROUP(BOOT_15), | |
338 | ||
339 | GPIO_GROUP(CARD_0), | |
340 | GPIO_GROUP(CARD_1), | |
341 | GPIO_GROUP(CARD_2), | |
342 | GPIO_GROUP(CARD_3), | |
343 | GPIO_GROUP(CARD_4), | |
344 | GPIO_GROUP(CARD_5), | |
345 | GPIO_GROUP(CARD_6), | |
346 | ||
347 | GPIO_GROUP(GPIODV_0), | |
348 | GPIO_GROUP(GPIODV_1), | |
349 | GPIO_GROUP(GPIODV_2), | |
350 | GPIO_GROUP(GPIODV_3), | |
351 | GPIO_GROUP(GPIODV_4), | |
352 | GPIO_GROUP(GPIODV_5), | |
353 | GPIO_GROUP(GPIODV_6), | |
354 | GPIO_GROUP(GPIODV_7), | |
355 | GPIO_GROUP(GPIODV_8), | |
356 | GPIO_GROUP(GPIODV_9), | |
357 | GPIO_GROUP(GPIODV_10), | |
358 | GPIO_GROUP(GPIODV_11), | |
359 | GPIO_GROUP(GPIODV_12), | |
360 | GPIO_GROUP(GPIODV_13), | |
361 | GPIO_GROUP(GPIODV_14), | |
362 | GPIO_GROUP(GPIODV_15), | |
363 | GPIO_GROUP(GPIODV_16), | |
364 | GPIO_GROUP(GPIODV_17), | |
365 | GPIO_GROUP(GPIODV_19), | |
366 | GPIO_GROUP(GPIODV_20), | |
367 | GPIO_GROUP(GPIODV_21), | |
368 | GPIO_GROUP(GPIODV_22), | |
369 | GPIO_GROUP(GPIODV_23), | |
370 | GPIO_GROUP(GPIODV_24), | |
371 | GPIO_GROUP(GPIODV_25), | |
372 | GPIO_GROUP(GPIODV_26), | |
373 | GPIO_GROUP(GPIODV_27), | |
374 | GPIO_GROUP(GPIODV_28), | |
375 | GPIO_GROUP(GPIODV_29), | |
376 | ||
377 | GPIO_GROUP(GPIOX_0), | |
378 | GPIO_GROUP(GPIOX_1), | |
379 | GPIO_GROUP(GPIOX_2), | |
380 | GPIO_GROUP(GPIOX_3), | |
381 | GPIO_GROUP(GPIOX_4), | |
382 | GPIO_GROUP(GPIOX_5), | |
383 | GPIO_GROUP(GPIOX_6), | |
384 | GPIO_GROUP(GPIOX_7), | |
385 | GPIO_GROUP(GPIOX_8), | |
386 | GPIO_GROUP(GPIOX_9), | |
387 | GPIO_GROUP(GPIOX_10), | |
388 | GPIO_GROUP(GPIOX_11), | |
389 | GPIO_GROUP(GPIOX_12), | |
390 | GPIO_GROUP(GPIOX_13), | |
391 | GPIO_GROUP(GPIOX_14), | |
392 | GPIO_GROUP(GPIOX_15), | |
393 | GPIO_GROUP(GPIOX_16), | |
394 | GPIO_GROUP(GPIOX_17), | |
395 | GPIO_GROUP(GPIOX_18), | |
396 | ||
397 | GPIO_GROUP(GPIOCLK_0), | |
398 | GPIO_GROUP(GPIOCLK_1), | |
399 | ||
400 | GPIO_GROUP(GPIO_TEST_N), | |
0f15f500 NA |
401 | |
402 | /* Bank X */ | |
403 | GROUP(sdio_d0, 5, 31), | |
404 | GROUP(sdio_d1, 5, 30), | |
405 | GROUP(sdio_d2, 5, 29), | |
406 | GROUP(sdio_d3, 5, 28), | |
6a0ab255 NA |
407 | GROUP(sdio_clk, 5, 27), |
408 | GROUP(sdio_cmd, 5, 26), | |
0f15f500 NA |
409 | GROUP(sdio_irq, 5, 24), |
410 | GROUP(uart_tx_a, 5, 19), | |
411 | GROUP(uart_rx_a, 5, 18), | |
412 | GROUP(uart_cts_a, 5, 17), | |
413 | GROUP(uart_rts_a, 5, 16), | |
414 | GROUP(uart_tx_c, 5, 13), | |
415 | GROUP(uart_rx_c, 5, 12), | |
6a0ab255 NA |
416 | GROUP(uart_cts_c, 5, 11), |
417 | GROUP(uart_rts_c, 5, 10), | |
cc97a95f | 418 | GROUP(pwm_a, 5, 25), |
0f15f500 | 419 | GROUP(pwm_e, 5, 15), |
cc97a95f | 420 | GROUP(pwm_f_x, 5, 14), |
477fa24e NA |
421 | GROUP(spi_mosi, 5, 3), |
422 | GROUP(spi_miso, 5, 2), | |
423 | GROUP(spi_ss0, 5, 1), | |
424 | GROUP(spi_sclk, 5, 0), | |
0f15f500 NA |
425 | |
426 | /* Bank Z */ | |
6a0ab255 NA |
427 | GROUP(eth_mdio, 4, 23), |
428 | GROUP(eth_mdc, 4, 22), | |
0f15f500 NA |
429 | GROUP(eth_clk_rx_clk, 4, 21), |
430 | GROUP(eth_rx_dv, 4, 20), | |
431 | GROUP(eth_rxd0, 4, 19), | |
432 | GROUP(eth_rxd1, 4, 18), | |
433 | GROUP(eth_rxd2, 4, 17), | |
434 | GROUP(eth_rxd3, 4, 16), | |
435 | GROUP(eth_rgmii_tx_clk, 4, 15), | |
436 | GROUP(eth_tx_en, 4, 14), | |
437 | GROUP(eth_txd0, 4, 13), | |
438 | GROUP(eth_txd1, 4, 12), | |
439 | GROUP(eth_txd2, 4, 11), | |
440 | GROUP(eth_txd3, 4, 10), | |
cc97a95f | 441 | GROUP(pwm_c, 3, 20), |
2899adf0 JB |
442 | GROUP(i2s_out_ch23_z, 3, 26), |
443 | GROUP(i2s_out_ch45_z, 3, 25), | |
444 | GROUP(i2s_out_ch67_z, 3, 24), | |
82e1e5cd NA |
445 | GROUP(eth_link_led, 4, 25), |
446 | GROUP(eth_act_led, 4, 24), | |
0f15f500 | 447 | |
1fe8d6cb NA |
448 | /* Bank H */ |
449 | GROUP(hdmi_hpd, 6, 31), | |
450 | GROUP(hdmi_sda, 6, 30), | |
451 | GROUP(hdmi_scl, 6, 29), | |
2899adf0 JB |
452 | GROUP(i2s_am_clk, 6, 26), |
453 | GROUP(i2s_out_ao_clk, 6, 25), | |
454 | GROUP(i2s_out_lr_clk, 6, 24), | |
455 | GROUP(i2s_out_ch01, 6, 23), | |
b840d649 | 456 | GROUP(spdif_out_h, 6, 28), |
1fe8d6cb | 457 | |
0f15f500 NA |
458 | /* Bank DV */ |
459 | GROUP(uart_tx_b, 2, 16), | |
460 | GROUP(uart_rx_b, 2, 15), | |
6a0ab255 NA |
461 | GROUP(uart_cts_b, 2, 14), |
462 | GROUP(uart_rts_b, 2, 13), | |
463 | GROUP(i2c_sda_c_dv18, 1, 17), | |
464 | GROUP(i2c_sck_c_dv19, 1, 16), | |
465 | GROUP(i2c_sda_a, 1, 15), | |
466 | GROUP(i2c_sck_a, 1, 14), | |
467 | GROUP(i2c_sda_b, 1, 13), | |
468 | GROUP(i2c_sck_b, 1, 12), | |
469 | GROUP(i2c_sda_c, 1, 11), | |
470 | GROUP(i2c_sck_c, 1, 10), | |
cc97a95f MB |
471 | GROUP(pwm_b, 2, 11), |
472 | GROUP(pwm_d, 2, 12), | |
5a6ae9b8 JB |
473 | GROUP(tsin_a_d0, 2, 4), |
474 | GROUP(tsin_a_dp, 2, 3), | |
475 | GROUP(tsin_a_clk, 2, 2), | |
476 | GROUP(tsin_a_sop, 2, 1), | |
477 | GROUP(tsin_a_d_valid, 2, 0), | |
478 | GROUP(tsin_a_fail, 1, 31), | |
0f15f500 NA |
479 | |
480 | /* Bank BOOT */ | |
481 | GROUP(emmc_nand_d07, 7, 31), | |
482 | GROUP(emmc_clk, 7, 30), | |
483 | GROUP(emmc_cmd, 7, 29), | |
484 | GROUP(emmc_ds, 7, 28), | |
6a0ab255 NA |
485 | GROUP(nor_d, 7, 13), |
486 | GROUP(nor_q, 7, 12), | |
487 | GROUP(nor_c, 7, 11), | |
488 | GROUP(nor_cs, 7, 10), | |
0f15f500 NA |
489 | GROUP(nand_ce0, 7, 7), |
490 | GROUP(nand_ce1, 7, 6), | |
491 | GROUP(nand_rb0, 7, 5), | |
492 | GROUP(nand_ale, 7, 4), | |
493 | GROUP(nand_cle, 7, 3), | |
494 | GROUP(nand_wen_clk, 7, 2), | |
495 | GROUP(nand_ren_wr, 7, 1), | |
496 | GROUP(nand_dqs, 7, 0), | |
497 | ||
498 | /* Bank CARD */ | |
499 | GROUP(sdcard_d1, 6, 5), | |
500 | GROUP(sdcard_d0, 6, 4), | |
501 | GROUP(sdcard_d3, 6, 1), | |
502 | GROUP(sdcard_d2, 6, 0), | |
503 | GROUP(sdcard_cmd, 6, 2), | |
504 | GROUP(sdcard_clk, 6, 3), | |
cc97a95f MB |
505 | |
506 | /* Bank CLK */ | |
507 | GROUP(pwm_f_clk, 8, 30), | |
0f15f500 NA |
508 | }; |
509 | ||
510 | static struct meson_pmx_group meson_gxl_aobus_groups[] = { | |
634e40b0 JB |
511 | GPIO_GROUP(GPIOAO_0), |
512 | GPIO_GROUP(GPIOAO_1), | |
513 | GPIO_GROUP(GPIOAO_2), | |
514 | GPIO_GROUP(GPIOAO_3), | |
515 | GPIO_GROUP(GPIOAO_4), | |
516 | GPIO_GROUP(GPIOAO_5), | |
517 | GPIO_GROUP(GPIOAO_6), | |
518 | GPIO_GROUP(GPIOAO_7), | |
519 | GPIO_GROUP(GPIOAO_8), | |
520 | GPIO_GROUP(GPIOAO_9), | |
0f15f500 NA |
521 | |
522 | /* bank AO */ | |
6a0ab255 NA |
523 | GROUP(uart_tx_ao_b_0, 0, 26), |
524 | GROUP(uart_rx_ao_b_1, 0, 25), | |
b27e3648 | 525 | GROUP(uart_tx_ao_b, 0, 24), |
6a0ab255 | 526 | GROUP(uart_rx_ao_b, 0, 23), |
0f15f500 NA |
527 | GROUP(uart_tx_ao_a, 0, 12), |
528 | GROUP(uart_rx_ao_a, 0, 11), | |
529 | GROUP(uart_cts_ao_a, 0, 10), | |
530 | GROUP(uart_rts_ao_a, 0, 9), | |
531 | GROUP(uart_cts_ao_b, 0, 8), | |
532 | GROUP(uart_rts_ao_b, 0, 7), | |
6a0ab255 NA |
533 | GROUP(i2c_sck_ao, 0, 6), |
534 | GROUP(i2c_sda_ao, 0, 5), | |
535 | GROUP(i2c_slave_sck_ao, 0, 2), | |
536 | GROUP(i2c_slave_sda_ao, 0, 1), | |
0f15f500 | 537 | GROUP(remote_input_ao, 0, 0), |
cc97a95f | 538 | GROUP(pwm_ao_a_3, 0, 22), |
6a0ab255 | 539 | GROUP(pwm_ao_b_6, 0, 18), |
cc97a95f | 540 | GROUP(pwm_ao_a_8, 0, 17), |
cff2b010 | 541 | GROUP(pwm_ao_b, 0, 3), |
2899adf0 JB |
542 | GROUP(i2s_out_ch23_ao, 1, 0), |
543 | GROUP(i2s_out_ch45_ao, 1, 1), | |
b840d649 JB |
544 | GROUP(spdif_out_ao_6, 0, 16), |
545 | GROUP(spdif_out_ao_9, 0, 4), | |
690dead2 NA |
546 | GROUP(ao_cec, 0, 15), |
547 | GROUP(ee_cec, 0, 14), | |
d51b989b JB |
548 | |
549 | /* test n pin */ | |
550 | GROUP(i2s_out_ch67_ao, 1, 2), | |
0f15f500 NA |
551 | }; |
552 | ||
553 | static const char * const gpio_periphs_groups[] = { | |
554 | "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", | |
555 | "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", | |
556 | "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", | |
557 | "GPIOZ_15", | |
558 | ||
559 | "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", | |
560 | "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", | |
561 | ||
562 | "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", | |
563 | "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", | |
564 | "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", | |
565 | "BOOT_15", | |
566 | ||
567 | "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", | |
568 | "CARD_5", "CARD_6", | |
569 | ||
570 | "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", | |
571 | "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", | |
572 | "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", | |
573 | "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", | |
574 | "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", | |
575 | "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", | |
576 | ||
577 | "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", | |
578 | "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", | |
579 | "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", | |
580 | "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", | |
0f15f500 NA |
581 | }; |
582 | ||
583 | static const char * const emmc_groups[] = { | |
584 | "emmc_nand_d07", "emmc_clk", "emmc_cmd", "emmc_ds", | |
585 | }; | |
586 | ||
6a0ab255 NA |
587 | static const char * const nor_groups[] = { |
588 | "nor_d", "nor_q", "nor_c", "nor_cs", | |
589 | }; | |
590 | ||
477fa24e NA |
591 | static const char * const spi_groups[] = { |
592 | "spi_mosi", "spi_miso", "spi_ss0", "spi_sclk", | |
593 | }; | |
594 | ||
0f15f500 NA |
595 | static const char * const sdcard_groups[] = { |
596 | "sdcard_d0", "sdcard_d1", "sdcard_d2", "sdcard_d3", | |
597 | "sdcard_cmd", "sdcard_clk", | |
598 | }; | |
599 | ||
600 | static const char * const sdio_groups[] = { | |
601 | "sdio_d0", "sdio_d1", "sdio_d2", "sdio_d3", | |
602 | "sdio_cmd", "sdio_clk", "sdio_irq", | |
603 | }; | |
604 | ||
605 | static const char * const nand_groups[] = { | |
c0136ef6 YL |
606 | "emmc_nand_d07", "nand_ce0", "nand_ce1", "nand_rb0", "nand_ale", |
607 | "nand_cle", "nand_wen_clk", "nand_ren_wr", "nand_dqs", | |
0f15f500 NA |
608 | }; |
609 | ||
610 | static const char * const uart_a_groups[] = { | |
611 | "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a", | |
612 | }; | |
613 | ||
614 | static const char * const uart_b_groups[] = { | |
6a0ab255 | 615 | "uart_tx_b", "uart_rx_b", "uart_cts_b", "uart_rts_b", |
0f15f500 NA |
616 | }; |
617 | ||
618 | static const char * const uart_c_groups[] = { | |
6a0ab255 | 619 | "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c", |
0f15f500 NA |
620 | }; |
621 | ||
622 | static const char * const i2c_a_groups[] = { | |
623 | "i2c_sck_a", "i2c_sda_a", | |
624 | }; | |
625 | ||
626 | static const char * const i2c_b_groups[] = { | |
627 | "i2c_sck_b", "i2c_sda_b", | |
628 | }; | |
629 | ||
630 | static const char * const i2c_c_groups[] = { | |
6a0ab255 | 631 | "i2c_sck_c", "i2c_sda_c", "i2c_sda_c_dv18", "i2c_sck_c_dv19", |
0f15f500 NA |
632 | }; |
633 | ||
634 | static const char * const eth_groups[] = { | |
635 | "eth_mdio", "eth_mdc", "eth_clk_rx_clk", "eth_rx_dv", | |
636 | "eth_rxd0", "eth_rxd1", "eth_rxd2", "eth_rxd3", | |
637 | "eth_rgmii_tx_clk", "eth_tx_en", | |
638 | "eth_txd0", "eth_txd1", "eth_txd2", "eth_txd3", | |
639 | }; | |
640 | ||
cc97a95f MB |
641 | static const char * const pwm_a_groups[] = { |
642 | "pwm_a", | |
643 | }; | |
644 | ||
645 | static const char * const pwm_b_groups[] = { | |
646 | "pwm_b", | |
647 | }; | |
648 | ||
649 | static const char * const pwm_c_groups[] = { | |
650 | "pwm_c", | |
651 | }; | |
652 | ||
653 | static const char * const pwm_d_groups[] = { | |
654 | "pwm_d", | |
655 | }; | |
656 | ||
0f15f500 NA |
657 | static const char * const pwm_e_groups[] = { |
658 | "pwm_e", | |
659 | }; | |
660 | ||
cc97a95f MB |
661 | static const char * const pwm_f_groups[] = { |
662 | "pwm_f_clk", "pwm_f_x", | |
663 | }; | |
664 | ||
1fe8d6cb NA |
665 | static const char * const hdmi_hpd_groups[] = { |
666 | "hdmi_hpd", | |
667 | }; | |
668 | ||
669 | static const char * const hdmi_i2c_groups[] = { | |
670 | "hdmi_sda", "hdmi_scl", | |
671 | }; | |
672 | ||
2899adf0 JB |
673 | static const char * const i2s_out_groups[] = { |
674 | "i2s_am_clk", "i2s_out_ao_clk", "i2s_out_lr_clk", | |
675 | "i2s_out_ch01", "i2s_out_ch23_z", "i2s_out_ch45_z", "i2s_out_ch67_z", | |
676 | }; | |
677 | ||
b840d649 JB |
678 | static const char * const spdif_out_groups[] = { |
679 | "spdif_out_h", | |
680 | }; | |
681 | ||
82e1e5cd NA |
682 | static const char * const eth_led_groups[] = { |
683 | "eth_link_led", "eth_act_led", | |
684 | }; | |
685 | ||
5a6ae9b8 | 686 | static const char * const tsin_a_groups[] = { |
d801064c NA |
687 | "tsin_a_clk", "tsin_a_sop", |
688 | "tsin_a_d_valid", "tsin_a_d0", | |
5a6ae9b8 JB |
689 | "tsin_a_dp", "tsin_a_fail", |
690 | }; | |
691 | ||
0f15f500 NA |
692 | static const char * const gpio_aobus_groups[] = { |
693 | "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", | |
694 | "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", | |
e891a5a4 JB |
695 | |
696 | "GPIO_TEST_N", | |
0f15f500 NA |
697 | }; |
698 | ||
699 | static const char * const uart_ao_groups[] = { | |
700 | "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a", | |
701 | }; | |
702 | ||
703 | static const char * const uart_ao_b_groups[] = { | |
704 | "uart_tx_ao_b", "uart_rx_ao_b", "uart_cts_ao_b", "uart_rts_ao_b", | |
6a0ab255 NA |
705 | "uart_tx_ao_b_0", "uart_rx_ao_b_1", |
706 | }; | |
707 | ||
708 | static const char * const i2c_ao_groups[] = { | |
709 | "i2c_sck_ao", "i2c_sda_ao", | |
710 | }; | |
711 | ||
712 | static const char * const i2c_slave_ao_groups[] = { | |
713 | "i2c_slave_sck_ao", "i2c_slave_sda_ao", | |
0f15f500 NA |
714 | }; |
715 | ||
716 | static const char * const remote_input_ao_groups[] = { | |
717 | "remote_input_ao", | |
718 | }; | |
719 | ||
cc97a95f MB |
720 | static const char * const pwm_ao_a_groups[] = { |
721 | "pwm_ao_a_3", "pwm_ao_a_8", | |
722 | }; | |
723 | ||
cff2b010 | 724 | static const char * const pwm_ao_b_groups[] = { |
6a0ab255 | 725 | "pwm_ao_b", "pwm_ao_b_6", |
cff2b010 MB |
726 | }; |
727 | ||
2899adf0 | 728 | static const char * const i2s_out_ao_groups[] = { |
d51b989b | 729 | "i2s_out_ch23_ao", "i2s_out_ch45_ao", "i2s_out_ch67_ao", |
2899adf0 JB |
730 | }; |
731 | ||
b840d649 JB |
732 | static const char * const spdif_out_ao_groups[] = { |
733 | "spdif_out_ao_6", "spdif_out_ao_9", | |
734 | }; | |
735 | ||
690dead2 NA |
736 | static const char * const cec_ao_groups[] = { |
737 | "ao_cec", "ee_cec", | |
738 | }; | |
739 | ||
0f15f500 NA |
740 | static struct meson_pmx_func meson_gxl_periphs_functions[] = { |
741 | FUNCTION(gpio_periphs), | |
742 | FUNCTION(emmc), | |
6a0ab255 | 743 | FUNCTION(nor), |
477fa24e | 744 | FUNCTION(spi), |
0f15f500 NA |
745 | FUNCTION(sdcard), |
746 | FUNCTION(sdio), | |
747 | FUNCTION(nand), | |
748 | FUNCTION(uart_a), | |
749 | FUNCTION(uart_b), | |
750 | FUNCTION(uart_c), | |
751 | FUNCTION(i2c_a), | |
752 | FUNCTION(i2c_b), | |
753 | FUNCTION(i2c_c), | |
754 | FUNCTION(eth), | |
cc97a95f MB |
755 | FUNCTION(pwm_a), |
756 | FUNCTION(pwm_b), | |
757 | FUNCTION(pwm_c), | |
758 | FUNCTION(pwm_d), | |
0f15f500 | 759 | FUNCTION(pwm_e), |
cc97a95f | 760 | FUNCTION(pwm_f), |
1fe8d6cb NA |
761 | FUNCTION(hdmi_hpd), |
762 | FUNCTION(hdmi_i2c), | |
2899adf0 | 763 | FUNCTION(i2s_out), |
b840d649 | 764 | FUNCTION(spdif_out), |
82e1e5cd | 765 | FUNCTION(eth_led), |
5a6ae9b8 | 766 | FUNCTION(tsin_a), |
0f15f500 NA |
767 | }; |
768 | ||
769 | static struct meson_pmx_func meson_gxl_aobus_functions[] = { | |
770 | FUNCTION(gpio_aobus), | |
771 | FUNCTION(uart_ao), | |
772 | FUNCTION(uart_ao_b), | |
6a0ab255 NA |
773 | FUNCTION(i2c_ao), |
774 | FUNCTION(i2c_slave_ao), | |
0f15f500 | 775 | FUNCTION(remote_input_ao), |
cc97a95f | 776 | FUNCTION(pwm_ao_a), |
cff2b010 | 777 | FUNCTION(pwm_ao_b), |
2899adf0 | 778 | FUNCTION(i2s_out_ao), |
b840d649 | 779 | FUNCTION(spdif_out_ao), |
690dead2 | 780 | FUNCTION(cec_ao), |
0f15f500 NA |
781 | }; |
782 | ||
783 | static struct meson_bank meson_gxl_periphs_banks[] = { | |
634e40b0 JB |
784 | /* name first last irq pullen pull dir out in */ |
785 | BANK("X", GPIOX_0, GPIOX_18, 89, 107, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0), | |
786 | BANK("DV", GPIODV_0, GPIODV_29, 83, 88, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0), | |
787 | BANK("H", GPIOH_0, GPIOH_9, 26, 35, 1, 20, 1, 20, 3, 20, 4, 20, 5, 20), | |
788 | BANK("Z", GPIOZ_0, GPIOZ_15, 10, 25, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0), | |
789 | BANK("CARD", CARD_0, CARD_6, 52, 58, 2, 20, 2, 20, 6, 20, 7, 20, 8, 20), | |
790 | BANK("BOOT", BOOT_0, BOOT_15, 36, 51, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0), | |
791 | BANK("CLK", GPIOCLK_0, GPIOCLK_1, 108, 109, 3, 28, 3, 28, 9, 28, 10, 28, 11, 28), | |
0f15f500 NA |
792 | }; |
793 | ||
794 | static struct meson_bank meson_gxl_aobus_banks[] = { | |
634e40b0 | 795 | /* name first last irq pullen pull dir out in */ |
ed3a2b74 | 796 | BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0), |
0f15f500 NA |
797 | }; |
798 | ||
277d14eb | 799 | static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { |
0f15f500 | 800 | .name = "periphs-banks", |
0f15f500 NA |
801 | .pins = meson_gxl_periphs_pins, |
802 | .groups = meson_gxl_periphs_groups, | |
803 | .funcs = meson_gxl_periphs_functions, | |
804 | .banks = meson_gxl_periphs_banks, | |
805 | .num_pins = ARRAY_SIZE(meson_gxl_periphs_pins), | |
806 | .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), | |
807 | .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), | |
808 | .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), | |
ce385aa2 | 809 | .pmx_ops = &meson8_pmx_ops, |
0f15f500 NA |
810 | }; |
811 | ||
277d14eb | 812 | static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { |
0f15f500 | 813 | .name = "aobus-banks", |
0f15f500 NA |
814 | .pins = meson_gxl_aobus_pins, |
815 | .groups = meson_gxl_aobus_groups, | |
816 | .funcs = meson_gxl_aobus_functions, | |
817 | .banks = meson_gxl_aobus_banks, | |
818 | .num_pins = ARRAY_SIZE(meson_gxl_aobus_pins), | |
819 | .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), | |
820 | .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), | |
821 | .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), | |
ce385aa2 | 822 | .pmx_ops = &meson8_pmx_ops, |
0f15f500 | 823 | }; |
277d14eb JB |
824 | |
825 | static const struct of_device_id meson_gxl_pinctrl_dt_match[] = { | |
826 | { | |
827 | .compatible = "amlogic,meson-gxl-periphs-pinctrl", | |
828 | .data = &meson_gxl_periphs_pinctrl_data, | |
829 | }, | |
830 | { | |
831 | .compatible = "amlogic,meson-gxl-aobus-pinctrl", | |
832 | .data = &meson_gxl_aobus_pinctrl_data, | |
833 | }, | |
834 | { }, | |
835 | }; | |
836 | ||
837 | static struct platform_driver meson_gxl_pinctrl_driver = { | |
838 | .probe = meson_pinctrl_probe, | |
839 | .driver = { | |
840 | .name = "meson-gxl-pinctrl", | |
841 | .of_match_table = meson_gxl_pinctrl_dt_match, | |
842 | }, | |
843 | }; | |
844 | builtin_platform_driver(meson_gxl_pinctrl_driver); |