Commit | Line | Data |
---|---|---|
875a92b3 | 1 | # SPDX-License-Identifier: GPL-2.0 |
5fae8b86 | 2 | # Intel pin control drivers |
d2388172 | 3 | menu "Intel pinctrl drivers" |
22f57707 | 4 | depends on (ACPI && X86) || COMPILE_TEST |
5fae8b86 MW |
5 | |
6 | config PINCTRL_BAYTRAIL | |
7 | bool "Intel Baytrail GPIO pin control" | |
ce7793e9 | 8 | select PINCTRL_INTEL |
5fae8b86 MW |
9 | help |
10 | driver for memory mapped GPIO functionality on Intel Baytrail | |
11 | platforms. Supports 3 banks with 102, 28 and 44 gpios. | |
12 | Most pins are usually muxed to some other functionality by firmware, | |
13 | so only a small amount is available for gpio use. | |
14 | ||
15 | Requires ACPI device enumeration code to set up a platform device. | |
6e08d6bb MW |
16 | |
17 | config PINCTRL_CHERRYVIEW | |
18 | tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" | |
10c857f0 | 19 | select PINCTRL_INTEL |
6e08d6bb MW |
20 | help |
21 | Cherryview/Braswell pinctrl driver provides an interface that | |
22 | allows configuring of SoC pins and using them as GPIOs. | |
7981c001 | 23 | |
eb83479e AS |
24 | config PINCTRL_LYNXPOINT |
25 | tristate "Intel Lynxpoint pinctrl and GPIO driver" | |
976cf4a6 | 26 | select PINCTRL_INTEL |
eb83479e AS |
27 | help |
28 | Lynxpoint is the PCH of Intel Haswell. This pinctrl driver | |
29 | provides an interface that allows configuring of PCH pins and | |
30 | using them as GPIOs. | |
31 | ||
7981c001 MW |
32 | config PINCTRL_INTEL |
33 | tristate | |
34 | select PINMUX | |
35 | select PINCONF | |
36 | select GENERIC_PINCONF | |
37 | select GPIOLIB | |
38 | select GPIOLIB_IRQCHIP | |
39 | ||
c5860e4a AS |
40 | config PINCTRL_INTEL_PLATFORM |
41 | tristate "Intel pinctrl and GPIO platform driver" | |
42 | depends on ACPI | |
43 | select PINCTRL_INTEL | |
44 | help | |
45 | This pinctrl driver provides an interface that allows configuring | |
46 | of Intel PCH pins and using them as GPIOs. Currently the following | |
47 | Intel SoCs / platforms require this to be functional: | |
48 | - Lunar Lake | |
49 | ||
e789e61f AS |
50 | config PINCTRL_ALDERLAKE |
51 | tristate "Intel Alder Lake pinctrl and GPIO driver" | |
e789e61f AS |
52 | select PINCTRL_INTEL |
53 | help | |
54 | This pinctrl driver provides an interface that allows configuring | |
55 | of Intel Alder Lake PCH pins and using them as GPIOs. | |
56 | ||
ee1a6ca4 MW |
57 | config PINCTRL_BROXTON |
58 | tristate "Intel Broxton pinctrl and GPIO driver" | |
ee1a6ca4 MW |
59 | select PINCTRL_INTEL |
60 | help | |
61 | Broxton pinctrl driver provides an interface that allows | |
62 | configuring of SoC pins and using them as GPIOs. | |
63 | ||
19a8a777 MW |
64 | config PINCTRL_CANNONLAKE |
65 | tristate "Intel Cannon Lake PCH pinctrl and GPIO driver" | |
19a8a777 MW |
66 | select PINCTRL_INTEL |
67 | help | |
68 | This pinctrl driver provides an interface that allows configuring | |
69 | of Intel Cannon Lake PCH pins and using them as GPIOs. | |
70 | ||
0f80dbc1 MW |
71 | config PINCTRL_CEDARFORK |
72 | tristate "Intel Cedar Fork pinctrl and GPIO driver" | |
0f80dbc1 MW |
73 | select PINCTRL_INTEL |
74 | help | |
75 | This pinctrl driver provides an interface that allows configuring | |
76 | of Intel Cedar Fork PCH pins and using them as GPIOs. | |
77 | ||
75bb10b4 MW |
78 | config PINCTRL_DENVERTON |
79 | tristate "Intel Denverton pinctrl and GPIO driver" | |
75bb10b4 MW |
80 | select PINCTRL_INTEL |
81 | help | |
82 | This pinctrl driver provides an interface that allows configuring | |
83 | of Intel Denverton SoC pins and using them as GPIOs. | |
c969afb4 AS |
84 | |
85 | config PINCTRL_ELKHARTLAKE | |
86 | tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver" | |
c969afb4 AS |
87 | select PINCTRL_INTEL |
88 | help | |
89 | This pinctrl driver provides an interface that allows configuring | |
90 | of Intel Elkhart Lake SoC pins and using them as GPIOs. | |
75bb10b4 | 91 | |
b4f2fcb5 AS |
92 | config PINCTRL_EMMITSBURG |
93 | tristate "Intel Emmitsburg pinctrl and GPIO driver" | |
b4f2fcb5 AS |
94 | select PINCTRL_INTEL |
95 | help | |
96 | This pinctrl driver provides an interface that allows configuring | |
97 | of Intel Emmitsburg pins and using them as GPIOs. | |
98 | ||
6693f9f9 MW |
99 | config PINCTRL_GEMINILAKE |
100 | tristate "Intel Gemini Lake SoC pinctrl and GPIO driver" | |
6693f9f9 MW |
101 | select PINCTRL_INTEL |
102 | help | |
103 | This pinctrl driver provides an interface that allows configuring | |
104 | of Intel Gemini Lake SoC pins and using them as GPIOs. | |
105 | ||
e6800d26 AS |
106 | config PINCTRL_ICELAKE |
107 | tristate "Intel Ice Lake PCH pinctrl and GPIO driver" | |
e6800d26 AS |
108 | select PINCTRL_INTEL |
109 | help | |
110 | This pinctrl driver provides an interface that allows configuring | |
111 | of Intel Ice Lake PCH pins and using them as GPIOs. | |
112 | ||
e278dcb7 AS |
113 | config PINCTRL_JASPERLAKE |
114 | tristate "Intel Jasper Lake PCH pinctrl and GPIO driver" | |
e278dcb7 AS |
115 | select PINCTRL_INTEL |
116 | help | |
117 | This pinctrl driver provides an interface that allows configuring | |
118 | of Intel Jasper Lake PCH pins and using them as GPIOs. | |
119 | ||
866c9c55 AS |
120 | config PINCTRL_LAKEFIELD |
121 | tristate "Intel Lakefield SoC pinctrl and GPIO driver" | |
866c9c55 AS |
122 | select PINCTRL_INTEL |
123 | help | |
124 | This pinctrl driver provides an interface that allows configuring | |
125 | of Intel Lakefield SoC pins and using them as GPIOs. | |
126 | ||
e480b745 MW |
127 | config PINCTRL_LEWISBURG |
128 | tristate "Intel Lewisburg pinctrl and GPIO driver" | |
e480b745 MW |
129 | select PINCTRL_INTEL |
130 | help | |
131 | This pinctrl driver provides an interface that allows configuring | |
132 | of Intel Lewisburg pins and using them as GPIOs. | |
133 | ||
25097de7 AS |
134 | config PINCTRL_METEORLAKE |
135 | tristate "Intel Meteor Lake pinctrl and GPIO driver" | |
25097de7 AS |
136 | select PINCTRL_INTEL |
137 | help | |
138 | This pinctrl driver provides an interface that allows configuring | |
139 | of Intel Meteor Lake pins and using them as GPIOs. | |
140 | ||
ebe7f339 AS |
141 | config PINCTRL_METEORPOINT |
142 | tristate "Intel Meteor Point pinctrl and GPIO driver" | |
143 | depends on ACPI | |
144 | select PINCTRL_INTEL | |
145 | help | |
146 | Meteor Point is the PCH of Intel Meteor Lake. This pinctrl driver | |
147 | provides an interface that allows configuring of PCH pins and | |
148 | using them as GPIOs. | |
149 | ||
7981c001 MW |
150 | config PINCTRL_SUNRISEPOINT |
151 | tristate "Intel Sunrisepoint pinctrl and GPIO driver" | |
7981c001 MW |
152 | select PINCTRL_INTEL |
153 | help | |
154 | Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver | |
155 | provides an interface that allows configuring of PCH pins and | |
156 | using them as GPIOs. | |
29ddbb81 | 157 | |
c9ccf71f AS |
158 | config PINCTRL_TIGERLAKE |
159 | tristate "Intel Tiger Lake pinctrl and GPIO driver" | |
c9ccf71f AS |
160 | select PINCTRL_INTEL |
161 | help | |
162 | This pinctrl driver provides an interface that allows configuring | |
163 | of Intel Tiger Lake PCH pins and using them as GPIOs. | |
4670abbb | 164 | |
79433559 | 165 | source "drivers/pinctrl/intel/Kconfig.tng" |
d2388172 | 166 | endmenu |