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9952f691 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
57291ce2 SW |
2 | /* |
3 | * Device tree integration for the pin control subsystem | |
4 | * | |
5 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. | |
57291ce2 SW |
6 | */ |
7 | ||
8 | #include <linux/device.h> | |
9 | #include <linux/of.h> | |
10 | #include <linux/pinctrl/pinctrl.h> | |
11 | #include <linux/slab.h> | |
12 | ||
13 | #include "core.h" | |
14 | #include "devicetree.h" | |
15 | ||
16 | /** | |
17 | * struct pinctrl_dt_map - mapping table chunk parsed from device tree | |
18 | * @node: list node for struct pinctrl's @dt_maps field | |
19 | * @pctldev: the pin controller that allocated this struct, and will free it | |
0b93a57a LJ |
20 | * @map: the mapping table entries |
21 | * @num_maps: number of mapping table entries | |
57291ce2 SW |
22 | */ |
23 | struct pinctrl_dt_map { | |
24 | struct list_head node; | |
25 | struct pinctrl_dev *pctldev; | |
26 | struct pinctrl_map *map; | |
27 | unsigned num_maps; | |
28 | }; | |
29 | ||
30 | static void dt_free_map(struct pinctrl_dev *pctldev, | |
31 | struct pinctrl_map *map, unsigned num_maps) | |
32 | { | |
be4c60b5 WD |
33 | int i; |
34 | ||
35 | for (i = 0; i < num_maps; ++i) { | |
36 | kfree_const(map[i].dev_name); | |
37 | map[i].dev_name = NULL; | |
38 | } | |
39 | ||
57291ce2 | 40 | if (pctldev) { |
022ab148 | 41 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; |
92c2b671 TL |
42 | if (ops->dt_free_map) |
43 | ops->dt_free_map(pctldev, map, num_maps); | |
57291ce2 SW |
44 | } else { |
45 | /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */ | |
46 | kfree(map); | |
47 | } | |
48 | } | |
49 | ||
50 | void pinctrl_dt_free_maps(struct pinctrl *p) | |
51 | { | |
52 | struct pinctrl_dt_map *dt_map, *n1; | |
53 | ||
54 | list_for_each_entry_safe(dt_map, n1, &p->dt_maps, node) { | |
c72bed23 | 55 | pinctrl_unregister_mappings(dt_map->map); |
57291ce2 SW |
56 | list_del(&dt_map->node); |
57 | dt_free_map(dt_map->pctldev, dt_map->map, | |
58 | dt_map->num_maps); | |
59 | kfree(dt_map); | |
60 | } | |
61 | ||
62 | of_node_put(p->dev->of_node); | |
63 | } | |
64 | ||
65 | static int dt_remember_or_free_map(struct pinctrl *p, const char *statename, | |
66 | struct pinctrl_dev *pctldev, | |
67 | struct pinctrl_map *map, unsigned num_maps) | |
68 | { | |
69 | int i; | |
70 | struct pinctrl_dt_map *dt_map; | |
71 | ||
72 | /* Initialize common mapping table entry fields */ | |
73 | for (i = 0; i < num_maps; i++) { | |
be4c60b5 WD |
74 | const char *devname; |
75 | ||
76 | devname = kstrdup_const(dev_name(p->dev), GFP_KERNEL); | |
77 | if (!devname) | |
78 | goto err_free_map; | |
79 | ||
80 | map[i].dev_name = devname; | |
57291ce2 SW |
81 | map[i].name = statename; |
82 | if (pctldev) | |
83 | map[i].ctrl_dev_name = dev_name(pctldev->dev); | |
84 | } | |
85 | ||
86 | /* Remember the converted mapping table entries */ | |
87 | dt_map = kzalloc(sizeof(*dt_map), GFP_KERNEL); | |
be4c60b5 WD |
88 | if (!dt_map) |
89 | goto err_free_map; | |
57291ce2 SW |
90 | |
91 | dt_map->pctldev = pctldev; | |
92 | dt_map->map = map; | |
93 | dt_map->num_maps = num_maps; | |
94 | list_add_tail(&dt_map->node, &p->dt_maps); | |
95 | ||
c72bed23 | 96 | return pinctrl_register_mappings(map, num_maps); |
be4c60b5 WD |
97 | |
98 | err_free_map: | |
99 | dt_free_map(pctldev, map, num_maps); | |
100 | return -ENOMEM; | |
57291ce2 SW |
101 | } |
102 | ||
1e63d7b9 | 103 | struct pinctrl_dev *of_pinctrl_get(struct device_node *np) |
f23f1516 | 104 | { |
fb00de77 | 105 | return get_pinctrl_dev_from_of_node(np); |
f23f1516 | 106 | } |
33dd8882 | 107 | EXPORT_SYMBOL_GPL(of_pinctrl_get); |
f23f1516 | 108 | |
99e4f675 | 109 | static int dt_to_map_one_config(struct pinctrl *p, |
bc3322bc | 110 | struct pinctrl_dev *hog_pctldev, |
99e4f675 | 111 | const char *statename, |
57291ce2 SW |
112 | struct device_node *np_config) |
113 | { | |
bc3322bc | 114 | struct pinctrl_dev *pctldev = NULL; |
57291ce2 | 115 | struct device_node *np_pctldev; |
022ab148 | 116 | const struct pinctrl_ops *ops; |
57291ce2 SW |
117 | int ret; |
118 | struct pinctrl_map *map; | |
119 | unsigned num_maps; | |
d19c5e79 | 120 | bool allow_default = false; |
57291ce2 SW |
121 | |
122 | /* Find the pin controller containing np_config */ | |
123 | np_pctldev = of_node_get(np_config); | |
124 | for (;;) { | |
d19c5e79 RH |
125 | if (!allow_default) |
126 | allow_default = of_property_read_bool(np_pctldev, | |
127 | "pinctrl-use-default"); | |
128 | ||
57291ce2 SW |
129 | np_pctldev = of_get_next_parent(np_pctldev); |
130 | if (!np_pctldev || of_node_is_root(np_pctldev)) { | |
57291ce2 | 131 | of_node_put(np_pctldev); |
bec6c0ec | 132 | ret = driver_deferred_probe_check_state(p->dev); |
84f28fc3 TR |
133 | /* keep deferring if modules are enabled */ |
134 | if (IS_ENABLED(CONFIG_MODULES) && !allow_default && ret < 0) | |
bec6c0ec JS |
135 | ret = -EPROBE_DEFER; |
136 | return ret; | |
57291ce2 | 137 | } |
b89405b6 | 138 | /* If we're creating a hog we can use the passed pctldev */ |
bc3322bc FE |
139 | if (hog_pctldev && (np_pctldev == p->dev->of_node)) { |
140 | pctldev = hog_pctldev; | |
b89405b6 | 141 | break; |
bc3322bc | 142 | } |
b89405b6 | 143 | pctldev = get_pinctrl_dev_from_of_node(np_pctldev); |
57291ce2 SW |
144 | if (pctldev) |
145 | break; | |
b2083062 LW |
146 | /* Do not defer probing of hogs (circular loop) */ |
147 | if (np_pctldev == p->dev->of_node) { | |
148 | of_node_put(np_pctldev); | |
149 | return -ENODEV; | |
150 | } | |
57291ce2 SW |
151 | } |
152 | of_node_put(np_pctldev); | |
153 | ||
154 | /* | |
155 | * Call pinctrl driver to parse device tree node, and | |
156 | * generate mapping table entries | |
157 | */ | |
158 | ops = pctldev->desc->pctlops; | |
159 | if (!ops->dt_node_to_map) { | |
160 | dev_err(p->dev, "pctldev %s doesn't support DT\n", | |
161 | dev_name(pctldev->dev)); | |
162 | return -ENODEV; | |
163 | } | |
164 | ret = ops->dt_node_to_map(pctldev, np_config, &map, &num_maps); | |
165 | if (ret < 0) | |
166 | return ret; | |
6e4f3db8 | 167 | else if (num_maps == 0) { |
168 | /* | |
169 | * If we have no valid maps (maybe caused by empty pinctrl node | |
170 | * or typing error) ther is no need remember this, so just | |
171 | * return. | |
172 | */ | |
173 | dev_info(p->dev, | |
174 | "there is not valid maps for state %s\n", statename); | |
175 | return 0; | |
176 | } | |
57291ce2 SW |
177 | |
178 | /* Stash the mapping table chunk away for later use */ | |
179 | return dt_remember_or_free_map(p, statename, pctldev, map, num_maps); | |
180 | } | |
181 | ||
182 | static int dt_remember_dummy_state(struct pinctrl *p, const char *statename) | |
183 | { | |
184 | struct pinctrl_map *map; | |
185 | ||
186 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
9b21e72e | 187 | if (!map) |
57291ce2 | 188 | return -ENOMEM; |
57291ce2 SW |
189 | |
190 | /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */ | |
191 | map->type = PIN_MAP_TYPE_DUMMY_STATE; | |
192 | ||
193 | return dt_remember_or_free_map(p, statename, NULL, map, 1); | |
194 | } | |
195 | ||
99e4f675 | 196 | int pinctrl_dt_to_map(struct pinctrl *p, struct pinctrl_dev *pctldev) |
57291ce2 SW |
197 | { |
198 | struct device_node *np = p->dev->of_node; | |
199 | int state, ret; | |
200 | char *propname; | |
201 | struct property *prop; | |
202 | const char *statename; | |
203 | const __be32 *list; | |
204 | int size, config; | |
205 | phandle phandle; | |
206 | struct device_node *np_config; | |
207 | ||
208 | /* CONFIG_OF enabled, p->dev not instantiated from DT */ | |
209 | if (!np) { | |
5d88dcea MB |
210 | if (of_have_populated_dt()) |
211 | dev_dbg(p->dev, | |
212 | "no of_node; not parsing pinctrl DT\n"); | |
57291ce2 SW |
213 | return 0; |
214 | } | |
215 | ||
216 | /* We may store pointers to property names within the node */ | |
217 | of_node_get(np); | |
218 | ||
219 | /* For each defined state ID */ | |
220 | for (state = 0; ; state++) { | |
221 | /* Retrieve the pinctrl-* property */ | |
222 | propname = kasprintf(GFP_KERNEL, "pinctrl-%d", state); | |
223 | prop = of_find_property(np, propname, &size); | |
224 | kfree(propname); | |
98849fa0 JH |
225 | if (!prop) { |
226 | if (state == 0) { | |
227 | of_node_put(np); | |
228 | return -ENODEV; | |
229 | } | |
57291ce2 | 230 | break; |
98849fa0 | 231 | } |
57291ce2 SW |
232 | list = prop->value; |
233 | size /= sizeof(*list); | |
234 | ||
235 | /* Determine whether pinctrl-names property names the state */ | |
236 | ret = of_property_read_string_index(np, "pinctrl-names", | |
237 | state, &statename); | |
238 | /* | |
239 | * If not, statename is just the integer state ID. But rather | |
240 | * than dynamically allocate it and have to free it later, | |
241 | * just point part way into the property name for the string. | |
242 | */ | |
f0b0e923 GU |
243 | if (ret < 0) |
244 | statename = prop->name + strlen("pinctrl-"); | |
57291ce2 SW |
245 | |
246 | /* For every referenced pin configuration node in it */ | |
247 | for (config = 0; config < size; config++) { | |
248 | phandle = be32_to_cpup(list++); | |
249 | ||
250 | /* Look up the pin configuration node */ | |
251 | np_config = of_find_node_by_phandle(phandle); | |
252 | if (!np_config) { | |
253 | dev_err(p->dev, | |
254 | "prop %s index %i invalid phandle\n", | |
255 | prop->name, config); | |
256 | ret = -EINVAL; | |
257 | goto err; | |
258 | } | |
259 | ||
260 | /* Parse the node */ | |
99e4f675 TL |
261 | ret = dt_to_map_one_config(p, pctldev, statename, |
262 | np_config); | |
57291ce2 SW |
263 | of_node_put(np_config); |
264 | if (ret < 0) | |
265 | goto err; | |
266 | } | |
267 | ||
268 | /* No entries in DT? Generate a dummy state table entry */ | |
269 | if (!size) { | |
270 | ret = dt_remember_dummy_state(p, statename); | |
271 | if (ret < 0) | |
272 | goto err; | |
273 | } | |
274 | } | |
275 | ||
276 | return 0; | |
277 | ||
278 | err: | |
279 | pinctrl_dt_free_maps(p); | |
280 | return ret; | |
281 | } | |
42124bc5 TL |
282 | |
283 | /* | |
284 | * For pinctrl binding, typically #pinctrl-cells is for the pin controller | |
285 | * device, so either parent or grandparent. See pinctrl-bindings.txt. | |
286 | */ | |
287 | static int pinctrl_find_cells_size(const struct device_node *np) | |
288 | { | |
289 | const char *cells_name = "#pinctrl-cells"; | |
290 | int cells_size, error; | |
291 | ||
292 | error = of_property_read_u32(np->parent, cells_name, &cells_size); | |
293 | if (error) { | |
294 | error = of_property_read_u32(np->parent->parent, | |
295 | cells_name, &cells_size); | |
296 | if (error) | |
297 | return -ENOENT; | |
298 | } | |
299 | ||
300 | return cells_size; | |
301 | } | |
302 | ||
303 | /** | |
304 | * pinctrl_get_list_and_count - Gets the list and it's cell size and number | |
305 | * @np: pointer to device node with the property | |
306 | * @list_name: property that contains the list | |
307 | * @list: pointer for the list found | |
308 | * @cells_size: pointer for the cell size found | |
309 | * @nr_elements: pointer for the number of elements found | |
310 | * | |
311 | * Typically np is a single pinctrl entry containing the list. | |
312 | */ | |
313 | static int pinctrl_get_list_and_count(const struct device_node *np, | |
314 | const char *list_name, | |
315 | const __be32 **list, | |
316 | int *cells_size, | |
317 | int *nr_elements) | |
318 | { | |
319 | int size; | |
320 | ||
321 | *cells_size = 0; | |
322 | *nr_elements = 0; | |
323 | ||
324 | *list = of_get_property(np, list_name, &size); | |
325 | if (!*list) | |
326 | return -ENOENT; | |
327 | ||
328 | *cells_size = pinctrl_find_cells_size(np); | |
329 | if (*cells_size < 0) | |
330 | return -ENOENT; | |
331 | ||
332 | /* First element is always the index within the pinctrl device */ | |
333 | *nr_elements = (size / sizeof(**list)) / (*cells_size + 1); | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
338 | /** | |
339 | * pinctrl_count_index_with_args - Count number of elements in a pinctrl entry | |
340 | * @np: pointer to device node with the property | |
341 | * @list_name: property that contains the list | |
342 | * | |
343 | * Counts the number of elements in a pinctrl array consisting of an index | |
344 | * within the controller and a number of u32 entries specified for each | |
345 | * entry. Note that device_node is always for the parent pin controller device. | |
346 | */ | |
347 | int pinctrl_count_index_with_args(const struct device_node *np, | |
348 | const char *list_name) | |
349 | { | |
350 | const __be32 *list; | |
351 | int size, nr_cells, error; | |
352 | ||
353 | error = pinctrl_get_list_and_count(np, list_name, &list, | |
354 | &nr_cells, &size); | |
355 | if (error) | |
356 | return error; | |
357 | ||
358 | return size; | |
359 | } | |
360 | EXPORT_SYMBOL_GPL(pinctrl_count_index_with_args); | |
361 | ||
362 | /** | |
363 | * pinctrl_copy_args - Populates of_phandle_args based on index | |
364 | * @np: pointer to device node with the property | |
365 | * @list: pointer to a list with the elements | |
366 | * @index: entry within the list of elements | |
367 | * @nr_cells: number of cells in the list | |
368 | * @nr_elem: number of elements for each entry in the list | |
369 | * @out_args: returned values | |
370 | * | |
371 | * Populates the of_phandle_args based on the index in the list. | |
372 | */ | |
373 | static int pinctrl_copy_args(const struct device_node *np, | |
374 | const __be32 *list, | |
375 | int index, int nr_cells, int nr_elem, | |
376 | struct of_phandle_args *out_args) | |
377 | { | |
378 | int i; | |
379 | ||
380 | memset(out_args, 0, sizeof(*out_args)); | |
381 | out_args->np = (struct device_node *)np; | |
382 | out_args->args_count = nr_cells + 1; | |
383 | ||
384 | if (index >= nr_elem) | |
385 | return -EINVAL; | |
386 | ||
387 | list += index * (nr_cells + 1); | |
388 | ||
389 | for (i = 0; i < nr_cells + 1; i++) | |
390 | out_args->args[i] = be32_to_cpup(list++); | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
395 | /** | |
396 | * pinctrl_parse_index_with_args - Find a node pointed by index in a list | |
397 | * @np: pointer to device node with the property | |
398 | * @list_name: property that contains the list | |
399 | * @index: index within the list | |
0b93a57a | 400 | * @out_args: entries in the list pointed by index |
42124bc5 TL |
401 | * |
402 | * Finds the selected element in a pinctrl array consisting of an index | |
403 | * within the controller and a number of u32 entries specified for each | |
404 | * entry. Note that device_node is always for the parent pin controller device. | |
405 | */ | |
406 | int pinctrl_parse_index_with_args(const struct device_node *np, | |
407 | const char *list_name, int index, | |
408 | struct of_phandle_args *out_args) | |
409 | { | |
410 | const __be32 *list; | |
411 | int nr_elem, nr_cells, error; | |
412 | ||
413 | error = pinctrl_get_list_and_count(np, list_name, &list, | |
414 | &nr_cells, &nr_elem); | |
415 | if (error || !nr_cells) | |
416 | return error; | |
417 | ||
418 | error = pinctrl_copy_args(np, list, index, nr_cells, nr_elem, | |
419 | out_args); | |
420 | if (error) | |
421 | return error; | |
422 | ||
423 | return 0; | |
424 | } | |
425 | EXPORT_SYMBOL_GPL(pinctrl_parse_index_with_args); |