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af873fce | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2744e8af LW |
2 | /* |
3 | * Core private header for the pin control subsystem | |
4 | * | |
5 | * Copyright (C) 2011 ST-Ericsson SA | |
6 | * Written on behalf of Linaro for ST-Ericsson | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
2744e8af LW |
9 | */ |
10 | ||
ab78029e | 11 | #include <linux/kref.h> |
e5530adc | 12 | #include <linux/list.h> |
57b676f9 SW |
13 | #include <linux/mutex.h> |
14 | #include <linux/radix-tree.h> | |
e5530adc AS |
15 | #include <linux/types.h> |
16 | ||
872acc32 | 17 | #include <linux/pinctrl/machine.h> |
ae6b4d85 | 18 | |
e5530adc AS |
19 | struct dentry; |
20 | struct device; | |
21 | struct device_node; | |
22 | struct module; | |
23 | ||
24 | struct pinctrl; | |
25 | struct pinctrl_desc; | |
ae6b4d85 | 26 | struct pinctrl_gpio_range; |
e5530adc | 27 | struct pinctrl_state; |
ae6b4d85 | 28 | |
2744e8af LW |
29 | /** |
30 | * struct pinctrl_dev - pin control class device | |
31 | * @node: node to include this pin controller in the global pin controller list | |
32 | * @desc: the pin controller descriptor supplied when initializing this pin | |
33 | * controller | |
34 | * @pin_desc_tree: each pin descriptor for this pin controller is stored in | |
35 | * this radix tree | |
c7059c5a TL |
36 | * @pin_group_tree: optionally each pin group can be stored in this radix tree |
37 | * @num_groups: optionally number of groups can be kept here | |
a76edc89 TL |
38 | * @pin_function_tree: optionally each function can be stored in this radix tree |
39 | * @num_functions: optionally number of functions can be kept here | |
2744e8af LW |
40 | * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller, |
41 | * ranges are added to this list at runtime | |
2744e8af LW |
42 | * @dev: the device entry for this pin controller |
43 | * @owner: module providing the pin controller, used for refcounting | |
44 | * @driver_data: driver data for drivers registering to the pin controller | |
45 | * subsystem | |
46919ae6 | 46 | * @p: result of pinctrl_get() for this device |
840a47ba JD |
47 | * @hog_default: default state for pins hogged by this device |
48 | * @hog_sleep: sleep state for pins hogged by this device | |
42fed7ba | 49 | * @mutex: mutex taken on each pin controller specific action |
befe5bdf | 50 | * @device_root: debugfs root for this device |
2744e8af LW |
51 | */ |
52 | struct pinctrl_dev { | |
53 | struct list_head node; | |
54 | struct pinctrl_desc *desc; | |
55 | struct radix_tree_root pin_desc_tree; | |
c033a718 | 56 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
57 | struct radix_tree_root pin_group_tree; |
58 | unsigned int num_groups; | |
a76edc89 TL |
59 | #endif |
60 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
61 | struct radix_tree_root pin_function_tree; | |
62 | unsigned int num_functions; | |
c033a718 | 63 | #endif |
2744e8af | 64 | struct list_head gpio_ranges; |
51cd24ee | 65 | struct device *dev; |
2744e8af LW |
66 | struct module *owner; |
67 | void *driver_data; | |
46919ae6 | 68 | struct pinctrl *p; |
840a47ba JD |
69 | struct pinctrl_state *hog_default; |
70 | struct pinctrl_state *hog_sleep; | |
42fed7ba | 71 | struct mutex mutex; |
02157160 TL |
72 | #ifdef CONFIG_DEBUG_FS |
73 | struct dentry *device_root; | |
74 | #endif | |
befe5bdf LW |
75 | }; |
76 | ||
77 | /** | |
78 | * struct pinctrl - per-device pin control state holder | |
79 | * @node: global list node | |
80 | * @dev: the device using this pin control handle | |
6e5e959d SW |
81 | * @states: a list of states for this device |
82 | * @state: the current state | |
57291ce2 SW |
83 | * @dt_maps: the mapping table chunks dynamically parsed from device tree for |
84 | * this device, if any | |
ab78029e | 85 | * @users: reference count |
befe5bdf LW |
86 | */ |
87 | struct pinctrl { | |
88 | struct list_head node; | |
89 | struct device *dev; | |
6e5e959d SW |
90 | struct list_head states; |
91 | struct pinctrl_state *state; | |
57291ce2 | 92 | struct list_head dt_maps; |
ab78029e | 93 | struct kref users; |
6e5e959d SW |
94 | }; |
95 | ||
96 | /** | |
97 | * struct pinctrl_state - a pinctrl state for a device | |
2c9abf80 | 98 | * @node: list node for struct pinctrl's @states field |
6e5e959d SW |
99 | * @name: the name of this state |
100 | * @settings: a list of settings for this state | |
101 | */ | |
102 | struct pinctrl_state { | |
103 | struct list_head node; | |
104 | const char *name; | |
7ecdb16f SW |
105 | struct list_head settings; |
106 | }; | |
107 | ||
1e2082b5 SW |
108 | /** |
109 | * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP | |
110 | * @group: the group selector to program | |
111 | * @func: the function selector to program | |
112 | */ | |
113 | struct pinctrl_setting_mux { | |
114 | unsigned group; | |
115 | unsigned func; | |
116 | }; | |
117 | ||
118 | /** | |
119 | * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_* | |
120 | * @group_or_pin: the group selector or pin ID to program | |
121 | * @configs: a pointer to an array of config parameters/values to program into | |
122 | * hardware. Each individual pin controller defines the format and meaning | |
123 | * of config parameters. | |
124 | * @num_configs: the number of entries in array @configs | |
125 | */ | |
126 | struct pinctrl_setting_configs { | |
127 | unsigned group_or_pin; | |
128 | unsigned long *configs; | |
129 | unsigned num_configs; | |
130 | }; | |
131 | ||
7ecdb16f | 132 | /** |
872acc32 | 133 | * struct pinctrl_setting - an individual mux or config setting |
6e5e959d | 134 | * @node: list node for struct pinctrl_settings's @settings field |
1e2082b5 | 135 | * @type: the type of setting |
57291ce2 SW |
136 | * @pctldev: pin control device handling to be programmed. Not used for |
137 | * PIN_MAP_TYPE_DUMMY_STATE. | |
1a78958d | 138 | * @dev_name: the name of the device using this state |
1e2082b5 | 139 | * @data: Data specific to the setting type |
7ecdb16f SW |
140 | */ |
141 | struct pinctrl_setting { | |
142 | struct list_head node; | |
1e2082b5 | 143 | enum pinctrl_map_type type; |
befe5bdf | 144 | struct pinctrl_dev *pctldev; |
1a78958d | 145 | const char *dev_name; |
1e2082b5 SW |
146 | union { |
147 | struct pinctrl_setting_mux mux; | |
148 | struct pinctrl_setting_configs configs; | |
149 | } data; | |
2744e8af LW |
150 | }; |
151 | ||
152 | /** | |
153 | * struct pin_desc - pin descriptor for each physical pin in the arch | |
154 | * @pctldev: corresponding pin control device | |
155 | * @name: a name for the pin, e.g. the name of the pin/pad/finger on a | |
156 | * datasheet or such | |
ca53c5f1 | 157 | * @dynamic_name: if the name of this pin was dynamically allocated |
cd8f61f1 | 158 | * @drv_data: driver-defined per-pin data. pinctrl core does not touch this |
652162d4 | 159 | * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL. |
0e3db173 SW |
160 | * If non-zero, this pin is claimed by @owner. This field is an integer |
161 | * rather than a boolean, since pinctrl_get() might process multiple | |
162 | * mapping table entries that refer to, and hence claim, the same group | |
163 | * or pin, and each of these will increment the @usecount. | |
652162d4 | 164 | * @mux_owner: The name of device that called pinctrl_get(). |
ba110d90 | 165 | * @mux_setting: The most recent selected mux setting for this pin, if any. |
a9a1d2a7 | 166 | * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is |
652162d4 | 167 | * the name of the GPIO that "owns" this pin. |
2744e8af LW |
168 | */ |
169 | struct pin_desc { | |
170 | struct pinctrl_dev *pctldev; | |
9af1e44f | 171 | const char *name; |
ca53c5f1 | 172 | bool dynamic_name; |
cd8f61f1 | 173 | void *drv_data; |
2744e8af LW |
174 | /* These fields only added when supporting pinmux drivers */ |
175 | #ifdef CONFIG_PINMUX | |
652162d4 SW |
176 | unsigned mux_usecount; |
177 | const char *mux_owner; | |
ba110d90 | 178 | const struct pinctrl_setting_mux *mux_setting; |
652162d4 | 179 | const char *gpio_owner; |
2744e8af LW |
180 | #endif |
181 | }; | |
182 | ||
c033a718 LW |
183 | /** |
184 | * struct pinctrl_maps - a list item containing part of the mapping table | |
185 | * @node: mapping table list node | |
186 | * @maps: array of mapping table entries | |
187 | * @num_maps: the number of entries in @maps | |
188 | */ | |
189 | struct pinctrl_maps { | |
190 | struct list_head node; | |
3f713b7c | 191 | const struct pinctrl_map *maps; |
c033a718 LW |
192 | unsigned num_maps; |
193 | }; | |
194 | ||
195 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS | |
196 | ||
c7059c5a TL |
197 | /** |
198 | * struct group_desc - generic pin group descriptor | |
199 | * @name: name of the pin group | |
200 | * @pins: array of pins that belong to the group | |
201 | * @num_pins: number of pins in the group | |
202 | * @data: pin controller driver specific data | |
203 | */ | |
204 | struct group_desc { | |
205 | const char *name; | |
206 | int *pins; | |
207 | int num_pins; | |
208 | void *data; | |
209 | }; | |
210 | ||
c7059c5a TL |
211 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev); |
212 | ||
213 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
214 | unsigned int group_selector); | |
215 | ||
216 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
217 | unsigned int group_selector, | |
218 | const unsigned int **pins, | |
219 | unsigned int *npins); | |
220 | ||
221 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
222 | unsigned int group_selector); | |
223 | ||
224 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
225 | int *gpins, int ngpins, void *data); | |
226 | ||
227 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
228 | unsigned int group_selector); | |
229 | ||
c033a718 | 230 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 231 | |
9dfac4fd | 232 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name); |
42fed7ba | 233 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np); |
ae6b4d85 | 234 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name); |
dcb5dbc3 | 235 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin); |
7afde8ba LW |
236 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, |
237 | const char *pin_group); | |
2304b473 SW |
238 | |
239 | static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev, | |
240 | unsigned int pin) | |
241 | { | |
242 | return radix_tree_lookup(&pctldev->pin_desc_tree, pin); | |
243 | } | |
57b676f9 | 244 | |
b18537cd JE |
245 | extern struct pinctrl_gpio_range * |
246 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, | |
247 | unsigned int pin); | |
248 | ||
840a47ba JD |
249 | extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev); |
250 | extern int pinctrl_force_default(struct pinctrl_dev *pctldev); | |
251 | ||
42fed7ba | 252 | extern struct mutex pinctrl_maps_mutex; |
6f9e41f4 LM |
253 | extern struct list_head pinctrl_maps; |
254 | ||
06de5193 AS |
255 | #define for_each_pin_map(_maps_node_, _map_) \ |
256 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
257 | for (unsigned int __i = 0; \ | |
258 | __i < _maps_node_->num_maps && (_map_ = &_maps_node_->maps[__i]); \ | |
259 | __i++) |