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af873fce | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | /* |
3 | * Core driver for the pin control subsystem | |
4 | * | |
befe5bdf | 5 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
6 | * Written on behalf of Linaro for ST-Ericsson |
7 | * Based on bits of regulator core, gpio core and clk core | |
8 | * | |
9 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
10 | * | |
b2b3e66e | 11 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
2744e8af LW |
12 | */ |
13 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
14 | ||
82cc14c9 | 15 | #include <linux/array_size.h> |
524fc108 | 16 | #include <linux/cleanup.h> |
e5530adc | 17 | #include <linux/debugfs.h> |
2744e8af | 18 | #include <linux/device.h> |
2744e8af | 19 | #include <linux/err.h> |
e5530adc AS |
20 | #include <linux/export.h> |
21 | #include <linux/init.h> | |
e5530adc | 22 | #include <linux/kref.h> |
2744e8af | 23 | #include <linux/list.h> |
2744e8af | 24 | #include <linux/seq_file.h> |
e5530adc AS |
25 | #include <linux/slab.h> |
26 | ||
5f0dedcc | 27 | #include <linux/gpio.h> |
ec963d04 BG |
28 | #include <linux/gpio/driver.h> |
29 | ||
6d4ca1fb | 30 | #include <linux/pinctrl/consumer.h> |
e5530adc | 31 | #include <linux/pinctrl/devinfo.h> |
2744e8af | 32 | #include <linux/pinctrl/machine.h> |
e5530adc | 33 | #include <linux/pinctrl/pinctrl.h> |
2afe8229 | 34 | |
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
ae6b4d85 | 37 | #include "pinconf.h" |
e5530adc | 38 | #include "pinmux.h" |
b2b3e66e | 39 | |
5b3aa5f7 DA |
40 | static bool pinctrl_dummy_state; |
41 | ||
42fed7ba | 42 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 43 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
44 | |
45 | /* Mutex taken to protect pinctrl_maps */ | |
46 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
47 | ||
48 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 49 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
50 | |
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 52 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 58 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 59 | |
befe5bdf | 60 | |
5b3aa5f7 DA |
61 | /** |
62 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
63 | * | |
64 | * Usually this function is called by platforms without pinctrl driver support | |
65 | * but run with some shared drivers using pinctrl APIs. | |
66 | * After calling this function, the pinctrl core will return successfully | |
67 | * with creating a dummy state for the driver to keep going smoothly. | |
68 | */ | |
69 | void pinctrl_provide_dummies(void) | |
70 | { | |
71 | pinctrl_dummy_state = true; | |
72 | } | |
73 | ||
2744e8af LW |
74 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
75 | { | |
76 | /* We're not allowed to register devices without name */ | |
77 | return pctldev->desc->name; | |
78 | } | |
79 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
80 | ||
d6e99abb HZ |
81 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
82 | { | |
83 | return dev_name(pctldev->dev); | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
86 | ||
2744e8af LW |
87 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
88 | { | |
89 | return pctldev->driver_data; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
92 | ||
93 | /** | |
9dfac4fd LW |
94 | * get_pinctrl_dev_from_devname() - look up pin controller device |
95 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
96 | * |
97 | * Looks up a pin control device matching a certain device name or pure device | |
98 | * pointer, the pure device pointer will take precedence. | |
99 | */ | |
9dfac4fd | 100 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af | 101 | { |
6cadafb3 | 102 | struct pinctrl_dev *pctldev; |
2744e8af | 103 | |
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
44d5f7bb LW |
107 | mutex_lock(&pinctrldev_list_mutex); |
108 | ||
2744e8af | 109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 110 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 111 | /* Matched on device name */ |
44d5f7bb LW |
112 | mutex_unlock(&pinctrldev_list_mutex); |
113 | return pctldev; | |
2744e8af LW |
114 | } |
115 | } | |
2744e8af | 116 | |
44d5f7bb LW |
117 | mutex_unlock(&pinctrldev_list_mutex); |
118 | ||
119 | return NULL; | |
2744e8af LW |
120 | } |
121 | ||
42fed7ba PC |
122 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
123 | { | |
124 | struct pinctrl_dev *pctldev; | |
125 | ||
126 | mutex_lock(&pinctrldev_list_mutex); | |
127 | ||
128 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
03da7f98 | 129 | if (device_match_of_node(pctldev->dev, np)) { |
42fed7ba PC |
130 | mutex_unlock(&pinctrldev_list_mutex); |
131 | return pctldev; | |
132 | } | |
133 | ||
d463f82d | 134 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
135 | |
136 | return NULL; | |
137 | } | |
138 | ||
ae6b4d85 LW |
139 | /** |
140 | * pin_get_from_name() - look up a pin number from a name | |
141 | * @pctldev: the pin control device to lookup the pin on | |
142 | * @name: the name of the pin to look up | |
143 | */ | |
144 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
145 | { | |
7cc4e6b0 | 146 | unsigned int i, pin; |
ae6b4d85 | 147 | |
706e8520 CP |
148 | /* The pin number can be retrived from the pin controller descriptor */ |
149 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
150 | struct pin_desc *desc; |
151 | ||
706e8520 | 152 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
153 | desc = pin_desc_get(pctldev, pin); |
154 | /* Pin space may be sparse */ | |
6c325f87 | 155 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
156 | return pin; |
157 | } | |
158 | ||
159 | return -EINVAL; | |
160 | } | |
161 | ||
dcb5dbc3 | 162 | /** |
11f054c1 | 163 | * pin_get_name() - look up a pin name from a pin id |
dcb5dbc3 | 164 | * @pctldev: the pin control device to lookup the pin on |
9c340bbb | 165 | * @pin: pin number/id to look up |
dcb5dbc3 | 166 | */ |
7cc4e6b0 | 167 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned int pin) |
dcb5dbc3 DA |
168 | { |
169 | const struct pin_desc *desc; | |
170 | ||
171 | desc = pin_desc_get(pctldev, pin); | |
cea234e9 | 172 | if (!desc) { |
dcb5dbc3 DA |
173 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", |
174 | pin); | |
175 | return NULL; | |
176 | } | |
177 | ||
178 | return desc->name; | |
179 | } | |
b88d1451 | 180 | EXPORT_SYMBOL_GPL(pin_get_name); |
dcb5dbc3 | 181 | |
2744e8af LW |
182 | /* Deletes a range of pin descriptors */ |
183 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
184 | const struct pinctrl_pin_desc *pins, | |
7cc4e6b0 | 185 | unsigned int num_pins) |
2744e8af LW |
186 | { |
187 | int i; | |
188 | ||
2744e8af LW |
189 | for (i = 0; i < num_pins; i++) { |
190 | struct pin_desc *pindesc; | |
191 | ||
192 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
193 | pins[i].number); | |
cea234e9 | 194 | if (pindesc) { |
2744e8af LW |
195 | radix_tree_delete(&pctldev->pin_desc_tree, |
196 | pins[i].number); | |
ca53c5f1 LW |
197 | if (pindesc->dynamic_name) |
198 | kfree(pindesc->name); | |
2744e8af LW |
199 | } |
200 | kfree(pindesc); | |
201 | } | |
2744e8af LW |
202 | } |
203 | ||
204 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 205 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
206 | { |
207 | struct pin_desc *pindesc; | |
ecfe9a01 | 208 | int error; |
2744e8af | 209 | |
cd8f61f1 | 210 | pindesc = pin_desc_get(pctldev, pin->number); |
cea234e9 | 211 | if (pindesc) { |
cd8f61f1 MY |
212 | dev_err(pctldev->dev, "pin %d already registered\n", |
213 | pin->number); | |
2744e8af LW |
214 | return -EINVAL; |
215 | } | |
216 | ||
217 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
2104d12d | 218 | if (!pindesc) |
2744e8af | 219 | return -ENOMEM; |
ae6b4d85 | 220 | |
2744e8af LW |
221 | /* Set owner */ |
222 | pindesc->pctldev = pctldev; | |
5a3e85c3 MO |
223 | #ifdef CONFIG_PINMUX |
224 | mutex_init(&pindesc->mux_lock); | |
225 | #endif | |
2744e8af | 226 | |
9af1e44f | 227 | /* Copy basic pin info */ |
cd8f61f1 MY |
228 | if (pin->name) { |
229 | pindesc->name = pin->name; | |
ca53c5f1 | 230 | } else { |
cd8f61f1 | 231 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
cea234e9 | 232 | if (!pindesc->name) { |
ecfe9a01 SS |
233 | error = -ENOMEM; |
234 | goto failed; | |
eb26cc9c | 235 | } |
ca53c5f1 LW |
236 | pindesc->dynamic_name = true; |
237 | } | |
2744e8af | 238 | |
cd8f61f1 MY |
239 | pindesc->drv_data = pin->drv_data; |
240 | ||
ecfe9a01 SS |
241 | error = radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); |
242 | if (error) | |
243 | goto failed; | |
244 | ||
2744e8af | 245 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 246 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af | 247 | return 0; |
ecfe9a01 SS |
248 | |
249 | failed: | |
250 | kfree(pindesc); | |
251 | return error; | |
2744e8af LW |
252 | } |
253 | ||
254 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
3f713b7c | 255 | const struct pinctrl_pin_desc *pins, |
7cc4e6b0 | 256 | unsigned int num_descs) |
2744e8af | 257 | { |
7cc4e6b0 | 258 | unsigned int i; |
2744e8af LW |
259 | int ret = 0; |
260 | ||
261 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 262 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
263 | if (ret) |
264 | return ret; | |
265 | } | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
c8587eee CR |
270 | /** |
271 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
272 | * @range: GPIO range used for the translation | |
31d4e8d1 BG |
273 | * @gc: GPIO chip structure from the GPIO subsystem |
274 | * @offset: hardware offset of the GPIO relative to the controller | |
c8587eee CR |
275 | * |
276 | * Finds the pin number for a given GPIO using the specified GPIO range | |
277 | * as a base for translation. The distinction between linear GPIO ranges | |
278 | * and pin list based GPIO ranges is managed correctly by this function. | |
279 | * | |
280 | * This function assumes the gpio is part of the specified GPIO range, use | |
281 | * only after making sure this is the case (e.g. by calling it on the | |
282 | * result of successful pinctrl_get_device_gpio_range calls)! | |
283 | */ | |
284 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
31d4e8d1 | 285 | struct gpio_chip *gc, unsigned int offset) |
c8587eee | 286 | { |
31d4e8d1 | 287 | unsigned int pin = gc->base + offset - range->base; |
c8587eee | 288 | if (range->pins) |
31d4e8d1 | 289 | return range->pins[pin]; |
c8587eee | 290 | else |
31d4e8d1 | 291 | return range->pin_base + pin; |
c8587eee CR |
292 | } |
293 | ||
2744e8af LW |
294 | /** |
295 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
296 | * @pctldev: pin controller device to check | |
58e772f4 BG |
297 | * @gc: GPIO chip structure from the GPIO subsystem |
298 | * @offset: hardware offset of the GPIO relative to the controller | |
2744e8af LW |
299 | * |
300 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
301 | * controller, return the range or NULL | |
302 | */ | |
303 | static struct pinctrl_gpio_range * | |
58e772f4 BG |
304 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, struct gpio_chip *gc, |
305 | unsigned int offset) | |
2744e8af | 306 | { |
6cadafb3 | 307 | struct pinctrl_gpio_range *range; |
2744e8af | 308 | |
42fed7ba | 309 | mutex_lock(&pctldev->mutex); |
2744e8af | 310 | /* Loop over the ranges */ |
2744e8af LW |
311 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
312 | /* Check if we're in the valid range */ | |
58e772f4 BG |
313 | if ((gc->base + offset) >= range->base && |
314 | (gc->base + offset) < range->base + range->npins) { | |
42fed7ba | 315 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
316 | return range; |
317 | } | |
318 | } | |
42fed7ba | 319 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
320 | return NULL; |
321 | } | |
322 | ||
51e13c24 HZ |
323 | /** |
324 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
325 | * the same GPIO chip are in range | |
6042aaef BG |
326 | * @gc: GPIO chip structure from the GPIO subsystem |
327 | * @offset: hardware offset of the GPIO relative to the controller | |
51e13c24 HZ |
328 | * |
329 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
330 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
331 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
332 | * of the same GPIO chip don't have back-end pinctrl interface. | |
333 | * If the return value is true, it means that pinctrl device is ready & the | |
334 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
335 | * is false, it means that pinctrl device may not be ready. | |
336 | */ | |
2afe8229 | 337 | #ifdef CONFIG_GPIOLIB |
6042aaef BG |
338 | static bool pinctrl_ready_for_gpio_range(struct gpio_chip *gc, |
339 | unsigned int offset) | |
51e13c24 HZ |
340 | { |
341 | struct pinctrl_dev *pctldev; | |
342 | struct pinctrl_gpio_range *range = NULL; | |
942cde72 | 343 | |
44d5f7bb LW |
344 | mutex_lock(&pinctrldev_list_mutex); |
345 | ||
51e13c24 HZ |
346 | /* Loop over the pin controllers */ |
347 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
348 | /* Loop over the ranges */ | |
5ffbe2e6 | 349 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
350 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
351 | /* Check if any gpio range overlapped with gpio chip */ | |
6042aaef BG |
352 | if (range->base + range->npins - 1 < gc->base || |
353 | range->base > gc->base + gc->ngpio - 1) | |
51e13c24 | 354 | continue; |
5ffbe2e6 | 355 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 356 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
357 | return true; |
358 | } | |
5ffbe2e6 | 359 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 360 | } |
44d5f7bb LW |
361 | |
362 | mutex_unlock(&pinctrldev_list_mutex); | |
363 | ||
51e13c24 HZ |
364 | return false; |
365 | } | |
2afe8229 | 366 | #else |
6042aaef BG |
367 | static inline bool |
368 | pinctrl_ready_for_gpio_range(struct gpio_chip *gc, unsigned int offset) | |
369 | { | |
370 | return true; | |
371 | } | |
2afe8229 | 372 | #endif |
51e13c24 | 373 | |
2744e8af LW |
374 | /** |
375 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
82059c3d BG |
376 | * @gc: GPIO chip structure from the GPIO subsystem |
377 | * @offset: hardware offset of the GPIO relative to the controller | |
2744e8af LW |
378 | * @outdev: the pin control device if found |
379 | * @outrange: the GPIO range if found | |
380 | * | |
381 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
382 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
383 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
384 | * may still have not been registered. | |
2744e8af | 385 | */ |
82059c3d BG |
386 | static int pinctrl_get_device_gpio_range(struct gpio_chip *gc, |
387 | unsigned int offset, | |
4ecce45d SW |
388 | struct pinctrl_dev **outdev, |
389 | struct pinctrl_gpio_range **outrange) | |
2744e8af | 390 | { |
6cadafb3 | 391 | struct pinctrl_dev *pctldev; |
2744e8af | 392 | |
f0059021 AL |
393 | mutex_lock(&pinctrldev_list_mutex); |
394 | ||
2744e8af | 395 | /* Loop over the pin controllers */ |
2744e8af LW |
396 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
397 | struct pinctrl_gpio_range *range; | |
398 | ||
58e772f4 | 399 | range = pinctrl_match_gpio_range(pctldev, gc, offset); |
cea234e9 | 400 | if (range) { |
2744e8af LW |
401 | *outdev = pctldev; |
402 | *outrange = range; | |
f0059021 | 403 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
404 | return 0; |
405 | } | |
406 | } | |
2744e8af | 407 | |
f0059021 AL |
408 | mutex_unlock(&pinctrldev_list_mutex); |
409 | ||
4650b7cb | 410 | return -EPROBE_DEFER; |
2744e8af LW |
411 | } |
412 | ||
413 | /** | |
414 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
415 | * @pctldev: pin controller device to add the range to | |
416 | * @range: the GPIO range to add | |
417 | * | |
3ded2169 DC |
418 | * DEPRECATED: Don't use this function in new code. See section 2 of |
419 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to bind pinctrl and | |
420 | * gpio drivers. | |
421 | * | |
2744e8af LW |
422 | * This adds a range of GPIOs to be handled by a certain pin controller. Call |
423 | * this to register handled ranges after registering your pin controller. | |
424 | */ | |
425 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
426 | struct pinctrl_gpio_range *range) | |
427 | { | |
42fed7ba | 428 | mutex_lock(&pctldev->mutex); |
8b9c139f | 429 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 430 | mutex_unlock(&pctldev->mutex); |
2744e8af | 431 | } |
4ecce45d | 432 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 433 | |
3e5e00b6 DA |
434 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
435 | struct pinctrl_gpio_range *ranges, | |
7cc4e6b0 | 436 | unsigned int nranges) |
3e5e00b6 DA |
437 | { |
438 | int i; | |
439 | ||
440 | for (i = 0; i < nranges; i++) | |
441 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
442 | } | |
443 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
444 | ||
192c369c | 445 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
446 | struct pinctrl_gpio_range *range) |
447 | { | |
42fed7ba PC |
448 | struct pinctrl_dev *pctldev; |
449 | ||
42fed7ba | 450 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 451 | |
dfa97515 LW |
452 | /* |
453 | * If we can't find this device, let's assume that is because | |
454 | * it has not probed yet, so the driver trying to register this | |
455 | * range need to defer probing. | |
456 | */ | |
10f94f9c | 457 | if (!pctldev) |
dfa97515 | 458 | return ERR_PTR(-EPROBE_DEFER); |
10f94f9c | 459 | |
f23f1516 | 460 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 461 | |
f23f1516 SH |
462 | return pctldev; |
463 | } | |
192c369c | 464 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 465 | |
586a87e6 | 466 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
7cc4e6b0 | 467 | const unsigned int **pins, unsigned int *num_pins) |
586a87e6 CR |
468 | { |
469 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
470 | int gs; | |
471 | ||
e5b3b2d9 AT |
472 | if (!pctlops->get_group_pins) |
473 | return -EINVAL; | |
474 | ||
586a87e6 CR |
475 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
476 | if (gs < 0) | |
477 | return gs; | |
478 | ||
479 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
480 | } | |
481 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
482 | ||
9afbefb2 | 483 | struct pinctrl_gpio_range * |
b18537cd JE |
484 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
485 | unsigned int pin) | |
9afbefb2 | 486 | { |
c8f50e86 | 487 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
488 | |
489 | /* Loop over the ranges */ | |
490 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
491 | /* Check if we're in the valid range */ | |
c8587eee CR |
492 | if (range->pins) { |
493 | int a; | |
494 | for (a = 0; a < range->npins; a++) { | |
495 | if (range->pins[a] == pin) | |
b18537cd | 496 | return range; |
c8587eee CR |
497 | } |
498 | } else if (pin >= range->pin_base && | |
c8f50e86 | 499 | pin < range->pin_base + range->npins) |
b18537cd | 500 | return range; |
9afbefb2 | 501 | } |
b18537cd JE |
502 | |
503 | return NULL; | |
504 | } | |
505 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
506 | ||
507 | /** | |
508 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
509 | * @pctldev: the pin controller device to look in | |
510 | * @pin: a controller-local number to find the range for | |
511 | */ | |
512 | struct pinctrl_gpio_range * | |
513 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
514 | unsigned int pin) | |
515 | { | |
516 | struct pinctrl_gpio_range *range; | |
517 | ||
518 | mutex_lock(&pctldev->mutex); | |
519 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 520 | mutex_unlock(&pctldev->mutex); |
b18537cd | 521 | |
c8f50e86 | 522 | return range; |
9afbefb2 LW |
523 | } |
524 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
525 | ||
7e10ee68 | 526 | /** |
50842cbd | 527 | * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller |
7e10ee68 VK |
528 | * @pctldev: pin controller device to remove the range from |
529 | * @range: the GPIO range to remove | |
530 | */ | |
531 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
532 | struct pinctrl_gpio_range *range) | |
533 | { | |
42fed7ba | 534 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 535 | list_del(&range->node); |
42fed7ba | 536 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
537 | } |
538 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
539 | ||
c033a718 | 540 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
541 | |
542 | /** | |
543 | * pinctrl_generic_get_group_count() - returns the number of pin groups | |
544 | * @pctldev: pin controller device | |
545 | */ | |
546 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev) | |
547 | { | |
548 | return pctldev->num_groups; | |
549 | } | |
550 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count); | |
551 | ||
552 | /** | |
553 | * pinctrl_generic_get_group_name() - returns the name of a pin group | |
554 | * @pctldev: pin controller device | |
555 | * @selector: group number | |
556 | */ | |
557 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
558 | unsigned int selector) | |
559 | { | |
560 | struct group_desc *group; | |
561 | ||
562 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
563 | selector); | |
564 | if (!group) | |
565 | return NULL; | |
566 | ||
85174ad7 | 567 | return group->grp.name; |
c7059c5a TL |
568 | } |
569 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); | |
570 | ||
571 | /** | |
572 | * pinctrl_generic_get_group_pins() - gets the pin group pins | |
573 | * @pctldev: pin controller device | |
574 | * @selector: group number | |
575 | * @pins: pins in the group | |
576 | * @num_pins: number of pins in the group | |
577 | */ | |
578 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
579 | unsigned int selector, | |
580 | const unsigned int **pins, | |
581 | unsigned int *num_pins) | |
582 | { | |
583 | struct group_desc *group; | |
584 | ||
585 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
586 | selector); | |
587 | if (!group) { | |
588 | dev_err(pctldev->dev, "%s could not find pingroup%i\n", | |
589 | __func__, selector); | |
590 | return -EINVAL; | |
591 | } | |
592 | ||
85174ad7 AS |
593 | *pins = group->grp.pins; |
594 | *num_pins = group->grp.npins; | |
c7059c5a TL |
595 | |
596 | return 0; | |
597 | } | |
598 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins); | |
599 | ||
600 | /** | |
601 | * pinctrl_generic_get_group() - returns a pin group based on the number | |
602 | * @pctldev: pin controller device | |
9c340bbb | 603 | * @selector: group number |
c7059c5a TL |
604 | */ |
605 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
606 | unsigned int selector) | |
607 | { | |
608 | struct group_desc *group; | |
609 | ||
610 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
611 | selector); | |
612 | if (!group) | |
613 | return NULL; | |
614 | ||
615 | return group; | |
616 | } | |
617 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group); | |
618 | ||
a203728a TL |
619 | static int pinctrl_generic_group_name_to_selector(struct pinctrl_dev *pctldev, |
620 | const char *function) | |
621 | { | |
622 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
623 | int ngroups = ops->get_groups_count(pctldev); | |
624 | int selector = 0; | |
625 | ||
626 | /* See if this pctldev has this group */ | |
627 | while (selector < ngroups) { | |
628 | const char *gname = ops->get_group_name(pctldev, selector); | |
629 | ||
54a58185 | 630 | if (gname && !strcmp(function, gname)) |
a203728a TL |
631 | return selector; |
632 | ||
633 | selector++; | |
634 | } | |
635 | ||
636 | return -EINVAL; | |
637 | } | |
638 | ||
c7059c5a TL |
639 | /** |
640 | * pinctrl_generic_add_group() - adds a new pin group | |
641 | * @pctldev: pin controller device | |
642 | * @name: name of the pin group | |
643 | * @pins: pins in the pin group | |
644 | * @num_pins: number of pins in the pin group | |
645 | * @data: pin controller driver specific data | |
646 | * | |
647 | * Note that the caller must take care of locking. | |
648 | */ | |
649 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
d98d7385 | 650 | const unsigned int *pins, int num_pins, void *data) |
c7059c5a TL |
651 | { |
652 | struct group_desc *group; | |
b56e23bf | 653 | int selector, error; |
a203728a TL |
654 | |
655 | if (!name) | |
656 | return -EINVAL; | |
657 | ||
658 | selector = pinctrl_generic_group_name_to_selector(pctldev, name); | |
659 | if (selector >= 0) | |
660 | return selector; | |
661 | ||
662 | selector = pctldev->num_groups; | |
c7059c5a TL |
663 | |
664 | group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL); | |
665 | if (!group) | |
666 | return -ENOMEM; | |
667 | ||
383da0c7 | 668 | *group = PINCTRL_GROUP_DESC(name, pins, num_pins, data); |
c7059c5a | 669 | |
b56e23bf SS |
670 | error = radix_tree_insert(&pctldev->pin_group_tree, selector, group); |
671 | if (error) | |
672 | return error; | |
c7059c5a TL |
673 | |
674 | pctldev->num_groups++; | |
675 | ||
a203728a | 676 | return selector; |
c7059c5a TL |
677 | } |
678 | EXPORT_SYMBOL_GPL(pinctrl_generic_add_group); | |
679 | ||
680 | /** | |
681 | * pinctrl_generic_remove_group() - removes a numbered pin group | |
682 | * @pctldev: pin controller device | |
683 | * @selector: group number | |
684 | * | |
685 | * Note that the caller must take care of locking. | |
686 | */ | |
687 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
688 | unsigned int selector) | |
689 | { | |
690 | struct group_desc *group; | |
691 | ||
692 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
693 | selector); | |
694 | if (!group) | |
695 | return -ENOENT; | |
696 | ||
697 | radix_tree_delete(&pctldev->pin_group_tree, selector); | |
698 | devm_kfree(pctldev->dev, group); | |
699 | ||
700 | pctldev->num_groups--; | |
701 | ||
702 | return 0; | |
703 | } | |
704 | EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); | |
705 | ||
706 | /** | |
707 | * pinctrl_generic_free_groups() - removes all pin groups | |
708 | * @pctldev: pin controller device | |
709 | * | |
664b7c47 TL |
710 | * Note that the caller must take care of locking. The pinctrl groups |
711 | * are allocated with devm_kzalloc() so no need to free them here. | |
c7059c5a TL |
712 | */ |
713 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
714 | { | |
715 | struct radix_tree_iter iter; | |
906a2a39 | 716 | void __rcu **slot; |
c7059c5a TL |
717 | |
718 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) | |
664b7c47 | 719 | radix_tree_delete(&pctldev->pin_group_tree, iter.index); |
c7059c5a TL |
720 | |
721 | pctldev->num_groups = 0; | |
722 | } | |
723 | ||
724 | #else | |
725 | static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
726 | { | |
727 | } | |
c033a718 | 728 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 729 | |
7afde8ba LW |
730 | /** |
731 | * pinctrl_get_group_selector() - returns the group selector for a group | |
732 | * @pctldev: the pin controller handling the group | |
733 | * @pin_group: the pin group to look up | |
734 | */ | |
735 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
736 | const char *pin_group) | |
737 | { | |
738 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
7cc4e6b0 AS |
739 | unsigned int ngroups = pctlops->get_groups_count(pctldev); |
740 | unsigned int group_selector = 0; | |
7afde8ba | 741 | |
d1e90e9e | 742 | while (group_selector < ngroups) { |
7afde8ba LW |
743 | const char *gname = pctlops->get_group_name(pctldev, |
744 | group_selector); | |
54a58185 | 745 | if (gname && !strcmp(gname, pin_group)) { |
51cd24ee | 746 | dev_dbg(pctldev->dev, |
7afde8ba LW |
747 | "found group selector %u for %s\n", |
748 | group_selector, | |
749 | pin_group); | |
750 | return group_selector; | |
751 | } | |
752 | ||
753 | group_selector++; | |
754 | } | |
755 | ||
51cd24ee | 756 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
757 | pin_group); |
758 | ||
759 | return -EINVAL; | |
760 | } | |
761 | ||
00762e41 | 762 | bool pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset) |
472a61e7 SW |
763 | { |
764 | struct pinctrl_dev *pctldev; | |
765 | struct pinctrl_gpio_range *range; | |
766 | bool result; | |
767 | int pin; | |
768 | ||
769 | /* | |
770 | * Try to obtain GPIO range, if it fails | |
771 | * we're probably dealing with GPIO driver | |
772 | * without a backing pin controller - bail out. | |
773 | */ | |
82059c3d | 774 | if (pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range)) |
472a61e7 SW |
775 | return true; |
776 | ||
777 | mutex_lock(&pctldev->mutex); | |
778 | ||
779 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 780 | pin = gpio_to_pin(range, gc, offset); |
472a61e7 SW |
781 | |
782 | result = pinmux_can_be_used_for_gpio(pctldev, pin); | |
783 | ||
784 | mutex_unlock(&pctldev->mutex); | |
785 | ||
786 | return result; | |
787 | } | |
00762e41 | 788 | EXPORT_SYMBOL_GPL(pinctrl_gpio_can_use_line); |
ec963d04 | 789 | |
699f0784 | 790 | /** |
acb38be6 | 791 | * pinctrl_gpio_request() - request a single pin to be used as GPIO |
699f0784 BG |
792 | * @gc: GPIO chip structure from the GPIO subsystem |
793 | * @offset: hardware offset of the GPIO relative to the controller | |
794 | * | |
795 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
796 | * as part of their gpio_request() semantics, platforms and individual drivers | |
797 | * shall *NOT* request GPIO pins to be muxed in. | |
798 | */ | |
acb38be6 | 799 | int pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset) |
befe5bdf | 800 | { |
befe5bdf | 801 | struct pinctrl_gpio_range *range; |
699f0784 BG |
802 | struct pinctrl_dev *pctldev; |
803 | int ret, pin; | |
befe5bdf | 804 | |
82059c3d | 805 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
57b676f9 | 806 | if (ret) { |
6042aaef | 807 | if (pinctrl_ready_for_gpio_range(gc, offset)) |
51e13c24 | 808 | ret = 0; |
4650b7cb | 809 | return ret; |
57b676f9 | 810 | } |
befe5bdf | 811 | |
9b77ace4 AL |
812 | mutex_lock(&pctldev->mutex); |
813 | ||
befe5bdf | 814 | /* Convert to the pin controllers number space */ |
31d4e8d1 | 815 | pin = gpio_to_pin(range, gc, offset); |
befe5bdf | 816 | |
699f0784 | 817 | ret = pinmux_request_gpio(pctldev, range, pin, gc->base + offset); |
57b676f9 | 818 | |
9b77ace4 AL |
819 | mutex_unlock(&pctldev->mutex); |
820 | ||
57b676f9 | 821 | return ret; |
befe5bdf | 822 | } |
acb38be6 | 823 | EXPORT_SYMBOL_GPL(pinctrl_gpio_request); |
ec963d04 | 824 | |
ec963d04 | 825 | /** |
4fccb263 | 826 | * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO |
ec963d04 BG |
827 | * @gc: GPIO chip structure from the GPIO subsystem |
828 | * @offset: hardware offset of the GPIO relative to the controller | |
829 | * | |
830 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
831 | * as part of their gpio_request() semantics, platforms and individual drivers | |
832 | * shall *NOT* request GPIO pins to be muxed in. | |
833 | */ | |
4fccb263 | 834 | void pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 835 | { |
1d2c8845 BG |
836 | struct pinctrl_gpio_range *range; |
837 | struct pinctrl_dev *pctldev; | |
838 | int ret, pin; | |
839 | ||
82059c3d | 840 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
1d2c8845 BG |
841 | if (ret) |
842 | return; | |
843 | ||
844 | mutex_lock(&pctldev->mutex); | |
845 | ||
846 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 847 | pin = gpio_to_pin(range, gc, offset); |
1d2c8845 BG |
848 | |
849 | pinmux_free_gpio(pctldev, pin, range); | |
850 | ||
851 | mutex_unlock(&pctldev->mutex); | |
ec963d04 | 852 | } |
4fccb263 | 853 | EXPORT_SYMBOL_GPL(pinctrl_gpio_free); |
ec963d04 | 854 | |
315c4418 BG |
855 | static int pinctrl_gpio_direction(struct gpio_chip *gc, unsigned int offset, |
856 | bool input) | |
befe5bdf LW |
857 | { |
858 | struct pinctrl_dev *pctldev; | |
859 | struct pinctrl_gpio_range *range; | |
860 | int ret; | |
861 | int pin; | |
862 | ||
82059c3d | 863 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
42fed7ba | 864 | if (ret) { |
befe5bdf | 865 | return ret; |
42fed7ba PC |
866 | } |
867 | ||
868 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
869 | |
870 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 871 | pin = gpio_to_pin(range, gc, offset); |
42fed7ba PC |
872 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
873 | ||
874 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 875 | |
42fed7ba | 876 | return ret; |
befe5bdf LW |
877 | } |
878 | ||
befe5bdf | 879 | /** |
315c46f9 | 880 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode |
ec963d04 BG |
881 | * @gc: GPIO chip structure from the GPIO subsystem |
882 | * @offset: hardware offset of the GPIO relative to the controller | |
befe5bdf LW |
883 | * |
884 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
ec963d04 | 885 | * as part of their gpio_direction_input() semantics, platforms and individual |
befe5bdf LW |
886 | * drivers shall *NOT* touch pin control GPIO calls. |
887 | */ | |
315c46f9 | 888 | int pinctrl_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 889 | { |
315c4418 | 890 | return pinctrl_gpio_direction(gc, offset, true); |
ec963d04 | 891 | } |
315c46f9 | 892 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); |
ec963d04 | 893 | |
15381bc7 | 894 | /** |
b679d6c0 | 895 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode |
ec963d04 BG |
896 | * @gc: GPIO chip structure from the GPIO subsystem |
897 | * @offset: hardware offset of the GPIO relative to the controller | |
15381bc7 | 898 | * |
ec963d04 BG |
899 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, |
900 | * as part of their gpio_direction_output() semantics, platforms and individual | |
901 | * drivers shall *NOT* touch pin control GPIO calls. | |
15381bc7 | 902 | */ |
b679d6c0 | 903 | int pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 904 | { |
315c4418 | 905 | return pinctrl_gpio_direction(gc, offset, false); |
ec963d04 | 906 | } |
b679d6c0 | 907 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); |
ec963d04 | 908 | |
ab56e2bf | 909 | /** |
acf2981b | 910 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin |
ab56e2bf BG |
911 | * @gc: GPIO chip structure from the GPIO subsystem |
912 | * @offset: hardware offset of the GPIO relative to the controller | |
913 | * @config: the configuration to apply to the GPIO | |
914 | * | |
915 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | |
916 | * they need to call the underlying pin controller to change GPIO config | |
917 | * (for example set debounce time). | |
918 | */ | |
acf2981b | 919 | int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
ab56e2bf | 920 | unsigned long config) |
15381bc7 MW |
921 | { |
922 | unsigned long configs[] = { config }; | |
923 | struct pinctrl_gpio_range *range; | |
924 | struct pinctrl_dev *pctldev; | |
925 | int ret, pin; | |
926 | ||
82059c3d | 927 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
15381bc7 MW |
928 | if (ret) |
929 | return ret; | |
930 | ||
931 | mutex_lock(&pctldev->mutex); | |
31d4e8d1 | 932 | pin = gpio_to_pin(range, gc, offset); |
15381bc7 MW |
933 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); |
934 | mutex_unlock(&pctldev->mutex); | |
935 | ||
936 | return ret; | |
937 | } | |
acf2981b | 938 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); |
ec963d04 | 939 | |
6e5e959d SW |
940 | static struct pinctrl_state *find_state(struct pinctrl *p, |
941 | const char *name) | |
befe5bdf | 942 | { |
6e5e959d SW |
943 | struct pinctrl_state *state; |
944 | ||
945 | list_for_each_entry(state, &p->states, node) | |
946 | if (!strcmp(state->name, name)) | |
947 | return state; | |
948 | ||
949 | return NULL; | |
950 | } | |
951 | ||
952 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
953 | const char *name) | |
954 | { | |
955 | struct pinctrl_state *state; | |
956 | ||
957 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
2104d12d | 958 | if (!state) |
6e5e959d | 959 | return ERR_PTR(-ENOMEM); |
6e5e959d SW |
960 | |
961 | state->name = name; | |
962 | INIT_LIST_HEAD(&state->settings); | |
963 | ||
964 | list_add_tail(&state->node, &p->states); | |
965 | ||
966 | return state; | |
967 | } | |
968 | ||
99e4f675 | 969 | static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev, |
3f713b7c | 970 | const struct pinctrl_map *map) |
6e5e959d SW |
971 | { |
972 | struct pinctrl_state *state; | |
7ecdb16f | 973 | struct pinctrl_setting *setting; |
6e5e959d | 974 | int ret; |
befe5bdf | 975 | |
6e5e959d SW |
976 | state = find_state(p, map->name); |
977 | if (!state) | |
978 | state = create_state(p, map->name); | |
979 | if (IS_ERR(state)) | |
980 | return PTR_ERR(state); | |
befe5bdf | 981 | |
1e2082b5 SW |
982 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
983 | return 0; | |
984 | ||
6e5e959d | 985 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
2104d12d | 986 | if (!setting) |
6e5e959d | 987 | return -ENOMEM; |
befe5bdf | 988 | |
1e2082b5 SW |
989 | setting->type = map->type; |
990 | ||
99e4f675 TL |
991 | if (pctldev) |
992 | setting->pctldev = pctldev; | |
993 | else | |
994 | setting->pctldev = | |
995 | get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
cea234e9 | 996 | if (!setting->pctldev) { |
6e5e959d | 997 | kfree(setting); |
89216494 LW |
998 | /* Do not defer probing of hogs (circular loop) */ |
999 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
1000 | return -ENODEV; | |
c05127c4 LW |
1001 | /* |
1002 | * OK let us guess that the driver is not there yet, and | |
1003 | * let's defer obtaining this pinctrl handle to later... | |
1004 | */ | |
89216494 LW |
1005 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
1006 | map->ctrl_dev_name); | |
c05127c4 | 1007 | return -EPROBE_DEFER; |
6e5e959d SW |
1008 | } |
1009 | ||
1a78958d LW |
1010 | setting->dev_name = map->dev_name; |
1011 | ||
1e2082b5 SW |
1012 | switch (map->type) { |
1013 | case PIN_MAP_TYPE_MUX_GROUP: | |
1014 | ret = pinmux_map_to_setting(map, setting); | |
1015 | break; | |
1016 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1017 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1018 | ret = pinconf_map_to_setting(map, setting); | |
1019 | break; | |
1020 | default: | |
1021 | ret = -EINVAL; | |
1022 | break; | |
1023 | } | |
6e5e959d SW |
1024 | if (ret < 0) { |
1025 | kfree(setting); | |
1026 | return ret; | |
1027 | } | |
1028 | ||
1029 | list_add_tail(&setting->node, &state->settings); | |
1030 | ||
1031 | return 0; | |
1032 | } | |
1033 | ||
1034 | static struct pinctrl *find_pinctrl(struct device *dev) | |
1035 | { | |
1036 | struct pinctrl *p; | |
1037 | ||
42fed7ba | 1038 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 1039 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
1040 | if (p->dev == dev) { |
1041 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 1042 | return p; |
42fed7ba | 1043 | } |
6e5e959d | 1044 | |
42fed7ba | 1045 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
1046 | return NULL; |
1047 | } | |
1048 | ||
42fed7ba | 1049 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d | 1050 | |
99e4f675 TL |
1051 | static struct pinctrl *create_pinctrl(struct device *dev, |
1052 | struct pinctrl_dev *pctldev) | |
6e5e959d SW |
1053 | { |
1054 | struct pinctrl *p; | |
1055 | const char *devname; | |
1056 | struct pinctrl_maps *maps_node; | |
3f713b7c | 1057 | const struct pinctrl_map *map; |
6e5e959d | 1058 | int ret; |
befe5bdf LW |
1059 | |
1060 | /* | |
1061 | * create the state cookie holder struct pinctrl for each | |
1062 | * mapping, this is what consumers will get when requesting | |
1063 | * a pin control handle with pinctrl_get() | |
1064 | */ | |
02f5b989 | 1065 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
2104d12d | 1066 | if (!p) |
befe5bdf | 1067 | return ERR_PTR(-ENOMEM); |
7ecdb16f | 1068 | p->dev = dev; |
6e5e959d | 1069 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
1070 | INIT_LIST_HEAD(&p->dt_maps); |
1071 | ||
99e4f675 | 1072 | ret = pinctrl_dt_to_map(p, pctldev); |
57291ce2 SW |
1073 | if (ret < 0) { |
1074 | kfree(p); | |
1075 | return ERR_PTR(ret); | |
1076 | } | |
6e5e959d SW |
1077 | |
1078 | devname = dev_name(dev); | |
befe5bdf | 1079 | |
42fed7ba | 1080 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 1081 | /* Iterate over the pin control maps to locate the right ones */ |
06de5193 | 1082 | for_each_pin_map(maps_node, map) { |
7ecdb16f SW |
1083 | /* Map must be for this device */ |
1084 | if (strcmp(map->dev_name, devname)) | |
1085 | continue; | |
7f0ff06c NY |
1086 | /* |
1087 | * If pctldev is not null, we are claiming hog for it, | |
1088 | * that means, setting that is served by pctldev by itself. | |
1089 | * | |
1090 | * Thus we must skip map that is for this device but is served | |
1091 | * by other device. | |
1092 | */ | |
1093 | if (pctldev && | |
1094 | strcmp(dev_name(pctldev->dev), map->ctrl_dev_name)) | |
1095 | continue; | |
7ecdb16f | 1096 | |
99e4f675 | 1097 | ret = add_setting(p, pctldev, map); |
89216494 LW |
1098 | /* |
1099 | * At this point the adding of a setting may: | |
1100 | * | |
1101 | * - Defer, if the pinctrl device is not yet available | |
1102 | * - Fail, if the pinctrl device is not yet available, | |
1103 | * AND the setting is a hog. We cannot defer that, since | |
1104 | * the hog will kick in immediately after the device | |
1105 | * is registered. | |
1106 | * | |
1107 | * If the error returned was not -EPROBE_DEFER then we | |
1108 | * accumulate the errors to see if we end up with | |
1109 | * an -EPROBE_DEFER later, as that is the worst case. | |
1110 | */ | |
1111 | if (ret == -EPROBE_DEFER) { | |
42fed7ba | 1112 | mutex_unlock(&pinctrl_maps_mutex); |
adec57ff | 1113 | pinctrl_free(p, false); |
6e5e959d | 1114 | return ERR_PTR(ret); |
7ecdb16f | 1115 | } |
befe5bdf | 1116 | } |
42fed7ba PC |
1117 | mutex_unlock(&pinctrl_maps_mutex); |
1118 | ||
89216494 | 1119 | if (ret < 0) { |
3ec440e3 | 1120 | /* If some other error than deferral occurred, return here */ |
42fed7ba | 1121 | pinctrl_free(p, false); |
89216494 LW |
1122 | return ERR_PTR(ret); |
1123 | } | |
befe5bdf | 1124 | |
ab78029e LW |
1125 | kref_init(&p->users); |
1126 | ||
b0666ba4 | 1127 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 1128 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 1129 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 1130 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
1131 | |
1132 | return p; | |
6e5e959d | 1133 | } |
7ecdb16f | 1134 | |
42fed7ba PC |
1135 | /** |
1136 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
1137 | * @dev: the device to obtain the handle for | |
1138 | */ | |
1139 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
1140 | { |
1141 | struct pinctrl *p; | |
7ecdb16f | 1142 | |
6e5e959d SW |
1143 | if (WARN_ON(!dev)) |
1144 | return ERR_PTR(-EINVAL); | |
1145 | ||
ab78029e LW |
1146 | /* |
1147 | * See if somebody else (such as the device core) has already | |
1148 | * obtained a handle to the pinctrl for this device. In that case, | |
1149 | * return another pointer to it. | |
1150 | */ | |
6e5e959d | 1151 | p = find_pinctrl(dev); |
cea234e9 | 1152 | if (p) { |
ab78029e LW |
1153 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); |
1154 | kref_get(&p->users); | |
1155 | return p; | |
1156 | } | |
7ecdb16f | 1157 | |
99e4f675 | 1158 | return create_pinctrl(dev, NULL); |
befe5bdf LW |
1159 | } |
1160 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
1161 | ||
d3cee830 RG |
1162 | static void pinctrl_free_setting(bool disable_setting, |
1163 | struct pinctrl_setting *setting) | |
1164 | { | |
1165 | switch (setting->type) { | |
1166 | case PIN_MAP_TYPE_MUX_GROUP: | |
1167 | if (disable_setting) | |
1168 | pinmux_disable_setting(setting); | |
1169 | pinmux_free_setting(setting); | |
1170 | break; | |
1171 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1172 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1173 | pinconf_free_setting(setting); | |
1174 | break; | |
1175 | default: | |
1176 | break; | |
1177 | } | |
1178 | } | |
1179 | ||
42fed7ba | 1180 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 1181 | { |
6e5e959d SW |
1182 | struct pinctrl_state *state, *n1; |
1183 | struct pinctrl_setting *setting, *n2; | |
1184 | ||
42fed7ba | 1185 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
1186 | list_for_each_entry_safe(state, n1, &p->states, node) { |
1187 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 1188 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
1189 | list_del(&setting->node); |
1190 | kfree(setting); | |
1191 | } | |
1192 | list_del(&state->node); | |
1193 | kfree(state); | |
7ecdb16f | 1194 | } |
befe5bdf | 1195 | |
57291ce2 SW |
1196 | pinctrl_dt_free_maps(p); |
1197 | ||
6e5e959d SW |
1198 | if (inlist) |
1199 | list_del(&p->node); | |
befe5bdf | 1200 | kfree(p); |
42fed7ba | 1201 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 1202 | } |
befe5bdf LW |
1203 | |
1204 | /** | |
ab78029e LW |
1205 | * pinctrl_release() - release the pinctrl handle |
1206 | * @kref: the kref in the pinctrl being released | |
1207 | */ | |
2917e833 | 1208 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
1209 | { |
1210 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
1211 | ||
42fed7ba | 1212 | pinctrl_free(p, true); |
ab78029e LW |
1213 | } |
1214 | ||
1215 | /** | |
1216 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 1217 | * @p: the pinctrl handle to release |
befe5bdf | 1218 | */ |
57b676f9 SW |
1219 | void pinctrl_put(struct pinctrl *p) |
1220 | { | |
ab78029e | 1221 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
1222 | } |
1223 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
1224 | ||
42fed7ba PC |
1225 | /** |
1226 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
1227 | * @p: the pinctrl handle to retrieve the state from | |
1228 | * @name: the state name to retrieve | |
1229 | */ | |
1230 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
1231 | const char *name) | |
befe5bdf | 1232 | { |
6e5e959d | 1233 | struct pinctrl_state *state; |
befe5bdf | 1234 | |
6e5e959d | 1235 | state = find_state(p, name); |
5b3aa5f7 DA |
1236 | if (!state) { |
1237 | if (pinctrl_dummy_state) { | |
1238 | /* create dummy state */ | |
1239 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
1240 | name); | |
1241 | state = create_state(p, name); | |
d599bfb3 RG |
1242 | } else |
1243 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 1244 | } |
57b676f9 | 1245 | |
6e5e959d | 1246 | return state; |
befe5bdf | 1247 | } |
42fed7ba | 1248 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf | 1249 | |
036f394d BG |
1250 | static void pinctrl_link_add(struct pinctrl_dev *pctldev, |
1251 | struct device *consumer) | |
1252 | { | |
1253 | if (pctldev->desc->link_consumers) | |
1254 | device_link_add(consumer, pctldev->dev, | |
1255 | DL_FLAG_PM_RUNTIME | | |
1256 | DL_FLAG_AUTOREMOVE_CONSUMER); | |
1257 | } | |
1258 | ||
001d7ef8 MO |
1259 | static void pinctrl_cond_disable_mux_setting(struct pinctrl_state *state, |
1260 | struct pinctrl_setting *target_setting) | |
1261 | { | |
1262 | struct pinctrl_setting *setting; | |
1263 | ||
1264 | list_for_each_entry(setting, &state->settings, node) { | |
1265 | if (target_setting && (&setting->node == &target_setting->node)) | |
1266 | break; | |
1267 | ||
1268 | if (setting->type == PIN_MAP_TYPE_MUX_GROUP) | |
1269 | pinmux_disable_setting(setting); | |
1270 | } | |
1271 | } | |
1272 | ||
befe5bdf | 1273 | /** |
981ed1bf | 1274 | * pinctrl_commit_state() - select/activate/program a pinctrl state to HW |
42fed7ba PC |
1275 | * @p: the pinctrl handle for the device that requests configuration |
1276 | * @state: the state handle to select/activate/program | |
befe5bdf | 1277 | */ |
981ed1bf | 1278 | static int pinctrl_commit_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1279 | { |
001d7ef8 | 1280 | struct pinctrl_setting *setting; |
4198a9b5 | 1281 | struct pinctrl_state *old_state = READ_ONCE(p->state); |
6e5e959d | 1282 | int ret; |
7ecdb16f | 1283 | |
4198a9b5 | 1284 | if (old_state) { |
6e5e959d | 1285 | /* |
2243a87d FW |
1286 | * For each pinmux setting in the old state, forget SW's record |
1287 | * of mux owner for that pingroup. Any pingroups which are | |
1288 | * still owned by the new state will be re-acquired by the call | |
1289 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d | 1290 | */ |
001d7ef8 | 1291 | pinctrl_cond_disable_mux_setting(old_state, NULL); |
6e5e959d SW |
1292 | } |
1293 | ||
3102a76c | 1294 | p->state = NULL; |
6e5e959d | 1295 | |
b991f8c3 | 1296 | /* Apply all the settings for the new state - pinmux first */ |
6e5e959d | 1297 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1298 | switch (setting->type) { |
1299 | case PIN_MAP_TYPE_MUX_GROUP: | |
1300 | ret = pinmux_enable_setting(setting); | |
1301 | break; | |
1302 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
b991f8c3 | 1303 | case PIN_MAP_TYPE_CONFIGS_GROUP: |
6a37d750 | 1304 | ret = 0; |
b991f8c3 MS |
1305 | break; |
1306 | default: | |
1307 | ret = -EINVAL; | |
1308 | break; | |
1309 | } | |
1310 | ||
1311 | if (ret < 0) | |
1312 | goto unapply_new_state; | |
1313 | ||
1314 | /* Do not link hogs (circular dependency) */ | |
1315 | if (p != setting->pctldev->p) | |
1316 | pinctrl_link_add(setting->pctldev, p->dev); | |
1317 | } | |
1318 | ||
1319 | /* Apply all the settings for the new state - pinconf after */ | |
1320 | list_for_each_entry(setting, &state->settings, node) { | |
1321 | switch (setting->type) { | |
1322 | case PIN_MAP_TYPE_MUX_GROUP: | |
6a37d750 | 1323 | ret = 0; |
b991f8c3 MS |
1324 | break; |
1325 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1e2082b5 SW |
1326 | case PIN_MAP_TYPE_CONFIGS_GROUP: |
1327 | ret = pinconf_apply_setting(setting); | |
1328 | break; | |
1329 | default: | |
1330 | ret = -EINVAL; | |
1331 | break; | |
1332 | } | |
3102a76c | 1333 | |
42fed7ba | 1334 | if (ret < 0) { |
001d7ef8 | 1335 | goto unapply_mux_setting; |
42fed7ba | 1336 | } |
036f394d | 1337 | |
b672a87a LW |
1338 | /* Do not link hogs (circular dependency) */ |
1339 | if (p != setting->pctldev->p) | |
1340 | pinctrl_link_add(setting->pctldev, p->dev); | |
befe5bdf | 1341 | } |
6e5e959d | 1342 | |
3102a76c RG |
1343 | p->state = state; |
1344 | ||
6e5e959d | 1345 | return 0; |
3102a76c | 1346 | |
001d7ef8 MO |
1347 | unapply_mux_setting: |
1348 | pinctrl_cond_disable_mux_setting(state, NULL); | |
1349 | goto restore_old_state; | |
1350 | ||
3102a76c | 1351 | unapply_new_state: |
da58751c | 1352 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1353 | |
001d7ef8 MO |
1354 | /* |
1355 | * All we can do here is pinmux_disable_setting. | |
1356 | * That means that some pins are muxed differently now | |
1357 | * than they were before applying the setting (We can't | |
1358 | * "unmux a pin"!), but it's not a big deal since the pins | |
1359 | * are free to be muxed by another apply_setting. | |
1360 | */ | |
1361 | pinctrl_cond_disable_mux_setting(state, setting); | |
8009d5ff | 1362 | |
001d7ef8 | 1363 | restore_old_state: |
385d9424 RG |
1364 | /* There's no infinite recursive loop here because p->state is NULL */ |
1365 | if (old_state) | |
42fed7ba | 1366 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1367 | |
1368 | return ret; | |
befe5bdf | 1369 | } |
981ed1bf FF |
1370 | |
1371 | /** | |
1372 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW | |
1373 | * @p: the pinctrl handle for the device that requests configuration | |
1374 | * @state: the state handle to select/activate/program | |
1375 | */ | |
1376 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) | |
1377 | { | |
1378 | if (p->state == state) | |
1379 | return 0; | |
1380 | ||
1381 | return pinctrl_commit_state(p, state); | |
1382 | } | |
6e5e959d | 1383 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1384 | |
6d4ca1fb SW |
1385 | static void devm_pinctrl_release(struct device *dev, void *res) |
1386 | { | |
1387 | pinctrl_put(*(struct pinctrl **)res); | |
1388 | } | |
1389 | ||
1390 | /** | |
9c340bbb | 1391 | * devm_pinctrl_get() - Resource managed pinctrl_get() |
6d4ca1fb SW |
1392 | * @dev: the device to obtain the handle for |
1393 | * | |
1394 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1395 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1396 | */ | |
1397 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1398 | { | |
1399 | struct pinctrl **ptr, *p; | |
1400 | ||
1401 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1402 | if (!ptr) | |
1403 | return ERR_PTR(-ENOMEM); | |
1404 | ||
1405 | p = pinctrl_get(dev); | |
1406 | if (!IS_ERR(p)) { | |
1407 | *ptr = p; | |
1408 | devres_add(dev, ptr); | |
1409 | } else { | |
1410 | devres_free(ptr); | |
1411 | } | |
1412 | ||
1413 | return p; | |
1414 | } | |
1415 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1416 | ||
1417 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1418 | { | |
1419 | struct pinctrl **p = res; | |
1420 | ||
1421 | return *p == data; | |
1422 | } | |
1423 | ||
1424 | /** | |
1425 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1426 | * @p: the pinctrl handle to release | |
1427 | * | |
1428 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1429 | * this function will not need to be called and the resource management | |
1430 | * code will ensure that the resource is freed. | |
1431 | */ | |
1432 | void devm_pinctrl_put(struct pinctrl *p) | |
1433 | { | |
a72149e8 | 1434 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1435 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1436 | } |
1437 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1438 | ||
c72bed23 HG |
1439 | /** |
1440 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1441 | * @maps: the pincontrol mappings table to register. Note the pinctrl-core | |
1442 | * keeps a reference to the passed in maps, so they should _not_ be | |
1443 | * marked with __initdata. | |
1444 | * @num_maps: the number of maps in the mapping table | |
1445 | */ | |
1446 | int pinctrl_register_mappings(const struct pinctrl_map *maps, | |
7cc4e6b0 | 1447 | unsigned int num_maps) |
befe5bdf | 1448 | { |
1e2082b5 | 1449 | int i, ret; |
b2b3e66e | 1450 | struct pinctrl_maps *maps_node; |
befe5bdf | 1451 | |
7e9236ff | 1452 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1453 | |
1454 | /* First sanity check the new mapping */ | |
1455 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1456 | if (!maps[i].dev_name) { |
1457 | pr_err("failed to register map %s (%d): no device given\n", | |
1458 | maps[i].name, i); | |
1459 | return -EINVAL; | |
1460 | } | |
1461 | ||
befe5bdf LW |
1462 | if (!maps[i].name) { |
1463 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1464 | i); |
befe5bdf LW |
1465 | return -EINVAL; |
1466 | } | |
1467 | ||
1e2082b5 SW |
1468 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1469 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1470 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1471 | maps[i].name, i); | |
1472 | return -EINVAL; | |
1473 | } | |
1474 | ||
1e2082b5 SW |
1475 | switch (maps[i].type) { |
1476 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1477 | break; | |
1478 | case PIN_MAP_TYPE_MUX_GROUP: | |
1479 | ret = pinmux_validate_map(&maps[i], i); | |
1480 | if (ret < 0) | |
fde04f41 | 1481 | return ret; |
1e2082b5 SW |
1482 | break; |
1483 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1484 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1485 | ret = pinconf_validate_map(&maps[i], i); | |
1486 | if (ret < 0) | |
fde04f41 | 1487 | return ret; |
1e2082b5 SW |
1488 | break; |
1489 | default: | |
1490 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1491 | maps[i].name, i); |
1681f5ae SW |
1492 | return -EINVAL; |
1493 | } | |
befe5bdf LW |
1494 | } |
1495 | ||
b2b3e66e | 1496 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
2104d12d | 1497 | if (!maps_node) |
b2b3e66e | 1498 | return -ENOMEM; |
befe5bdf | 1499 | |
c72bed23 | 1500 | maps_node->maps = maps; |
b2b3e66e | 1501 | maps_node->num_maps = num_maps; |
befe5bdf | 1502 | |
c5272a28 | 1503 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1504 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1505 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1506 | |
befe5bdf LW |
1507 | return 0; |
1508 | } | |
c72bed23 | 1509 | EXPORT_SYMBOL_GPL(pinctrl_register_mappings); |
befe5bdf | 1510 | |
57291ce2 | 1511 | /** |
c72bed23 | 1512 | * pinctrl_unregister_mappings() - unregister a set of pin controller mappings |
9c340bbb | 1513 | * @map: the pincontrol mappings table passed to pinctrl_register_mappings() |
c72bed23 | 1514 | * when registering the mappings. |
57291ce2 | 1515 | */ |
c72bed23 | 1516 | void pinctrl_unregister_mappings(const struct pinctrl_map *map) |
57291ce2 SW |
1517 | { |
1518 | struct pinctrl_maps *maps_node; | |
1519 | ||
42fed7ba | 1520 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1521 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1522 | if (maps_node->maps == map) { | |
1523 | list_del(&maps_node->node); | |
db6c2c69 | 1524 | kfree(maps_node); |
42fed7ba | 1525 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1526 | return; |
1527 | } | |
1528 | } | |
42fed7ba | 1529 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 | 1530 | } |
c72bed23 | 1531 | EXPORT_SYMBOL_GPL(pinctrl_unregister_mappings); |
57291ce2 | 1532 | |
2e9ba1d9 TR |
1533 | static void devm_pinctrl_unregister_mappings(void *maps) |
1534 | { | |
1535 | pinctrl_unregister_mappings(maps); | |
1536 | } | |
1537 | ||
1538 | /** | |
1539 | * devm_pinctrl_register_mappings() - Resource managed pinctrl_register_mappings() | |
1540 | * @dev: device for which mappings are registered | |
1541 | * @maps: the pincontrol mappings table to register. Note the pinctrl-core | |
1542 | * keeps a reference to the passed in maps, so they should _not_ be | |
1543 | * marked with __initdata. | |
1544 | * @num_maps: the number of maps in the mapping table | |
1545 | * | |
1546 | * Returns: 0 on success, or negative errno on failure. | |
1547 | */ | |
1548 | int devm_pinctrl_register_mappings(struct device *dev, | |
1549 | const struct pinctrl_map *maps, | |
1550 | unsigned int num_maps) | |
1551 | { | |
1552 | int ret; | |
1553 | ||
1554 | ret = pinctrl_register_mappings(maps, num_maps); | |
1555 | if (ret) | |
1556 | return ret; | |
1557 | ||
1558 | return devm_add_action_or_reset(dev, devm_pinctrl_unregister_mappings, (void *)maps); | |
1559 | } | |
1560 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_mappings); | |
1561 | ||
840a47ba JD |
1562 | /** |
1563 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1564 | * @pctldev: pin controller device | |
1565 | */ | |
1566 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1567 | { | |
1568 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
981ed1bf | 1569 | return pinctrl_commit_state(pctldev->p, pctldev->hog_sleep); |
840a47ba JD |
1570 | return 0; |
1571 | } | |
1572 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1573 | ||
1574 | /** | |
1575 | * pinctrl_force_default() - turn a given controller device into default state | |
1576 | * @pctldev: pin controller device | |
1577 | */ | |
1578 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1579 | { | |
1580 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
981ed1bf | 1581 | return pinctrl_commit_state(pctldev->p, pctldev->hog_default); |
840a47ba JD |
1582 | return 0; |
1583 | } | |
1584 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1585 | ||
ef0eebc0 DA |
1586 | /** |
1587 | * pinctrl_init_done() - tell pinctrl probe is done | |
1588 | * | |
1589 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1590 | * driver selected some other state. | |
1591 | * | |
1592 | * @dev: device to that's done probing | |
1593 | */ | |
1594 | int pinctrl_init_done(struct device *dev) | |
1595 | { | |
1596 | struct dev_pin_info *pins = dev->pins; | |
1597 | int ret; | |
1598 | ||
1599 | if (!pins) | |
1600 | return 0; | |
1601 | ||
1602 | if (IS_ERR(pins->init_state)) | |
1603 | return 0; /* No such state */ | |
1604 | ||
1605 | if (pins->p->state != pins->init_state) | |
1606 | return 0; /* Not at init anyway */ | |
1607 | ||
1608 | if (IS_ERR(pins->default_state)) | |
1609 | return 0; /* No default state */ | |
1610 | ||
1611 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1612 | if (ret) | |
1613 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1614 | ||
1615 | return ret; | |
1616 | } | |
1617 | ||
55d54d1e UH |
1618 | static int pinctrl_select_bound_state(struct device *dev, |
1619 | struct pinctrl_state *state) | |
14005ee2 LW |
1620 | { |
1621 | struct dev_pin_info *pins = dev->pins; | |
1622 | int ret; | |
1623 | ||
f3333497 TL |
1624 | if (IS_ERR(state)) |
1625 | return 0; /* No such state */ | |
1626 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1627 | if (ret) |
f3333497 TL |
1628 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1629 | state->name); | |
14005ee2 LW |
1630 | return ret; |
1631 | } | |
f3333497 TL |
1632 | |
1633 | /** | |
55d54d1e | 1634 | * pinctrl_select_default_state() - select default pinctrl state |
f3333497 TL |
1635 | * @dev: device to select default state for |
1636 | */ | |
55d54d1e | 1637 | int pinctrl_select_default_state(struct device *dev) |
f3333497 TL |
1638 | { |
1639 | if (!dev->pins) | |
1640 | return 0; | |
1641 | ||
55d54d1e UH |
1642 | return pinctrl_select_bound_state(dev, dev->pins->default_state); |
1643 | } | |
1644 | EXPORT_SYMBOL_GPL(pinctrl_select_default_state); | |
1645 | ||
1646 | #ifdef CONFIG_PM | |
1647 | ||
1648 | /** | |
1649 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1650 | * @dev: device to select default state for | |
1651 | */ | |
1652 | int pinctrl_pm_select_default_state(struct device *dev) | |
1653 | { | |
1654 | return pinctrl_select_default_state(dev); | |
f3333497 | 1655 | } |
f472dead | 1656 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1657 | |
1658 | /** | |
1659 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1660 | * @dev: device to select sleep state for | |
1661 | */ | |
1662 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1663 | { | |
f3333497 | 1664 | if (!dev->pins) |
14005ee2 | 1665 | return 0; |
f3333497 | 1666 | |
55d54d1e | 1667 | return pinctrl_select_bound_state(dev, dev->pins->sleep_state); |
14005ee2 | 1668 | } |
f472dead | 1669 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1670 | |
1671 | /** | |
1672 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1673 | * @dev: device to select idle state for | |
1674 | */ | |
1675 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1676 | { | |
f3333497 | 1677 | if (!dev->pins) |
14005ee2 | 1678 | return 0; |
f3333497 | 1679 | |
55d54d1e | 1680 | return pinctrl_select_bound_state(dev, dev->pins->idle_state); |
14005ee2 | 1681 | } |
f472dead | 1682 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1683 | #endif |
1684 | ||
2744e8af LW |
1685 | #ifdef CONFIG_DEBUG_FS |
1686 | ||
1687 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1688 | { | |
1689 | struct pinctrl_dev *pctldev = s->private; | |
1690 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
7cc4e6b0 | 1691 | unsigned int i, pin; |
b507cb92 | 1692 | #ifdef CONFIG_GPIOLIB |
f6443e01 | 1693 | struct gpio_device *gdev = NULL; |
f1b206cf | 1694 | struct pinctrl_gpio_range *range; |
482715ff | 1695 | int gpio_num; |
b507cb92 | 1696 | #endif |
2744e8af LW |
1697 | |
1698 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1699 | |
42fed7ba | 1700 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1701 | |
706e8520 CP |
1702 | /* The pin number can be retrived from the pin controller descriptor */ |
1703 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1704 | struct pin_desc *desc; |
1705 | ||
706e8520 | 1706 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1707 | desc = pin_desc_get(pctldev, pin); |
1708 | /* Pin space may be sparse */ | |
cea234e9 | 1709 | if (!desc) |
2744e8af LW |
1710 | continue; |
1711 | ||
cf9d994d | 1712 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af | 1713 | |
f1b206cf | 1714 | #ifdef CONFIG_GPIOLIB |
9dfbcf2f | 1715 | gdev = NULL; |
482715ff | 1716 | gpio_num = -1; |
f1b206cf | 1717 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
db503298 LD |
1718 | if (range->pins != NULL) { |
1719 | for (int i = 0; i < range->npins; ++i) { | |
1720 | if (range->pins[i] == pin) { | |
1721 | gpio_num = range->base + i; | |
1722 | break; | |
1723 | } | |
1724 | } | |
1725 | } else if ((pin >= range->pin_base) && | |
1726 | (pin < (range->pin_base + range->npins))) { | |
1727 | gpio_num = | |
1728 | range->base + (pin - range->pin_base); | |
f1b206cf | 1729 | } |
db503298 LD |
1730 | if (gpio_num != -1) |
1731 | break; | |
f1b206cf | 1732 | } |
482715ff | 1733 | if (gpio_num >= 0) |
e3863fa1 LW |
1734 | /* |
1735 | * FIXME: gpio_num comes from the global GPIO numberspace. | |
1736 | * we need to get rid of the range->base eventually and | |
1737 | * get the descriptor directly from the gpio_chip. | |
1738 | */ | |
524fc108 BG |
1739 | gdev = gpiod_to_gpio_device(gpio_to_desc(gpio_num)); |
1740 | if (gdev) | |
1741 | seq_printf(s, "%u:%s ", | |
1742 | gpio_num - gpio_device_get_base(gdev), | |
1743 | gpio_device_get_label(gdev)); | |
f1b206cf DF |
1744 | else |
1745 | seq_puts(s, "0:? "); | |
1746 | #endif | |
1747 | ||
2744e8af LW |
1748 | /* Driver-specific info per pin */ |
1749 | if (ops->pin_dbg_show) | |
1750 | ops->pin_dbg_show(pctldev, s, pin); | |
1751 | ||
1752 | seq_puts(s, "\n"); | |
1753 | } | |
1754 | ||
42fed7ba | 1755 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1756 | |
2744e8af LW |
1757 | return 0; |
1758 | } | |
b5520891 | 1759 | DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); |
2744e8af LW |
1760 | |
1761 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1762 | { | |
1763 | struct pinctrl_dev *pctldev = s->private; | |
1764 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
7cc4e6b0 | 1765 | unsigned int ngroups, selector = 0; |
2744e8af | 1766 | |
42fed7ba PC |
1767 | mutex_lock(&pctldev->mutex); |
1768 | ||
d1e90e9e | 1769 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1770 | |
2744e8af | 1771 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1772 | while (selector < ngroups) { |
7cc4e6b0 AS |
1773 | const unsigned int *pins = NULL; |
1774 | unsigned int num_pins = 0; | |
2744e8af | 1775 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1776 | const char *pname; |
e5b3b2d9 | 1777 | int ret = 0; |
2744e8af LW |
1778 | int i; |
1779 | ||
e5b3b2d9 AT |
1780 | if (ops->get_group_pins) |
1781 | ret = ops->get_group_pins(pctldev, selector, | |
1782 | &pins, &num_pins); | |
2744e8af LW |
1783 | if (ret) |
1784 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1785 | gname); | |
1786 | else { | |
dcb5dbc3 DA |
1787 | seq_printf(s, "group: %s\n", gname); |
1788 | for (i = 0; i < num_pins; i++) { | |
1789 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1790 | if (WARN_ON(!pname)) { |
42fed7ba | 1791 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1792 | return -EINVAL; |
b4dd784b | 1793 | } |
dcb5dbc3 DA |
1794 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1795 | } | |
1796 | seq_puts(s, "\n"); | |
2744e8af LW |
1797 | } |
1798 | selector++; | |
1799 | } | |
1800 | ||
42fed7ba | 1801 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1802 | |
1803 | return 0; | |
1804 | } | |
b5520891 | 1805 | DEFINE_SHOW_ATTRIBUTE(pinctrl_groups); |
2744e8af LW |
1806 | |
1807 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1808 | { | |
1809 | struct pinctrl_dev *pctldev = s->private; | |
6cadafb3 | 1810 | struct pinctrl_gpio_range *range; |
2744e8af LW |
1811 | |
1812 | seq_puts(s, "GPIO ranges handled:\n"); | |
1813 | ||
42fed7ba | 1814 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1815 | |
2744e8af | 1816 | /* Loop over the ranges */ |
2744e8af | 1817 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1818 | if (range->pins) { |
1819 | int a; | |
1820 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1821 | range->id, range->name, | |
1822 | range->base, (range->base + range->npins - 1)); | |
1823 | for (a = 0; a < range->npins - 1; a++) | |
1824 | seq_printf(s, "%u, ", range->pins[a]); | |
1825 | seq_printf(s, "%u}\n", range->pins[a]); | |
1826 | } | |
1827 | else | |
1828 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1829 | range->id, range->name, | |
1830 | range->base, (range->base + range->npins - 1), | |
1831 | range->pin_base, | |
1832 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1833 | } |
57b676f9 | 1834 | |
42fed7ba | 1835 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1836 | |
1837 | return 0; | |
1838 | } | |
b5520891 | 1839 | DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges); |
2744e8af LW |
1840 | |
1841 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1842 | { | |
1843 | struct pinctrl_dev *pctldev; | |
1844 | ||
ae6b4d85 | 1845 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1846 | |
42fed7ba | 1847 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1848 | |
2744e8af LW |
1849 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1850 | seq_printf(s, "%s ", pctldev->desc->name); | |
1851 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1852 | seq_puts(s, "yes "); |
1853 | else | |
1854 | seq_puts(s, "no "); | |
1855 | if (pctldev->desc->confops) | |
2744e8af LW |
1856 | seq_puts(s, "yes"); |
1857 | else | |
1858 | seq_puts(s, "no"); | |
1859 | seq_puts(s, "\n"); | |
1860 | } | |
57b676f9 | 1861 | |
42fed7ba | 1862 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1863 | |
1864 | return 0; | |
1865 | } | |
b5520891 | 1866 | DEFINE_SHOW_ATTRIBUTE(pinctrl_devices); |
2744e8af | 1867 | |
1e2082b5 SW |
1868 | static inline const char *map_type(enum pinctrl_map_type type) |
1869 | { | |
1870 | static const char * const names[] = { | |
1871 | "INVALID", | |
1872 | "DUMMY_STATE", | |
1873 | "MUX_GROUP", | |
1874 | "CONFIGS_PIN", | |
1875 | "CONFIGS_GROUP", | |
1876 | }; | |
1877 | ||
1878 | if (type >= ARRAY_SIZE(names)) | |
1879 | return "UNKNOWN"; | |
1880 | ||
1881 | return names[type]; | |
1882 | } | |
1883 | ||
3eedb437 SW |
1884 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1885 | { | |
1886 | struct pinctrl_maps *maps_node; | |
3f713b7c | 1887 | const struct pinctrl_map *map; |
3eedb437 SW |
1888 | |
1889 | seq_puts(s, "Pinctrl maps:\n"); | |
1890 | ||
42fed7ba | 1891 | mutex_lock(&pinctrl_maps_mutex); |
06de5193 | 1892 | for_each_pin_map(maps_node, map) { |
1e2082b5 SW |
1893 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1894 | map->dev_name, map->name, map_type(map->type), | |
1895 | map->type); | |
1896 | ||
1897 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1898 | seq_printf(s, "controlling device %s\n", | |
1899 | map->ctrl_dev_name); | |
1900 | ||
1901 | switch (map->type) { | |
1902 | case PIN_MAP_TYPE_MUX_GROUP: | |
1903 | pinmux_show_map(s, map); | |
1904 | break; | |
1905 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1906 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1907 | pinconf_show_map(s, map); | |
1908 | break; | |
1909 | default: | |
1910 | break; | |
1911 | } | |
1912 | ||
390e1046 | 1913 | seq_putc(s, '\n'); |
3eedb437 | 1914 | } |
42fed7ba | 1915 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1916 | |
1917 | return 0; | |
1918 | } | |
b5520891 | 1919 | DEFINE_SHOW_ATTRIBUTE(pinctrl_maps); |
3eedb437 | 1920 | |
befe5bdf LW |
1921 | static int pinctrl_show(struct seq_file *s, void *what) |
1922 | { | |
1923 | struct pinctrl *p; | |
6e5e959d | 1924 | struct pinctrl_state *state; |
7ecdb16f | 1925 | struct pinctrl_setting *setting; |
befe5bdf LW |
1926 | |
1927 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1928 | |
42fed7ba | 1929 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1930 | |
befe5bdf | 1931 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1932 | seq_printf(s, "device: %s current state: %s\n", |
1933 | dev_name(p->dev), | |
1934 | p->state ? p->state->name : "none"); | |
1935 | ||
1936 | list_for_each_entry(state, &p->states, node) { | |
1937 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1938 | |
6e5e959d | 1939 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1940 | struct pinctrl_dev *pctldev = setting->pctldev; |
1941 | ||
1942 | seq_printf(s, " type: %s controller %s ", | |
1943 | map_type(setting->type), | |
1944 | pinctrl_dev_get_name(pctldev)); | |
1945 | ||
1946 | switch (setting->type) { | |
1947 | case PIN_MAP_TYPE_MUX_GROUP: | |
1948 | pinmux_show_setting(s, setting); | |
1949 | break; | |
1950 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1951 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1952 | pinconf_show_setting(s, setting); | |
1953 | break; | |
1954 | default: | |
1955 | break; | |
1956 | } | |
6e5e959d | 1957 | } |
befe5bdf | 1958 | } |
befe5bdf LW |
1959 | } |
1960 | ||
42fed7ba | 1961 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1962 | |
befe5bdf LW |
1963 | return 0; |
1964 | } | |
b5520891 | 1965 | DEFINE_SHOW_ATTRIBUTE(pinctrl); |
befe5bdf | 1966 | |
2744e8af LW |
1967 | static struct dentry *debugfs_root; |
1968 | ||
1969 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1970 | { | |
02157160 | 1971 | struct dentry *device_root; |
1781af56 JK |
1972 | const char *debugfs_name; |
1973 | ||
1974 | if (pctldev->desc->name && | |
1975 | strcmp(dev_name(pctldev->dev), pctldev->desc->name)) { | |
1976 | debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL, | |
1977 | "%s-%s", dev_name(pctldev->dev), | |
1978 | pctldev->desc->name); | |
1979 | if (!debugfs_name) { | |
1980 | pr_warn("failed to determine debugfs dir name for %s\n", | |
1981 | dev_name(pctldev->dev)); | |
1982 | return; | |
1983 | } | |
1984 | } else { | |
1985 | debugfs_name = dev_name(pctldev->dev); | |
1986 | } | |
2744e8af | 1987 | |
1781af56 | 1988 | device_root = debugfs_create_dir(debugfs_name, debugfs_root); |
02157160 TL |
1989 | pctldev->device_root = device_root; |
1990 | ||
2744e8af LW |
1991 | if (IS_ERR(device_root) || !device_root) { |
1992 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1993 | dev_name(pctldev->dev)); |
2744e8af LW |
1994 | return; |
1995 | } | |
47473813 | 1996 | debugfs_create_file("pins", 0444, |
b5520891 | 1997 | device_root, pctldev, &pinctrl_pins_fops); |
47473813 | 1998 | debugfs_create_file("pingroups", 0444, |
b5520891 | 1999 | device_root, pctldev, &pinctrl_groups_fops); |
47473813 | 2000 | debugfs_create_file("gpio-ranges", 0444, |
b5520891 | 2001 | device_root, pctldev, &pinctrl_gpioranges_fops); |
e7f2a444 FV |
2002 | if (pctldev->desc->pmxops) |
2003 | pinmux_init_device_debugfs(device_root, pctldev); | |
2004 | if (pctldev->desc->confops) | |
2005 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
2006 | } |
2007 | ||
02157160 TL |
2008 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
2009 | { | |
2010 | debugfs_remove_recursive(pctldev->device_root); | |
2011 | } | |
2012 | ||
2744e8af LW |
2013 | static void pinctrl_init_debugfs(void) |
2014 | { | |
2015 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
92f43683 | 2016 | if (IS_ERR(debugfs_root)) { |
2744e8af LW |
2017 | pr_warn("failed to create debugfs directory\n"); |
2018 | debugfs_root = NULL; | |
2019 | return; | |
2020 | } | |
2021 | ||
47473813 | 2022 | debugfs_create_file("pinctrl-devices", 0444, |
b5520891 | 2023 | debugfs_root, NULL, &pinctrl_devices_fops); |
47473813 | 2024 | debugfs_create_file("pinctrl-maps", 0444, |
b5520891 | 2025 | debugfs_root, NULL, &pinctrl_maps_fops); |
47473813 | 2026 | debugfs_create_file("pinctrl-handles", 0444, |
b5520891 | 2027 | debugfs_root, NULL, &pinctrl_fops); |
2744e8af LW |
2028 | } |
2029 | ||
2030 | #else /* CONFIG_DEBUG_FS */ | |
2031 | ||
2032 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
2033 | { | |
2034 | } | |
2035 | ||
2036 | static void pinctrl_init_debugfs(void) | |
2037 | { | |
2038 | } | |
2039 | ||
02157160 TL |
2040 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
2041 | { | |
2042 | } | |
2043 | ||
2744e8af LW |
2044 | #endif |
2045 | ||
d26bc49f SW |
2046 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
2047 | { | |
2048 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
2049 | ||
2050 | if (!ops || | |
d1e90e9e | 2051 | !ops->get_groups_count || |
e5b3b2d9 | 2052 | !ops->get_group_name) |
d26bc49f SW |
2053 | return -EINVAL; |
2054 | ||
2055 | return 0; | |
2056 | } | |
2057 | ||
99e4f675 | 2058 | /** |
950b0d91 | 2059 | * pinctrl_init_controller() - init a pin controller device |
2744e8af LW |
2060 | * @pctldesc: descriptor for this pin controller |
2061 | * @dev: parent device for this pin controller | |
2062 | * @driver_data: private pin controller data for this pin controller | |
2063 | */ | |
0ca4921f AS |
2064 | static struct pinctrl_dev * |
2065 | pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, | |
2066 | void *driver_data) | |
2744e8af | 2067 | { |
2744e8af LW |
2068 | struct pinctrl_dev *pctldev; |
2069 | int ret; | |
2070 | ||
da9aecb0 | 2071 | if (!pctldesc) |
323de9ef | 2072 | return ERR_PTR(-EINVAL); |
da9aecb0 | 2073 | if (!pctldesc->name) |
323de9ef | 2074 | return ERR_PTR(-EINVAL); |
2744e8af | 2075 | |
02f5b989 | 2076 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
2104d12d | 2077 | if (!pctldev) |
323de9ef | 2078 | return ERR_PTR(-ENOMEM); |
b9130b77 TL |
2079 | |
2080 | /* Initialize pin control device struct */ | |
2081 | pctldev->owner = pctldesc->owner; | |
2082 | pctldev->desc = pctldesc; | |
2083 | pctldev->driver_data = driver_data; | |
2084 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
c033a718 | 2085 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a | 2086 | INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL); |
a76edc89 TL |
2087 | #endif |
2088 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
2089 | INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL); | |
c033a718 | 2090 | #endif |
b9130b77 | 2091 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
46daed6e | 2092 | INIT_LIST_HEAD(&pctldev->node); |
b9130b77 | 2093 | pctldev->dev = dev; |
42fed7ba | 2094 | mutex_init(&pctldev->mutex); |
b9130b77 | 2095 | |
d26bc49f | 2096 | /* check core ops for sanity */ |
323de9ef MY |
2097 | ret = pinctrl_check_ops(pctldev); |
2098 | if (ret) { | |
ad6e1107 | 2099 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
2100 | goto out_err; |
2101 | } | |
2102 | ||
2744e8af LW |
2103 | /* If we're implementing pinmuxing, check the ops for sanity */ |
2104 | if (pctldesc->pmxops) { | |
323de9ef MY |
2105 | ret = pinmux_check_ops(pctldev); |
2106 | if (ret) | |
b9130b77 | 2107 | goto out_err; |
2744e8af LW |
2108 | } |
2109 | ||
ae6b4d85 LW |
2110 | /* If we're implementing pinconfig, check the ops for sanity */ |
2111 | if (pctldesc->confops) { | |
323de9ef MY |
2112 | ret = pinconf_check_ops(pctldev); |
2113 | if (ret) | |
b9130b77 | 2114 | goto out_err; |
ae6b4d85 LW |
2115 | } |
2116 | ||
2744e8af | 2117 | /* Register all the pins */ |
ad6e1107 | 2118 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
2119 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
2120 | if (ret) { | |
ad6e1107 | 2121 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
2122 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
2123 | pctldesc->npins); | |
51cd24ee | 2124 | goto out_err; |
2744e8af LW |
2125 | } |
2126 | ||
2744e8af LW |
2127 | return pctldev; |
2128 | ||
51cd24ee | 2129 | out_err: |
42fed7ba | 2130 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 2131 | kfree(pctldev); |
323de9ef | 2132 | return ERR_PTR(ret); |
2744e8af | 2133 | } |
950b0d91 | 2134 | |
ae1cf475 YY |
2135 | static void pinctrl_uninit_controller(struct pinctrl_dev *pctldev, struct pinctrl_desc *pctldesc) |
2136 | { | |
2137 | pinctrl_free_pindescs(pctldev, pctldesc->pins, | |
2138 | pctldesc->npins); | |
2139 | mutex_destroy(&pctldev->mutex); | |
2140 | kfree(pctldev); | |
2141 | } | |
2142 | ||
61187142 | 2143 | static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) |
950b0d91 TL |
2144 | { |
2145 | pctldev->p = create_pinctrl(pctldev->dev, pctldev); | |
61187142 TL |
2146 | if (PTR_ERR(pctldev->p) == -ENODEV) { |
2147 | dev_dbg(pctldev->dev, "no hogs found\n"); | |
950b0d91 | 2148 | |
61187142 TL |
2149 | return 0; |
2150 | } | |
2151 | ||
2152 | if (IS_ERR(pctldev->p)) { | |
2153 | dev_err(pctldev->dev, "error claiming hogs: %li\n", | |
2154 | PTR_ERR(pctldev->p)); | |
2155 | ||
2156 | return PTR_ERR(pctldev->p); | |
2157 | } | |
2158 | ||
61187142 TL |
2159 | pctldev->hog_default = |
2160 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); | |
2161 | if (IS_ERR(pctldev->hog_default)) { | |
2162 | dev_dbg(pctldev->dev, | |
2163 | "failed to lookup the default state\n"); | |
2164 | } else { | |
2165 | if (pinctrl_select_state(pctldev->p, | |
2166 | pctldev->hog_default)) | |
2167 | dev_err(pctldev->dev, | |
2168 | "failed to select default state\n"); | |
2169 | } | |
2170 | ||
2171 | pctldev->hog_sleep = | |
2172 | pinctrl_lookup_state(pctldev->p, | |
2173 | PINCTRL_STATE_SLEEP); | |
2174 | if (IS_ERR(pctldev->hog_sleep)) | |
2175 | dev_dbg(pctldev->dev, | |
2176 | "failed to lookup the sleep state\n"); | |
2177 | ||
2178 | return 0; | |
2179 | } | |
2180 | ||
2181 | int pinctrl_enable(struct pinctrl_dev *pctldev) | |
2182 | { | |
2183 | int error; | |
2184 | ||
2185 | error = pinctrl_claim_hogs(pctldev); | |
2186 | if (error) { | |
5038a66d | 2187 | dev_err(pctldev->dev, "could not claim hogs: %i\n", error); |
61187142 | 2188 | return error; |
950b0d91 TL |
2189 | } |
2190 | ||
2191 | mutex_lock(&pinctrldev_list_mutex); | |
2192 | list_add_tail(&pctldev->node, &pinctrldev_list); | |
2193 | mutex_unlock(&pinctrldev_list_mutex); | |
2194 | ||
2195 | pinctrl_init_device_debugfs(pctldev); | |
2196 | ||
2197 | return 0; | |
2198 | } | |
61187142 | 2199 | EXPORT_SYMBOL_GPL(pinctrl_enable); |
950b0d91 TL |
2200 | |
2201 | /** | |
2202 | * pinctrl_register() - register a pin controller device | |
2203 | * @pctldesc: descriptor for this pin controller | |
2204 | * @dev: parent device for this pin controller | |
2205 | * @driver_data: private pin controller data for this pin controller | |
2206 | * | |
2207 | * Note that pinctrl_register() is known to have problems as the pin | |
2208 | * controller driver functions are called before the driver has a | |
2209 | * struct pinctrl_dev handle. To avoid issues later on, please use the | |
2210 | * new pinctrl_register_and_init() below instead. | |
2211 | */ | |
2212 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
2213 | struct device *dev, void *driver_data) | |
2214 | { | |
2215 | struct pinctrl_dev *pctldev; | |
2216 | int error; | |
2217 | ||
2218 | pctldev = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2219 | if (IS_ERR(pctldev)) | |
2220 | return pctldev; | |
2221 | ||
61187142 | 2222 | error = pinctrl_enable(pctldev); |
ae1cf475 YY |
2223 | if (error) { |
2224 | pinctrl_uninit_controller(pctldev, pctldesc); | |
950b0d91 | 2225 | return ERR_PTR(error); |
ae1cf475 | 2226 | } |
950b0d91 TL |
2227 | |
2228 | return pctldev; | |
950b0d91 | 2229 | } |
2744e8af LW |
2230 | EXPORT_SYMBOL_GPL(pinctrl_register); |
2231 | ||
61187142 TL |
2232 | /** |
2233 | * pinctrl_register_and_init() - register and init pin controller device | |
2234 | * @pctldesc: descriptor for this pin controller | |
2235 | * @dev: parent device for this pin controller | |
2236 | * @driver_data: private pin controller data for this pin controller | |
2237 | * @pctldev: pin controller device | |
2238 | * | |
2239 | * Note that pinctrl_enable() still needs to be manually called after | |
2240 | * this once the driver is ready. | |
2241 | */ | |
950b0d91 TL |
2242 | int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, |
2243 | struct device *dev, void *driver_data, | |
2244 | struct pinctrl_dev **pctldev) | |
2245 | { | |
2246 | struct pinctrl_dev *p; | |
950b0d91 TL |
2247 | |
2248 | p = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2249 | if (IS_ERR(p)) | |
2250 | return PTR_ERR(p); | |
2251 | ||
2252 | /* | |
2253 | * We have pinctrl_start() call functions in the pin controller | |
2254 | * driver with create_pinctrl() for at least dt_node_to_map(). So | |
2255 | * let's make sure pctldev is properly initialized for the | |
2256 | * pin controller driver before we do anything. | |
2257 | */ | |
2258 | *pctldev = p; | |
2259 | ||
950b0d91 TL |
2260 | return 0; |
2261 | } | |
2262 | EXPORT_SYMBOL_GPL(pinctrl_register_and_init); | |
2263 | ||
2744e8af LW |
2264 | /** |
2265 | * pinctrl_unregister() - unregister pinmux | |
2266 | * @pctldev: pin controller to unregister | |
2267 | * | |
2268 | * Called by pinmux drivers to unregister a pinmux. | |
2269 | */ | |
2270 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
2271 | { | |
5d589b09 | 2272 | struct pinctrl_gpio_range *range, *n; |
3429fb3c | 2273 | |
cea234e9 | 2274 | if (!pctldev) |
2744e8af LW |
2275 | return; |
2276 | ||
42fed7ba | 2277 | mutex_lock(&pctldev->mutex); |
42fed7ba | 2278 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 2279 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 2280 | |
3429fb3c | 2281 | if (!IS_ERR_OR_NULL(pctldev->p)) |
42fed7ba | 2282 | pinctrl_put(pctldev->p); |
57b676f9 | 2283 | |
db93facf JL |
2284 | mutex_lock(&pinctrldev_list_mutex); |
2285 | mutex_lock(&pctldev->mutex); | |
2744e8af | 2286 | /* TODO: check that no pinmuxes are still active? */ |
46daed6e | 2287 | list_del(&pctldev->node); |
a76edc89 | 2288 | pinmux_generic_free_functions(pctldev); |
c7059c5a | 2289 | pinctrl_generic_free_groups(pctldev); |
2744e8af LW |
2290 | /* Destroy descriptor tree */ |
2291 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
2292 | pctldev->desc->npins); | |
5d589b09 DA |
2293 | /* remove gpio ranges map */ |
2294 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
2295 | list_del(&range->node); | |
2296 | ||
42fed7ba PC |
2297 | mutex_unlock(&pctldev->mutex); |
2298 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 2299 | kfree(pctldev); |
42fed7ba | 2300 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
2301 | } |
2302 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
2303 | ||
80e0f8d9 LD |
2304 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
2305 | { | |
2306 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
2307 | ||
2308 | pinctrl_unregister(pctldev); | |
2309 | } | |
2310 | ||
2311 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
2312 | { | |
2313 | struct pctldev **r = res; | |
2314 | ||
3024f920 | 2315 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
2316 | return 0; |
2317 | ||
2318 | return *r == data; | |
2319 | } | |
2320 | ||
2321 | /** | |
2322 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
2323 | * @dev: parent device for this pin controller | |
2324 | * @pctldesc: descriptor for this pin controller | |
2325 | * @driver_data: private pin controller data for this pin controller | |
2326 | * | |
2327 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2328 | * it returns valid pinctrl handle. | |
2329 | * | |
2330 | * The pinctrl device will be automatically released when the device is unbound. | |
2331 | */ | |
2332 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
2333 | struct pinctrl_desc *pctldesc, | |
2334 | void *driver_data) | |
2335 | { | |
2336 | struct pinctrl_dev **ptr, *pctldev; | |
2337 | ||
2338 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2339 | if (!ptr) | |
2340 | return ERR_PTR(-ENOMEM); | |
2341 | ||
2342 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
2343 | if (IS_ERR(pctldev)) { | |
2344 | devres_free(ptr); | |
2345 | return pctldev; | |
2346 | } | |
2347 | ||
2348 | *ptr = pctldev; | |
2349 | devres_add(dev, ptr); | |
2350 | ||
2351 | return pctldev; | |
2352 | } | |
2353 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
2354 | ||
950b0d91 TL |
2355 | /** |
2356 | * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init | |
2357 | * @dev: parent device for this pin controller | |
2358 | * @pctldesc: descriptor for this pin controller | |
2359 | * @driver_data: private pin controller data for this pin controller | |
9c340bbb | 2360 | * @pctldev: pin controller device |
950b0d91 | 2361 | * |
9c340bbb | 2362 | * Returns zero on success or an error number on failure. |
950b0d91 TL |
2363 | * |
2364 | * The pinctrl device will be automatically released when the device is unbound. | |
2365 | */ | |
2366 | int devm_pinctrl_register_and_init(struct device *dev, | |
2367 | struct pinctrl_desc *pctldesc, | |
2368 | void *driver_data, | |
2369 | struct pinctrl_dev **pctldev) | |
2370 | { | |
2371 | struct pinctrl_dev **ptr; | |
2372 | int error; | |
2373 | ||
2374 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2375 | if (!ptr) | |
2376 | return -ENOMEM; | |
2377 | ||
2378 | error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev); | |
2379 | if (error) { | |
2380 | devres_free(ptr); | |
2381 | return error; | |
2382 | } | |
2383 | ||
2384 | *ptr = *pctldev; | |
2385 | devres_add(dev, ptr); | |
2386 | ||
2387 | return 0; | |
2388 | } | |
2389 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init); | |
2390 | ||
80e0f8d9 LD |
2391 | /** |
2392 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
129803e6 | 2393 | * @dev: device for which resource was allocated |
80e0f8d9 LD |
2394 | * @pctldev: the pinctrl device to unregister. |
2395 | */ | |
2396 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
2397 | { | |
2398 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
2399 | devm_pinctrl_dev_match, pctldev)); | |
2400 | } | |
2401 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
2402 | ||
2744e8af LW |
2403 | static int __init pinctrl_init(void) |
2404 | { | |
2405 | pr_info("initialized pinctrl subsystem\n"); | |
2406 | pinctrl_init_debugfs(); | |
2407 | return 0; | |
2408 | } | |
2409 | ||
2410 | /* init early since many drivers really need to initialized pinmux early */ | |
2411 | core_initcall(pinctrl_init); |