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af873fce | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | /* |
3 | * Core driver for the pin control subsystem | |
4 | * | |
befe5bdf | 5 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
6 | * Written on behalf of Linaro for ST-Ericsson |
7 | * Based on bits of regulator core, gpio core and clk core | |
8 | * | |
9 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
10 | * | |
b2b3e66e | 11 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
2744e8af LW |
12 | */ |
13 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
14 | ||
82cc14c9 | 15 | #include <linux/array_size.h> |
524fc108 | 16 | #include <linux/cleanup.h> |
e5530adc | 17 | #include <linux/debugfs.h> |
2744e8af | 18 | #include <linux/device.h> |
2744e8af | 19 | #include <linux/err.h> |
e5530adc AS |
20 | #include <linux/export.h> |
21 | #include <linux/init.h> | |
e5530adc | 22 | #include <linux/kref.h> |
2744e8af | 23 | #include <linux/list.h> |
2744e8af | 24 | #include <linux/seq_file.h> |
e5530adc AS |
25 | #include <linux/slab.h> |
26 | ||
5f0dedcc | 27 | #include <linux/gpio.h> |
ec963d04 BG |
28 | #include <linux/gpio/driver.h> |
29 | ||
6d4ca1fb | 30 | #include <linux/pinctrl/consumer.h> |
e5530adc | 31 | #include <linux/pinctrl/devinfo.h> |
2744e8af | 32 | #include <linux/pinctrl/machine.h> |
e5530adc | 33 | #include <linux/pinctrl/pinctrl.h> |
2afe8229 | 34 | |
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
ae6b4d85 | 37 | #include "pinconf.h" |
e5530adc | 38 | #include "pinmux.h" |
b2b3e66e | 39 | |
5b3aa5f7 DA |
40 | static bool pinctrl_dummy_state; |
41 | ||
42fed7ba | 42 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 43 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
44 | |
45 | /* Mutex taken to protect pinctrl_maps */ | |
46 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
47 | ||
48 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 49 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
50 | |
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 52 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 58 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 59 | |
befe5bdf | 60 | |
5b3aa5f7 DA |
61 | /** |
62 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
63 | * | |
64 | * Usually this function is called by platforms without pinctrl driver support | |
65 | * but run with some shared drivers using pinctrl APIs. | |
66 | * After calling this function, the pinctrl core will return successfully | |
67 | * with creating a dummy state for the driver to keep going smoothly. | |
68 | */ | |
69 | void pinctrl_provide_dummies(void) | |
70 | { | |
71 | pinctrl_dummy_state = true; | |
72 | } | |
73 | ||
2744e8af LW |
74 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
75 | { | |
76 | /* We're not allowed to register devices without name */ | |
77 | return pctldev->desc->name; | |
78 | } | |
79 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
80 | ||
d6e99abb HZ |
81 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
82 | { | |
83 | return dev_name(pctldev->dev); | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
86 | ||
2744e8af LW |
87 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
88 | { | |
89 | return pctldev->driver_data; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
92 | ||
93 | /** | |
9dfac4fd LW |
94 | * get_pinctrl_dev_from_devname() - look up pin controller device |
95 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
96 | * |
97 | * Looks up a pin control device matching a certain device name or pure device | |
98 | * pointer, the pure device pointer will take precedence. | |
99 | */ | |
9dfac4fd | 100 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af | 101 | { |
6cadafb3 | 102 | struct pinctrl_dev *pctldev; |
2744e8af | 103 | |
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
44d5f7bb LW |
107 | mutex_lock(&pinctrldev_list_mutex); |
108 | ||
2744e8af | 109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 110 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 111 | /* Matched on device name */ |
44d5f7bb LW |
112 | mutex_unlock(&pinctrldev_list_mutex); |
113 | return pctldev; | |
2744e8af LW |
114 | } |
115 | } | |
2744e8af | 116 | |
44d5f7bb LW |
117 | mutex_unlock(&pinctrldev_list_mutex); |
118 | ||
119 | return NULL; | |
2744e8af LW |
120 | } |
121 | ||
42fed7ba PC |
122 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
123 | { | |
124 | struct pinctrl_dev *pctldev; | |
125 | ||
126 | mutex_lock(&pinctrldev_list_mutex); | |
127 | ||
128 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
03da7f98 | 129 | if (device_match_of_node(pctldev->dev, np)) { |
42fed7ba PC |
130 | mutex_unlock(&pinctrldev_list_mutex); |
131 | return pctldev; | |
132 | } | |
133 | ||
d463f82d | 134 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
135 | |
136 | return NULL; | |
137 | } | |
138 | ||
ae6b4d85 LW |
139 | /** |
140 | * pin_get_from_name() - look up a pin number from a name | |
141 | * @pctldev: the pin control device to lookup the pin on | |
142 | * @name: the name of the pin to look up | |
143 | */ | |
144 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
145 | { | |
7cc4e6b0 | 146 | unsigned int i, pin; |
ae6b4d85 | 147 | |
706e8520 CP |
148 | /* The pin number can be retrived from the pin controller descriptor */ |
149 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
150 | struct pin_desc *desc; |
151 | ||
706e8520 | 152 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
153 | desc = pin_desc_get(pctldev, pin); |
154 | /* Pin space may be sparse */ | |
6c325f87 | 155 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
156 | return pin; |
157 | } | |
158 | ||
159 | return -EINVAL; | |
160 | } | |
161 | ||
dcb5dbc3 | 162 | /** |
11f054c1 | 163 | * pin_get_name() - look up a pin name from a pin id |
dcb5dbc3 | 164 | * @pctldev: the pin control device to lookup the pin on |
9c340bbb | 165 | * @pin: pin number/id to look up |
dcb5dbc3 | 166 | */ |
7cc4e6b0 | 167 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned int pin) |
dcb5dbc3 DA |
168 | { |
169 | const struct pin_desc *desc; | |
170 | ||
171 | desc = pin_desc_get(pctldev, pin); | |
cea234e9 | 172 | if (!desc) { |
dcb5dbc3 DA |
173 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", |
174 | pin); | |
175 | return NULL; | |
176 | } | |
177 | ||
178 | return desc->name; | |
179 | } | |
b88d1451 | 180 | EXPORT_SYMBOL_GPL(pin_get_name); |
dcb5dbc3 | 181 | |
2744e8af LW |
182 | /* Deletes a range of pin descriptors */ |
183 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
184 | const struct pinctrl_pin_desc *pins, | |
7cc4e6b0 | 185 | unsigned int num_pins) |
2744e8af LW |
186 | { |
187 | int i; | |
188 | ||
2744e8af LW |
189 | for (i = 0; i < num_pins; i++) { |
190 | struct pin_desc *pindesc; | |
191 | ||
192 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
193 | pins[i].number); | |
cea234e9 | 194 | if (pindesc) { |
2744e8af LW |
195 | radix_tree_delete(&pctldev->pin_desc_tree, |
196 | pins[i].number); | |
ca53c5f1 LW |
197 | if (pindesc->dynamic_name) |
198 | kfree(pindesc->name); | |
2744e8af LW |
199 | } |
200 | kfree(pindesc); | |
201 | } | |
2744e8af LW |
202 | } |
203 | ||
204 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 205 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
206 | { |
207 | struct pin_desc *pindesc; | |
ecfe9a01 | 208 | int error; |
2744e8af | 209 | |
cd8f61f1 | 210 | pindesc = pin_desc_get(pctldev, pin->number); |
cea234e9 | 211 | if (pindesc) { |
cd8f61f1 MY |
212 | dev_err(pctldev->dev, "pin %d already registered\n", |
213 | pin->number); | |
2744e8af LW |
214 | return -EINVAL; |
215 | } | |
216 | ||
217 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
2104d12d | 218 | if (!pindesc) |
2744e8af | 219 | return -ENOMEM; |
ae6b4d85 | 220 | |
2744e8af LW |
221 | /* Set owner */ |
222 | pindesc->pctldev = pctldev; | |
223 | ||
9af1e44f | 224 | /* Copy basic pin info */ |
cd8f61f1 MY |
225 | if (pin->name) { |
226 | pindesc->name = pin->name; | |
ca53c5f1 | 227 | } else { |
cd8f61f1 | 228 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
cea234e9 | 229 | if (!pindesc->name) { |
ecfe9a01 SS |
230 | error = -ENOMEM; |
231 | goto failed; | |
eb26cc9c | 232 | } |
ca53c5f1 LW |
233 | pindesc->dynamic_name = true; |
234 | } | |
2744e8af | 235 | |
cd8f61f1 MY |
236 | pindesc->drv_data = pin->drv_data; |
237 | ||
ecfe9a01 SS |
238 | error = radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); |
239 | if (error) | |
240 | goto failed; | |
241 | ||
2744e8af | 242 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 243 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af | 244 | return 0; |
ecfe9a01 SS |
245 | |
246 | failed: | |
247 | kfree(pindesc); | |
248 | return error; | |
2744e8af LW |
249 | } |
250 | ||
251 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
3f713b7c | 252 | const struct pinctrl_pin_desc *pins, |
7cc4e6b0 | 253 | unsigned int num_descs) |
2744e8af | 254 | { |
7cc4e6b0 | 255 | unsigned int i; |
2744e8af LW |
256 | int ret = 0; |
257 | ||
258 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 259 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
260 | if (ret) |
261 | return ret; | |
262 | } | |
263 | ||
264 | return 0; | |
265 | } | |
266 | ||
c8587eee CR |
267 | /** |
268 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
269 | * @range: GPIO range used for the translation | |
31d4e8d1 BG |
270 | * @gc: GPIO chip structure from the GPIO subsystem |
271 | * @offset: hardware offset of the GPIO relative to the controller | |
c8587eee CR |
272 | * |
273 | * Finds the pin number for a given GPIO using the specified GPIO range | |
274 | * as a base for translation. The distinction between linear GPIO ranges | |
275 | * and pin list based GPIO ranges is managed correctly by this function. | |
276 | * | |
277 | * This function assumes the gpio is part of the specified GPIO range, use | |
278 | * only after making sure this is the case (e.g. by calling it on the | |
279 | * result of successful pinctrl_get_device_gpio_range calls)! | |
280 | */ | |
281 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
31d4e8d1 | 282 | struct gpio_chip *gc, unsigned int offset) |
c8587eee | 283 | { |
31d4e8d1 | 284 | unsigned int pin = gc->base + offset - range->base; |
c8587eee | 285 | if (range->pins) |
31d4e8d1 | 286 | return range->pins[pin]; |
c8587eee | 287 | else |
31d4e8d1 | 288 | return range->pin_base + pin; |
c8587eee CR |
289 | } |
290 | ||
2744e8af LW |
291 | /** |
292 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
293 | * @pctldev: pin controller device to check | |
58e772f4 BG |
294 | * @gc: GPIO chip structure from the GPIO subsystem |
295 | * @offset: hardware offset of the GPIO relative to the controller | |
2744e8af LW |
296 | * |
297 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
298 | * controller, return the range or NULL | |
299 | */ | |
300 | static struct pinctrl_gpio_range * | |
58e772f4 BG |
301 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, struct gpio_chip *gc, |
302 | unsigned int offset) | |
2744e8af | 303 | { |
6cadafb3 | 304 | struct pinctrl_gpio_range *range; |
2744e8af | 305 | |
42fed7ba | 306 | mutex_lock(&pctldev->mutex); |
2744e8af | 307 | /* Loop over the ranges */ |
2744e8af LW |
308 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
309 | /* Check if we're in the valid range */ | |
58e772f4 BG |
310 | if ((gc->base + offset) >= range->base && |
311 | (gc->base + offset) < range->base + range->npins) { | |
42fed7ba | 312 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
313 | return range; |
314 | } | |
315 | } | |
42fed7ba | 316 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
317 | return NULL; |
318 | } | |
319 | ||
51e13c24 HZ |
320 | /** |
321 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
322 | * the same GPIO chip are in range | |
6042aaef BG |
323 | * @gc: GPIO chip structure from the GPIO subsystem |
324 | * @offset: hardware offset of the GPIO relative to the controller | |
51e13c24 HZ |
325 | * |
326 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
327 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
328 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
329 | * of the same GPIO chip don't have back-end pinctrl interface. | |
330 | * If the return value is true, it means that pinctrl device is ready & the | |
331 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
332 | * is false, it means that pinctrl device may not be ready. | |
333 | */ | |
2afe8229 | 334 | #ifdef CONFIG_GPIOLIB |
6042aaef BG |
335 | static bool pinctrl_ready_for_gpio_range(struct gpio_chip *gc, |
336 | unsigned int offset) | |
51e13c24 HZ |
337 | { |
338 | struct pinctrl_dev *pctldev; | |
339 | struct pinctrl_gpio_range *range = NULL; | |
942cde72 | 340 | |
44d5f7bb LW |
341 | mutex_lock(&pinctrldev_list_mutex); |
342 | ||
51e13c24 HZ |
343 | /* Loop over the pin controllers */ |
344 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
345 | /* Loop over the ranges */ | |
5ffbe2e6 | 346 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
347 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
348 | /* Check if any gpio range overlapped with gpio chip */ | |
6042aaef BG |
349 | if (range->base + range->npins - 1 < gc->base || |
350 | range->base > gc->base + gc->ngpio - 1) | |
51e13c24 | 351 | continue; |
5ffbe2e6 | 352 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 353 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
354 | return true; |
355 | } | |
5ffbe2e6 | 356 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 357 | } |
44d5f7bb LW |
358 | |
359 | mutex_unlock(&pinctrldev_list_mutex); | |
360 | ||
51e13c24 HZ |
361 | return false; |
362 | } | |
2afe8229 | 363 | #else |
6042aaef BG |
364 | static inline bool |
365 | pinctrl_ready_for_gpio_range(struct gpio_chip *gc, unsigned int offset) | |
366 | { | |
367 | return true; | |
368 | } | |
2afe8229 | 369 | #endif |
51e13c24 | 370 | |
2744e8af LW |
371 | /** |
372 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
82059c3d BG |
373 | * @gc: GPIO chip structure from the GPIO subsystem |
374 | * @offset: hardware offset of the GPIO relative to the controller | |
2744e8af LW |
375 | * @outdev: the pin control device if found |
376 | * @outrange: the GPIO range if found | |
377 | * | |
378 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
379 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
380 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
381 | * may still have not been registered. | |
2744e8af | 382 | */ |
82059c3d BG |
383 | static int pinctrl_get_device_gpio_range(struct gpio_chip *gc, |
384 | unsigned int offset, | |
4ecce45d SW |
385 | struct pinctrl_dev **outdev, |
386 | struct pinctrl_gpio_range **outrange) | |
2744e8af | 387 | { |
6cadafb3 | 388 | struct pinctrl_dev *pctldev; |
2744e8af | 389 | |
f0059021 AL |
390 | mutex_lock(&pinctrldev_list_mutex); |
391 | ||
2744e8af | 392 | /* Loop over the pin controllers */ |
2744e8af LW |
393 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
394 | struct pinctrl_gpio_range *range; | |
395 | ||
58e772f4 | 396 | range = pinctrl_match_gpio_range(pctldev, gc, offset); |
cea234e9 | 397 | if (range) { |
2744e8af LW |
398 | *outdev = pctldev; |
399 | *outrange = range; | |
f0059021 | 400 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
401 | return 0; |
402 | } | |
403 | } | |
2744e8af | 404 | |
f0059021 AL |
405 | mutex_unlock(&pinctrldev_list_mutex); |
406 | ||
4650b7cb | 407 | return -EPROBE_DEFER; |
2744e8af LW |
408 | } |
409 | ||
410 | /** | |
411 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
412 | * @pctldev: pin controller device to add the range to | |
413 | * @range: the GPIO range to add | |
414 | * | |
3ded2169 DC |
415 | * DEPRECATED: Don't use this function in new code. See section 2 of |
416 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to bind pinctrl and | |
417 | * gpio drivers. | |
418 | * | |
2744e8af LW |
419 | * This adds a range of GPIOs to be handled by a certain pin controller. Call |
420 | * this to register handled ranges after registering your pin controller. | |
421 | */ | |
422 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
423 | struct pinctrl_gpio_range *range) | |
424 | { | |
42fed7ba | 425 | mutex_lock(&pctldev->mutex); |
8b9c139f | 426 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 427 | mutex_unlock(&pctldev->mutex); |
2744e8af | 428 | } |
4ecce45d | 429 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 430 | |
3e5e00b6 DA |
431 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
432 | struct pinctrl_gpio_range *ranges, | |
7cc4e6b0 | 433 | unsigned int nranges) |
3e5e00b6 DA |
434 | { |
435 | int i; | |
436 | ||
437 | for (i = 0; i < nranges; i++) | |
438 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
439 | } | |
440 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
441 | ||
192c369c | 442 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
443 | struct pinctrl_gpio_range *range) |
444 | { | |
42fed7ba PC |
445 | struct pinctrl_dev *pctldev; |
446 | ||
42fed7ba | 447 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 448 | |
dfa97515 LW |
449 | /* |
450 | * If we can't find this device, let's assume that is because | |
451 | * it has not probed yet, so the driver trying to register this | |
452 | * range need to defer probing. | |
453 | */ | |
10f94f9c | 454 | if (!pctldev) |
dfa97515 | 455 | return ERR_PTR(-EPROBE_DEFER); |
10f94f9c | 456 | |
f23f1516 | 457 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 458 | |
f23f1516 SH |
459 | return pctldev; |
460 | } | |
192c369c | 461 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 462 | |
586a87e6 | 463 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
7cc4e6b0 | 464 | const unsigned int **pins, unsigned int *num_pins) |
586a87e6 CR |
465 | { |
466 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
467 | int gs; | |
468 | ||
e5b3b2d9 AT |
469 | if (!pctlops->get_group_pins) |
470 | return -EINVAL; | |
471 | ||
586a87e6 CR |
472 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
473 | if (gs < 0) | |
474 | return gs; | |
475 | ||
476 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
477 | } | |
478 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
479 | ||
9afbefb2 | 480 | struct pinctrl_gpio_range * |
b18537cd JE |
481 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
482 | unsigned int pin) | |
9afbefb2 | 483 | { |
c8f50e86 | 484 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
485 | |
486 | /* Loop over the ranges */ | |
487 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
488 | /* Check if we're in the valid range */ | |
c8587eee CR |
489 | if (range->pins) { |
490 | int a; | |
491 | for (a = 0; a < range->npins; a++) { | |
492 | if (range->pins[a] == pin) | |
b18537cd | 493 | return range; |
c8587eee CR |
494 | } |
495 | } else if (pin >= range->pin_base && | |
c8f50e86 | 496 | pin < range->pin_base + range->npins) |
b18537cd | 497 | return range; |
9afbefb2 | 498 | } |
b18537cd JE |
499 | |
500 | return NULL; | |
501 | } | |
502 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
503 | ||
504 | /** | |
505 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
506 | * @pctldev: the pin controller device to look in | |
507 | * @pin: a controller-local number to find the range for | |
508 | */ | |
509 | struct pinctrl_gpio_range * | |
510 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
511 | unsigned int pin) | |
512 | { | |
513 | struct pinctrl_gpio_range *range; | |
514 | ||
515 | mutex_lock(&pctldev->mutex); | |
516 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 517 | mutex_unlock(&pctldev->mutex); |
b18537cd | 518 | |
c8f50e86 | 519 | return range; |
9afbefb2 LW |
520 | } |
521 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
522 | ||
7e10ee68 | 523 | /** |
50842cbd | 524 | * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller |
7e10ee68 VK |
525 | * @pctldev: pin controller device to remove the range from |
526 | * @range: the GPIO range to remove | |
527 | */ | |
528 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
529 | struct pinctrl_gpio_range *range) | |
530 | { | |
42fed7ba | 531 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 532 | list_del(&range->node); |
42fed7ba | 533 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
534 | } |
535 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
536 | ||
c033a718 | 537 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
538 | |
539 | /** | |
540 | * pinctrl_generic_get_group_count() - returns the number of pin groups | |
541 | * @pctldev: pin controller device | |
542 | */ | |
543 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev) | |
544 | { | |
545 | return pctldev->num_groups; | |
546 | } | |
547 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count); | |
548 | ||
549 | /** | |
550 | * pinctrl_generic_get_group_name() - returns the name of a pin group | |
551 | * @pctldev: pin controller device | |
552 | * @selector: group number | |
553 | */ | |
554 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
555 | unsigned int selector) | |
556 | { | |
557 | struct group_desc *group; | |
558 | ||
559 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
560 | selector); | |
561 | if (!group) | |
562 | return NULL; | |
563 | ||
85174ad7 | 564 | return group->grp.name; |
c7059c5a TL |
565 | } |
566 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); | |
567 | ||
568 | /** | |
569 | * pinctrl_generic_get_group_pins() - gets the pin group pins | |
570 | * @pctldev: pin controller device | |
571 | * @selector: group number | |
572 | * @pins: pins in the group | |
573 | * @num_pins: number of pins in the group | |
574 | */ | |
575 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
576 | unsigned int selector, | |
577 | const unsigned int **pins, | |
578 | unsigned int *num_pins) | |
579 | { | |
580 | struct group_desc *group; | |
581 | ||
582 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
583 | selector); | |
584 | if (!group) { | |
585 | dev_err(pctldev->dev, "%s could not find pingroup%i\n", | |
586 | __func__, selector); | |
587 | return -EINVAL; | |
588 | } | |
589 | ||
85174ad7 AS |
590 | *pins = group->grp.pins; |
591 | *num_pins = group->grp.npins; | |
c7059c5a TL |
592 | |
593 | return 0; | |
594 | } | |
595 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins); | |
596 | ||
597 | /** | |
598 | * pinctrl_generic_get_group() - returns a pin group based on the number | |
599 | * @pctldev: pin controller device | |
9c340bbb | 600 | * @selector: group number |
c7059c5a TL |
601 | */ |
602 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
603 | unsigned int selector) | |
604 | { | |
605 | struct group_desc *group; | |
606 | ||
607 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
608 | selector); | |
609 | if (!group) | |
610 | return NULL; | |
611 | ||
612 | return group; | |
613 | } | |
614 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group); | |
615 | ||
a203728a TL |
616 | static int pinctrl_generic_group_name_to_selector(struct pinctrl_dev *pctldev, |
617 | const char *function) | |
618 | { | |
619 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
620 | int ngroups = ops->get_groups_count(pctldev); | |
621 | int selector = 0; | |
622 | ||
623 | /* See if this pctldev has this group */ | |
624 | while (selector < ngroups) { | |
625 | const char *gname = ops->get_group_name(pctldev, selector); | |
626 | ||
54a58185 | 627 | if (gname && !strcmp(function, gname)) |
a203728a TL |
628 | return selector; |
629 | ||
630 | selector++; | |
631 | } | |
632 | ||
633 | return -EINVAL; | |
634 | } | |
635 | ||
c7059c5a TL |
636 | /** |
637 | * pinctrl_generic_add_group() - adds a new pin group | |
638 | * @pctldev: pin controller device | |
639 | * @name: name of the pin group | |
640 | * @pins: pins in the pin group | |
641 | * @num_pins: number of pins in the pin group | |
642 | * @data: pin controller driver specific data | |
643 | * | |
644 | * Note that the caller must take care of locking. | |
645 | */ | |
646 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
d98d7385 | 647 | const unsigned int *pins, int num_pins, void *data) |
c7059c5a TL |
648 | { |
649 | struct group_desc *group; | |
b56e23bf | 650 | int selector, error; |
a203728a TL |
651 | |
652 | if (!name) | |
653 | return -EINVAL; | |
654 | ||
655 | selector = pinctrl_generic_group_name_to_selector(pctldev, name); | |
656 | if (selector >= 0) | |
657 | return selector; | |
658 | ||
659 | selector = pctldev->num_groups; | |
c7059c5a TL |
660 | |
661 | group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL); | |
662 | if (!group) | |
663 | return -ENOMEM; | |
664 | ||
383da0c7 | 665 | *group = PINCTRL_GROUP_DESC(name, pins, num_pins, data); |
c7059c5a | 666 | |
b56e23bf SS |
667 | error = radix_tree_insert(&pctldev->pin_group_tree, selector, group); |
668 | if (error) | |
669 | return error; | |
c7059c5a TL |
670 | |
671 | pctldev->num_groups++; | |
672 | ||
a203728a | 673 | return selector; |
c7059c5a TL |
674 | } |
675 | EXPORT_SYMBOL_GPL(pinctrl_generic_add_group); | |
676 | ||
677 | /** | |
678 | * pinctrl_generic_remove_group() - removes a numbered pin group | |
679 | * @pctldev: pin controller device | |
680 | * @selector: group number | |
681 | * | |
682 | * Note that the caller must take care of locking. | |
683 | */ | |
684 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
685 | unsigned int selector) | |
686 | { | |
687 | struct group_desc *group; | |
688 | ||
689 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
690 | selector); | |
691 | if (!group) | |
692 | return -ENOENT; | |
693 | ||
694 | radix_tree_delete(&pctldev->pin_group_tree, selector); | |
695 | devm_kfree(pctldev->dev, group); | |
696 | ||
697 | pctldev->num_groups--; | |
698 | ||
699 | return 0; | |
700 | } | |
701 | EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); | |
702 | ||
703 | /** | |
704 | * pinctrl_generic_free_groups() - removes all pin groups | |
705 | * @pctldev: pin controller device | |
706 | * | |
664b7c47 TL |
707 | * Note that the caller must take care of locking. The pinctrl groups |
708 | * are allocated with devm_kzalloc() so no need to free them here. | |
c7059c5a TL |
709 | */ |
710 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
711 | { | |
712 | struct radix_tree_iter iter; | |
906a2a39 | 713 | void __rcu **slot; |
c7059c5a TL |
714 | |
715 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) | |
664b7c47 | 716 | radix_tree_delete(&pctldev->pin_group_tree, iter.index); |
c7059c5a TL |
717 | |
718 | pctldev->num_groups = 0; | |
719 | } | |
720 | ||
721 | #else | |
722 | static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
723 | { | |
724 | } | |
c033a718 | 725 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 726 | |
7afde8ba LW |
727 | /** |
728 | * pinctrl_get_group_selector() - returns the group selector for a group | |
729 | * @pctldev: the pin controller handling the group | |
730 | * @pin_group: the pin group to look up | |
731 | */ | |
732 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
733 | const char *pin_group) | |
734 | { | |
735 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
7cc4e6b0 AS |
736 | unsigned int ngroups = pctlops->get_groups_count(pctldev); |
737 | unsigned int group_selector = 0; | |
7afde8ba | 738 | |
d1e90e9e | 739 | while (group_selector < ngroups) { |
7afde8ba LW |
740 | const char *gname = pctlops->get_group_name(pctldev, |
741 | group_selector); | |
54a58185 | 742 | if (gname && !strcmp(gname, pin_group)) { |
51cd24ee | 743 | dev_dbg(pctldev->dev, |
7afde8ba LW |
744 | "found group selector %u for %s\n", |
745 | group_selector, | |
746 | pin_group); | |
747 | return group_selector; | |
748 | } | |
749 | ||
750 | group_selector++; | |
751 | } | |
752 | ||
51cd24ee | 753 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
754 | pin_group); |
755 | ||
756 | return -EINVAL; | |
757 | } | |
758 | ||
00762e41 | 759 | bool pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset) |
472a61e7 SW |
760 | { |
761 | struct pinctrl_dev *pctldev; | |
762 | struct pinctrl_gpio_range *range; | |
763 | bool result; | |
764 | int pin; | |
765 | ||
766 | /* | |
767 | * Try to obtain GPIO range, if it fails | |
768 | * we're probably dealing with GPIO driver | |
769 | * without a backing pin controller - bail out. | |
770 | */ | |
82059c3d | 771 | if (pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range)) |
472a61e7 SW |
772 | return true; |
773 | ||
774 | mutex_lock(&pctldev->mutex); | |
775 | ||
776 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 777 | pin = gpio_to_pin(range, gc, offset); |
472a61e7 SW |
778 | |
779 | result = pinmux_can_be_used_for_gpio(pctldev, pin); | |
780 | ||
781 | mutex_unlock(&pctldev->mutex); | |
782 | ||
783 | return result; | |
784 | } | |
00762e41 | 785 | EXPORT_SYMBOL_GPL(pinctrl_gpio_can_use_line); |
ec963d04 | 786 | |
699f0784 | 787 | /** |
acb38be6 | 788 | * pinctrl_gpio_request() - request a single pin to be used as GPIO |
699f0784 BG |
789 | * @gc: GPIO chip structure from the GPIO subsystem |
790 | * @offset: hardware offset of the GPIO relative to the controller | |
791 | * | |
792 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
793 | * as part of their gpio_request() semantics, platforms and individual drivers | |
794 | * shall *NOT* request GPIO pins to be muxed in. | |
795 | */ | |
acb38be6 | 796 | int pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset) |
befe5bdf | 797 | { |
befe5bdf | 798 | struct pinctrl_gpio_range *range; |
699f0784 BG |
799 | struct pinctrl_dev *pctldev; |
800 | int ret, pin; | |
befe5bdf | 801 | |
82059c3d | 802 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
57b676f9 | 803 | if (ret) { |
6042aaef | 804 | if (pinctrl_ready_for_gpio_range(gc, offset)) |
51e13c24 | 805 | ret = 0; |
4650b7cb | 806 | return ret; |
57b676f9 | 807 | } |
befe5bdf | 808 | |
9b77ace4 AL |
809 | mutex_lock(&pctldev->mutex); |
810 | ||
befe5bdf | 811 | /* Convert to the pin controllers number space */ |
31d4e8d1 | 812 | pin = gpio_to_pin(range, gc, offset); |
befe5bdf | 813 | |
699f0784 | 814 | ret = pinmux_request_gpio(pctldev, range, pin, gc->base + offset); |
57b676f9 | 815 | |
9b77ace4 AL |
816 | mutex_unlock(&pctldev->mutex); |
817 | ||
57b676f9 | 818 | return ret; |
befe5bdf | 819 | } |
acb38be6 | 820 | EXPORT_SYMBOL_GPL(pinctrl_gpio_request); |
ec963d04 | 821 | |
ec963d04 | 822 | /** |
4fccb263 | 823 | * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO |
ec963d04 BG |
824 | * @gc: GPIO chip structure from the GPIO subsystem |
825 | * @offset: hardware offset of the GPIO relative to the controller | |
826 | * | |
827 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
828 | * as part of their gpio_request() semantics, platforms and individual drivers | |
829 | * shall *NOT* request GPIO pins to be muxed in. | |
830 | */ | |
4fccb263 | 831 | void pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 832 | { |
1d2c8845 BG |
833 | struct pinctrl_gpio_range *range; |
834 | struct pinctrl_dev *pctldev; | |
835 | int ret, pin; | |
836 | ||
82059c3d | 837 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
1d2c8845 BG |
838 | if (ret) |
839 | return; | |
840 | ||
841 | mutex_lock(&pctldev->mutex); | |
842 | ||
843 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 844 | pin = gpio_to_pin(range, gc, offset); |
1d2c8845 BG |
845 | |
846 | pinmux_free_gpio(pctldev, pin, range); | |
847 | ||
848 | mutex_unlock(&pctldev->mutex); | |
ec963d04 | 849 | } |
4fccb263 | 850 | EXPORT_SYMBOL_GPL(pinctrl_gpio_free); |
ec963d04 | 851 | |
315c4418 BG |
852 | static int pinctrl_gpio_direction(struct gpio_chip *gc, unsigned int offset, |
853 | bool input) | |
befe5bdf LW |
854 | { |
855 | struct pinctrl_dev *pctldev; | |
856 | struct pinctrl_gpio_range *range; | |
857 | int ret; | |
858 | int pin; | |
859 | ||
82059c3d | 860 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
42fed7ba | 861 | if (ret) { |
befe5bdf | 862 | return ret; |
42fed7ba PC |
863 | } |
864 | ||
865 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
866 | |
867 | /* Convert to the pin controllers number space */ | |
31d4e8d1 | 868 | pin = gpio_to_pin(range, gc, offset); |
42fed7ba PC |
869 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
870 | ||
871 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 872 | |
42fed7ba | 873 | return ret; |
befe5bdf LW |
874 | } |
875 | ||
befe5bdf | 876 | /** |
315c46f9 | 877 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode |
ec963d04 BG |
878 | * @gc: GPIO chip structure from the GPIO subsystem |
879 | * @offset: hardware offset of the GPIO relative to the controller | |
befe5bdf LW |
880 | * |
881 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
ec963d04 | 882 | * as part of their gpio_direction_input() semantics, platforms and individual |
befe5bdf LW |
883 | * drivers shall *NOT* touch pin control GPIO calls. |
884 | */ | |
315c46f9 | 885 | int pinctrl_gpio_direction_input(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 886 | { |
315c4418 | 887 | return pinctrl_gpio_direction(gc, offset, true); |
ec963d04 | 888 | } |
315c46f9 | 889 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); |
ec963d04 | 890 | |
15381bc7 | 891 | /** |
b679d6c0 | 892 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode |
ec963d04 BG |
893 | * @gc: GPIO chip structure from the GPIO subsystem |
894 | * @offset: hardware offset of the GPIO relative to the controller | |
15381bc7 | 895 | * |
ec963d04 BG |
896 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, |
897 | * as part of their gpio_direction_output() semantics, platforms and individual | |
898 | * drivers shall *NOT* touch pin control GPIO calls. | |
15381bc7 | 899 | */ |
b679d6c0 | 900 | int pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset) |
ec963d04 | 901 | { |
315c4418 | 902 | return pinctrl_gpio_direction(gc, offset, false); |
ec963d04 | 903 | } |
b679d6c0 | 904 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); |
ec963d04 | 905 | |
ab56e2bf | 906 | /** |
acf2981b | 907 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin |
ab56e2bf BG |
908 | * @gc: GPIO chip structure from the GPIO subsystem |
909 | * @offset: hardware offset of the GPIO relative to the controller | |
910 | * @config: the configuration to apply to the GPIO | |
911 | * | |
912 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | |
913 | * they need to call the underlying pin controller to change GPIO config | |
914 | * (for example set debounce time). | |
915 | */ | |
acf2981b | 916 | int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
ab56e2bf | 917 | unsigned long config) |
15381bc7 MW |
918 | { |
919 | unsigned long configs[] = { config }; | |
920 | struct pinctrl_gpio_range *range; | |
921 | struct pinctrl_dev *pctldev; | |
922 | int ret, pin; | |
923 | ||
82059c3d | 924 | ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range); |
15381bc7 MW |
925 | if (ret) |
926 | return ret; | |
927 | ||
928 | mutex_lock(&pctldev->mutex); | |
31d4e8d1 | 929 | pin = gpio_to_pin(range, gc, offset); |
15381bc7 MW |
930 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); |
931 | mutex_unlock(&pctldev->mutex); | |
932 | ||
933 | return ret; | |
934 | } | |
acf2981b | 935 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); |
ec963d04 | 936 | |
6e5e959d SW |
937 | static struct pinctrl_state *find_state(struct pinctrl *p, |
938 | const char *name) | |
befe5bdf | 939 | { |
6e5e959d SW |
940 | struct pinctrl_state *state; |
941 | ||
942 | list_for_each_entry(state, &p->states, node) | |
943 | if (!strcmp(state->name, name)) | |
944 | return state; | |
945 | ||
946 | return NULL; | |
947 | } | |
948 | ||
949 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
950 | const char *name) | |
951 | { | |
952 | struct pinctrl_state *state; | |
953 | ||
954 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
2104d12d | 955 | if (!state) |
6e5e959d | 956 | return ERR_PTR(-ENOMEM); |
6e5e959d SW |
957 | |
958 | state->name = name; | |
959 | INIT_LIST_HEAD(&state->settings); | |
960 | ||
961 | list_add_tail(&state->node, &p->states); | |
962 | ||
963 | return state; | |
964 | } | |
965 | ||
99e4f675 | 966 | static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev, |
3f713b7c | 967 | const struct pinctrl_map *map) |
6e5e959d SW |
968 | { |
969 | struct pinctrl_state *state; | |
7ecdb16f | 970 | struct pinctrl_setting *setting; |
6e5e959d | 971 | int ret; |
befe5bdf | 972 | |
6e5e959d SW |
973 | state = find_state(p, map->name); |
974 | if (!state) | |
975 | state = create_state(p, map->name); | |
976 | if (IS_ERR(state)) | |
977 | return PTR_ERR(state); | |
befe5bdf | 978 | |
1e2082b5 SW |
979 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
980 | return 0; | |
981 | ||
6e5e959d | 982 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
2104d12d | 983 | if (!setting) |
6e5e959d | 984 | return -ENOMEM; |
befe5bdf | 985 | |
1e2082b5 SW |
986 | setting->type = map->type; |
987 | ||
99e4f675 TL |
988 | if (pctldev) |
989 | setting->pctldev = pctldev; | |
990 | else | |
991 | setting->pctldev = | |
992 | get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
cea234e9 | 993 | if (!setting->pctldev) { |
6e5e959d | 994 | kfree(setting); |
89216494 LW |
995 | /* Do not defer probing of hogs (circular loop) */ |
996 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
997 | return -ENODEV; | |
c05127c4 LW |
998 | /* |
999 | * OK let us guess that the driver is not there yet, and | |
1000 | * let's defer obtaining this pinctrl handle to later... | |
1001 | */ | |
89216494 LW |
1002 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
1003 | map->ctrl_dev_name); | |
c05127c4 | 1004 | return -EPROBE_DEFER; |
6e5e959d SW |
1005 | } |
1006 | ||
1a78958d LW |
1007 | setting->dev_name = map->dev_name; |
1008 | ||
1e2082b5 SW |
1009 | switch (map->type) { |
1010 | case PIN_MAP_TYPE_MUX_GROUP: | |
1011 | ret = pinmux_map_to_setting(map, setting); | |
1012 | break; | |
1013 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1014 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1015 | ret = pinconf_map_to_setting(map, setting); | |
1016 | break; | |
1017 | default: | |
1018 | ret = -EINVAL; | |
1019 | break; | |
1020 | } | |
6e5e959d SW |
1021 | if (ret < 0) { |
1022 | kfree(setting); | |
1023 | return ret; | |
1024 | } | |
1025 | ||
1026 | list_add_tail(&setting->node, &state->settings); | |
1027 | ||
1028 | return 0; | |
1029 | } | |
1030 | ||
1031 | static struct pinctrl *find_pinctrl(struct device *dev) | |
1032 | { | |
1033 | struct pinctrl *p; | |
1034 | ||
42fed7ba | 1035 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 1036 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
1037 | if (p->dev == dev) { |
1038 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 1039 | return p; |
42fed7ba | 1040 | } |
6e5e959d | 1041 | |
42fed7ba | 1042 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
1043 | return NULL; |
1044 | } | |
1045 | ||
42fed7ba | 1046 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d | 1047 | |
99e4f675 TL |
1048 | static struct pinctrl *create_pinctrl(struct device *dev, |
1049 | struct pinctrl_dev *pctldev) | |
6e5e959d SW |
1050 | { |
1051 | struct pinctrl *p; | |
1052 | const char *devname; | |
1053 | struct pinctrl_maps *maps_node; | |
3f713b7c | 1054 | const struct pinctrl_map *map; |
6e5e959d | 1055 | int ret; |
befe5bdf LW |
1056 | |
1057 | /* | |
1058 | * create the state cookie holder struct pinctrl for each | |
1059 | * mapping, this is what consumers will get when requesting | |
1060 | * a pin control handle with pinctrl_get() | |
1061 | */ | |
02f5b989 | 1062 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
2104d12d | 1063 | if (!p) |
befe5bdf | 1064 | return ERR_PTR(-ENOMEM); |
7ecdb16f | 1065 | p->dev = dev; |
6e5e959d | 1066 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
1067 | INIT_LIST_HEAD(&p->dt_maps); |
1068 | ||
99e4f675 | 1069 | ret = pinctrl_dt_to_map(p, pctldev); |
57291ce2 SW |
1070 | if (ret < 0) { |
1071 | kfree(p); | |
1072 | return ERR_PTR(ret); | |
1073 | } | |
6e5e959d SW |
1074 | |
1075 | devname = dev_name(dev); | |
befe5bdf | 1076 | |
42fed7ba | 1077 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 1078 | /* Iterate over the pin control maps to locate the right ones */ |
06de5193 | 1079 | for_each_pin_map(maps_node, map) { |
7ecdb16f SW |
1080 | /* Map must be for this device */ |
1081 | if (strcmp(map->dev_name, devname)) | |
1082 | continue; | |
7f0ff06c NY |
1083 | /* |
1084 | * If pctldev is not null, we are claiming hog for it, | |
1085 | * that means, setting that is served by pctldev by itself. | |
1086 | * | |
1087 | * Thus we must skip map that is for this device but is served | |
1088 | * by other device. | |
1089 | */ | |
1090 | if (pctldev && | |
1091 | strcmp(dev_name(pctldev->dev), map->ctrl_dev_name)) | |
1092 | continue; | |
7ecdb16f | 1093 | |
99e4f675 | 1094 | ret = add_setting(p, pctldev, map); |
89216494 LW |
1095 | /* |
1096 | * At this point the adding of a setting may: | |
1097 | * | |
1098 | * - Defer, if the pinctrl device is not yet available | |
1099 | * - Fail, if the pinctrl device is not yet available, | |
1100 | * AND the setting is a hog. We cannot defer that, since | |
1101 | * the hog will kick in immediately after the device | |
1102 | * is registered. | |
1103 | * | |
1104 | * If the error returned was not -EPROBE_DEFER then we | |
1105 | * accumulate the errors to see if we end up with | |
1106 | * an -EPROBE_DEFER later, as that is the worst case. | |
1107 | */ | |
1108 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
1109 | pinctrl_free(p, false); |
1110 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 1111 | return ERR_PTR(ret); |
7ecdb16f | 1112 | } |
befe5bdf | 1113 | } |
42fed7ba PC |
1114 | mutex_unlock(&pinctrl_maps_mutex); |
1115 | ||
89216494 | 1116 | if (ret < 0) { |
3ec440e3 | 1117 | /* If some other error than deferral occurred, return here */ |
42fed7ba | 1118 | pinctrl_free(p, false); |
89216494 LW |
1119 | return ERR_PTR(ret); |
1120 | } | |
befe5bdf | 1121 | |
ab78029e LW |
1122 | kref_init(&p->users); |
1123 | ||
b0666ba4 | 1124 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 1125 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 1126 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 1127 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
1128 | |
1129 | return p; | |
6e5e959d | 1130 | } |
7ecdb16f | 1131 | |
42fed7ba PC |
1132 | /** |
1133 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
1134 | * @dev: the device to obtain the handle for | |
1135 | */ | |
1136 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
1137 | { |
1138 | struct pinctrl *p; | |
7ecdb16f | 1139 | |
6e5e959d SW |
1140 | if (WARN_ON(!dev)) |
1141 | return ERR_PTR(-EINVAL); | |
1142 | ||
ab78029e LW |
1143 | /* |
1144 | * See if somebody else (such as the device core) has already | |
1145 | * obtained a handle to the pinctrl for this device. In that case, | |
1146 | * return another pointer to it. | |
1147 | */ | |
6e5e959d | 1148 | p = find_pinctrl(dev); |
cea234e9 | 1149 | if (p) { |
ab78029e LW |
1150 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); |
1151 | kref_get(&p->users); | |
1152 | return p; | |
1153 | } | |
7ecdb16f | 1154 | |
99e4f675 | 1155 | return create_pinctrl(dev, NULL); |
befe5bdf LW |
1156 | } |
1157 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
1158 | ||
d3cee830 RG |
1159 | static void pinctrl_free_setting(bool disable_setting, |
1160 | struct pinctrl_setting *setting) | |
1161 | { | |
1162 | switch (setting->type) { | |
1163 | case PIN_MAP_TYPE_MUX_GROUP: | |
1164 | if (disable_setting) | |
1165 | pinmux_disable_setting(setting); | |
1166 | pinmux_free_setting(setting); | |
1167 | break; | |
1168 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1169 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1170 | pinconf_free_setting(setting); | |
1171 | break; | |
1172 | default: | |
1173 | break; | |
1174 | } | |
1175 | } | |
1176 | ||
42fed7ba | 1177 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 1178 | { |
6e5e959d SW |
1179 | struct pinctrl_state *state, *n1; |
1180 | struct pinctrl_setting *setting, *n2; | |
1181 | ||
42fed7ba | 1182 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
1183 | list_for_each_entry_safe(state, n1, &p->states, node) { |
1184 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 1185 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
1186 | list_del(&setting->node); |
1187 | kfree(setting); | |
1188 | } | |
1189 | list_del(&state->node); | |
1190 | kfree(state); | |
7ecdb16f | 1191 | } |
befe5bdf | 1192 | |
57291ce2 SW |
1193 | pinctrl_dt_free_maps(p); |
1194 | ||
6e5e959d SW |
1195 | if (inlist) |
1196 | list_del(&p->node); | |
befe5bdf | 1197 | kfree(p); |
42fed7ba | 1198 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 1199 | } |
befe5bdf LW |
1200 | |
1201 | /** | |
ab78029e LW |
1202 | * pinctrl_release() - release the pinctrl handle |
1203 | * @kref: the kref in the pinctrl being released | |
1204 | */ | |
2917e833 | 1205 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
1206 | { |
1207 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
1208 | ||
42fed7ba | 1209 | pinctrl_free(p, true); |
ab78029e LW |
1210 | } |
1211 | ||
1212 | /** | |
1213 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 1214 | * @p: the pinctrl handle to release |
befe5bdf | 1215 | */ |
57b676f9 SW |
1216 | void pinctrl_put(struct pinctrl *p) |
1217 | { | |
ab78029e | 1218 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
1219 | } |
1220 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
1221 | ||
42fed7ba PC |
1222 | /** |
1223 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
1224 | * @p: the pinctrl handle to retrieve the state from | |
1225 | * @name: the state name to retrieve | |
1226 | */ | |
1227 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
1228 | const char *name) | |
befe5bdf | 1229 | { |
6e5e959d | 1230 | struct pinctrl_state *state; |
befe5bdf | 1231 | |
6e5e959d | 1232 | state = find_state(p, name); |
5b3aa5f7 DA |
1233 | if (!state) { |
1234 | if (pinctrl_dummy_state) { | |
1235 | /* create dummy state */ | |
1236 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
1237 | name); | |
1238 | state = create_state(p, name); | |
d599bfb3 RG |
1239 | } else |
1240 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 1241 | } |
57b676f9 | 1242 | |
6e5e959d | 1243 | return state; |
befe5bdf | 1244 | } |
42fed7ba | 1245 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf | 1246 | |
036f394d BG |
1247 | static void pinctrl_link_add(struct pinctrl_dev *pctldev, |
1248 | struct device *consumer) | |
1249 | { | |
1250 | if (pctldev->desc->link_consumers) | |
1251 | device_link_add(consumer, pctldev->dev, | |
1252 | DL_FLAG_PM_RUNTIME | | |
1253 | DL_FLAG_AUTOREMOVE_CONSUMER); | |
1254 | } | |
1255 | ||
befe5bdf | 1256 | /** |
981ed1bf | 1257 | * pinctrl_commit_state() - select/activate/program a pinctrl state to HW |
42fed7ba PC |
1258 | * @p: the pinctrl handle for the device that requests configuration |
1259 | * @state: the state handle to select/activate/program | |
befe5bdf | 1260 | */ |
981ed1bf | 1261 | static int pinctrl_commit_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1262 | { |
6e5e959d | 1263 | struct pinctrl_setting *setting, *setting2; |
4198a9b5 | 1264 | struct pinctrl_state *old_state = READ_ONCE(p->state); |
6e5e959d | 1265 | int ret; |
7ecdb16f | 1266 | |
4198a9b5 | 1267 | if (old_state) { |
6e5e959d | 1268 | /* |
2243a87d FW |
1269 | * For each pinmux setting in the old state, forget SW's record |
1270 | * of mux owner for that pingroup. Any pingroups which are | |
1271 | * still owned by the new state will be re-acquired by the call | |
1272 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d | 1273 | */ |
4198a9b5 | 1274 | list_for_each_entry(setting, &old_state->settings, node) { |
1e2082b5 SW |
1275 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1276 | continue; | |
2243a87d | 1277 | pinmux_disable_setting(setting); |
6e5e959d SW |
1278 | } |
1279 | } | |
1280 | ||
3102a76c | 1281 | p->state = NULL; |
6e5e959d | 1282 | |
b991f8c3 | 1283 | /* Apply all the settings for the new state - pinmux first */ |
6e5e959d | 1284 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1285 | switch (setting->type) { |
1286 | case PIN_MAP_TYPE_MUX_GROUP: | |
1287 | ret = pinmux_enable_setting(setting); | |
1288 | break; | |
1289 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
b991f8c3 | 1290 | case PIN_MAP_TYPE_CONFIGS_GROUP: |
6a37d750 | 1291 | ret = 0; |
b991f8c3 MS |
1292 | break; |
1293 | default: | |
1294 | ret = -EINVAL; | |
1295 | break; | |
1296 | } | |
1297 | ||
1298 | if (ret < 0) | |
1299 | goto unapply_new_state; | |
1300 | ||
1301 | /* Do not link hogs (circular dependency) */ | |
1302 | if (p != setting->pctldev->p) | |
1303 | pinctrl_link_add(setting->pctldev, p->dev); | |
1304 | } | |
1305 | ||
1306 | /* Apply all the settings for the new state - pinconf after */ | |
1307 | list_for_each_entry(setting, &state->settings, node) { | |
1308 | switch (setting->type) { | |
1309 | case PIN_MAP_TYPE_MUX_GROUP: | |
6a37d750 | 1310 | ret = 0; |
b991f8c3 MS |
1311 | break; |
1312 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1e2082b5 SW |
1313 | case PIN_MAP_TYPE_CONFIGS_GROUP: |
1314 | ret = pinconf_apply_setting(setting); | |
1315 | break; | |
1316 | default: | |
1317 | ret = -EINVAL; | |
1318 | break; | |
1319 | } | |
3102a76c | 1320 | |
42fed7ba | 1321 | if (ret < 0) { |
3102a76c | 1322 | goto unapply_new_state; |
42fed7ba | 1323 | } |
036f394d | 1324 | |
b672a87a LW |
1325 | /* Do not link hogs (circular dependency) */ |
1326 | if (p != setting->pctldev->p) | |
1327 | pinctrl_link_add(setting->pctldev, p->dev); | |
befe5bdf | 1328 | } |
6e5e959d | 1329 | |
3102a76c RG |
1330 | p->state = state; |
1331 | ||
6e5e959d | 1332 | return 0; |
3102a76c RG |
1333 | |
1334 | unapply_new_state: | |
da58751c | 1335 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1336 | |
3102a76c RG |
1337 | list_for_each_entry(setting2, &state->settings, node) { |
1338 | if (&setting2->node == &setting->node) | |
1339 | break; | |
af606177 RG |
1340 | /* |
1341 | * All we can do here is pinmux_disable_setting. | |
1342 | * That means that some pins are muxed differently now | |
1343 | * than they were before applying the setting (We can't | |
1344 | * "unmux a pin"!), but it's not a big deal since the pins | |
1345 | * are free to be muxed by another apply_setting. | |
1346 | */ | |
1347 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1348 | pinmux_disable_setting(setting2); | |
3102a76c | 1349 | } |
8009d5ff | 1350 | |
385d9424 RG |
1351 | /* There's no infinite recursive loop here because p->state is NULL */ |
1352 | if (old_state) | |
42fed7ba | 1353 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1354 | |
1355 | return ret; | |
befe5bdf | 1356 | } |
981ed1bf FF |
1357 | |
1358 | /** | |
1359 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW | |
1360 | * @p: the pinctrl handle for the device that requests configuration | |
1361 | * @state: the state handle to select/activate/program | |
1362 | */ | |
1363 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) | |
1364 | { | |
1365 | if (p->state == state) | |
1366 | return 0; | |
1367 | ||
1368 | return pinctrl_commit_state(p, state); | |
1369 | } | |
6e5e959d | 1370 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1371 | |
6d4ca1fb SW |
1372 | static void devm_pinctrl_release(struct device *dev, void *res) |
1373 | { | |
1374 | pinctrl_put(*(struct pinctrl **)res); | |
1375 | } | |
1376 | ||
1377 | /** | |
9c340bbb | 1378 | * devm_pinctrl_get() - Resource managed pinctrl_get() |
6d4ca1fb SW |
1379 | * @dev: the device to obtain the handle for |
1380 | * | |
1381 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1382 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1383 | */ | |
1384 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1385 | { | |
1386 | struct pinctrl **ptr, *p; | |
1387 | ||
1388 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1389 | if (!ptr) | |
1390 | return ERR_PTR(-ENOMEM); | |
1391 | ||
1392 | p = pinctrl_get(dev); | |
1393 | if (!IS_ERR(p)) { | |
1394 | *ptr = p; | |
1395 | devres_add(dev, ptr); | |
1396 | } else { | |
1397 | devres_free(ptr); | |
1398 | } | |
1399 | ||
1400 | return p; | |
1401 | } | |
1402 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1403 | ||
1404 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1405 | { | |
1406 | struct pinctrl **p = res; | |
1407 | ||
1408 | return *p == data; | |
1409 | } | |
1410 | ||
1411 | /** | |
1412 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1413 | * @p: the pinctrl handle to release | |
1414 | * | |
1415 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1416 | * this function will not need to be called and the resource management | |
1417 | * code will ensure that the resource is freed. | |
1418 | */ | |
1419 | void devm_pinctrl_put(struct pinctrl *p) | |
1420 | { | |
a72149e8 | 1421 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1422 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1423 | } |
1424 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1425 | ||
c72bed23 HG |
1426 | /** |
1427 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1428 | * @maps: the pincontrol mappings table to register. Note the pinctrl-core | |
1429 | * keeps a reference to the passed in maps, so they should _not_ be | |
1430 | * marked with __initdata. | |
1431 | * @num_maps: the number of maps in the mapping table | |
1432 | */ | |
1433 | int pinctrl_register_mappings(const struct pinctrl_map *maps, | |
7cc4e6b0 | 1434 | unsigned int num_maps) |
befe5bdf | 1435 | { |
1e2082b5 | 1436 | int i, ret; |
b2b3e66e | 1437 | struct pinctrl_maps *maps_node; |
befe5bdf | 1438 | |
7e9236ff | 1439 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1440 | |
1441 | /* First sanity check the new mapping */ | |
1442 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1443 | if (!maps[i].dev_name) { |
1444 | pr_err("failed to register map %s (%d): no device given\n", | |
1445 | maps[i].name, i); | |
1446 | return -EINVAL; | |
1447 | } | |
1448 | ||
befe5bdf LW |
1449 | if (!maps[i].name) { |
1450 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1451 | i); |
befe5bdf LW |
1452 | return -EINVAL; |
1453 | } | |
1454 | ||
1e2082b5 SW |
1455 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1456 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1457 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1458 | maps[i].name, i); | |
1459 | return -EINVAL; | |
1460 | } | |
1461 | ||
1e2082b5 SW |
1462 | switch (maps[i].type) { |
1463 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1464 | break; | |
1465 | case PIN_MAP_TYPE_MUX_GROUP: | |
1466 | ret = pinmux_validate_map(&maps[i], i); | |
1467 | if (ret < 0) | |
fde04f41 | 1468 | return ret; |
1e2082b5 SW |
1469 | break; |
1470 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1471 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1472 | ret = pinconf_validate_map(&maps[i], i); | |
1473 | if (ret < 0) | |
fde04f41 | 1474 | return ret; |
1e2082b5 SW |
1475 | break; |
1476 | default: | |
1477 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1478 | maps[i].name, i); |
1681f5ae SW |
1479 | return -EINVAL; |
1480 | } | |
befe5bdf LW |
1481 | } |
1482 | ||
b2b3e66e | 1483 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
2104d12d | 1484 | if (!maps_node) |
b2b3e66e | 1485 | return -ENOMEM; |
befe5bdf | 1486 | |
c72bed23 | 1487 | maps_node->maps = maps; |
b2b3e66e | 1488 | maps_node->num_maps = num_maps; |
befe5bdf | 1489 | |
c5272a28 | 1490 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1491 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1492 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1493 | |
befe5bdf LW |
1494 | return 0; |
1495 | } | |
c72bed23 | 1496 | EXPORT_SYMBOL_GPL(pinctrl_register_mappings); |
befe5bdf | 1497 | |
57291ce2 | 1498 | /** |
c72bed23 | 1499 | * pinctrl_unregister_mappings() - unregister a set of pin controller mappings |
9c340bbb | 1500 | * @map: the pincontrol mappings table passed to pinctrl_register_mappings() |
c72bed23 | 1501 | * when registering the mappings. |
57291ce2 | 1502 | */ |
c72bed23 | 1503 | void pinctrl_unregister_mappings(const struct pinctrl_map *map) |
57291ce2 SW |
1504 | { |
1505 | struct pinctrl_maps *maps_node; | |
1506 | ||
42fed7ba | 1507 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1508 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1509 | if (maps_node->maps == map) { | |
1510 | list_del(&maps_node->node); | |
db6c2c69 | 1511 | kfree(maps_node); |
42fed7ba | 1512 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1513 | return; |
1514 | } | |
1515 | } | |
42fed7ba | 1516 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 | 1517 | } |
c72bed23 | 1518 | EXPORT_SYMBOL_GPL(pinctrl_unregister_mappings); |
57291ce2 | 1519 | |
840a47ba JD |
1520 | /** |
1521 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1522 | * @pctldev: pin controller device | |
1523 | */ | |
1524 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1525 | { | |
1526 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
981ed1bf | 1527 | return pinctrl_commit_state(pctldev->p, pctldev->hog_sleep); |
840a47ba JD |
1528 | return 0; |
1529 | } | |
1530 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1531 | ||
1532 | /** | |
1533 | * pinctrl_force_default() - turn a given controller device into default state | |
1534 | * @pctldev: pin controller device | |
1535 | */ | |
1536 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1537 | { | |
1538 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
981ed1bf | 1539 | return pinctrl_commit_state(pctldev->p, pctldev->hog_default); |
840a47ba JD |
1540 | return 0; |
1541 | } | |
1542 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1543 | ||
ef0eebc0 DA |
1544 | /** |
1545 | * pinctrl_init_done() - tell pinctrl probe is done | |
1546 | * | |
1547 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1548 | * driver selected some other state. | |
1549 | * | |
1550 | * @dev: device to that's done probing | |
1551 | */ | |
1552 | int pinctrl_init_done(struct device *dev) | |
1553 | { | |
1554 | struct dev_pin_info *pins = dev->pins; | |
1555 | int ret; | |
1556 | ||
1557 | if (!pins) | |
1558 | return 0; | |
1559 | ||
1560 | if (IS_ERR(pins->init_state)) | |
1561 | return 0; /* No such state */ | |
1562 | ||
1563 | if (pins->p->state != pins->init_state) | |
1564 | return 0; /* Not at init anyway */ | |
1565 | ||
1566 | if (IS_ERR(pins->default_state)) | |
1567 | return 0; /* No default state */ | |
1568 | ||
1569 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1570 | if (ret) | |
1571 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1572 | ||
1573 | return ret; | |
1574 | } | |
1575 | ||
55d54d1e UH |
1576 | static int pinctrl_select_bound_state(struct device *dev, |
1577 | struct pinctrl_state *state) | |
14005ee2 LW |
1578 | { |
1579 | struct dev_pin_info *pins = dev->pins; | |
1580 | int ret; | |
1581 | ||
f3333497 TL |
1582 | if (IS_ERR(state)) |
1583 | return 0; /* No such state */ | |
1584 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1585 | if (ret) |
f3333497 TL |
1586 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1587 | state->name); | |
14005ee2 LW |
1588 | return ret; |
1589 | } | |
f3333497 TL |
1590 | |
1591 | /** | |
55d54d1e | 1592 | * pinctrl_select_default_state() - select default pinctrl state |
f3333497 TL |
1593 | * @dev: device to select default state for |
1594 | */ | |
55d54d1e | 1595 | int pinctrl_select_default_state(struct device *dev) |
f3333497 TL |
1596 | { |
1597 | if (!dev->pins) | |
1598 | return 0; | |
1599 | ||
55d54d1e UH |
1600 | return pinctrl_select_bound_state(dev, dev->pins->default_state); |
1601 | } | |
1602 | EXPORT_SYMBOL_GPL(pinctrl_select_default_state); | |
1603 | ||
1604 | #ifdef CONFIG_PM | |
1605 | ||
1606 | /** | |
1607 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1608 | * @dev: device to select default state for | |
1609 | */ | |
1610 | int pinctrl_pm_select_default_state(struct device *dev) | |
1611 | { | |
1612 | return pinctrl_select_default_state(dev); | |
f3333497 | 1613 | } |
f472dead | 1614 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1615 | |
1616 | /** | |
1617 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1618 | * @dev: device to select sleep state for | |
1619 | */ | |
1620 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1621 | { | |
f3333497 | 1622 | if (!dev->pins) |
14005ee2 | 1623 | return 0; |
f3333497 | 1624 | |
55d54d1e | 1625 | return pinctrl_select_bound_state(dev, dev->pins->sleep_state); |
14005ee2 | 1626 | } |
f472dead | 1627 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1628 | |
1629 | /** | |
1630 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1631 | * @dev: device to select idle state for | |
1632 | */ | |
1633 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1634 | { | |
f3333497 | 1635 | if (!dev->pins) |
14005ee2 | 1636 | return 0; |
f3333497 | 1637 | |
55d54d1e | 1638 | return pinctrl_select_bound_state(dev, dev->pins->idle_state); |
14005ee2 | 1639 | } |
f472dead | 1640 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1641 | #endif |
1642 | ||
2744e8af LW |
1643 | #ifdef CONFIG_DEBUG_FS |
1644 | ||
1645 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1646 | { | |
1647 | struct pinctrl_dev *pctldev = s->private; | |
1648 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
7cc4e6b0 | 1649 | unsigned int i, pin; |
b507cb92 | 1650 | #ifdef CONFIG_GPIOLIB |
f6443e01 | 1651 | struct gpio_device *gdev = NULL; |
f1b206cf | 1652 | struct pinctrl_gpio_range *range; |
482715ff | 1653 | int gpio_num; |
b507cb92 | 1654 | #endif |
2744e8af LW |
1655 | |
1656 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1657 | |
42fed7ba | 1658 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1659 | |
706e8520 CP |
1660 | /* The pin number can be retrived from the pin controller descriptor */ |
1661 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1662 | struct pin_desc *desc; |
1663 | ||
706e8520 | 1664 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1665 | desc = pin_desc_get(pctldev, pin); |
1666 | /* Pin space may be sparse */ | |
cea234e9 | 1667 | if (!desc) |
2744e8af LW |
1668 | continue; |
1669 | ||
cf9d994d | 1670 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af | 1671 | |
f1b206cf | 1672 | #ifdef CONFIG_GPIOLIB |
482715ff | 1673 | gpio_num = -1; |
f1b206cf DF |
1674 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
1675 | if ((pin >= range->pin_base) && | |
1676 | (pin < (range->pin_base + range->npins))) { | |
1677 | gpio_num = range->base + (pin - range->pin_base); | |
1678 | break; | |
1679 | } | |
1680 | } | |
482715ff | 1681 | if (gpio_num >= 0) |
e3863fa1 LW |
1682 | /* |
1683 | * FIXME: gpio_num comes from the global GPIO numberspace. | |
1684 | * we need to get rid of the range->base eventually and | |
1685 | * get the descriptor directly from the gpio_chip. | |
1686 | */ | |
524fc108 BG |
1687 | gdev = gpiod_to_gpio_device(gpio_to_desc(gpio_num)); |
1688 | if (gdev) | |
1689 | seq_printf(s, "%u:%s ", | |
1690 | gpio_num - gpio_device_get_base(gdev), | |
1691 | gpio_device_get_label(gdev)); | |
f1b206cf DF |
1692 | else |
1693 | seq_puts(s, "0:? "); | |
1694 | #endif | |
1695 | ||
2744e8af LW |
1696 | /* Driver-specific info per pin */ |
1697 | if (ops->pin_dbg_show) | |
1698 | ops->pin_dbg_show(pctldev, s, pin); | |
1699 | ||
1700 | seq_puts(s, "\n"); | |
1701 | } | |
1702 | ||
42fed7ba | 1703 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1704 | |
2744e8af LW |
1705 | return 0; |
1706 | } | |
b5520891 | 1707 | DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); |
2744e8af LW |
1708 | |
1709 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1710 | { | |
1711 | struct pinctrl_dev *pctldev = s->private; | |
1712 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
7cc4e6b0 | 1713 | unsigned int ngroups, selector = 0; |
2744e8af | 1714 | |
42fed7ba PC |
1715 | mutex_lock(&pctldev->mutex); |
1716 | ||
d1e90e9e | 1717 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1718 | |
2744e8af | 1719 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1720 | while (selector < ngroups) { |
7cc4e6b0 AS |
1721 | const unsigned int *pins = NULL; |
1722 | unsigned int num_pins = 0; | |
2744e8af | 1723 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1724 | const char *pname; |
e5b3b2d9 | 1725 | int ret = 0; |
2744e8af LW |
1726 | int i; |
1727 | ||
e5b3b2d9 AT |
1728 | if (ops->get_group_pins) |
1729 | ret = ops->get_group_pins(pctldev, selector, | |
1730 | &pins, &num_pins); | |
2744e8af LW |
1731 | if (ret) |
1732 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1733 | gname); | |
1734 | else { | |
dcb5dbc3 DA |
1735 | seq_printf(s, "group: %s\n", gname); |
1736 | for (i = 0; i < num_pins; i++) { | |
1737 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1738 | if (WARN_ON(!pname)) { |
42fed7ba | 1739 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1740 | return -EINVAL; |
b4dd784b | 1741 | } |
dcb5dbc3 DA |
1742 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1743 | } | |
1744 | seq_puts(s, "\n"); | |
2744e8af LW |
1745 | } |
1746 | selector++; | |
1747 | } | |
1748 | ||
42fed7ba | 1749 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1750 | |
1751 | return 0; | |
1752 | } | |
b5520891 | 1753 | DEFINE_SHOW_ATTRIBUTE(pinctrl_groups); |
2744e8af LW |
1754 | |
1755 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1756 | { | |
1757 | struct pinctrl_dev *pctldev = s->private; | |
6cadafb3 | 1758 | struct pinctrl_gpio_range *range; |
2744e8af LW |
1759 | |
1760 | seq_puts(s, "GPIO ranges handled:\n"); | |
1761 | ||
42fed7ba | 1762 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1763 | |
2744e8af | 1764 | /* Loop over the ranges */ |
2744e8af | 1765 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1766 | if (range->pins) { |
1767 | int a; | |
1768 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1769 | range->id, range->name, | |
1770 | range->base, (range->base + range->npins - 1)); | |
1771 | for (a = 0; a < range->npins - 1; a++) | |
1772 | seq_printf(s, "%u, ", range->pins[a]); | |
1773 | seq_printf(s, "%u}\n", range->pins[a]); | |
1774 | } | |
1775 | else | |
1776 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1777 | range->id, range->name, | |
1778 | range->base, (range->base + range->npins - 1), | |
1779 | range->pin_base, | |
1780 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1781 | } |
57b676f9 | 1782 | |
42fed7ba | 1783 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1784 | |
1785 | return 0; | |
1786 | } | |
b5520891 | 1787 | DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges); |
2744e8af LW |
1788 | |
1789 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1790 | { | |
1791 | struct pinctrl_dev *pctldev; | |
1792 | ||
ae6b4d85 | 1793 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1794 | |
42fed7ba | 1795 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1796 | |
2744e8af LW |
1797 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1798 | seq_printf(s, "%s ", pctldev->desc->name); | |
1799 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1800 | seq_puts(s, "yes "); |
1801 | else | |
1802 | seq_puts(s, "no "); | |
1803 | if (pctldev->desc->confops) | |
2744e8af LW |
1804 | seq_puts(s, "yes"); |
1805 | else | |
1806 | seq_puts(s, "no"); | |
1807 | seq_puts(s, "\n"); | |
1808 | } | |
57b676f9 | 1809 | |
42fed7ba | 1810 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1811 | |
1812 | return 0; | |
1813 | } | |
b5520891 | 1814 | DEFINE_SHOW_ATTRIBUTE(pinctrl_devices); |
2744e8af | 1815 | |
1e2082b5 SW |
1816 | static inline const char *map_type(enum pinctrl_map_type type) |
1817 | { | |
1818 | static const char * const names[] = { | |
1819 | "INVALID", | |
1820 | "DUMMY_STATE", | |
1821 | "MUX_GROUP", | |
1822 | "CONFIGS_PIN", | |
1823 | "CONFIGS_GROUP", | |
1824 | }; | |
1825 | ||
1826 | if (type >= ARRAY_SIZE(names)) | |
1827 | return "UNKNOWN"; | |
1828 | ||
1829 | return names[type]; | |
1830 | } | |
1831 | ||
3eedb437 SW |
1832 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1833 | { | |
1834 | struct pinctrl_maps *maps_node; | |
3f713b7c | 1835 | const struct pinctrl_map *map; |
3eedb437 SW |
1836 | |
1837 | seq_puts(s, "Pinctrl maps:\n"); | |
1838 | ||
42fed7ba | 1839 | mutex_lock(&pinctrl_maps_mutex); |
06de5193 | 1840 | for_each_pin_map(maps_node, map) { |
1e2082b5 SW |
1841 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1842 | map->dev_name, map->name, map_type(map->type), | |
1843 | map->type); | |
1844 | ||
1845 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1846 | seq_printf(s, "controlling device %s\n", | |
1847 | map->ctrl_dev_name); | |
1848 | ||
1849 | switch (map->type) { | |
1850 | case PIN_MAP_TYPE_MUX_GROUP: | |
1851 | pinmux_show_map(s, map); | |
1852 | break; | |
1853 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1854 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1855 | pinconf_show_map(s, map); | |
1856 | break; | |
1857 | default: | |
1858 | break; | |
1859 | } | |
1860 | ||
390e1046 | 1861 | seq_putc(s, '\n'); |
3eedb437 | 1862 | } |
42fed7ba | 1863 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1864 | |
1865 | return 0; | |
1866 | } | |
b5520891 | 1867 | DEFINE_SHOW_ATTRIBUTE(pinctrl_maps); |
3eedb437 | 1868 | |
befe5bdf LW |
1869 | static int pinctrl_show(struct seq_file *s, void *what) |
1870 | { | |
1871 | struct pinctrl *p; | |
6e5e959d | 1872 | struct pinctrl_state *state; |
7ecdb16f | 1873 | struct pinctrl_setting *setting; |
befe5bdf LW |
1874 | |
1875 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1876 | |
42fed7ba | 1877 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1878 | |
befe5bdf | 1879 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1880 | seq_printf(s, "device: %s current state: %s\n", |
1881 | dev_name(p->dev), | |
1882 | p->state ? p->state->name : "none"); | |
1883 | ||
1884 | list_for_each_entry(state, &p->states, node) { | |
1885 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1886 | |
6e5e959d | 1887 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1888 | struct pinctrl_dev *pctldev = setting->pctldev; |
1889 | ||
1890 | seq_printf(s, " type: %s controller %s ", | |
1891 | map_type(setting->type), | |
1892 | pinctrl_dev_get_name(pctldev)); | |
1893 | ||
1894 | switch (setting->type) { | |
1895 | case PIN_MAP_TYPE_MUX_GROUP: | |
1896 | pinmux_show_setting(s, setting); | |
1897 | break; | |
1898 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1899 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1900 | pinconf_show_setting(s, setting); | |
1901 | break; | |
1902 | default: | |
1903 | break; | |
1904 | } | |
6e5e959d | 1905 | } |
befe5bdf | 1906 | } |
befe5bdf LW |
1907 | } |
1908 | ||
42fed7ba | 1909 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1910 | |
befe5bdf LW |
1911 | return 0; |
1912 | } | |
b5520891 | 1913 | DEFINE_SHOW_ATTRIBUTE(pinctrl); |
befe5bdf | 1914 | |
2744e8af LW |
1915 | static struct dentry *debugfs_root; |
1916 | ||
1917 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1918 | { | |
02157160 | 1919 | struct dentry *device_root; |
1781af56 JK |
1920 | const char *debugfs_name; |
1921 | ||
1922 | if (pctldev->desc->name && | |
1923 | strcmp(dev_name(pctldev->dev), pctldev->desc->name)) { | |
1924 | debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL, | |
1925 | "%s-%s", dev_name(pctldev->dev), | |
1926 | pctldev->desc->name); | |
1927 | if (!debugfs_name) { | |
1928 | pr_warn("failed to determine debugfs dir name for %s\n", | |
1929 | dev_name(pctldev->dev)); | |
1930 | return; | |
1931 | } | |
1932 | } else { | |
1933 | debugfs_name = dev_name(pctldev->dev); | |
1934 | } | |
2744e8af | 1935 | |
1781af56 | 1936 | device_root = debugfs_create_dir(debugfs_name, debugfs_root); |
02157160 TL |
1937 | pctldev->device_root = device_root; |
1938 | ||
2744e8af LW |
1939 | if (IS_ERR(device_root) || !device_root) { |
1940 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1941 | dev_name(pctldev->dev)); |
2744e8af LW |
1942 | return; |
1943 | } | |
47473813 | 1944 | debugfs_create_file("pins", 0444, |
b5520891 | 1945 | device_root, pctldev, &pinctrl_pins_fops); |
47473813 | 1946 | debugfs_create_file("pingroups", 0444, |
b5520891 | 1947 | device_root, pctldev, &pinctrl_groups_fops); |
47473813 | 1948 | debugfs_create_file("gpio-ranges", 0444, |
b5520891 | 1949 | device_root, pctldev, &pinctrl_gpioranges_fops); |
e7f2a444 FV |
1950 | if (pctldev->desc->pmxops) |
1951 | pinmux_init_device_debugfs(device_root, pctldev); | |
1952 | if (pctldev->desc->confops) | |
1953 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1954 | } |
1955 | ||
02157160 TL |
1956 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1957 | { | |
1958 | debugfs_remove_recursive(pctldev->device_root); | |
1959 | } | |
1960 | ||
2744e8af LW |
1961 | static void pinctrl_init_debugfs(void) |
1962 | { | |
1963 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1964 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1965 | pr_warn("failed to create debugfs directory\n"); | |
1966 | debugfs_root = NULL; | |
1967 | return; | |
1968 | } | |
1969 | ||
47473813 | 1970 | debugfs_create_file("pinctrl-devices", 0444, |
b5520891 | 1971 | debugfs_root, NULL, &pinctrl_devices_fops); |
47473813 | 1972 | debugfs_create_file("pinctrl-maps", 0444, |
b5520891 | 1973 | debugfs_root, NULL, &pinctrl_maps_fops); |
47473813 | 1974 | debugfs_create_file("pinctrl-handles", 0444, |
b5520891 | 1975 | debugfs_root, NULL, &pinctrl_fops); |
2744e8af LW |
1976 | } |
1977 | ||
1978 | #else /* CONFIG_DEBUG_FS */ | |
1979 | ||
1980 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1981 | { | |
1982 | } | |
1983 | ||
1984 | static void pinctrl_init_debugfs(void) | |
1985 | { | |
1986 | } | |
1987 | ||
02157160 TL |
1988 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1989 | { | |
1990 | } | |
1991 | ||
2744e8af LW |
1992 | #endif |
1993 | ||
d26bc49f SW |
1994 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1995 | { | |
1996 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1997 | ||
1998 | if (!ops || | |
d1e90e9e | 1999 | !ops->get_groups_count || |
e5b3b2d9 | 2000 | !ops->get_group_name) |
d26bc49f SW |
2001 | return -EINVAL; |
2002 | ||
2003 | return 0; | |
2004 | } | |
2005 | ||
99e4f675 | 2006 | /** |
950b0d91 | 2007 | * pinctrl_init_controller() - init a pin controller device |
2744e8af LW |
2008 | * @pctldesc: descriptor for this pin controller |
2009 | * @dev: parent device for this pin controller | |
2010 | * @driver_data: private pin controller data for this pin controller | |
2011 | */ | |
0ca4921f AS |
2012 | static struct pinctrl_dev * |
2013 | pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, | |
2014 | void *driver_data) | |
2744e8af | 2015 | { |
2744e8af LW |
2016 | struct pinctrl_dev *pctldev; |
2017 | int ret; | |
2018 | ||
da9aecb0 | 2019 | if (!pctldesc) |
323de9ef | 2020 | return ERR_PTR(-EINVAL); |
da9aecb0 | 2021 | if (!pctldesc->name) |
323de9ef | 2022 | return ERR_PTR(-EINVAL); |
2744e8af | 2023 | |
02f5b989 | 2024 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
2104d12d | 2025 | if (!pctldev) |
323de9ef | 2026 | return ERR_PTR(-ENOMEM); |
b9130b77 TL |
2027 | |
2028 | /* Initialize pin control device struct */ | |
2029 | pctldev->owner = pctldesc->owner; | |
2030 | pctldev->desc = pctldesc; | |
2031 | pctldev->driver_data = driver_data; | |
2032 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
c033a718 | 2033 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a | 2034 | INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL); |
a76edc89 TL |
2035 | #endif |
2036 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
2037 | INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL); | |
c033a718 | 2038 | #endif |
b9130b77 | 2039 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
46daed6e | 2040 | INIT_LIST_HEAD(&pctldev->node); |
b9130b77 | 2041 | pctldev->dev = dev; |
42fed7ba | 2042 | mutex_init(&pctldev->mutex); |
b9130b77 | 2043 | |
d26bc49f | 2044 | /* check core ops for sanity */ |
323de9ef MY |
2045 | ret = pinctrl_check_ops(pctldev); |
2046 | if (ret) { | |
ad6e1107 | 2047 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
2048 | goto out_err; |
2049 | } | |
2050 | ||
2744e8af LW |
2051 | /* If we're implementing pinmuxing, check the ops for sanity */ |
2052 | if (pctldesc->pmxops) { | |
323de9ef MY |
2053 | ret = pinmux_check_ops(pctldev); |
2054 | if (ret) | |
b9130b77 | 2055 | goto out_err; |
2744e8af LW |
2056 | } |
2057 | ||
ae6b4d85 LW |
2058 | /* If we're implementing pinconfig, check the ops for sanity */ |
2059 | if (pctldesc->confops) { | |
323de9ef MY |
2060 | ret = pinconf_check_ops(pctldev); |
2061 | if (ret) | |
b9130b77 | 2062 | goto out_err; |
ae6b4d85 LW |
2063 | } |
2064 | ||
2744e8af | 2065 | /* Register all the pins */ |
ad6e1107 | 2066 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
2067 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
2068 | if (ret) { | |
ad6e1107 | 2069 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
2070 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
2071 | pctldesc->npins); | |
51cd24ee | 2072 | goto out_err; |
2744e8af LW |
2073 | } |
2074 | ||
2744e8af LW |
2075 | return pctldev; |
2076 | ||
51cd24ee | 2077 | out_err: |
42fed7ba | 2078 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 2079 | kfree(pctldev); |
323de9ef | 2080 | return ERR_PTR(ret); |
2744e8af | 2081 | } |
950b0d91 | 2082 | |
61187142 | 2083 | static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) |
950b0d91 TL |
2084 | { |
2085 | pctldev->p = create_pinctrl(pctldev->dev, pctldev); | |
61187142 TL |
2086 | if (PTR_ERR(pctldev->p) == -ENODEV) { |
2087 | dev_dbg(pctldev->dev, "no hogs found\n"); | |
950b0d91 | 2088 | |
61187142 TL |
2089 | return 0; |
2090 | } | |
2091 | ||
2092 | if (IS_ERR(pctldev->p)) { | |
2093 | dev_err(pctldev->dev, "error claiming hogs: %li\n", | |
2094 | PTR_ERR(pctldev->p)); | |
2095 | ||
2096 | return PTR_ERR(pctldev->p); | |
2097 | } | |
2098 | ||
61187142 TL |
2099 | pctldev->hog_default = |
2100 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); | |
2101 | if (IS_ERR(pctldev->hog_default)) { | |
2102 | dev_dbg(pctldev->dev, | |
2103 | "failed to lookup the default state\n"); | |
2104 | } else { | |
2105 | if (pinctrl_select_state(pctldev->p, | |
2106 | pctldev->hog_default)) | |
2107 | dev_err(pctldev->dev, | |
2108 | "failed to select default state\n"); | |
2109 | } | |
2110 | ||
2111 | pctldev->hog_sleep = | |
2112 | pinctrl_lookup_state(pctldev->p, | |
2113 | PINCTRL_STATE_SLEEP); | |
2114 | if (IS_ERR(pctldev->hog_sleep)) | |
2115 | dev_dbg(pctldev->dev, | |
2116 | "failed to lookup the sleep state\n"); | |
2117 | ||
2118 | return 0; | |
2119 | } | |
2120 | ||
2121 | int pinctrl_enable(struct pinctrl_dev *pctldev) | |
2122 | { | |
2123 | int error; | |
2124 | ||
2125 | error = pinctrl_claim_hogs(pctldev); | |
2126 | if (error) { | |
5038a66d | 2127 | dev_err(pctldev->dev, "could not claim hogs: %i\n", error); |
61187142 | 2128 | return error; |
950b0d91 TL |
2129 | } |
2130 | ||
2131 | mutex_lock(&pinctrldev_list_mutex); | |
2132 | list_add_tail(&pctldev->node, &pinctrldev_list); | |
2133 | mutex_unlock(&pinctrldev_list_mutex); | |
2134 | ||
2135 | pinctrl_init_device_debugfs(pctldev); | |
2136 | ||
2137 | return 0; | |
2138 | } | |
61187142 | 2139 | EXPORT_SYMBOL_GPL(pinctrl_enable); |
950b0d91 TL |
2140 | |
2141 | /** | |
2142 | * pinctrl_register() - register a pin controller device | |
2143 | * @pctldesc: descriptor for this pin controller | |
2144 | * @dev: parent device for this pin controller | |
2145 | * @driver_data: private pin controller data for this pin controller | |
2146 | * | |
2147 | * Note that pinctrl_register() is known to have problems as the pin | |
2148 | * controller driver functions are called before the driver has a | |
2149 | * struct pinctrl_dev handle. To avoid issues later on, please use the | |
2150 | * new pinctrl_register_and_init() below instead. | |
2151 | */ | |
2152 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
2153 | struct device *dev, void *driver_data) | |
2154 | { | |
2155 | struct pinctrl_dev *pctldev; | |
2156 | int error; | |
2157 | ||
2158 | pctldev = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2159 | if (IS_ERR(pctldev)) | |
2160 | return pctldev; | |
2161 | ||
61187142 TL |
2162 | error = pinctrl_enable(pctldev); |
2163 | if (error) | |
950b0d91 | 2164 | return ERR_PTR(error); |
950b0d91 TL |
2165 | |
2166 | return pctldev; | |
950b0d91 | 2167 | } |
2744e8af LW |
2168 | EXPORT_SYMBOL_GPL(pinctrl_register); |
2169 | ||
61187142 TL |
2170 | /** |
2171 | * pinctrl_register_and_init() - register and init pin controller device | |
2172 | * @pctldesc: descriptor for this pin controller | |
2173 | * @dev: parent device for this pin controller | |
2174 | * @driver_data: private pin controller data for this pin controller | |
2175 | * @pctldev: pin controller device | |
2176 | * | |
2177 | * Note that pinctrl_enable() still needs to be manually called after | |
2178 | * this once the driver is ready. | |
2179 | */ | |
950b0d91 TL |
2180 | int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, |
2181 | struct device *dev, void *driver_data, | |
2182 | struct pinctrl_dev **pctldev) | |
2183 | { | |
2184 | struct pinctrl_dev *p; | |
950b0d91 TL |
2185 | |
2186 | p = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2187 | if (IS_ERR(p)) | |
2188 | return PTR_ERR(p); | |
2189 | ||
2190 | /* | |
2191 | * We have pinctrl_start() call functions in the pin controller | |
2192 | * driver with create_pinctrl() for at least dt_node_to_map(). So | |
2193 | * let's make sure pctldev is properly initialized for the | |
2194 | * pin controller driver before we do anything. | |
2195 | */ | |
2196 | *pctldev = p; | |
2197 | ||
950b0d91 TL |
2198 | return 0; |
2199 | } | |
2200 | EXPORT_SYMBOL_GPL(pinctrl_register_and_init); | |
2201 | ||
2744e8af LW |
2202 | /** |
2203 | * pinctrl_unregister() - unregister pinmux | |
2204 | * @pctldev: pin controller to unregister | |
2205 | * | |
2206 | * Called by pinmux drivers to unregister a pinmux. | |
2207 | */ | |
2208 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
2209 | { | |
5d589b09 | 2210 | struct pinctrl_gpio_range *range, *n; |
3429fb3c | 2211 | |
cea234e9 | 2212 | if (!pctldev) |
2744e8af LW |
2213 | return; |
2214 | ||
42fed7ba | 2215 | mutex_lock(&pctldev->mutex); |
42fed7ba | 2216 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 2217 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 2218 | |
3429fb3c | 2219 | if (!IS_ERR_OR_NULL(pctldev->p)) |
42fed7ba | 2220 | pinctrl_put(pctldev->p); |
57b676f9 | 2221 | |
db93facf JL |
2222 | mutex_lock(&pinctrldev_list_mutex); |
2223 | mutex_lock(&pctldev->mutex); | |
2744e8af | 2224 | /* TODO: check that no pinmuxes are still active? */ |
46daed6e | 2225 | list_del(&pctldev->node); |
a76edc89 | 2226 | pinmux_generic_free_functions(pctldev); |
c7059c5a | 2227 | pinctrl_generic_free_groups(pctldev); |
2744e8af LW |
2228 | /* Destroy descriptor tree */ |
2229 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
2230 | pctldev->desc->npins); | |
5d589b09 DA |
2231 | /* remove gpio ranges map */ |
2232 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
2233 | list_del(&range->node); | |
2234 | ||
42fed7ba PC |
2235 | mutex_unlock(&pctldev->mutex); |
2236 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 2237 | kfree(pctldev); |
42fed7ba | 2238 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
2239 | } |
2240 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
2241 | ||
80e0f8d9 LD |
2242 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
2243 | { | |
2244 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
2245 | ||
2246 | pinctrl_unregister(pctldev); | |
2247 | } | |
2248 | ||
2249 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
2250 | { | |
2251 | struct pctldev **r = res; | |
2252 | ||
3024f920 | 2253 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
2254 | return 0; |
2255 | ||
2256 | return *r == data; | |
2257 | } | |
2258 | ||
2259 | /** | |
2260 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
2261 | * @dev: parent device for this pin controller | |
2262 | * @pctldesc: descriptor for this pin controller | |
2263 | * @driver_data: private pin controller data for this pin controller | |
2264 | * | |
2265 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2266 | * it returns valid pinctrl handle. | |
2267 | * | |
2268 | * The pinctrl device will be automatically released when the device is unbound. | |
2269 | */ | |
2270 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
2271 | struct pinctrl_desc *pctldesc, | |
2272 | void *driver_data) | |
2273 | { | |
2274 | struct pinctrl_dev **ptr, *pctldev; | |
2275 | ||
2276 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2277 | if (!ptr) | |
2278 | return ERR_PTR(-ENOMEM); | |
2279 | ||
2280 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
2281 | if (IS_ERR(pctldev)) { | |
2282 | devres_free(ptr); | |
2283 | return pctldev; | |
2284 | } | |
2285 | ||
2286 | *ptr = pctldev; | |
2287 | devres_add(dev, ptr); | |
2288 | ||
2289 | return pctldev; | |
2290 | } | |
2291 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
2292 | ||
950b0d91 TL |
2293 | /** |
2294 | * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init | |
2295 | * @dev: parent device for this pin controller | |
2296 | * @pctldesc: descriptor for this pin controller | |
2297 | * @driver_data: private pin controller data for this pin controller | |
9c340bbb | 2298 | * @pctldev: pin controller device |
950b0d91 | 2299 | * |
9c340bbb | 2300 | * Returns zero on success or an error number on failure. |
950b0d91 TL |
2301 | * |
2302 | * The pinctrl device will be automatically released when the device is unbound. | |
2303 | */ | |
2304 | int devm_pinctrl_register_and_init(struct device *dev, | |
2305 | struct pinctrl_desc *pctldesc, | |
2306 | void *driver_data, | |
2307 | struct pinctrl_dev **pctldev) | |
2308 | { | |
2309 | struct pinctrl_dev **ptr; | |
2310 | int error; | |
2311 | ||
2312 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2313 | if (!ptr) | |
2314 | return -ENOMEM; | |
2315 | ||
2316 | error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev); | |
2317 | if (error) { | |
2318 | devres_free(ptr); | |
2319 | return error; | |
2320 | } | |
2321 | ||
2322 | *ptr = *pctldev; | |
2323 | devres_add(dev, ptr); | |
2324 | ||
2325 | return 0; | |
2326 | } | |
2327 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init); | |
2328 | ||
80e0f8d9 LD |
2329 | /** |
2330 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
129803e6 | 2331 | * @dev: device for which resource was allocated |
80e0f8d9 LD |
2332 | * @pctldev: the pinctrl device to unregister. |
2333 | */ | |
2334 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
2335 | { | |
2336 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
2337 | devm_pinctrl_dev_match, pctldev)); | |
2338 | } | |
2339 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
2340 | ||
2744e8af LW |
2341 | static int __init pinctrl_init(void) |
2342 | { | |
2343 | pr_info("initialized pinctrl subsystem\n"); | |
2344 | pinctrl_init_debugfs(); | |
2345 | return 0; | |
2346 | } | |
2347 | ||
2348 | /* init early since many drivers really need to initialized pinmux early */ | |
2349 | core_initcall(pinctrl_init); |