Merge tag 'x86-asm-2024-03-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
[linux-2.6-block.git] / drivers / pinctrl / core.c
CommitLineData
af873fce 1// SPDX-License-Identifier: GPL-2.0-only
2744e8af
LW
2/*
3 * Core driver for the pin control subsystem
4 *
befe5bdf 5 * Copyright (C) 2011-2012 ST-Ericsson SA
2744e8af
LW
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
8 *
9 * Author: Linus Walleij <linus.walleij@linaro.org>
10 *
b2b3e66e 11 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
2744e8af
LW
12 */
13#define pr_fmt(fmt) "pinctrl core: " fmt
14
82cc14c9 15#include <linux/array_size.h>
524fc108 16#include <linux/cleanup.h>
e5530adc 17#include <linux/debugfs.h>
2744e8af 18#include <linux/device.h>
2744e8af 19#include <linux/err.h>
e5530adc
AS
20#include <linux/export.h>
21#include <linux/init.h>
e5530adc 22#include <linux/kref.h>
2744e8af 23#include <linux/list.h>
2744e8af 24#include <linux/seq_file.h>
e5530adc
AS
25#include <linux/slab.h>
26
5f0dedcc 27#include <linux/gpio.h>
ec963d04
BG
28#include <linux/gpio/driver.h>
29
6d4ca1fb 30#include <linux/pinctrl/consumer.h>
e5530adc 31#include <linux/pinctrl/devinfo.h>
2744e8af 32#include <linux/pinctrl/machine.h>
e5530adc 33#include <linux/pinctrl/pinctrl.h>
2afe8229 34
2744e8af 35#include "core.h"
57291ce2 36#include "devicetree.h"
ae6b4d85 37#include "pinconf.h"
e5530adc 38#include "pinmux.h"
b2b3e66e 39
5b3aa5f7
DA
40static bool pinctrl_dummy_state;
41
42fed7ba 42/* Mutex taken to protect pinctrl_list */
843aec96 43static DEFINE_MUTEX(pinctrl_list_mutex);
42fed7ba
PC
44
45/* Mutex taken to protect pinctrl_maps */
46DEFINE_MUTEX(pinctrl_maps_mutex);
47
48/* Mutex taken to protect pinctrldev_list */
843aec96 49static DEFINE_MUTEX(pinctrldev_list_mutex);
57b676f9
SW
50
51/* Global list of pin control devices (struct pinctrl_dev) */
42fed7ba 52static LIST_HEAD(pinctrldev_list);
2744e8af 53
57b676f9 54/* List of pin controller handles (struct pinctrl) */
befe5bdf
LW
55static LIST_HEAD(pinctrl_list);
56
57b676f9 57/* List of pinctrl maps (struct pinctrl_maps) */
6f9e41f4 58LIST_HEAD(pinctrl_maps);
b2b3e66e 59
befe5bdf 60
5b3aa5f7
DA
61/**
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
63 *
64 * Usually this function is called by platforms without pinctrl driver support
65 * but run with some shared drivers using pinctrl APIs.
66 * After calling this function, the pinctrl core will return successfully
67 * with creating a dummy state for the driver to keep going smoothly.
68 */
69void pinctrl_provide_dummies(void)
70{
71 pinctrl_dummy_state = true;
72}
73
2744e8af
LW
74const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
75{
76 /* We're not allowed to register devices without name */
77 return pctldev->desc->name;
78}
79EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
80
d6e99abb
HZ
81const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev)
82{
83 return dev_name(pctldev->dev);
84}
85EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname);
86
2744e8af
LW
87void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
88{
89 return pctldev->driver_data;
90}
91EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
92
93/**
9dfac4fd
LW
94 * get_pinctrl_dev_from_devname() - look up pin controller device
95 * @devname: the name of a device instance, as returned by dev_name()
2744e8af
LW
96 *
97 * Looks up a pin control device matching a certain device name or pure device
98 * pointer, the pure device pointer will take precedence.
99 */
9dfac4fd 100struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
2744e8af 101{
6cadafb3 102 struct pinctrl_dev *pctldev;
2744e8af 103
9dfac4fd
LW
104 if (!devname)
105 return NULL;
106
44d5f7bb
LW
107 mutex_lock(&pinctrldev_list_mutex);
108
2744e8af 109 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 110 if (!strcmp(dev_name(pctldev->dev), devname)) {
2744e8af 111 /* Matched on device name */
44d5f7bb
LW
112 mutex_unlock(&pinctrldev_list_mutex);
113 return pctldev;
2744e8af
LW
114 }
115 }
2744e8af 116
44d5f7bb
LW
117 mutex_unlock(&pinctrldev_list_mutex);
118
119 return NULL;
2744e8af
LW
120}
121
42fed7ba
PC
122struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np)
123{
124 struct pinctrl_dev *pctldev;
125
126 mutex_lock(&pinctrldev_list_mutex);
127
128 list_for_each_entry(pctldev, &pinctrldev_list, node)
03da7f98 129 if (device_match_of_node(pctldev->dev, np)) {
42fed7ba
PC
130 mutex_unlock(&pinctrldev_list_mutex);
131 return pctldev;
132 }
133
d463f82d 134 mutex_unlock(&pinctrldev_list_mutex);
42fed7ba
PC
135
136 return NULL;
137}
138
ae6b4d85
LW
139/**
140 * pin_get_from_name() - look up a pin number from a name
141 * @pctldev: the pin control device to lookup the pin on
142 * @name: the name of the pin to look up
143 */
144int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
145{
7cc4e6b0 146 unsigned int i, pin;
ae6b4d85 147
706e8520
CP
148 /* The pin number can be retrived from the pin controller descriptor */
149 for (i = 0; i < pctldev->desc->npins; i++) {
ae6b4d85
LW
150 struct pin_desc *desc;
151
706e8520 152 pin = pctldev->desc->pins[i].number;
ae6b4d85
LW
153 desc = pin_desc_get(pctldev, pin);
154 /* Pin space may be sparse */
6c325f87 155 if (desc && !strcmp(name, desc->name))
ae6b4d85
LW
156 return pin;
157 }
158
159 return -EINVAL;
160}
161
dcb5dbc3 162/**
11f054c1 163 * pin_get_name() - look up a pin name from a pin id
dcb5dbc3 164 * @pctldev: the pin control device to lookup the pin on
9c340bbb 165 * @pin: pin number/id to look up
dcb5dbc3 166 */
7cc4e6b0 167const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned int pin)
dcb5dbc3
DA
168{
169 const struct pin_desc *desc;
170
171 desc = pin_desc_get(pctldev, pin);
cea234e9 172 if (!desc) {
dcb5dbc3
DA
173 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
174 pin);
175 return NULL;
176 }
177
178 return desc->name;
179}
b88d1451 180EXPORT_SYMBOL_GPL(pin_get_name);
dcb5dbc3 181
2744e8af
LW
182/* Deletes a range of pin descriptors */
183static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
184 const struct pinctrl_pin_desc *pins,
7cc4e6b0 185 unsigned int num_pins)
2744e8af
LW
186{
187 int i;
188
2744e8af
LW
189 for (i = 0; i < num_pins; i++) {
190 struct pin_desc *pindesc;
191
192 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
193 pins[i].number);
cea234e9 194 if (pindesc) {
2744e8af
LW
195 radix_tree_delete(&pctldev->pin_desc_tree,
196 pins[i].number);
ca53c5f1
LW
197 if (pindesc->dynamic_name)
198 kfree(pindesc->name);
2744e8af
LW
199 }
200 kfree(pindesc);
201 }
2744e8af
LW
202}
203
204static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
cd8f61f1 205 const struct pinctrl_pin_desc *pin)
2744e8af
LW
206{
207 struct pin_desc *pindesc;
ecfe9a01 208 int error;
2744e8af 209
cd8f61f1 210 pindesc = pin_desc_get(pctldev, pin->number);
cea234e9 211 if (pindesc) {
cd8f61f1
MY
212 dev_err(pctldev->dev, "pin %d already registered\n",
213 pin->number);
2744e8af
LW
214 return -EINVAL;
215 }
216
217 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
2104d12d 218 if (!pindesc)
2744e8af 219 return -ENOMEM;
ae6b4d85 220
2744e8af
LW
221 /* Set owner */
222 pindesc->pctldev = pctldev;
223
9af1e44f 224 /* Copy basic pin info */
cd8f61f1
MY
225 if (pin->name) {
226 pindesc->name = pin->name;
ca53c5f1 227 } else {
cd8f61f1 228 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number);
cea234e9 229 if (!pindesc->name) {
ecfe9a01
SS
230 error = -ENOMEM;
231 goto failed;
eb26cc9c 232 }
ca53c5f1
LW
233 pindesc->dynamic_name = true;
234 }
2744e8af 235
cd8f61f1
MY
236 pindesc->drv_data = pin->drv_data;
237
ecfe9a01
SS
238 error = radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc);
239 if (error)
240 goto failed;
241
2744e8af 242 pr_debug("registered pin %d (%s) on %s\n",
cd8f61f1 243 pin->number, pindesc->name, pctldev->desc->name);
2744e8af 244 return 0;
ecfe9a01
SS
245
246failed:
247 kfree(pindesc);
248 return error;
2744e8af
LW
249}
250
251static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
3f713b7c 252 const struct pinctrl_pin_desc *pins,
7cc4e6b0 253 unsigned int num_descs)
2744e8af 254{
7cc4e6b0 255 unsigned int i;
2744e8af
LW
256 int ret = 0;
257
258 for (i = 0; i < num_descs; i++) {
cd8f61f1 259 ret = pinctrl_register_one_pin(pctldev, &pins[i]);
2744e8af
LW
260 if (ret)
261 return ret;
262 }
263
264 return 0;
265}
266
c8587eee
CR
267/**
268 * gpio_to_pin() - GPIO range GPIO number to pin number translation
269 * @range: GPIO range used for the translation
31d4e8d1
BG
270 * @gc: GPIO chip structure from the GPIO subsystem
271 * @offset: hardware offset of the GPIO relative to the controller
c8587eee
CR
272 *
273 * Finds the pin number for a given GPIO using the specified GPIO range
274 * as a base for translation. The distinction between linear GPIO ranges
275 * and pin list based GPIO ranges is managed correctly by this function.
276 *
277 * This function assumes the gpio is part of the specified GPIO range, use
278 * only after making sure this is the case (e.g. by calling it on the
279 * result of successful pinctrl_get_device_gpio_range calls)!
280 */
281static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
31d4e8d1 282 struct gpio_chip *gc, unsigned int offset)
c8587eee 283{
31d4e8d1 284 unsigned int pin = gc->base + offset - range->base;
c8587eee 285 if (range->pins)
31d4e8d1 286 return range->pins[pin];
c8587eee 287 else
31d4e8d1 288 return range->pin_base + pin;
c8587eee
CR
289}
290
2744e8af
LW
291/**
292 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
293 * @pctldev: pin controller device to check
58e772f4
BG
294 * @gc: GPIO chip structure from the GPIO subsystem
295 * @offset: hardware offset of the GPIO relative to the controller
2744e8af
LW
296 *
297 * Tries to match a GPIO pin number to the ranges handled by a certain pin
298 * controller, return the range or NULL
299 */
300static struct pinctrl_gpio_range *
58e772f4
BG
301pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, struct gpio_chip *gc,
302 unsigned int offset)
2744e8af 303{
6cadafb3 304 struct pinctrl_gpio_range *range;
2744e8af 305
42fed7ba 306 mutex_lock(&pctldev->mutex);
2744e8af 307 /* Loop over the ranges */
2744e8af
LW
308 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
309 /* Check if we're in the valid range */
58e772f4
BG
310 if ((gc->base + offset) >= range->base &&
311 (gc->base + offset) < range->base + range->npins) {
42fed7ba 312 mutex_unlock(&pctldev->mutex);
2744e8af
LW
313 return range;
314 }
315 }
42fed7ba 316 mutex_unlock(&pctldev->mutex);
2744e8af
LW
317 return NULL;
318}
319
51e13c24
HZ
320/**
321 * pinctrl_ready_for_gpio_range() - check if other GPIO pins of
322 * the same GPIO chip are in range
6042aaef
BG
323 * @gc: GPIO chip structure from the GPIO subsystem
324 * @offset: hardware offset of the GPIO relative to the controller
51e13c24
HZ
325 *
326 * This function is complement of pinctrl_match_gpio_range(). If the return
327 * value of pinctrl_match_gpio_range() is NULL, this function could be used
328 * to check whether pinctrl device is ready or not. Maybe some GPIO pins
329 * of the same GPIO chip don't have back-end pinctrl interface.
330 * If the return value is true, it means that pinctrl device is ready & the
331 * certain GPIO pin doesn't have back-end pinctrl device. If the return value
332 * is false, it means that pinctrl device may not be ready.
333 */
2afe8229 334#ifdef CONFIG_GPIOLIB
6042aaef
BG
335static bool pinctrl_ready_for_gpio_range(struct gpio_chip *gc,
336 unsigned int offset)
51e13c24
HZ
337{
338 struct pinctrl_dev *pctldev;
339 struct pinctrl_gpio_range *range = NULL;
942cde72 340
44d5f7bb
LW
341 mutex_lock(&pinctrldev_list_mutex);
342
51e13c24
HZ
343 /* Loop over the pin controllers */
344 list_for_each_entry(pctldev, &pinctrldev_list, node) {
345 /* Loop over the ranges */
5ffbe2e6 346 mutex_lock(&pctldev->mutex);
51e13c24
HZ
347 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
348 /* Check if any gpio range overlapped with gpio chip */
6042aaef
BG
349 if (range->base + range->npins - 1 < gc->base ||
350 range->base > gc->base + gc->ngpio - 1)
51e13c24 351 continue;
5ffbe2e6 352 mutex_unlock(&pctldev->mutex);
44d5f7bb 353 mutex_unlock(&pinctrldev_list_mutex);
51e13c24
HZ
354 return true;
355 }
5ffbe2e6 356 mutex_unlock(&pctldev->mutex);
51e13c24 357 }
44d5f7bb
LW
358
359 mutex_unlock(&pinctrldev_list_mutex);
360
51e13c24
HZ
361 return false;
362}
2afe8229 363#else
6042aaef
BG
364static inline bool
365pinctrl_ready_for_gpio_range(struct gpio_chip *gc, unsigned int offset)
366{
367 return true;
368}
2afe8229 369#endif
51e13c24 370
2744e8af
LW
371/**
372 * pinctrl_get_device_gpio_range() - find device for GPIO range
82059c3d
BG
373 * @gc: GPIO chip structure from the GPIO subsystem
374 * @offset: hardware offset of the GPIO relative to the controller
2744e8af
LW
375 * @outdev: the pin control device if found
376 * @outrange: the GPIO range if found
377 *
378 * Find the pin controller handling a certain GPIO pin from the pinspace of
379 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
380 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
381 * may still have not been registered.
2744e8af 382 */
82059c3d
BG
383static int pinctrl_get_device_gpio_range(struct gpio_chip *gc,
384 unsigned int offset,
4ecce45d
SW
385 struct pinctrl_dev **outdev,
386 struct pinctrl_gpio_range **outrange)
2744e8af 387{
6cadafb3 388 struct pinctrl_dev *pctldev;
2744e8af 389
f0059021
AL
390 mutex_lock(&pinctrldev_list_mutex);
391
2744e8af 392 /* Loop over the pin controllers */
2744e8af
LW
393 list_for_each_entry(pctldev, &pinctrldev_list, node) {
394 struct pinctrl_gpio_range *range;
395
58e772f4 396 range = pinctrl_match_gpio_range(pctldev, gc, offset);
cea234e9 397 if (range) {
2744e8af
LW
398 *outdev = pctldev;
399 *outrange = range;
f0059021 400 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
401 return 0;
402 }
403 }
2744e8af 404
f0059021
AL
405 mutex_unlock(&pinctrldev_list_mutex);
406
4650b7cb 407 return -EPROBE_DEFER;
2744e8af
LW
408}
409
410/**
411 * pinctrl_add_gpio_range() - register a GPIO range for a controller
412 * @pctldev: pin controller device to add the range to
413 * @range: the GPIO range to add
414 *
415 * This adds a range of GPIOs to be handled by a certain pin controller. Call
416 * this to register handled ranges after registering your pin controller.
417 */
418void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
419 struct pinctrl_gpio_range *range)
420{
42fed7ba 421 mutex_lock(&pctldev->mutex);
8b9c139f 422 list_add_tail(&range->node, &pctldev->gpio_ranges);
42fed7ba 423 mutex_unlock(&pctldev->mutex);
2744e8af 424}
4ecce45d 425EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 426
3e5e00b6
DA
427void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
428 struct pinctrl_gpio_range *ranges,
7cc4e6b0 429 unsigned int nranges)
3e5e00b6
DA
430{
431 int i;
432
433 for (i = 0; i < nranges; i++)
434 pinctrl_add_gpio_range(pctldev, &ranges[i]);
435}
436EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
437
192c369c 438struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
f23f1516
SH
439 struct pinctrl_gpio_range *range)
440{
42fed7ba
PC
441 struct pinctrl_dev *pctldev;
442
42fed7ba 443 pctldev = get_pinctrl_dev_from_devname(devname);
f23f1516 444
dfa97515
LW
445 /*
446 * If we can't find this device, let's assume that is because
447 * it has not probed yet, so the driver trying to register this
448 * range need to defer probing.
449 */
10f94f9c 450 if (!pctldev)
dfa97515 451 return ERR_PTR(-EPROBE_DEFER);
10f94f9c 452
f23f1516 453 pinctrl_add_gpio_range(pctldev, range);
42fed7ba 454
f23f1516
SH
455 return pctldev;
456}
192c369c 457EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range);
f23f1516 458
586a87e6 459int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group,
7cc4e6b0 460 const unsigned int **pins, unsigned int *num_pins)
586a87e6
CR
461{
462 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
463 int gs;
464
e5b3b2d9
AT
465 if (!pctlops->get_group_pins)
466 return -EINVAL;
467
586a87e6
CR
468 gs = pinctrl_get_group_selector(pctldev, pin_group);
469 if (gs < 0)
470 return gs;
471
472 return pctlops->get_group_pins(pctldev, gs, pins, num_pins);
473}
474EXPORT_SYMBOL_GPL(pinctrl_get_group_pins);
475
9afbefb2 476struct pinctrl_gpio_range *
b18537cd
JE
477pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
478 unsigned int pin)
9afbefb2 479{
c8f50e86 480 struct pinctrl_gpio_range *range;
9afbefb2
LW
481
482 /* Loop over the ranges */
483 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
484 /* Check if we're in the valid range */
c8587eee
CR
485 if (range->pins) {
486 int a;
487 for (a = 0; a < range->npins; a++) {
488 if (range->pins[a] == pin)
b18537cd 489 return range;
c8587eee
CR
490 }
491 } else if (pin >= range->pin_base &&
c8f50e86 492 pin < range->pin_base + range->npins)
b18537cd 493 return range;
9afbefb2 494 }
b18537cd
JE
495
496 return NULL;
497}
498EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock);
499
500/**
501 * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin
502 * @pctldev: the pin controller device to look in
503 * @pin: a controller-local number to find the range for
504 */
505struct pinctrl_gpio_range *
506pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
507 unsigned int pin)
508{
509 struct pinctrl_gpio_range *range;
510
511 mutex_lock(&pctldev->mutex);
512 range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
42fed7ba 513 mutex_unlock(&pctldev->mutex);
b18537cd 514
c8f50e86 515 return range;
9afbefb2
LW
516}
517EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin);
518
7e10ee68 519/**
50842cbd 520 * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller
7e10ee68
VK
521 * @pctldev: pin controller device to remove the range from
522 * @range: the GPIO range to remove
523 */
524void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
525 struct pinctrl_gpio_range *range)
526{
42fed7ba 527 mutex_lock(&pctldev->mutex);
7e10ee68 528 list_del(&range->node);
42fed7ba 529 mutex_unlock(&pctldev->mutex);
7e10ee68
VK
530}
531EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
532
c033a718 533#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
c7059c5a
TL
534
535/**
536 * pinctrl_generic_get_group_count() - returns the number of pin groups
537 * @pctldev: pin controller device
538 */
539int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev)
540{
541 return pctldev->num_groups;
542}
543EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count);
544
545/**
546 * pinctrl_generic_get_group_name() - returns the name of a pin group
547 * @pctldev: pin controller device
548 * @selector: group number
549 */
550const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev,
551 unsigned int selector)
552{
553 struct group_desc *group;
554
555 group = radix_tree_lookup(&pctldev->pin_group_tree,
556 selector);
557 if (!group)
558 return NULL;
559
85174ad7 560 return group->grp.name;
c7059c5a
TL
561}
562EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name);
563
564/**
565 * pinctrl_generic_get_group_pins() - gets the pin group pins
566 * @pctldev: pin controller device
567 * @selector: group number
568 * @pins: pins in the group
569 * @num_pins: number of pins in the group
570 */
571int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev,
572 unsigned int selector,
573 const unsigned int **pins,
574 unsigned int *num_pins)
575{
576 struct group_desc *group;
577
578 group = radix_tree_lookup(&pctldev->pin_group_tree,
579 selector);
580 if (!group) {
581 dev_err(pctldev->dev, "%s could not find pingroup%i\n",
582 __func__, selector);
583 return -EINVAL;
584 }
585
85174ad7
AS
586 *pins = group->grp.pins;
587 *num_pins = group->grp.npins;
c7059c5a
TL
588
589 return 0;
590}
591EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins);
592
593/**
594 * pinctrl_generic_get_group() - returns a pin group based on the number
595 * @pctldev: pin controller device
9c340bbb 596 * @selector: group number
c7059c5a
TL
597 */
598struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
599 unsigned int selector)
600{
601 struct group_desc *group;
602
603 group = radix_tree_lookup(&pctldev->pin_group_tree,
604 selector);
605 if (!group)
606 return NULL;
607
608 return group;
609}
610EXPORT_SYMBOL_GPL(pinctrl_generic_get_group);
611
a203728a
TL
612static int pinctrl_generic_group_name_to_selector(struct pinctrl_dev *pctldev,
613 const char *function)
614{
615 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
616 int ngroups = ops->get_groups_count(pctldev);
617 int selector = 0;
618
619 /* See if this pctldev has this group */
620 while (selector < ngroups) {
621 const char *gname = ops->get_group_name(pctldev, selector);
622
54a58185 623 if (gname && !strcmp(function, gname))
a203728a
TL
624 return selector;
625
626 selector++;
627 }
628
629 return -EINVAL;
630}
631
c7059c5a
TL
632/**
633 * pinctrl_generic_add_group() - adds a new pin group
634 * @pctldev: pin controller device
635 * @name: name of the pin group
636 * @pins: pins in the pin group
637 * @num_pins: number of pins in the pin group
638 * @data: pin controller driver specific data
639 *
640 * Note that the caller must take care of locking.
641 */
642int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name,
d98d7385 643 const unsigned int *pins, int num_pins, void *data)
c7059c5a
TL
644{
645 struct group_desc *group;
b56e23bf 646 int selector, error;
a203728a
TL
647
648 if (!name)
649 return -EINVAL;
650
651 selector = pinctrl_generic_group_name_to_selector(pctldev, name);
652 if (selector >= 0)
653 return selector;
654
655 selector = pctldev->num_groups;
c7059c5a
TL
656
657 group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL);
658 if (!group)
659 return -ENOMEM;
660
383da0c7 661 *group = PINCTRL_GROUP_DESC(name, pins, num_pins, data);
c7059c5a 662
b56e23bf
SS
663 error = radix_tree_insert(&pctldev->pin_group_tree, selector, group);
664 if (error)
665 return error;
c7059c5a
TL
666
667 pctldev->num_groups++;
668
a203728a 669 return selector;
c7059c5a
TL
670}
671EXPORT_SYMBOL_GPL(pinctrl_generic_add_group);
672
673/**
674 * pinctrl_generic_remove_group() - removes a numbered pin group
675 * @pctldev: pin controller device
676 * @selector: group number
677 *
678 * Note that the caller must take care of locking.
679 */
680int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev,
681 unsigned int selector)
682{
683 struct group_desc *group;
684
685 group = radix_tree_lookup(&pctldev->pin_group_tree,
686 selector);
687 if (!group)
688 return -ENOENT;
689
690 radix_tree_delete(&pctldev->pin_group_tree, selector);
691 devm_kfree(pctldev->dev, group);
692
693 pctldev->num_groups--;
694
695 return 0;
696}
697EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group);
698
699/**
700 * pinctrl_generic_free_groups() - removes all pin groups
701 * @pctldev: pin controller device
702 *
664b7c47
TL
703 * Note that the caller must take care of locking. The pinctrl groups
704 * are allocated with devm_kzalloc() so no need to free them here.
c7059c5a
TL
705 */
706static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev)
707{
708 struct radix_tree_iter iter;
906a2a39 709 void __rcu **slot;
c7059c5a
TL
710
711 radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0)
664b7c47 712 radix_tree_delete(&pctldev->pin_group_tree, iter.index);
c7059c5a
TL
713
714 pctldev->num_groups = 0;
715}
716
717#else
718static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev)
719{
720}
c033a718 721#endif /* CONFIG_GENERIC_PINCTRL_GROUPS */
c7059c5a 722
7afde8ba
LW
723/**
724 * pinctrl_get_group_selector() - returns the group selector for a group
725 * @pctldev: the pin controller handling the group
726 * @pin_group: the pin group to look up
727 */
728int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
729 const char *pin_group)
730{
731 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
7cc4e6b0
AS
732 unsigned int ngroups = pctlops->get_groups_count(pctldev);
733 unsigned int group_selector = 0;
7afde8ba 734
d1e90e9e 735 while (group_selector < ngroups) {
7afde8ba
LW
736 const char *gname = pctlops->get_group_name(pctldev,
737 group_selector);
54a58185 738 if (gname && !strcmp(gname, pin_group)) {
51cd24ee 739 dev_dbg(pctldev->dev,
7afde8ba
LW
740 "found group selector %u for %s\n",
741 group_selector,
742 pin_group);
743 return group_selector;
744 }
745
746 group_selector++;
747 }
748
51cd24ee 749 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
750 pin_group);
751
752 return -EINVAL;
753}
754
00762e41 755bool pinctrl_gpio_can_use_line(struct gpio_chip *gc, unsigned int offset)
472a61e7
SW
756{
757 struct pinctrl_dev *pctldev;
758 struct pinctrl_gpio_range *range;
759 bool result;
760 int pin;
761
762 /*
763 * Try to obtain GPIO range, if it fails
764 * we're probably dealing with GPIO driver
765 * without a backing pin controller - bail out.
766 */
82059c3d 767 if (pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range))
472a61e7
SW
768 return true;
769
770 mutex_lock(&pctldev->mutex);
771
772 /* Convert to the pin controllers number space */
31d4e8d1 773 pin = gpio_to_pin(range, gc, offset);
472a61e7
SW
774
775 result = pinmux_can_be_used_for_gpio(pctldev, pin);
776
777 mutex_unlock(&pctldev->mutex);
778
779 return result;
780}
00762e41 781EXPORT_SYMBOL_GPL(pinctrl_gpio_can_use_line);
ec963d04 782
699f0784 783/**
acb38be6 784 * pinctrl_gpio_request() - request a single pin to be used as GPIO
699f0784
BG
785 * @gc: GPIO chip structure from the GPIO subsystem
786 * @offset: hardware offset of the GPIO relative to the controller
787 *
788 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
789 * as part of their gpio_request() semantics, platforms and individual drivers
790 * shall *NOT* request GPIO pins to be muxed in.
791 */
acb38be6 792int pinctrl_gpio_request(struct gpio_chip *gc, unsigned int offset)
befe5bdf 793{
befe5bdf 794 struct pinctrl_gpio_range *range;
699f0784
BG
795 struct pinctrl_dev *pctldev;
796 int ret, pin;
befe5bdf 797
82059c3d 798 ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
57b676f9 799 if (ret) {
6042aaef 800 if (pinctrl_ready_for_gpio_range(gc, offset))
51e13c24 801 ret = 0;
4650b7cb 802 return ret;
57b676f9 803 }
befe5bdf 804
9b77ace4
AL
805 mutex_lock(&pctldev->mutex);
806
befe5bdf 807 /* Convert to the pin controllers number space */
31d4e8d1 808 pin = gpio_to_pin(range, gc, offset);
befe5bdf 809
699f0784 810 ret = pinmux_request_gpio(pctldev, range, pin, gc->base + offset);
57b676f9 811
9b77ace4
AL
812 mutex_unlock(&pctldev->mutex);
813
57b676f9 814 return ret;
befe5bdf 815}
acb38be6 816EXPORT_SYMBOL_GPL(pinctrl_gpio_request);
ec963d04 817
ec963d04 818/**
4fccb263 819 * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO
ec963d04
BG
820 * @gc: GPIO chip structure from the GPIO subsystem
821 * @offset: hardware offset of the GPIO relative to the controller
822 *
823 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
824 * as part of their gpio_request() semantics, platforms and individual drivers
825 * shall *NOT* request GPIO pins to be muxed in.
826 */
4fccb263 827void pinctrl_gpio_free(struct gpio_chip *gc, unsigned int offset)
ec963d04 828{
1d2c8845
BG
829 struct pinctrl_gpio_range *range;
830 struct pinctrl_dev *pctldev;
831 int ret, pin;
832
82059c3d 833 ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
1d2c8845
BG
834 if (ret)
835 return;
836
837 mutex_lock(&pctldev->mutex);
838
839 /* Convert to the pin controllers number space */
31d4e8d1 840 pin = gpio_to_pin(range, gc, offset);
1d2c8845
BG
841
842 pinmux_free_gpio(pctldev, pin, range);
843
844 mutex_unlock(&pctldev->mutex);
ec963d04 845}
4fccb263 846EXPORT_SYMBOL_GPL(pinctrl_gpio_free);
ec963d04 847
315c4418
BG
848static int pinctrl_gpio_direction(struct gpio_chip *gc, unsigned int offset,
849 bool input)
befe5bdf
LW
850{
851 struct pinctrl_dev *pctldev;
852 struct pinctrl_gpio_range *range;
853 int ret;
854 int pin;
855
82059c3d 856 ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
42fed7ba 857 if (ret) {
befe5bdf 858 return ret;
42fed7ba
PC
859 }
860
861 mutex_lock(&pctldev->mutex);
befe5bdf
LW
862
863 /* Convert to the pin controllers number space */
31d4e8d1 864 pin = gpio_to_pin(range, gc, offset);
42fed7ba
PC
865 ret = pinmux_gpio_direction(pctldev, range, pin, input);
866
867 mutex_unlock(&pctldev->mutex);
befe5bdf 868
42fed7ba 869 return ret;
befe5bdf
LW
870}
871
befe5bdf 872/**
315c46f9 873 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
ec963d04
BG
874 * @gc: GPIO chip structure from the GPIO subsystem
875 * @offset: hardware offset of the GPIO relative to the controller
befe5bdf
LW
876 *
877 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
ec963d04 878 * as part of their gpio_direction_input() semantics, platforms and individual
befe5bdf
LW
879 * drivers shall *NOT* touch pin control GPIO calls.
880 */
315c46f9 881int pinctrl_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
ec963d04 882{
315c4418 883 return pinctrl_gpio_direction(gc, offset, true);
ec963d04 884}
315c46f9 885EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
ec963d04 886
15381bc7 887/**
b679d6c0 888 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
ec963d04
BG
889 * @gc: GPIO chip structure from the GPIO subsystem
890 * @offset: hardware offset of the GPIO relative to the controller
15381bc7 891 *
ec963d04
BG
892 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
893 * as part of their gpio_direction_output() semantics, platforms and individual
894 * drivers shall *NOT* touch pin control GPIO calls.
15381bc7 895 */
b679d6c0 896int pinctrl_gpio_direction_output(struct gpio_chip *gc, unsigned int offset)
ec963d04 897{
315c4418 898 return pinctrl_gpio_direction(gc, offset, false);
ec963d04 899}
b679d6c0 900EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
ec963d04 901
ab56e2bf 902/**
acf2981b 903 * pinctrl_gpio_set_config() - Apply config to given GPIO pin
ab56e2bf
BG
904 * @gc: GPIO chip structure from the GPIO subsystem
905 * @offset: hardware offset of the GPIO relative to the controller
906 * @config: the configuration to apply to the GPIO
907 *
908 * This function should *ONLY* be used from gpiolib-based GPIO drivers, if
909 * they need to call the underlying pin controller to change GPIO config
910 * (for example set debounce time).
911 */
acf2981b 912int pinctrl_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
ab56e2bf 913 unsigned long config)
15381bc7
MW
914{
915 unsigned long configs[] = { config };
916 struct pinctrl_gpio_range *range;
917 struct pinctrl_dev *pctldev;
918 int ret, pin;
919
82059c3d 920 ret = pinctrl_get_device_gpio_range(gc, offset, &pctldev, &range);
15381bc7
MW
921 if (ret)
922 return ret;
923
924 mutex_lock(&pctldev->mutex);
31d4e8d1 925 pin = gpio_to_pin(range, gc, offset);
15381bc7
MW
926 ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs));
927 mutex_unlock(&pctldev->mutex);
928
929 return ret;
930}
acf2981b 931EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config);
ec963d04 932
6e5e959d
SW
933static struct pinctrl_state *find_state(struct pinctrl *p,
934 const char *name)
befe5bdf 935{
6e5e959d
SW
936 struct pinctrl_state *state;
937
938 list_for_each_entry(state, &p->states, node)
939 if (!strcmp(state->name, name))
940 return state;
941
942 return NULL;
943}
944
945static struct pinctrl_state *create_state(struct pinctrl *p,
946 const char *name)
947{
948 struct pinctrl_state *state;
949
950 state = kzalloc(sizeof(*state), GFP_KERNEL);
2104d12d 951 if (!state)
6e5e959d 952 return ERR_PTR(-ENOMEM);
6e5e959d
SW
953
954 state->name = name;
955 INIT_LIST_HEAD(&state->settings);
956
957 list_add_tail(&state->node, &p->states);
958
959 return state;
960}
961
99e4f675 962static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev,
3f713b7c 963 const struct pinctrl_map *map)
6e5e959d
SW
964{
965 struct pinctrl_state *state;
7ecdb16f 966 struct pinctrl_setting *setting;
6e5e959d 967 int ret;
befe5bdf 968
6e5e959d
SW
969 state = find_state(p, map->name);
970 if (!state)
971 state = create_state(p, map->name);
972 if (IS_ERR(state))
973 return PTR_ERR(state);
befe5bdf 974
1e2082b5
SW
975 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
976 return 0;
977
6e5e959d 978 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
2104d12d 979 if (!setting)
6e5e959d 980 return -ENOMEM;
befe5bdf 981
1e2082b5
SW
982 setting->type = map->type;
983
99e4f675
TL
984 if (pctldev)
985 setting->pctldev = pctldev;
986 else
987 setting->pctldev =
988 get_pinctrl_dev_from_devname(map->ctrl_dev_name);
cea234e9 989 if (!setting->pctldev) {
6e5e959d 990 kfree(setting);
89216494
LW
991 /* Do not defer probing of hogs (circular loop) */
992 if (!strcmp(map->ctrl_dev_name, map->dev_name))
993 return -ENODEV;
c05127c4
LW
994 /*
995 * OK let us guess that the driver is not there yet, and
996 * let's defer obtaining this pinctrl handle to later...
997 */
89216494
LW
998 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
999 map->ctrl_dev_name);
c05127c4 1000 return -EPROBE_DEFER;
6e5e959d
SW
1001 }
1002
1a78958d
LW
1003 setting->dev_name = map->dev_name;
1004
1e2082b5
SW
1005 switch (map->type) {
1006 case PIN_MAP_TYPE_MUX_GROUP:
1007 ret = pinmux_map_to_setting(map, setting);
1008 break;
1009 case PIN_MAP_TYPE_CONFIGS_PIN:
1010 case PIN_MAP_TYPE_CONFIGS_GROUP:
1011 ret = pinconf_map_to_setting(map, setting);
1012 break;
1013 default:
1014 ret = -EINVAL;
1015 break;
1016 }
6e5e959d
SW
1017 if (ret < 0) {
1018 kfree(setting);
1019 return ret;
1020 }
1021
1022 list_add_tail(&setting->node, &state->settings);
1023
1024 return 0;
1025}
1026
1027static struct pinctrl *find_pinctrl(struct device *dev)
1028{
1029 struct pinctrl *p;
1030
42fed7ba 1031 mutex_lock(&pinctrl_list_mutex);
1e2082b5 1032 list_for_each_entry(p, &pinctrl_list, node)
42fed7ba
PC
1033 if (p->dev == dev) {
1034 mutex_unlock(&pinctrl_list_mutex);
6e5e959d 1035 return p;
42fed7ba 1036 }
6e5e959d 1037
42fed7ba 1038 mutex_unlock(&pinctrl_list_mutex);
6e5e959d
SW
1039 return NULL;
1040}
1041
42fed7ba 1042static void pinctrl_free(struct pinctrl *p, bool inlist);
6e5e959d 1043
99e4f675
TL
1044static struct pinctrl *create_pinctrl(struct device *dev,
1045 struct pinctrl_dev *pctldev)
6e5e959d
SW
1046{
1047 struct pinctrl *p;
1048 const char *devname;
1049 struct pinctrl_maps *maps_node;
3f713b7c 1050 const struct pinctrl_map *map;
6e5e959d 1051 int ret;
befe5bdf
LW
1052
1053 /*
1054 * create the state cookie holder struct pinctrl for each
1055 * mapping, this is what consumers will get when requesting
1056 * a pin control handle with pinctrl_get()
1057 */
02f5b989 1058 p = kzalloc(sizeof(*p), GFP_KERNEL);
2104d12d 1059 if (!p)
befe5bdf 1060 return ERR_PTR(-ENOMEM);
7ecdb16f 1061 p->dev = dev;
6e5e959d 1062 INIT_LIST_HEAD(&p->states);
57291ce2
SW
1063 INIT_LIST_HEAD(&p->dt_maps);
1064
99e4f675 1065 ret = pinctrl_dt_to_map(p, pctldev);
57291ce2
SW
1066 if (ret < 0) {
1067 kfree(p);
1068 return ERR_PTR(ret);
1069 }
6e5e959d
SW
1070
1071 devname = dev_name(dev);
befe5bdf 1072
42fed7ba 1073 mutex_lock(&pinctrl_maps_mutex);
befe5bdf 1074 /* Iterate over the pin control maps to locate the right ones */
06de5193 1075 for_each_pin_map(maps_node, map) {
7ecdb16f
SW
1076 /* Map must be for this device */
1077 if (strcmp(map->dev_name, devname))
1078 continue;
7f0ff06c
NY
1079 /*
1080 * If pctldev is not null, we are claiming hog for it,
1081 * that means, setting that is served by pctldev by itself.
1082 *
1083 * Thus we must skip map that is for this device but is served
1084 * by other device.
1085 */
1086 if (pctldev &&
1087 strcmp(dev_name(pctldev->dev), map->ctrl_dev_name))
1088 continue;
7ecdb16f 1089
99e4f675 1090 ret = add_setting(p, pctldev, map);
89216494
LW
1091 /*
1092 * At this point the adding of a setting may:
1093 *
1094 * - Defer, if the pinctrl device is not yet available
1095 * - Fail, if the pinctrl device is not yet available,
1096 * AND the setting is a hog. We cannot defer that, since
1097 * the hog will kick in immediately after the device
1098 * is registered.
1099 *
1100 * If the error returned was not -EPROBE_DEFER then we
1101 * accumulate the errors to see if we end up with
1102 * an -EPROBE_DEFER later, as that is the worst case.
1103 */
1104 if (ret == -EPROBE_DEFER) {
42fed7ba
PC
1105 pinctrl_free(p, false);
1106 mutex_unlock(&pinctrl_maps_mutex);
6e5e959d 1107 return ERR_PTR(ret);
7ecdb16f 1108 }
befe5bdf 1109 }
42fed7ba
PC
1110 mutex_unlock(&pinctrl_maps_mutex);
1111
89216494 1112 if (ret < 0) {
3ec440e3 1113 /* If some other error than deferral occurred, return here */
42fed7ba 1114 pinctrl_free(p, false);
89216494
LW
1115 return ERR_PTR(ret);
1116 }
befe5bdf 1117
ab78029e
LW
1118 kref_init(&p->users);
1119
b0666ba4 1120 /* Add the pinctrl handle to the global list */
7b320cb1 1121 mutex_lock(&pinctrl_list_mutex);
8b9c139f 1122 list_add_tail(&p->node, &pinctrl_list);
7b320cb1 1123 mutex_unlock(&pinctrl_list_mutex);
befe5bdf
LW
1124
1125 return p;
6e5e959d 1126}
7ecdb16f 1127
42fed7ba
PC
1128/**
1129 * pinctrl_get() - retrieves the pinctrl handle for a device
1130 * @dev: the device to obtain the handle for
1131 */
1132struct pinctrl *pinctrl_get(struct device *dev)
6e5e959d
SW
1133{
1134 struct pinctrl *p;
7ecdb16f 1135
6e5e959d
SW
1136 if (WARN_ON(!dev))
1137 return ERR_PTR(-EINVAL);
1138
ab78029e
LW
1139 /*
1140 * See if somebody else (such as the device core) has already
1141 * obtained a handle to the pinctrl for this device. In that case,
1142 * return another pointer to it.
1143 */
6e5e959d 1144 p = find_pinctrl(dev);
cea234e9 1145 if (p) {
ab78029e
LW
1146 dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n");
1147 kref_get(&p->users);
1148 return p;
1149 }
7ecdb16f 1150
99e4f675 1151 return create_pinctrl(dev, NULL);
befe5bdf
LW
1152}
1153EXPORT_SYMBOL_GPL(pinctrl_get);
1154
d3cee830
RG
1155static void pinctrl_free_setting(bool disable_setting,
1156 struct pinctrl_setting *setting)
1157{
1158 switch (setting->type) {
1159 case PIN_MAP_TYPE_MUX_GROUP:
1160 if (disable_setting)
1161 pinmux_disable_setting(setting);
1162 pinmux_free_setting(setting);
1163 break;
1164 case PIN_MAP_TYPE_CONFIGS_PIN:
1165 case PIN_MAP_TYPE_CONFIGS_GROUP:
1166 pinconf_free_setting(setting);
1167 break;
1168 default:
1169 break;
1170 }
1171}
1172
42fed7ba 1173static void pinctrl_free(struct pinctrl *p, bool inlist)
befe5bdf 1174{
6e5e959d
SW
1175 struct pinctrl_state *state, *n1;
1176 struct pinctrl_setting *setting, *n2;
1177
42fed7ba 1178 mutex_lock(&pinctrl_list_mutex);
6e5e959d
SW
1179 list_for_each_entry_safe(state, n1, &p->states, node) {
1180 list_for_each_entry_safe(setting, n2, &state->settings, node) {
d3cee830 1181 pinctrl_free_setting(state == p->state, setting);
6e5e959d
SW
1182 list_del(&setting->node);
1183 kfree(setting);
1184 }
1185 list_del(&state->node);
1186 kfree(state);
7ecdb16f 1187 }
befe5bdf 1188
57291ce2
SW
1189 pinctrl_dt_free_maps(p);
1190
6e5e959d
SW
1191 if (inlist)
1192 list_del(&p->node);
befe5bdf 1193 kfree(p);
42fed7ba 1194 mutex_unlock(&pinctrl_list_mutex);
befe5bdf 1195}
befe5bdf
LW
1196
1197/**
ab78029e
LW
1198 * pinctrl_release() - release the pinctrl handle
1199 * @kref: the kref in the pinctrl being released
1200 */
2917e833 1201static void pinctrl_release(struct kref *kref)
ab78029e
LW
1202{
1203 struct pinctrl *p = container_of(kref, struct pinctrl, users);
1204
42fed7ba 1205 pinctrl_free(p, true);
ab78029e
LW
1206}
1207
1208/**
1209 * pinctrl_put() - decrease use count on a previously claimed pinctrl handle
6e5e959d 1210 * @p: the pinctrl handle to release
befe5bdf 1211 */
57b676f9
SW
1212void pinctrl_put(struct pinctrl *p)
1213{
ab78029e 1214 kref_put(&p->users, pinctrl_release);
57b676f9
SW
1215}
1216EXPORT_SYMBOL_GPL(pinctrl_put);
1217
42fed7ba
PC
1218/**
1219 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
1220 * @p: the pinctrl handle to retrieve the state from
1221 * @name: the state name to retrieve
1222 */
1223struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p,
1224 const char *name)
befe5bdf 1225{
6e5e959d 1226 struct pinctrl_state *state;
befe5bdf 1227
6e5e959d 1228 state = find_state(p, name);
5b3aa5f7
DA
1229 if (!state) {
1230 if (pinctrl_dummy_state) {
1231 /* create dummy state */
1232 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
1233 name);
1234 state = create_state(p, name);
d599bfb3
RG
1235 } else
1236 state = ERR_PTR(-ENODEV);
5b3aa5f7 1237 }
57b676f9 1238
6e5e959d 1239 return state;
befe5bdf 1240}
42fed7ba 1241EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
befe5bdf 1242
036f394d
BG
1243static void pinctrl_link_add(struct pinctrl_dev *pctldev,
1244 struct device *consumer)
1245{
1246 if (pctldev->desc->link_consumers)
1247 device_link_add(consumer, pctldev->dev,
1248 DL_FLAG_PM_RUNTIME |
1249 DL_FLAG_AUTOREMOVE_CONSUMER);
1250}
1251
befe5bdf 1252/**
981ed1bf 1253 * pinctrl_commit_state() - select/activate/program a pinctrl state to HW
42fed7ba
PC
1254 * @p: the pinctrl handle for the device that requests configuration
1255 * @state: the state handle to select/activate/program
befe5bdf 1256 */
981ed1bf 1257static int pinctrl_commit_state(struct pinctrl *p, struct pinctrl_state *state)
befe5bdf 1258{
6e5e959d 1259 struct pinctrl_setting *setting, *setting2;
4198a9b5 1260 struct pinctrl_state *old_state = READ_ONCE(p->state);
6e5e959d 1261 int ret;
7ecdb16f 1262
4198a9b5 1263 if (old_state) {
6e5e959d 1264 /*
2243a87d
FW
1265 * For each pinmux setting in the old state, forget SW's record
1266 * of mux owner for that pingroup. Any pingroups which are
1267 * still owned by the new state will be re-acquired by the call
1268 * to pinmux_enable_setting() in the loop below.
6e5e959d 1269 */
4198a9b5 1270 list_for_each_entry(setting, &old_state->settings, node) {
1e2082b5
SW
1271 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
1272 continue;
2243a87d 1273 pinmux_disable_setting(setting);
6e5e959d
SW
1274 }
1275 }
1276
3102a76c 1277 p->state = NULL;
6e5e959d 1278
b991f8c3 1279 /* Apply all the settings for the new state - pinmux first */
6e5e959d 1280 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1281 switch (setting->type) {
1282 case PIN_MAP_TYPE_MUX_GROUP:
1283 ret = pinmux_enable_setting(setting);
1284 break;
1285 case PIN_MAP_TYPE_CONFIGS_PIN:
b991f8c3 1286 case PIN_MAP_TYPE_CONFIGS_GROUP:
6a37d750 1287 ret = 0;
b991f8c3
MS
1288 break;
1289 default:
1290 ret = -EINVAL;
1291 break;
1292 }
1293
1294 if (ret < 0)
1295 goto unapply_new_state;
1296
1297 /* Do not link hogs (circular dependency) */
1298 if (p != setting->pctldev->p)
1299 pinctrl_link_add(setting->pctldev, p->dev);
1300 }
1301
1302 /* Apply all the settings for the new state - pinconf after */
1303 list_for_each_entry(setting, &state->settings, node) {
1304 switch (setting->type) {
1305 case PIN_MAP_TYPE_MUX_GROUP:
6a37d750 1306 ret = 0;
b991f8c3
MS
1307 break;
1308 case PIN_MAP_TYPE_CONFIGS_PIN:
1e2082b5
SW
1309 case PIN_MAP_TYPE_CONFIGS_GROUP:
1310 ret = pinconf_apply_setting(setting);
1311 break;
1312 default:
1313 ret = -EINVAL;
1314 break;
1315 }
3102a76c 1316
42fed7ba 1317 if (ret < 0) {
3102a76c 1318 goto unapply_new_state;
42fed7ba 1319 }
036f394d 1320
b672a87a
LW
1321 /* Do not link hogs (circular dependency) */
1322 if (p != setting->pctldev->p)
1323 pinctrl_link_add(setting->pctldev, p->dev);
befe5bdf 1324 }
6e5e959d 1325
3102a76c
RG
1326 p->state = state;
1327
6e5e959d 1328 return 0;
3102a76c
RG
1329
1330unapply_new_state:
da58751c 1331 dev_err(p->dev, "Error applying setting, reverse things back\n");
3102a76c 1332
3102a76c
RG
1333 list_for_each_entry(setting2, &state->settings, node) {
1334 if (&setting2->node == &setting->node)
1335 break;
af606177
RG
1336 /*
1337 * All we can do here is pinmux_disable_setting.
1338 * That means that some pins are muxed differently now
1339 * than they were before applying the setting (We can't
1340 * "unmux a pin"!), but it's not a big deal since the pins
1341 * are free to be muxed by another apply_setting.
1342 */
1343 if (setting2->type == PIN_MAP_TYPE_MUX_GROUP)
1344 pinmux_disable_setting(setting2);
3102a76c 1345 }
8009d5ff 1346
385d9424
RG
1347 /* There's no infinite recursive loop here because p->state is NULL */
1348 if (old_state)
42fed7ba 1349 pinctrl_select_state(p, old_state);
6e5e959d
SW
1350
1351 return ret;
befe5bdf 1352}
981ed1bf
FF
1353
1354/**
1355 * pinctrl_select_state() - select/activate/program a pinctrl state to HW
1356 * @p: the pinctrl handle for the device that requests configuration
1357 * @state: the state handle to select/activate/program
1358 */
1359int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
1360{
1361 if (p->state == state)
1362 return 0;
1363
1364 return pinctrl_commit_state(p, state);
1365}
6e5e959d 1366EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 1367
6d4ca1fb
SW
1368static void devm_pinctrl_release(struct device *dev, void *res)
1369{
1370 pinctrl_put(*(struct pinctrl **)res);
1371}
1372
1373/**
9c340bbb 1374 * devm_pinctrl_get() - Resource managed pinctrl_get()
6d4ca1fb
SW
1375 * @dev: the device to obtain the handle for
1376 *
1377 * If there is a need to explicitly destroy the returned struct pinctrl,
1378 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
1379 */
1380struct pinctrl *devm_pinctrl_get(struct device *dev)
1381{
1382 struct pinctrl **ptr, *p;
1383
1384 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
1385 if (!ptr)
1386 return ERR_PTR(-ENOMEM);
1387
1388 p = pinctrl_get(dev);
1389 if (!IS_ERR(p)) {
1390 *ptr = p;
1391 devres_add(dev, ptr);
1392 } else {
1393 devres_free(ptr);
1394 }
1395
1396 return p;
1397}
1398EXPORT_SYMBOL_GPL(devm_pinctrl_get);
1399
1400static int devm_pinctrl_match(struct device *dev, void *res, void *data)
1401{
1402 struct pinctrl **p = res;
1403
1404 return *p == data;
1405}
1406
1407/**
1408 * devm_pinctrl_put() - Resource managed pinctrl_put()
1409 * @p: the pinctrl handle to release
1410 *
1411 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
1412 * this function will not need to be called and the resource management
1413 * code will ensure that the resource is freed.
1414 */
1415void devm_pinctrl_put(struct pinctrl *p)
1416{
a72149e8 1417 WARN_ON(devres_release(p->dev, devm_pinctrl_release,
6d4ca1fb 1418 devm_pinctrl_match, p));
6d4ca1fb
SW
1419}
1420EXPORT_SYMBOL_GPL(devm_pinctrl_put);
1421
c72bed23
HG
1422/**
1423 * pinctrl_register_mappings() - register a set of pin controller mappings
1424 * @maps: the pincontrol mappings table to register. Note the pinctrl-core
1425 * keeps a reference to the passed in maps, so they should _not_ be
1426 * marked with __initdata.
1427 * @num_maps: the number of maps in the mapping table
1428 */
1429int pinctrl_register_mappings(const struct pinctrl_map *maps,
7cc4e6b0 1430 unsigned int num_maps)
befe5bdf 1431{
1e2082b5 1432 int i, ret;
b2b3e66e 1433 struct pinctrl_maps *maps_node;
befe5bdf 1434
7e9236ff 1435 pr_debug("add %u pinctrl maps\n", num_maps);
befe5bdf
LW
1436
1437 /* First sanity check the new mapping */
1438 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
1439 if (!maps[i].dev_name) {
1440 pr_err("failed to register map %s (%d): no device given\n",
1441 maps[i].name, i);
1442 return -EINVAL;
1443 }
1444
befe5bdf
LW
1445 if (!maps[i].name) {
1446 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 1447 i);
befe5bdf
LW
1448 return -EINVAL;
1449 }
1450
1e2082b5
SW
1451 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
1452 !maps[i].ctrl_dev_name) {
befe5bdf
LW
1453 pr_err("failed to register map %s (%d): no pin control device given\n",
1454 maps[i].name, i);
1455 return -EINVAL;
1456 }
1457
1e2082b5
SW
1458 switch (maps[i].type) {
1459 case PIN_MAP_TYPE_DUMMY_STATE:
1460 break;
1461 case PIN_MAP_TYPE_MUX_GROUP:
1462 ret = pinmux_validate_map(&maps[i], i);
1463 if (ret < 0)
fde04f41 1464 return ret;
1e2082b5
SW
1465 break;
1466 case PIN_MAP_TYPE_CONFIGS_PIN:
1467 case PIN_MAP_TYPE_CONFIGS_GROUP:
1468 ret = pinconf_validate_map(&maps[i], i);
1469 if (ret < 0)
fde04f41 1470 return ret;
1e2082b5
SW
1471 break;
1472 default:
1473 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 1474 maps[i].name, i);
1681f5ae
SW
1475 return -EINVAL;
1476 }
befe5bdf
LW
1477 }
1478
b2b3e66e 1479 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
2104d12d 1480 if (!maps_node)
b2b3e66e 1481 return -ENOMEM;
befe5bdf 1482
c72bed23 1483 maps_node->maps = maps;
b2b3e66e 1484 maps_node->num_maps = num_maps;
befe5bdf 1485
c5272a28 1486 mutex_lock(&pinctrl_maps_mutex);
b2b3e66e 1487 list_add_tail(&maps_node->node, &pinctrl_maps);
c5272a28 1488 mutex_unlock(&pinctrl_maps_mutex);
b2b3e66e 1489
befe5bdf
LW
1490 return 0;
1491}
c72bed23 1492EXPORT_SYMBOL_GPL(pinctrl_register_mappings);
befe5bdf 1493
57291ce2 1494/**
c72bed23 1495 * pinctrl_unregister_mappings() - unregister a set of pin controller mappings
9c340bbb 1496 * @map: the pincontrol mappings table passed to pinctrl_register_mappings()
c72bed23 1497 * when registering the mappings.
57291ce2 1498 */
c72bed23 1499void pinctrl_unregister_mappings(const struct pinctrl_map *map)
57291ce2
SW
1500{
1501 struct pinctrl_maps *maps_node;
1502
42fed7ba 1503 mutex_lock(&pinctrl_maps_mutex);
57291ce2
SW
1504 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1505 if (maps_node->maps == map) {
1506 list_del(&maps_node->node);
db6c2c69 1507 kfree(maps_node);
42fed7ba 1508 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1509 return;
1510 }
1511 }
42fed7ba 1512 mutex_unlock(&pinctrl_maps_mutex);
57291ce2 1513}
c72bed23 1514EXPORT_SYMBOL_GPL(pinctrl_unregister_mappings);
57291ce2 1515
840a47ba
JD
1516/**
1517 * pinctrl_force_sleep() - turn a given controller device into sleep state
1518 * @pctldev: pin controller device
1519 */
1520int pinctrl_force_sleep(struct pinctrl_dev *pctldev)
1521{
1522 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep))
981ed1bf 1523 return pinctrl_commit_state(pctldev->p, pctldev->hog_sleep);
840a47ba
JD
1524 return 0;
1525}
1526EXPORT_SYMBOL_GPL(pinctrl_force_sleep);
1527
1528/**
1529 * pinctrl_force_default() - turn a given controller device into default state
1530 * @pctldev: pin controller device
1531 */
1532int pinctrl_force_default(struct pinctrl_dev *pctldev)
1533{
1534 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default))
981ed1bf 1535 return pinctrl_commit_state(pctldev->p, pctldev->hog_default);
840a47ba
JD
1536 return 0;
1537}
1538EXPORT_SYMBOL_GPL(pinctrl_force_default);
1539
ef0eebc0
DA
1540/**
1541 * pinctrl_init_done() - tell pinctrl probe is done
1542 *
1543 * We'll use this time to switch the pins from "init" to "default" unless the
1544 * driver selected some other state.
1545 *
1546 * @dev: device to that's done probing
1547 */
1548int pinctrl_init_done(struct device *dev)
1549{
1550 struct dev_pin_info *pins = dev->pins;
1551 int ret;
1552
1553 if (!pins)
1554 return 0;
1555
1556 if (IS_ERR(pins->init_state))
1557 return 0; /* No such state */
1558
1559 if (pins->p->state != pins->init_state)
1560 return 0; /* Not at init anyway */
1561
1562 if (IS_ERR(pins->default_state))
1563 return 0; /* No default state */
1564
1565 ret = pinctrl_select_state(pins->p, pins->default_state);
1566 if (ret)
1567 dev_err(dev, "failed to activate default pinctrl state\n");
1568
1569 return ret;
1570}
1571
55d54d1e
UH
1572static int pinctrl_select_bound_state(struct device *dev,
1573 struct pinctrl_state *state)
14005ee2
LW
1574{
1575 struct dev_pin_info *pins = dev->pins;
1576 int ret;
1577
f3333497
TL
1578 if (IS_ERR(state))
1579 return 0; /* No such state */
1580 ret = pinctrl_select_state(pins->p, state);
14005ee2 1581 if (ret)
f3333497
TL
1582 dev_err(dev, "failed to activate pinctrl state %s\n",
1583 state->name);
14005ee2
LW
1584 return ret;
1585}
f3333497
TL
1586
1587/**
55d54d1e 1588 * pinctrl_select_default_state() - select default pinctrl state
f3333497
TL
1589 * @dev: device to select default state for
1590 */
55d54d1e 1591int pinctrl_select_default_state(struct device *dev)
f3333497
TL
1592{
1593 if (!dev->pins)
1594 return 0;
1595
55d54d1e
UH
1596 return pinctrl_select_bound_state(dev, dev->pins->default_state);
1597}
1598EXPORT_SYMBOL_GPL(pinctrl_select_default_state);
1599
1600#ifdef CONFIG_PM
1601
1602/**
1603 * pinctrl_pm_select_default_state() - select default pinctrl state for PM
1604 * @dev: device to select default state for
1605 */
1606int pinctrl_pm_select_default_state(struct device *dev)
1607{
1608 return pinctrl_select_default_state(dev);
f3333497 1609}
f472dead 1610EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state);
14005ee2
LW
1611
1612/**
1613 * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM
1614 * @dev: device to select sleep state for
1615 */
1616int pinctrl_pm_select_sleep_state(struct device *dev)
1617{
f3333497 1618 if (!dev->pins)
14005ee2 1619 return 0;
f3333497 1620
55d54d1e 1621 return pinctrl_select_bound_state(dev, dev->pins->sleep_state);
14005ee2 1622}
f472dead 1623EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state);
14005ee2
LW
1624
1625/**
1626 * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM
1627 * @dev: device to select idle state for
1628 */
1629int pinctrl_pm_select_idle_state(struct device *dev)
1630{
f3333497 1631 if (!dev->pins)
14005ee2 1632 return 0;
f3333497 1633
55d54d1e 1634 return pinctrl_select_bound_state(dev, dev->pins->idle_state);
14005ee2 1635}
f472dead 1636EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state);
14005ee2
LW
1637#endif
1638
2744e8af
LW
1639#ifdef CONFIG_DEBUG_FS
1640
1641static int pinctrl_pins_show(struct seq_file *s, void *what)
1642{
1643 struct pinctrl_dev *pctldev = s->private;
1644 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
7cc4e6b0 1645 unsigned int i, pin;
b507cb92 1646#ifdef CONFIG_GPIOLIB
f6443e01 1647 struct gpio_device *gdev = NULL;
f1b206cf 1648 struct pinctrl_gpio_range *range;
482715ff 1649 int gpio_num;
b507cb92 1650#endif
2744e8af
LW
1651
1652 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1653
42fed7ba 1654 mutex_lock(&pctldev->mutex);
57b676f9 1655
706e8520
CP
1656 /* The pin number can be retrived from the pin controller descriptor */
1657 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1658 struct pin_desc *desc;
1659
706e8520 1660 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1661 desc = pin_desc_get(pctldev, pin);
1662 /* Pin space may be sparse */
cea234e9 1663 if (!desc)
2744e8af
LW
1664 continue;
1665
cf9d994d 1666 seq_printf(s, "pin %d (%s) ", pin, desc->name);
2744e8af 1667
f1b206cf 1668#ifdef CONFIG_GPIOLIB
482715ff 1669 gpio_num = -1;
f1b206cf
DF
1670 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
1671 if ((pin >= range->pin_base) &&
1672 (pin < (range->pin_base + range->npins))) {
1673 gpio_num = range->base + (pin - range->pin_base);
1674 break;
1675 }
1676 }
482715ff 1677 if (gpio_num >= 0)
e3863fa1
LW
1678 /*
1679 * FIXME: gpio_num comes from the global GPIO numberspace.
1680 * we need to get rid of the range->base eventually and
1681 * get the descriptor directly from the gpio_chip.
1682 */
524fc108
BG
1683 gdev = gpiod_to_gpio_device(gpio_to_desc(gpio_num));
1684 if (gdev)
1685 seq_printf(s, "%u:%s ",
1686 gpio_num - gpio_device_get_base(gdev),
1687 gpio_device_get_label(gdev));
f1b206cf
DF
1688 else
1689 seq_puts(s, "0:? ");
1690#endif
1691
2744e8af
LW
1692 /* Driver-specific info per pin */
1693 if (ops->pin_dbg_show)
1694 ops->pin_dbg_show(pctldev, s, pin);
1695
1696 seq_puts(s, "\n");
1697 }
1698
42fed7ba 1699 mutex_unlock(&pctldev->mutex);
57b676f9 1700
2744e8af
LW
1701 return 0;
1702}
b5520891 1703DEFINE_SHOW_ATTRIBUTE(pinctrl_pins);
2744e8af
LW
1704
1705static int pinctrl_groups_show(struct seq_file *s, void *what)
1706{
1707 struct pinctrl_dev *pctldev = s->private;
1708 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
7cc4e6b0 1709 unsigned int ngroups, selector = 0;
2744e8af 1710
42fed7ba
PC
1711 mutex_lock(&pctldev->mutex);
1712
d1e90e9e 1713 ngroups = ops->get_groups_count(pctldev);
57b676f9 1714
2744e8af 1715 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1716 while (selector < ngroups) {
7cc4e6b0
AS
1717 const unsigned int *pins = NULL;
1718 unsigned int num_pins = 0;
2744e8af 1719 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1720 const char *pname;
e5b3b2d9 1721 int ret = 0;
2744e8af
LW
1722 int i;
1723
e5b3b2d9
AT
1724 if (ops->get_group_pins)
1725 ret = ops->get_group_pins(pctldev, selector,
1726 &pins, &num_pins);
2744e8af
LW
1727 if (ret)
1728 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1729 gname);
1730 else {
dcb5dbc3
DA
1731 seq_printf(s, "group: %s\n", gname);
1732 for (i = 0; i < num_pins; i++) {
1733 pname = pin_get_name(pctldev, pins[i]);
b4dd784b 1734 if (WARN_ON(!pname)) {
42fed7ba 1735 mutex_unlock(&pctldev->mutex);
dcb5dbc3 1736 return -EINVAL;
b4dd784b 1737 }
dcb5dbc3
DA
1738 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1739 }
1740 seq_puts(s, "\n");
2744e8af
LW
1741 }
1742 selector++;
1743 }
1744
42fed7ba 1745 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1746
1747 return 0;
1748}
b5520891 1749DEFINE_SHOW_ATTRIBUTE(pinctrl_groups);
2744e8af
LW
1750
1751static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1752{
1753 struct pinctrl_dev *pctldev = s->private;
6cadafb3 1754 struct pinctrl_gpio_range *range;
2744e8af
LW
1755
1756 seq_puts(s, "GPIO ranges handled:\n");
1757
42fed7ba 1758 mutex_lock(&pctldev->mutex);
57b676f9 1759
2744e8af 1760 /* Loop over the ranges */
2744e8af 1761 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
c8587eee
CR
1762 if (range->pins) {
1763 int a;
1764 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {",
1765 range->id, range->name,
1766 range->base, (range->base + range->npins - 1));
1767 for (a = 0; a < range->npins - 1; a++)
1768 seq_printf(s, "%u, ", range->pins[a]);
1769 seq_printf(s, "%u}\n", range->pins[a]);
1770 }
1771 else
1772 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1773 range->id, range->name,
1774 range->base, (range->base + range->npins - 1),
1775 range->pin_base,
1776 (range->pin_base + range->npins - 1));
2744e8af 1777 }
57b676f9 1778
42fed7ba 1779 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1780
1781 return 0;
1782}
b5520891 1783DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges);
2744e8af
LW
1784
1785static int pinctrl_devices_show(struct seq_file *s, void *what)
1786{
1787 struct pinctrl_dev *pctldev;
1788
ae6b4d85 1789 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9 1790
42fed7ba 1791 mutex_lock(&pinctrldev_list_mutex);
57b676f9 1792
2744e8af
LW
1793 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1794 seq_printf(s, "%s ", pctldev->desc->name);
1795 if (pctldev->desc->pmxops)
ae6b4d85
LW
1796 seq_puts(s, "yes ");
1797 else
1798 seq_puts(s, "no ");
1799 if (pctldev->desc->confops)
2744e8af
LW
1800 seq_puts(s, "yes");
1801 else
1802 seq_puts(s, "no");
1803 seq_puts(s, "\n");
1804 }
57b676f9 1805
42fed7ba 1806 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1807
1808 return 0;
1809}
b5520891 1810DEFINE_SHOW_ATTRIBUTE(pinctrl_devices);
2744e8af 1811
1e2082b5
SW
1812static inline const char *map_type(enum pinctrl_map_type type)
1813{
1814 static const char * const names[] = {
1815 "INVALID",
1816 "DUMMY_STATE",
1817 "MUX_GROUP",
1818 "CONFIGS_PIN",
1819 "CONFIGS_GROUP",
1820 };
1821
1822 if (type >= ARRAY_SIZE(names))
1823 return "UNKNOWN";
1824
1825 return names[type];
1826}
1827
3eedb437
SW
1828static int pinctrl_maps_show(struct seq_file *s, void *what)
1829{
1830 struct pinctrl_maps *maps_node;
3f713b7c 1831 const struct pinctrl_map *map;
3eedb437
SW
1832
1833 seq_puts(s, "Pinctrl maps:\n");
1834
42fed7ba 1835 mutex_lock(&pinctrl_maps_mutex);
06de5193 1836 for_each_pin_map(maps_node, map) {
1e2082b5
SW
1837 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1838 map->dev_name, map->name, map_type(map->type),
1839 map->type);
1840
1841 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1842 seq_printf(s, "controlling device %s\n",
1843 map->ctrl_dev_name);
1844
1845 switch (map->type) {
1846 case PIN_MAP_TYPE_MUX_GROUP:
1847 pinmux_show_map(s, map);
1848 break;
1849 case PIN_MAP_TYPE_CONFIGS_PIN:
1850 case PIN_MAP_TYPE_CONFIGS_GROUP:
1851 pinconf_show_map(s, map);
1852 break;
1853 default:
1854 break;
1855 }
1856
390e1046 1857 seq_putc(s, '\n');
3eedb437 1858 }
42fed7ba 1859 mutex_unlock(&pinctrl_maps_mutex);
3eedb437
SW
1860
1861 return 0;
1862}
b5520891 1863DEFINE_SHOW_ATTRIBUTE(pinctrl_maps);
3eedb437 1864
befe5bdf
LW
1865static int pinctrl_show(struct seq_file *s, void *what)
1866{
1867 struct pinctrl *p;
6e5e959d 1868 struct pinctrl_state *state;
7ecdb16f 1869 struct pinctrl_setting *setting;
befe5bdf
LW
1870
1871 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9 1872
42fed7ba 1873 mutex_lock(&pinctrl_list_mutex);
57b676f9 1874
befe5bdf 1875 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1876 seq_printf(s, "device: %s current state: %s\n",
1877 dev_name(p->dev),
1878 p->state ? p->state->name : "none");
1879
1880 list_for_each_entry(state, &p->states, node) {
1881 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1882
6e5e959d 1883 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1884 struct pinctrl_dev *pctldev = setting->pctldev;
1885
1886 seq_printf(s, " type: %s controller %s ",
1887 map_type(setting->type),
1888 pinctrl_dev_get_name(pctldev));
1889
1890 switch (setting->type) {
1891 case PIN_MAP_TYPE_MUX_GROUP:
1892 pinmux_show_setting(s, setting);
1893 break;
1894 case PIN_MAP_TYPE_CONFIGS_PIN:
1895 case PIN_MAP_TYPE_CONFIGS_GROUP:
1896 pinconf_show_setting(s, setting);
1897 break;
1898 default:
1899 break;
1900 }
6e5e959d 1901 }
befe5bdf 1902 }
befe5bdf
LW
1903 }
1904
42fed7ba 1905 mutex_unlock(&pinctrl_list_mutex);
57b676f9 1906
befe5bdf
LW
1907 return 0;
1908}
b5520891 1909DEFINE_SHOW_ATTRIBUTE(pinctrl);
befe5bdf 1910
2744e8af
LW
1911static struct dentry *debugfs_root;
1912
1913static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1914{
02157160 1915 struct dentry *device_root;
1781af56
JK
1916 const char *debugfs_name;
1917
1918 if (pctldev->desc->name &&
1919 strcmp(dev_name(pctldev->dev), pctldev->desc->name)) {
1920 debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL,
1921 "%s-%s", dev_name(pctldev->dev),
1922 pctldev->desc->name);
1923 if (!debugfs_name) {
1924 pr_warn("failed to determine debugfs dir name for %s\n",
1925 dev_name(pctldev->dev));
1926 return;
1927 }
1928 } else {
1929 debugfs_name = dev_name(pctldev->dev);
1930 }
2744e8af 1931
1781af56 1932 device_root = debugfs_create_dir(debugfs_name, debugfs_root);
02157160
TL
1933 pctldev->device_root = device_root;
1934
2744e8af
LW
1935 if (IS_ERR(device_root) || !device_root) {
1936 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1937 dev_name(pctldev->dev));
2744e8af
LW
1938 return;
1939 }
47473813 1940 debugfs_create_file("pins", 0444,
b5520891 1941 device_root, pctldev, &pinctrl_pins_fops);
47473813 1942 debugfs_create_file("pingroups", 0444,
b5520891 1943 device_root, pctldev, &pinctrl_groups_fops);
47473813 1944 debugfs_create_file("gpio-ranges", 0444,
b5520891 1945 device_root, pctldev, &pinctrl_gpioranges_fops);
e7f2a444
FV
1946 if (pctldev->desc->pmxops)
1947 pinmux_init_device_debugfs(device_root, pctldev);
1948 if (pctldev->desc->confops)
1949 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1950}
1951
02157160
TL
1952static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1953{
1954 debugfs_remove_recursive(pctldev->device_root);
1955}
1956
2744e8af
LW
1957static void pinctrl_init_debugfs(void)
1958{
1959 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1960 if (IS_ERR(debugfs_root) || !debugfs_root) {
1961 pr_warn("failed to create debugfs directory\n");
1962 debugfs_root = NULL;
1963 return;
1964 }
1965
47473813 1966 debugfs_create_file("pinctrl-devices", 0444,
b5520891 1967 debugfs_root, NULL, &pinctrl_devices_fops);
47473813 1968 debugfs_create_file("pinctrl-maps", 0444,
b5520891 1969 debugfs_root, NULL, &pinctrl_maps_fops);
47473813 1970 debugfs_create_file("pinctrl-handles", 0444,
b5520891 1971 debugfs_root, NULL, &pinctrl_fops);
2744e8af
LW
1972}
1973
1974#else /* CONFIG_DEBUG_FS */
1975
1976static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1977{
1978}
1979
1980static void pinctrl_init_debugfs(void)
1981{
1982}
1983
02157160
TL
1984static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1985{
1986}
1987
2744e8af
LW
1988#endif
1989
d26bc49f
SW
1990static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1991{
1992 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1993
1994 if (!ops ||
d1e90e9e 1995 !ops->get_groups_count ||
e5b3b2d9 1996 !ops->get_group_name)
d26bc49f
SW
1997 return -EINVAL;
1998
1999 return 0;
2000}
2001
99e4f675 2002/**
950b0d91 2003 * pinctrl_init_controller() - init a pin controller device
2744e8af
LW
2004 * @pctldesc: descriptor for this pin controller
2005 * @dev: parent device for this pin controller
2006 * @driver_data: private pin controller data for this pin controller
2007 */
0ca4921f
AS
2008static struct pinctrl_dev *
2009pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev,
2010 void *driver_data)
2744e8af 2011{
2744e8af
LW
2012 struct pinctrl_dev *pctldev;
2013 int ret;
2014
da9aecb0 2015 if (!pctldesc)
323de9ef 2016 return ERR_PTR(-EINVAL);
da9aecb0 2017 if (!pctldesc->name)
323de9ef 2018 return ERR_PTR(-EINVAL);
2744e8af 2019
02f5b989 2020 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
2104d12d 2021 if (!pctldev)
323de9ef 2022 return ERR_PTR(-ENOMEM);
b9130b77
TL
2023
2024 /* Initialize pin control device struct */
2025 pctldev->owner = pctldesc->owner;
2026 pctldev->desc = pctldesc;
2027 pctldev->driver_data = driver_data;
2028 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
c033a718 2029#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
c7059c5a 2030 INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL);
a76edc89
TL
2031#endif
2032#ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS
2033 INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL);
c033a718 2034#endif
b9130b77 2035 INIT_LIST_HEAD(&pctldev->gpio_ranges);
46daed6e 2036 INIT_LIST_HEAD(&pctldev->node);
b9130b77 2037 pctldev->dev = dev;
42fed7ba 2038 mutex_init(&pctldev->mutex);
b9130b77 2039
d26bc49f 2040 /* check core ops for sanity */
323de9ef
MY
2041 ret = pinctrl_check_ops(pctldev);
2042 if (ret) {
ad6e1107 2043 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
2044 goto out_err;
2045 }
2046
2744e8af
LW
2047 /* If we're implementing pinmuxing, check the ops for sanity */
2048 if (pctldesc->pmxops) {
323de9ef
MY
2049 ret = pinmux_check_ops(pctldev);
2050 if (ret)
b9130b77 2051 goto out_err;
2744e8af
LW
2052 }
2053
ae6b4d85
LW
2054 /* If we're implementing pinconfig, check the ops for sanity */
2055 if (pctldesc->confops) {
323de9ef
MY
2056 ret = pinconf_check_ops(pctldev);
2057 if (ret)
b9130b77 2058 goto out_err;
ae6b4d85
LW
2059 }
2060
2744e8af 2061 /* Register all the pins */
ad6e1107 2062 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
2063 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
2064 if (ret) {
ad6e1107 2065 dev_err(dev, "error during pin registration\n");
2744e8af
LW
2066 pinctrl_free_pindescs(pctldev, pctldesc->pins,
2067 pctldesc->npins);
51cd24ee 2068 goto out_err;
2744e8af
LW
2069 }
2070
2744e8af
LW
2071 return pctldev;
2072
51cd24ee 2073out_err:
42fed7ba 2074 mutex_destroy(&pctldev->mutex);
51cd24ee 2075 kfree(pctldev);
323de9ef 2076 return ERR_PTR(ret);
2744e8af 2077}
950b0d91 2078
61187142 2079static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev)
950b0d91
TL
2080{
2081 pctldev->p = create_pinctrl(pctldev->dev, pctldev);
61187142
TL
2082 if (PTR_ERR(pctldev->p) == -ENODEV) {
2083 dev_dbg(pctldev->dev, "no hogs found\n");
950b0d91 2084
61187142
TL
2085 return 0;
2086 }
2087
2088 if (IS_ERR(pctldev->p)) {
2089 dev_err(pctldev->dev, "error claiming hogs: %li\n",
2090 PTR_ERR(pctldev->p));
2091
2092 return PTR_ERR(pctldev->p);
2093 }
2094
61187142
TL
2095 pctldev->hog_default =
2096 pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
2097 if (IS_ERR(pctldev->hog_default)) {
2098 dev_dbg(pctldev->dev,
2099 "failed to lookup the default state\n");
2100 } else {
2101 if (pinctrl_select_state(pctldev->p,
2102 pctldev->hog_default))
2103 dev_err(pctldev->dev,
2104 "failed to select default state\n");
2105 }
2106
2107 pctldev->hog_sleep =
2108 pinctrl_lookup_state(pctldev->p,
2109 PINCTRL_STATE_SLEEP);
2110 if (IS_ERR(pctldev->hog_sleep))
2111 dev_dbg(pctldev->dev,
2112 "failed to lookup the sleep state\n");
2113
2114 return 0;
2115}
2116
2117int pinctrl_enable(struct pinctrl_dev *pctldev)
2118{
2119 int error;
2120
2121 error = pinctrl_claim_hogs(pctldev);
2122 if (error) {
2123 dev_err(pctldev->dev, "could not claim hogs: %i\n",
2124 error);
c7892ae1
YY
2125 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
2126 pctldev->desc->npins);
61187142
TL
2127 mutex_destroy(&pctldev->mutex);
2128 kfree(pctldev);
2129
2130 return error;
950b0d91
TL
2131 }
2132
2133 mutex_lock(&pinctrldev_list_mutex);
2134 list_add_tail(&pctldev->node, &pinctrldev_list);
2135 mutex_unlock(&pinctrldev_list_mutex);
2136
2137 pinctrl_init_device_debugfs(pctldev);
2138
2139 return 0;
2140}
61187142 2141EXPORT_SYMBOL_GPL(pinctrl_enable);
950b0d91
TL
2142
2143/**
2144 * pinctrl_register() - register a pin controller device
2145 * @pctldesc: descriptor for this pin controller
2146 * @dev: parent device for this pin controller
2147 * @driver_data: private pin controller data for this pin controller
2148 *
2149 * Note that pinctrl_register() is known to have problems as the pin
2150 * controller driver functions are called before the driver has a
2151 * struct pinctrl_dev handle. To avoid issues later on, please use the
2152 * new pinctrl_register_and_init() below instead.
2153 */
2154struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
2155 struct device *dev, void *driver_data)
2156{
2157 struct pinctrl_dev *pctldev;
2158 int error;
2159
2160 pctldev = pinctrl_init_controller(pctldesc, dev, driver_data);
2161 if (IS_ERR(pctldev))
2162 return pctldev;
2163
61187142
TL
2164 error = pinctrl_enable(pctldev);
2165 if (error)
950b0d91 2166 return ERR_PTR(error);
950b0d91
TL
2167
2168 return pctldev;
950b0d91 2169}
2744e8af
LW
2170EXPORT_SYMBOL_GPL(pinctrl_register);
2171
61187142
TL
2172/**
2173 * pinctrl_register_and_init() - register and init pin controller device
2174 * @pctldesc: descriptor for this pin controller
2175 * @dev: parent device for this pin controller
2176 * @driver_data: private pin controller data for this pin controller
2177 * @pctldev: pin controller device
2178 *
2179 * Note that pinctrl_enable() still needs to be manually called after
2180 * this once the driver is ready.
2181 */
950b0d91
TL
2182int pinctrl_register_and_init(struct pinctrl_desc *pctldesc,
2183 struct device *dev, void *driver_data,
2184 struct pinctrl_dev **pctldev)
2185{
2186 struct pinctrl_dev *p;
950b0d91
TL
2187
2188 p = pinctrl_init_controller(pctldesc, dev, driver_data);
2189 if (IS_ERR(p))
2190 return PTR_ERR(p);
2191
2192 /*
2193 * We have pinctrl_start() call functions in the pin controller
2194 * driver with create_pinctrl() for at least dt_node_to_map(). So
2195 * let's make sure pctldev is properly initialized for the
2196 * pin controller driver before we do anything.
2197 */
2198 *pctldev = p;
2199
950b0d91
TL
2200 return 0;
2201}
2202EXPORT_SYMBOL_GPL(pinctrl_register_and_init);
2203
2744e8af
LW
2204/**
2205 * pinctrl_unregister() - unregister pinmux
2206 * @pctldev: pin controller to unregister
2207 *
2208 * Called by pinmux drivers to unregister a pinmux.
2209 */
2210void pinctrl_unregister(struct pinctrl_dev *pctldev)
2211{
5d589b09 2212 struct pinctrl_gpio_range *range, *n;
3429fb3c 2213
cea234e9 2214 if (!pctldev)
2744e8af
LW
2215 return;
2216
42fed7ba 2217 mutex_lock(&pctldev->mutex);
42fed7ba 2218 pinctrl_remove_device_debugfs(pctldev);
db93facf 2219 mutex_unlock(&pctldev->mutex);
57b676f9 2220
3429fb3c 2221 if (!IS_ERR_OR_NULL(pctldev->p))
42fed7ba 2222 pinctrl_put(pctldev->p);
57b676f9 2223
db93facf
JL
2224 mutex_lock(&pinctrldev_list_mutex);
2225 mutex_lock(&pctldev->mutex);
2744e8af 2226 /* TODO: check that no pinmuxes are still active? */
46daed6e 2227 list_del(&pctldev->node);
a76edc89 2228 pinmux_generic_free_functions(pctldev);
c7059c5a 2229 pinctrl_generic_free_groups(pctldev);
2744e8af
LW
2230 /* Destroy descriptor tree */
2231 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
2232 pctldev->desc->npins);
5d589b09
DA
2233 /* remove gpio ranges map */
2234 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
2235 list_del(&range->node);
2236
42fed7ba
PC
2237 mutex_unlock(&pctldev->mutex);
2238 mutex_destroy(&pctldev->mutex);
51cd24ee 2239 kfree(pctldev);
42fed7ba 2240 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
2241}
2242EXPORT_SYMBOL_GPL(pinctrl_unregister);
2243
80e0f8d9
LD
2244static void devm_pinctrl_dev_release(struct device *dev, void *res)
2245{
2246 struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res;
2247
2248 pinctrl_unregister(pctldev);
2249}
2250
2251static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data)
2252{
2253 struct pctldev **r = res;
2254
3024f920 2255 if (WARN_ON(!r || !*r))
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2256 return 0;
2257
2258 return *r == data;
2259}
2260
2261/**
2262 * devm_pinctrl_register() - Resource managed version of pinctrl_register().
2263 * @dev: parent device for this pin controller
2264 * @pctldesc: descriptor for this pin controller
2265 * @driver_data: private pin controller data for this pin controller
2266 *
2267 * Returns an error pointer if pincontrol register failed. Otherwise
2268 * it returns valid pinctrl handle.
2269 *
2270 * The pinctrl device will be automatically released when the device is unbound.
2271 */
2272struct pinctrl_dev *devm_pinctrl_register(struct device *dev,
2273 struct pinctrl_desc *pctldesc,
2274 void *driver_data)
2275{
2276 struct pinctrl_dev **ptr, *pctldev;
2277
2278 ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL);
2279 if (!ptr)
2280 return ERR_PTR(-ENOMEM);
2281
2282 pctldev = pinctrl_register(pctldesc, dev, driver_data);
2283 if (IS_ERR(pctldev)) {
2284 devres_free(ptr);
2285 return pctldev;
2286 }
2287
2288 *ptr = pctldev;
2289 devres_add(dev, ptr);
2290
2291 return pctldev;
2292}
2293EXPORT_SYMBOL_GPL(devm_pinctrl_register);
2294
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2295/**
2296 * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init
2297 * @dev: parent device for this pin controller
2298 * @pctldesc: descriptor for this pin controller
2299 * @driver_data: private pin controller data for this pin controller
9c340bbb 2300 * @pctldev: pin controller device
950b0d91 2301 *
9c340bbb 2302 * Returns zero on success or an error number on failure.
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2303 *
2304 * The pinctrl device will be automatically released when the device is unbound.
2305 */
2306int devm_pinctrl_register_and_init(struct device *dev,
2307 struct pinctrl_desc *pctldesc,
2308 void *driver_data,
2309 struct pinctrl_dev **pctldev)
2310{
2311 struct pinctrl_dev **ptr;
2312 int error;
2313
2314 ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL);
2315 if (!ptr)
2316 return -ENOMEM;
2317
2318 error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev);
2319 if (error) {
2320 devres_free(ptr);
2321 return error;
2322 }
2323
2324 *ptr = *pctldev;
2325 devres_add(dev, ptr);
2326
2327 return 0;
2328}
2329EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init);
2330
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2331/**
2332 * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister().
129803e6 2333 * @dev: device for which resource was allocated
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2334 * @pctldev: the pinctrl device to unregister.
2335 */
2336void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev)
2337{
2338 WARN_ON(devres_release(dev, devm_pinctrl_dev_release,
2339 devm_pinctrl_dev_match, pctldev));
2340}
2341EXPORT_SYMBOL_GPL(devm_pinctrl_unregister);
2342
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2343static int __init pinctrl_init(void)
2344{
2345 pr_info("initialized pinctrl subsystem\n");
2346 pinctrl_init_debugfs();
2347 return 0;
2348}
2349
2350/* init early since many drivers really need to initialized pinmux early */
2351core_initcall(pinctrl_init);