pinctrl: reserve pins when states are activated
[linux-2.6-block.git] / drivers / pinctrl / core.c
CommitLineData
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1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
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5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
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10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
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12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
a5a697cd 17#include <linux/export.h>
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18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/slab.h>
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21#include <linux/err.h>
22#include <linux/list.h>
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23#include <linux/sysfs.h>
24#include <linux/debugfs.h>
25#include <linux/seq_file.h>
6d4ca1fb 26#include <linux/pinctrl/consumer.h>
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27#include <linux/pinctrl/pinctrl.h>
28#include <linux/pinctrl/machine.h>
29#include "core.h"
57291ce2 30#include "devicetree.h"
2744e8af 31#include "pinmux.h"
ae6b4d85 32#include "pinconf.h"
2744e8af 33
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34/**
35 * struct pinctrl_maps - a list item containing part of the mapping table
36 * @node: mapping table list node
37 * @maps: array of mapping table entries
38 * @num_maps: the number of entries in @maps
39 */
40struct pinctrl_maps {
41 struct list_head node;
42 struct pinctrl_map const *maps;
43 unsigned num_maps;
44};
45
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46static bool pinctrl_dummy_state;
47
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48/* Mutex taken by all entry points */
49DEFINE_MUTEX(pinctrl_mutex);
50
51/* Global list of pin control devices (struct pinctrl_dev) */
57291ce2 52LIST_HEAD(pinctrldev_list);
2744e8af 53
57b676f9 54/* List of pin controller handles (struct pinctrl) */
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55static LIST_HEAD(pinctrl_list);
56
57b676f9 57/* List of pinctrl maps (struct pinctrl_maps) */
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58static LIST_HEAD(pinctrl_maps);
59
60#define for_each_maps(_maps_node_, _i_, _map_) \
61 list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
62 for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
63 _i_ < _maps_node_->num_maps; \
bc66468c 64 _i_++, _map_ = &_maps_node_->maps[_i_])
befe5bdf 65
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66/**
67 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
68 *
69 * Usually this function is called by platforms without pinctrl driver support
70 * but run with some shared drivers using pinctrl APIs.
71 * After calling this function, the pinctrl core will return successfully
72 * with creating a dummy state for the driver to keep going smoothly.
73 */
74void pinctrl_provide_dummies(void)
75{
76 pinctrl_dummy_state = true;
77}
78
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79const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
80{
81 /* We're not allowed to register devices without name */
82 return pctldev->desc->name;
83}
84EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
85
86void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
87{
88 return pctldev->driver_data;
89}
90EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
91
92/**
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93 * get_pinctrl_dev_from_devname() - look up pin controller device
94 * @devname: the name of a device instance, as returned by dev_name()
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95 *
96 * Looks up a pin control device matching a certain device name or pure device
97 * pointer, the pure device pointer will take precedence.
98 */
9dfac4fd 99struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
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100{
101 struct pinctrl_dev *pctldev = NULL;
102 bool found = false;
103
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104 if (!devname)
105 return NULL;
106
2744e8af 107 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 108 if (!strcmp(dev_name(pctldev->dev), devname)) {
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109 /* Matched on device name */
110 found = true;
111 break;
112 }
113 }
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114
115 return found ? pctldev : NULL;
116}
117
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118/**
119 * pin_get_from_name() - look up a pin number from a name
120 * @pctldev: the pin control device to lookup the pin on
121 * @name: the name of the pin to look up
122 */
123int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
124{
706e8520 125 unsigned i, pin;
ae6b4d85 126
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127 /* The pin number can be retrived from the pin controller descriptor */
128 for (i = 0; i < pctldev->desc->npins; i++) {
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129 struct pin_desc *desc;
130
706e8520 131 pin = pctldev->desc->pins[i].number;
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132 desc = pin_desc_get(pctldev, pin);
133 /* Pin space may be sparse */
134 if (desc == NULL)
135 continue;
136 if (desc->name && !strcmp(name, desc->name))
137 return pin;
138 }
139
140 return -EINVAL;
141}
142
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143/**
144 * pin_get_name_from_id() - look up a pin name from a pin id
145 * @pctldev: the pin control device to lookup the pin on
146 * @name: the name of the pin to look up
147 */
148const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
149{
150 const struct pin_desc *desc;
151
152 desc = pin_desc_get(pctldev, pin);
153 if (desc == NULL) {
154 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
155 pin);
156 return NULL;
157 }
158
159 return desc->name;
160}
161
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162/**
163 * pin_is_valid() - check if pin exists on controller
164 * @pctldev: the pin control device to check the pin on
165 * @pin: pin to check, use the local pin controller index number
166 *
167 * This tells us whether a certain pin exist on a certain pin controller or
168 * not. Pin lists may be sparse, so some pins may not exist.
169 */
170bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
171{
172 struct pin_desc *pindesc;
173
174 if (pin < 0)
175 return false;
176
57b676f9 177 mutex_lock(&pinctrl_mutex);
2744e8af 178 pindesc = pin_desc_get(pctldev, pin);
57b676f9 179 mutex_unlock(&pinctrl_mutex);
2744e8af 180
57b676f9 181 return pindesc != NULL;
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182}
183EXPORT_SYMBOL_GPL(pin_is_valid);
184
185/* Deletes a range of pin descriptors */
186static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
187 const struct pinctrl_pin_desc *pins,
188 unsigned num_pins)
189{
190 int i;
191
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192 for (i = 0; i < num_pins; i++) {
193 struct pin_desc *pindesc;
194
195 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
196 pins[i].number);
197 if (pindesc != NULL) {
198 radix_tree_delete(&pctldev->pin_desc_tree,
199 pins[i].number);
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200 if (pindesc->dynamic_name)
201 kfree(pindesc->name);
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202 }
203 kfree(pindesc);
204 }
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205}
206
207static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
208 unsigned number, const char *name)
209{
210 struct pin_desc *pindesc;
211
212 pindesc = pin_desc_get(pctldev, number);
213 if (pindesc != NULL) {
214 pr_err("pin %d already registered on %s\n", number,
215 pctldev->desc->name);
216 return -EINVAL;
217 }
218
219 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
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220 if (pindesc == NULL) {
221 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 222 return -ENOMEM;
95dcd4ae 223 }
ae6b4d85 224
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225 /* Set owner */
226 pindesc->pctldev = pctldev;
227
9af1e44f 228 /* Copy basic pin info */
8dc6ae4d 229 if (name) {
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230 pindesc->name = name;
231 } else {
232 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
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233 if (pindesc->name == NULL) {
234 kfree(pindesc);
ca53c5f1 235 return -ENOMEM;
eb26cc9c 236 }
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237 pindesc->dynamic_name = true;
238 }
2744e8af 239
2744e8af 240 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 241 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 242 number, pindesc->name, pctldev->desc->name);
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243 return 0;
244}
245
246static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
247 struct pinctrl_pin_desc const *pins,
248 unsigned num_descs)
249{
250 unsigned i;
251 int ret = 0;
252
253 for (i = 0; i < num_descs; i++) {
254 ret = pinctrl_register_one_pin(pctldev,
255 pins[i].number, pins[i].name);
256 if (ret)
257 return ret;
258 }
259
260 return 0;
261}
262
263/**
264 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
265 * @pctldev: pin controller device to check
266 * @gpio: gpio pin to check taken from the global GPIO pin space
267 *
268 * Tries to match a GPIO pin number to the ranges handled by a certain pin
269 * controller, return the range or NULL
270 */
271static struct pinctrl_gpio_range *
272pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
273{
274 struct pinctrl_gpio_range *range = NULL;
275
276 /* Loop over the ranges */
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277 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
278 /* Check if we're in the valid range */
279 if (gpio >= range->base &&
280 gpio < range->base + range->npins) {
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281 return range;
282 }
283 }
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284
285 return NULL;
286}
287
288/**
289 * pinctrl_get_device_gpio_range() - find device for GPIO range
290 * @gpio: the pin to locate the pin controller for
291 * @outdev: the pin control device if found
292 * @outrange: the GPIO range if found
293 *
294 * Find the pin controller handling a certain GPIO pin from the pinspace of
295 * the GPIO subsystem, return the device and the matching GPIO range. Returns
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296 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
297 * may still have not been registered.
2744e8af 298 */
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299static int pinctrl_get_device_gpio_range(unsigned gpio,
300 struct pinctrl_dev **outdev,
301 struct pinctrl_gpio_range **outrange)
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302{
303 struct pinctrl_dev *pctldev = NULL;
304
305 /* Loop over the pin controllers */
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306 list_for_each_entry(pctldev, &pinctrldev_list, node) {
307 struct pinctrl_gpio_range *range;
308
309 range = pinctrl_match_gpio_range(pctldev, gpio);
310 if (range != NULL) {
311 *outdev = pctldev;
312 *outrange = range;
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313 return 0;
314 }
315 }
2744e8af 316
4650b7cb 317 return -EPROBE_DEFER;
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318}
319
320/**
321 * pinctrl_add_gpio_range() - register a GPIO range for a controller
322 * @pctldev: pin controller device to add the range to
323 * @range: the GPIO range to add
324 *
325 * This adds a range of GPIOs to be handled by a certain pin controller. Call
326 * this to register handled ranges after registering your pin controller.
327 */
328void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
329 struct pinctrl_gpio_range *range)
330{
57b676f9 331 mutex_lock(&pinctrl_mutex);
8b9c139f 332 list_add_tail(&range->node, &pctldev->gpio_ranges);
57b676f9 333 mutex_unlock(&pinctrl_mutex);
2744e8af 334}
4ecce45d 335EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 336
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337void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
338 struct pinctrl_gpio_range *ranges,
339 unsigned nranges)
340{
341 int i;
342
343 for (i = 0; i < nranges; i++)
344 pinctrl_add_gpio_range(pctldev, &ranges[i]);
345}
346EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
347
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348/**
349 * pinctrl_get_group_selector() - returns the group selector for a group
350 * @pctldev: the pin controller handling the group
351 * @pin_group: the pin group to look up
352 */
353int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
354 const char *pin_group)
355{
356 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 357 unsigned ngroups = pctlops->get_groups_count(pctldev);
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358 unsigned group_selector = 0;
359
d1e90e9e 360 while (group_selector < ngroups) {
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361 const char *gname = pctlops->get_group_name(pctldev,
362 group_selector);
363 if (!strcmp(gname, pin_group)) {
51cd24ee 364 dev_dbg(pctldev->dev,
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365 "found group selector %u for %s\n",
366 group_selector,
367 pin_group);
368 return group_selector;
369 }
370
371 group_selector++;
372 }
373
51cd24ee 374 dev_err(pctldev->dev, "does not have pin group %s\n",
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375 pin_group);
376
377 return -EINVAL;
378}
379
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380/**
381 * pinctrl_request_gpio() - request a single pin to be used in as GPIO
382 * @gpio: the GPIO pin number from the GPIO subsystem number space
383 *
384 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
385 * as part of their gpio_request() semantics, platforms and individual drivers
386 * shall *NOT* request GPIO pins to be muxed in.
387 */
388int pinctrl_request_gpio(unsigned gpio)
389{
390 struct pinctrl_dev *pctldev;
391 struct pinctrl_gpio_range *range;
392 int ret;
393 int pin;
394
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395 mutex_lock(&pinctrl_mutex);
396
befe5bdf 397 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
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398 if (ret) {
399 mutex_unlock(&pinctrl_mutex);
4650b7cb 400 return ret;
57b676f9 401 }
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402
403 /* Convert to the pin controllers number space */
404 pin = gpio - range->base + range->pin_base;
405
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406 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
407
408 mutex_unlock(&pinctrl_mutex);
409 return ret;
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410}
411EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
412
413/**
414 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
415 * @gpio: the GPIO pin number from the GPIO subsystem number space
416 *
417 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
418 * as part of their gpio_free() semantics, platforms and individual drivers
419 * shall *NOT* request GPIO pins to be muxed out.
420 */
421void pinctrl_free_gpio(unsigned gpio)
422{
423 struct pinctrl_dev *pctldev;
424 struct pinctrl_gpio_range *range;
425 int ret;
426 int pin;
427
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428 mutex_lock(&pinctrl_mutex);
429
befe5bdf 430 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
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431 if (ret) {
432 mutex_unlock(&pinctrl_mutex);
befe5bdf 433 return;
57b676f9 434 }
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435
436 /* Convert to the pin controllers number space */
437 pin = gpio - range->base + range->pin_base;
438
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439 pinmux_free_gpio(pctldev, pin, range);
440
441 mutex_unlock(&pinctrl_mutex);
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442}
443EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
444
445static int pinctrl_gpio_direction(unsigned gpio, bool input)
446{
447 struct pinctrl_dev *pctldev;
448 struct pinctrl_gpio_range *range;
449 int ret;
450 int pin;
451
452 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
453 if (ret)
454 return ret;
455
456 /* Convert to the pin controllers number space */
457 pin = gpio - range->base + range->pin_base;
458
459 return pinmux_gpio_direction(pctldev, range, pin, input);
460}
461
462/**
463 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
464 * @gpio: the GPIO pin number from the GPIO subsystem number space
465 *
466 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
467 * as part of their gpio_direction_input() semantics, platforms and individual
468 * drivers shall *NOT* touch pin control GPIO calls.
469 */
470int pinctrl_gpio_direction_input(unsigned gpio)
471{
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472 int ret;
473 mutex_lock(&pinctrl_mutex);
474 ret = pinctrl_gpio_direction(gpio, true);
475 mutex_unlock(&pinctrl_mutex);
476 return ret;
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477}
478EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
479
480/**
481 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
482 * @gpio: the GPIO pin number from the GPIO subsystem number space
483 *
484 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
485 * as part of their gpio_direction_output() semantics, platforms and individual
486 * drivers shall *NOT* touch pin control GPIO calls.
487 */
488int pinctrl_gpio_direction_output(unsigned gpio)
489{
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490 int ret;
491 mutex_lock(&pinctrl_mutex);
492 ret = pinctrl_gpio_direction(gpio, false);
493 mutex_unlock(&pinctrl_mutex);
494 return ret;
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495}
496EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
497
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498static struct pinctrl_state *find_state(struct pinctrl *p,
499 const char *name)
befe5bdf 500{
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501 struct pinctrl_state *state;
502
503 list_for_each_entry(state, &p->states, node)
504 if (!strcmp(state->name, name))
505 return state;
506
507 return NULL;
508}
509
510static struct pinctrl_state *create_state(struct pinctrl *p,
511 const char *name)
512{
513 struct pinctrl_state *state;
514
515 state = kzalloc(sizeof(*state), GFP_KERNEL);
516 if (state == NULL) {
517 dev_err(p->dev,
518 "failed to alloc struct pinctrl_state\n");
519 return ERR_PTR(-ENOMEM);
520 }
521
522 state->name = name;
523 INIT_LIST_HEAD(&state->settings);
524
525 list_add_tail(&state->node, &p->states);
526
527 return state;
528}
529
530static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
531{
532 struct pinctrl_state *state;
7ecdb16f 533 struct pinctrl_setting *setting;
6e5e959d 534 int ret;
befe5bdf 535
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536 state = find_state(p, map->name);
537 if (!state)
538 state = create_state(p, map->name);
539 if (IS_ERR(state))
540 return PTR_ERR(state);
befe5bdf 541
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542 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
543 return 0;
544
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545 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
546 if (setting == NULL) {
547 dev_err(p->dev,
548 "failed to alloc struct pinctrl_setting\n");
549 return -ENOMEM;
550 }
befe5bdf 551
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552 setting->type = map->type;
553
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554 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
555 if (setting->pctldev == NULL) {
c05127c4 556 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
6e5e959d
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557 map->ctrl_dev_name);
558 kfree(setting);
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559 /*
560 * OK let us guess that the driver is not there yet, and
561 * let's defer obtaining this pinctrl handle to later...
562 */
563 return -EPROBE_DEFER;
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564 }
565
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566 setting->dev_name = map->dev_name;
567
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568 switch (map->type) {
569 case PIN_MAP_TYPE_MUX_GROUP:
570 ret = pinmux_map_to_setting(map, setting);
571 break;
572 case PIN_MAP_TYPE_CONFIGS_PIN:
573 case PIN_MAP_TYPE_CONFIGS_GROUP:
574 ret = pinconf_map_to_setting(map, setting);
575 break;
576 default:
577 ret = -EINVAL;
578 break;
579 }
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SW
580 if (ret < 0) {
581 kfree(setting);
582 return ret;
583 }
584
585 list_add_tail(&setting->node, &state->settings);
586
587 return 0;
588}
589
590static struct pinctrl *find_pinctrl(struct device *dev)
591{
592 struct pinctrl *p;
593
1e2082b5 594 list_for_each_entry(p, &pinctrl_list, node)
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SW
595 if (p->dev == dev)
596 return p;
597
598 return NULL;
599}
600
601static void pinctrl_put_locked(struct pinctrl *p, bool inlist);
602
603static struct pinctrl *create_pinctrl(struct device *dev)
604{
605 struct pinctrl *p;
606 const char *devname;
607 struct pinctrl_maps *maps_node;
608 int i;
609 struct pinctrl_map const *map;
610 int ret;
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611
612 /*
613 * create the state cookie holder struct pinctrl for each
614 * mapping, this is what consumers will get when requesting
615 * a pin control handle with pinctrl_get()
616 */
02f5b989 617 p = kzalloc(sizeof(*p), GFP_KERNEL);
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618 if (p == NULL) {
619 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 620 return ERR_PTR(-ENOMEM);
95dcd4ae 621 }
7ecdb16f 622 p->dev = dev;
6e5e959d 623 INIT_LIST_HEAD(&p->states);
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624 INIT_LIST_HEAD(&p->dt_maps);
625
626 ret = pinctrl_dt_to_map(p);
627 if (ret < 0) {
628 kfree(p);
629 return ERR_PTR(ret);
630 }
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SW
631
632 devname = dev_name(dev);
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633
634 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 635 for_each_maps(maps_node, i, map) {
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SW
636 /* Map must be for this device */
637 if (strcmp(map->dev_name, devname))
638 continue;
639
6e5e959d
SW
640 ret = add_setting(p, map);
641 if (ret < 0) {
642 pinctrl_put_locked(p, false);
643 return ERR_PTR(ret);
7ecdb16f 644 }
befe5bdf
LW
645 }
646
befe5bdf 647 /* Add the pinmux to the global list */
8b9c139f 648 list_add_tail(&p->node, &pinctrl_list);
befe5bdf
LW
649
650 return p;
6e5e959d 651}
7ecdb16f 652
6e5e959d
SW
653static struct pinctrl *pinctrl_get_locked(struct device *dev)
654{
655 struct pinctrl *p;
7ecdb16f 656
6e5e959d
SW
657 if (WARN_ON(!dev))
658 return ERR_PTR(-EINVAL);
659
660 p = find_pinctrl(dev);
661 if (p != NULL)
662 return ERR_PTR(-EBUSY);
7ecdb16f 663
d599bfb3 664 return create_pinctrl(dev);
befe5bdf 665}
b2b3e66e
SW
666
667/**
6e5e959d
SW
668 * pinctrl_get() - retrieves the pinctrl handle for a device
669 * @dev: the device to obtain the handle for
b2b3e66e 670 */
6e5e959d 671struct pinctrl *pinctrl_get(struct device *dev)
b2b3e66e
SW
672{
673 struct pinctrl *p;
674
57b676f9 675 mutex_lock(&pinctrl_mutex);
6e5e959d 676 p = pinctrl_get_locked(dev);
57b676f9 677 mutex_unlock(&pinctrl_mutex);
b2b3e66e
SW
678
679 return p;
680}
befe5bdf
LW
681EXPORT_SYMBOL_GPL(pinctrl_get);
682
6e5e959d 683static void pinctrl_put_locked(struct pinctrl *p, bool inlist)
befe5bdf 684{
6e5e959d
SW
685 struct pinctrl_state *state, *n1;
686 struct pinctrl_setting *setting, *n2;
687
688 list_for_each_entry_safe(state, n1, &p->states, node) {
689 list_for_each_entry_safe(setting, n2, &state->settings, node) {
1e2082b5
SW
690 switch (setting->type) {
691 case PIN_MAP_TYPE_MUX_GROUP:
692 if (state == p->state)
693 pinmux_disable_setting(setting);
694 pinmux_free_setting(setting);
695 break;
696 case PIN_MAP_TYPE_CONFIGS_PIN:
697 case PIN_MAP_TYPE_CONFIGS_GROUP:
698 pinconf_free_setting(setting);
699 break;
700 default:
701 break;
702 }
6e5e959d
SW
703 list_del(&setting->node);
704 kfree(setting);
705 }
706 list_del(&state->node);
707 kfree(state);
7ecdb16f 708 }
befe5bdf 709
57291ce2
SW
710 pinctrl_dt_free_maps(p);
711
6e5e959d
SW
712 if (inlist)
713 list_del(&p->node);
befe5bdf
LW
714 kfree(p);
715}
befe5bdf
LW
716
717/**
6e5e959d
SW
718 * pinctrl_put() - release a previously claimed pinctrl handle
719 * @p: the pinctrl handle to release
befe5bdf 720 */
57b676f9
SW
721void pinctrl_put(struct pinctrl *p)
722{
723 mutex_lock(&pinctrl_mutex);
6e5e959d 724 pinctrl_put_locked(p, true);
57b676f9
SW
725 mutex_unlock(&pinctrl_mutex);
726}
727EXPORT_SYMBOL_GPL(pinctrl_put);
728
6e5e959d
SW
729static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p,
730 const char *name)
befe5bdf 731{
6e5e959d 732 struct pinctrl_state *state;
befe5bdf 733
6e5e959d 734 state = find_state(p, name);
5b3aa5f7
DA
735 if (!state) {
736 if (pinctrl_dummy_state) {
737 /* create dummy state */
738 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
739 name);
740 state = create_state(p, name);
d599bfb3
RG
741 } else
742 state = ERR_PTR(-ENODEV);
5b3aa5f7 743 }
57b676f9 744
6e5e959d 745 return state;
befe5bdf 746}
befe5bdf
LW
747
748/**
6e5e959d
SW
749 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
750 * @p: the pinctrl handle to retrieve the state from
751 * @name: the state name to retrieve
befe5bdf 752 */
6e5e959d 753struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name)
57b676f9 754{
6e5e959d
SW
755 struct pinctrl_state *s;
756
57b676f9 757 mutex_lock(&pinctrl_mutex);
6e5e959d 758 s = pinctrl_lookup_state_locked(p, name);
57b676f9 759 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
760
761 return s;
57b676f9 762}
6e5e959d 763EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
57b676f9 764
6e5e959d
SW
765static int pinctrl_select_state_locked(struct pinctrl *p,
766 struct pinctrl_state *state)
befe5bdf 767{
6e5e959d
SW
768 struct pinctrl_setting *setting, *setting2;
769 int ret;
7ecdb16f 770
6e5e959d
SW
771 if (p->state == state)
772 return 0;
befe5bdf 773
6e5e959d
SW
774 if (p->state) {
775 /*
776 * The set of groups with a mux configuration in the old state
777 * may not be identical to the set of groups with a mux setting
778 * in the new state. While this might be unusual, it's entirely
779 * possible for the "user"-supplied mapping table to be written
780 * that way. For each group that was configured in the old state
781 * but not in the new state, this code puts that group into a
782 * safe/disabled state.
783 */
784 list_for_each_entry(setting, &p->state->settings, node) {
785 bool found = false;
1e2082b5
SW
786 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
787 continue;
6e5e959d 788 list_for_each_entry(setting2, &state->settings, node) {
1e2082b5
SW
789 if (setting2->type != PIN_MAP_TYPE_MUX_GROUP)
790 continue;
791 if (setting2->data.mux.group ==
792 setting->data.mux.group) {
6e5e959d
SW
793 found = true;
794 break;
795 }
796 }
797 if (!found)
798 pinmux_disable_setting(setting);
799 }
800 }
801
802 p->state = state;
803
804 /* Apply all the settings for the new state */
805 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
806 switch (setting->type) {
807 case PIN_MAP_TYPE_MUX_GROUP:
808 ret = pinmux_enable_setting(setting);
809 break;
810 case PIN_MAP_TYPE_CONFIGS_PIN:
811 case PIN_MAP_TYPE_CONFIGS_GROUP:
812 ret = pinconf_apply_setting(setting);
813 break;
814 default:
815 ret = -EINVAL;
816 break;
817 }
6e5e959d
SW
818 if (ret < 0) {
819 /* FIXME: Difficult to return to prev state */
820 return ret;
821 }
befe5bdf 822 }
6e5e959d
SW
823
824 return 0;
57b676f9
SW
825}
826
827/**
6e5e959d
SW
828 * pinctrl_select() - select/activate/program a pinctrl state to HW
829 * @p: the pinctrl handle for the device that requests configuratio
830 * @state: the state handle to select/activate/program
57b676f9 831 */
6e5e959d 832int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
57b676f9 833{
6e5e959d
SW
834 int ret;
835
57b676f9 836 mutex_lock(&pinctrl_mutex);
6e5e959d 837 ret = pinctrl_select_state_locked(p, state);
57b676f9 838 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
839
840 return ret;
befe5bdf 841}
6e5e959d 842EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 843
6d4ca1fb
SW
844static void devm_pinctrl_release(struct device *dev, void *res)
845{
846 pinctrl_put(*(struct pinctrl **)res);
847}
848
849/**
850 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
851 * @dev: the device to obtain the handle for
852 *
853 * If there is a need to explicitly destroy the returned struct pinctrl,
854 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
855 */
856struct pinctrl *devm_pinctrl_get(struct device *dev)
857{
858 struct pinctrl **ptr, *p;
859
860 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
861 if (!ptr)
862 return ERR_PTR(-ENOMEM);
863
864 p = pinctrl_get(dev);
865 if (!IS_ERR(p)) {
866 *ptr = p;
867 devres_add(dev, ptr);
868 } else {
869 devres_free(ptr);
870 }
871
872 return p;
873}
874EXPORT_SYMBOL_GPL(devm_pinctrl_get);
875
876static int devm_pinctrl_match(struct device *dev, void *res, void *data)
877{
878 struct pinctrl **p = res;
879
880 return *p == data;
881}
882
883/**
884 * devm_pinctrl_put() - Resource managed pinctrl_put()
885 * @p: the pinctrl handle to release
886 *
887 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
888 * this function will not need to be called and the resource management
889 * code will ensure that the resource is freed.
890 */
891void devm_pinctrl_put(struct pinctrl *p)
892{
893 WARN_ON(devres_destroy(p->dev, devm_pinctrl_release,
894 devm_pinctrl_match, p));
895 pinctrl_put(p);
896}
897EXPORT_SYMBOL_GPL(devm_pinctrl_put);
898
57291ce2
SW
899int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
900 bool dup, bool locked)
befe5bdf 901{
1e2082b5 902 int i, ret;
b2b3e66e 903 struct pinctrl_maps *maps_node;
befe5bdf
LW
904
905 pr_debug("add %d pinmux maps\n", num_maps);
906
907 /* First sanity check the new mapping */
908 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
909 if (!maps[i].dev_name) {
910 pr_err("failed to register map %s (%d): no device given\n",
911 maps[i].name, i);
912 return -EINVAL;
913 }
914
befe5bdf
LW
915 if (!maps[i].name) {
916 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 917 i);
befe5bdf
LW
918 return -EINVAL;
919 }
920
1e2082b5
SW
921 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
922 !maps[i].ctrl_dev_name) {
befe5bdf
LW
923 pr_err("failed to register map %s (%d): no pin control device given\n",
924 maps[i].name, i);
925 return -EINVAL;
926 }
927
1e2082b5
SW
928 switch (maps[i].type) {
929 case PIN_MAP_TYPE_DUMMY_STATE:
930 break;
931 case PIN_MAP_TYPE_MUX_GROUP:
932 ret = pinmux_validate_map(&maps[i], i);
933 if (ret < 0)
fde04f41 934 return ret;
1e2082b5
SW
935 break;
936 case PIN_MAP_TYPE_CONFIGS_PIN:
937 case PIN_MAP_TYPE_CONFIGS_GROUP:
938 ret = pinconf_validate_map(&maps[i], i);
939 if (ret < 0)
fde04f41 940 return ret;
1e2082b5
SW
941 break;
942 default:
943 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 944 maps[i].name, i);
1681f5ae
SW
945 return -EINVAL;
946 }
befe5bdf
LW
947 }
948
b2b3e66e
SW
949 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
950 if (!maps_node) {
951 pr_err("failed to alloc struct pinctrl_maps\n");
952 return -ENOMEM;
953 }
befe5bdf 954
b2b3e66e 955 maps_node->num_maps = num_maps;
57291ce2
SW
956 if (dup) {
957 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
958 GFP_KERNEL);
959 if (!maps_node->maps) {
960 pr_err("failed to duplicate mapping table\n");
961 kfree(maps_node);
962 return -ENOMEM;
963 }
964 } else {
965 maps_node->maps = maps;
befe5bdf
LW
966 }
967
57291ce2
SW
968 if (!locked)
969 mutex_lock(&pinctrl_mutex);
b2b3e66e 970 list_add_tail(&maps_node->node, &pinctrl_maps);
57291ce2
SW
971 if (!locked)
972 mutex_unlock(&pinctrl_mutex);
b2b3e66e 973
befe5bdf
LW
974 return 0;
975}
976
57291ce2
SW
977/**
978 * pinctrl_register_mappings() - register a set of pin controller mappings
979 * @maps: the pincontrol mappings table to register. This should probably be
980 * marked with __initdata so it can be discarded after boot. This
981 * function will perform a shallow copy for the mapping entries.
982 * @num_maps: the number of maps in the mapping table
983 */
984int pinctrl_register_mappings(struct pinctrl_map const *maps,
985 unsigned num_maps)
986{
987 return pinctrl_register_map(maps, num_maps, true, false);
988}
989
990void pinctrl_unregister_map(struct pinctrl_map const *map)
991{
992 struct pinctrl_maps *maps_node;
993
994 list_for_each_entry(maps_node, &pinctrl_maps, node) {
995 if (maps_node->maps == map) {
996 list_del(&maps_node->node);
997 return;
998 }
999 }
1000}
1001
2744e8af
LW
1002#ifdef CONFIG_DEBUG_FS
1003
1004static int pinctrl_pins_show(struct seq_file *s, void *what)
1005{
1006 struct pinctrl_dev *pctldev = s->private;
1007 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1008 unsigned i, pin;
2744e8af
LW
1009
1010 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1011
57b676f9
SW
1012 mutex_lock(&pinctrl_mutex);
1013
706e8520
CP
1014 /* The pin number can be retrived from the pin controller descriptor */
1015 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1016 struct pin_desc *desc;
1017
706e8520 1018 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1019 desc = pin_desc_get(pctldev, pin);
1020 /* Pin space may be sparse */
1021 if (desc == NULL)
1022 continue;
1023
1024 seq_printf(s, "pin %d (%s) ", pin,
1025 desc->name ? desc->name : "unnamed");
1026
1027 /* Driver-specific info per pin */
1028 if (ops->pin_dbg_show)
1029 ops->pin_dbg_show(pctldev, s, pin);
1030
1031 seq_puts(s, "\n");
1032 }
1033
57b676f9
SW
1034 mutex_unlock(&pinctrl_mutex);
1035
2744e8af
LW
1036 return 0;
1037}
1038
1039static int pinctrl_groups_show(struct seq_file *s, void *what)
1040{
1041 struct pinctrl_dev *pctldev = s->private;
1042 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1043 unsigned ngroups, selector = 0;
2744e8af 1044
d1e90e9e 1045 ngroups = ops->get_groups_count(pctldev);
57b676f9
SW
1046 mutex_lock(&pinctrl_mutex);
1047
2744e8af 1048 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1049 while (selector < ngroups) {
a5818a8b 1050 const unsigned *pins;
2744e8af
LW
1051 unsigned num_pins;
1052 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1053 const char *pname;
2744e8af
LW
1054 int ret;
1055 int i;
1056
1057 ret = ops->get_group_pins(pctldev, selector,
1058 &pins, &num_pins);
1059 if (ret)
1060 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1061 gname);
1062 else {
dcb5dbc3
DA
1063 seq_printf(s, "group: %s\n", gname);
1064 for (i = 0; i < num_pins; i++) {
1065 pname = pin_get_name(pctldev, pins[i]);
b4dd784b
WY
1066 if (WARN_ON(!pname)) {
1067 mutex_unlock(&pinctrl_mutex);
dcb5dbc3 1068 return -EINVAL;
b4dd784b 1069 }
dcb5dbc3
DA
1070 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1071 }
1072 seq_puts(s, "\n");
2744e8af
LW
1073 }
1074 selector++;
1075 }
1076
57b676f9 1077 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1078
1079 return 0;
1080}
1081
1082static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1083{
1084 struct pinctrl_dev *pctldev = s->private;
1085 struct pinctrl_gpio_range *range = NULL;
1086
1087 seq_puts(s, "GPIO ranges handled:\n");
1088
57b676f9
SW
1089 mutex_lock(&pinctrl_mutex);
1090
2744e8af 1091 /* Loop over the ranges */
2744e8af 1092 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
75d6642a
LW
1093 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1094 range->id, range->name,
1095 range->base, (range->base + range->npins - 1),
1096 range->pin_base,
1097 (range->pin_base + range->npins - 1));
2744e8af 1098 }
57b676f9
SW
1099
1100 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1101
1102 return 0;
1103}
1104
1105static int pinctrl_devices_show(struct seq_file *s, void *what)
1106{
1107 struct pinctrl_dev *pctldev;
1108
ae6b4d85 1109 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9
SW
1110
1111 mutex_lock(&pinctrl_mutex);
1112
2744e8af
LW
1113 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1114 seq_printf(s, "%s ", pctldev->desc->name);
1115 if (pctldev->desc->pmxops)
ae6b4d85
LW
1116 seq_puts(s, "yes ");
1117 else
1118 seq_puts(s, "no ");
1119 if (pctldev->desc->confops)
2744e8af
LW
1120 seq_puts(s, "yes");
1121 else
1122 seq_puts(s, "no");
1123 seq_puts(s, "\n");
1124 }
57b676f9
SW
1125
1126 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1127
1128 return 0;
1129}
1130
1e2082b5
SW
1131static inline const char *map_type(enum pinctrl_map_type type)
1132{
1133 static const char * const names[] = {
1134 "INVALID",
1135 "DUMMY_STATE",
1136 "MUX_GROUP",
1137 "CONFIGS_PIN",
1138 "CONFIGS_GROUP",
1139 };
1140
1141 if (type >= ARRAY_SIZE(names))
1142 return "UNKNOWN";
1143
1144 return names[type];
1145}
1146
3eedb437
SW
1147static int pinctrl_maps_show(struct seq_file *s, void *what)
1148{
1149 struct pinctrl_maps *maps_node;
1150 int i;
1151 struct pinctrl_map const *map;
1152
1153 seq_puts(s, "Pinctrl maps:\n");
1154
57b676f9
SW
1155 mutex_lock(&pinctrl_mutex);
1156
3eedb437 1157 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1158 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1159 map->dev_name, map->name, map_type(map->type),
1160 map->type);
1161
1162 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1163 seq_printf(s, "controlling device %s\n",
1164 map->ctrl_dev_name);
1165
1166 switch (map->type) {
1167 case PIN_MAP_TYPE_MUX_GROUP:
1168 pinmux_show_map(s, map);
1169 break;
1170 case PIN_MAP_TYPE_CONFIGS_PIN:
1171 case PIN_MAP_TYPE_CONFIGS_GROUP:
1172 pinconf_show_map(s, map);
1173 break;
1174 default:
1175 break;
1176 }
1177
1178 seq_printf(s, "\n");
3eedb437 1179 }
57b676f9
SW
1180
1181 mutex_unlock(&pinctrl_mutex);
3eedb437
SW
1182
1183 return 0;
1184}
1185
befe5bdf
LW
1186static int pinctrl_show(struct seq_file *s, void *what)
1187{
1188 struct pinctrl *p;
6e5e959d 1189 struct pinctrl_state *state;
7ecdb16f 1190 struct pinctrl_setting *setting;
befe5bdf
LW
1191
1192 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9
SW
1193
1194 mutex_lock(&pinctrl_mutex);
1195
befe5bdf 1196 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1197 seq_printf(s, "device: %s current state: %s\n",
1198 dev_name(p->dev),
1199 p->state ? p->state->name : "none");
1200
1201 list_for_each_entry(state, &p->states, node) {
1202 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1203
6e5e959d 1204 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1205 struct pinctrl_dev *pctldev = setting->pctldev;
1206
1207 seq_printf(s, " type: %s controller %s ",
1208 map_type(setting->type),
1209 pinctrl_dev_get_name(pctldev));
1210
1211 switch (setting->type) {
1212 case PIN_MAP_TYPE_MUX_GROUP:
1213 pinmux_show_setting(s, setting);
1214 break;
1215 case PIN_MAP_TYPE_CONFIGS_PIN:
1216 case PIN_MAP_TYPE_CONFIGS_GROUP:
1217 pinconf_show_setting(s, setting);
1218 break;
1219 default:
1220 break;
1221 }
6e5e959d 1222 }
befe5bdf 1223 }
befe5bdf
LW
1224 }
1225
57b676f9
SW
1226 mutex_unlock(&pinctrl_mutex);
1227
befe5bdf
LW
1228 return 0;
1229}
1230
2744e8af
LW
1231static int pinctrl_pins_open(struct inode *inode, struct file *file)
1232{
1233 return single_open(file, pinctrl_pins_show, inode->i_private);
1234}
1235
1236static int pinctrl_groups_open(struct inode *inode, struct file *file)
1237{
1238 return single_open(file, pinctrl_groups_show, inode->i_private);
1239}
1240
1241static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1242{
1243 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1244}
1245
1246static int pinctrl_devices_open(struct inode *inode, struct file *file)
1247{
1248 return single_open(file, pinctrl_devices_show, NULL);
1249}
1250
3eedb437
SW
1251static int pinctrl_maps_open(struct inode *inode, struct file *file)
1252{
1253 return single_open(file, pinctrl_maps_show, NULL);
1254}
1255
befe5bdf
LW
1256static int pinctrl_open(struct inode *inode, struct file *file)
1257{
1258 return single_open(file, pinctrl_show, NULL);
1259}
1260
2744e8af
LW
1261static const struct file_operations pinctrl_pins_ops = {
1262 .open = pinctrl_pins_open,
1263 .read = seq_read,
1264 .llseek = seq_lseek,
1265 .release = single_release,
1266};
1267
1268static const struct file_operations pinctrl_groups_ops = {
1269 .open = pinctrl_groups_open,
1270 .read = seq_read,
1271 .llseek = seq_lseek,
1272 .release = single_release,
1273};
1274
1275static const struct file_operations pinctrl_gpioranges_ops = {
1276 .open = pinctrl_gpioranges_open,
1277 .read = seq_read,
1278 .llseek = seq_lseek,
1279 .release = single_release,
1280};
1281
3eedb437
SW
1282static const struct file_operations pinctrl_devices_ops = {
1283 .open = pinctrl_devices_open,
befe5bdf
LW
1284 .read = seq_read,
1285 .llseek = seq_lseek,
1286 .release = single_release,
1287};
1288
3eedb437
SW
1289static const struct file_operations pinctrl_maps_ops = {
1290 .open = pinctrl_maps_open,
2744e8af
LW
1291 .read = seq_read,
1292 .llseek = seq_lseek,
1293 .release = single_release,
1294};
1295
befe5bdf
LW
1296static const struct file_operations pinctrl_ops = {
1297 .open = pinctrl_open,
1298 .read = seq_read,
1299 .llseek = seq_lseek,
1300 .release = single_release,
1301};
1302
2744e8af
LW
1303static struct dentry *debugfs_root;
1304
1305static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1306{
02157160 1307 struct dentry *device_root;
2744e8af 1308
51cd24ee 1309 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1310 debugfs_root);
02157160
TL
1311 pctldev->device_root = device_root;
1312
2744e8af
LW
1313 if (IS_ERR(device_root) || !device_root) {
1314 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1315 dev_name(pctldev->dev));
2744e8af
LW
1316 return;
1317 }
1318 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1319 device_root, pctldev, &pinctrl_pins_ops);
1320 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1321 device_root, pctldev, &pinctrl_groups_ops);
1322 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1323 device_root, pctldev, &pinctrl_gpioranges_ops);
1324 pinmux_init_device_debugfs(device_root, pctldev);
ae6b4d85 1325 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1326}
1327
02157160
TL
1328static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1329{
1330 debugfs_remove_recursive(pctldev->device_root);
1331}
1332
2744e8af
LW
1333static void pinctrl_init_debugfs(void)
1334{
1335 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1336 if (IS_ERR(debugfs_root) || !debugfs_root) {
1337 pr_warn("failed to create debugfs directory\n");
1338 debugfs_root = NULL;
1339 return;
1340 }
1341
1342 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1343 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1344 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1345 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1346 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1347 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1348}
1349
1350#else /* CONFIG_DEBUG_FS */
1351
1352static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1353{
1354}
1355
1356static void pinctrl_init_debugfs(void)
1357{
1358}
1359
02157160
TL
1360static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1361{
1362}
1363
2744e8af
LW
1364#endif
1365
d26bc49f
SW
1366static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1367{
1368 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1369
1370 if (!ops ||
d1e90e9e 1371 !ops->get_groups_count ||
d26bc49f
SW
1372 !ops->get_group_name ||
1373 !ops->get_group_pins)
1374 return -EINVAL;
1375
57291ce2
SW
1376 if (ops->dt_node_to_map && !ops->dt_free_map)
1377 return -EINVAL;
1378
d26bc49f
SW
1379 return 0;
1380}
1381
2744e8af
LW
1382/**
1383 * pinctrl_register() - register a pin controller device
1384 * @pctldesc: descriptor for this pin controller
1385 * @dev: parent device for this pin controller
1386 * @driver_data: private pin controller data for this pin controller
1387 */
1388struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1389 struct device *dev, void *driver_data)
1390{
2744e8af
LW
1391 struct pinctrl_dev *pctldev;
1392 int ret;
1393
da9aecb0 1394 if (!pctldesc)
2744e8af 1395 return NULL;
da9aecb0 1396 if (!pctldesc->name)
2744e8af
LW
1397 return NULL;
1398
02f5b989 1399 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1400 if (pctldev == NULL) {
1401 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
b9130b77 1402 return NULL;
95dcd4ae 1403 }
b9130b77
TL
1404
1405 /* Initialize pin control device struct */
1406 pctldev->owner = pctldesc->owner;
1407 pctldev->desc = pctldesc;
1408 pctldev->driver_data = driver_data;
1409 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1410 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77
TL
1411 pctldev->dev = dev;
1412
d26bc49f 1413 /* check core ops for sanity */
da9aecb0 1414 if (pinctrl_check_ops(pctldev)) {
ad6e1107 1415 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1416 goto out_err;
1417 }
1418
2744e8af
LW
1419 /* If we're implementing pinmuxing, check the ops for sanity */
1420 if (pctldesc->pmxops) {
da9aecb0 1421 if (pinmux_check_ops(pctldev))
b9130b77 1422 goto out_err;
2744e8af
LW
1423 }
1424
ae6b4d85
LW
1425 /* If we're implementing pinconfig, check the ops for sanity */
1426 if (pctldesc->confops) {
da9aecb0 1427 if (pinconf_check_ops(pctldev))
b9130b77 1428 goto out_err;
ae6b4d85
LW
1429 }
1430
2744e8af 1431 /* Register all the pins */
ad6e1107 1432 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1433 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1434 if (ret) {
ad6e1107 1435 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1436 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1437 pctldesc->npins);
51cd24ee 1438 goto out_err;
2744e8af
LW
1439 }
1440
57b676f9
SW
1441 mutex_lock(&pinctrl_mutex);
1442
8b9c139f 1443 list_add_tail(&pctldev->node, &pinctrldev_list);
57b676f9 1444
6e5e959d
SW
1445 pctldev->p = pinctrl_get_locked(pctldev->dev);
1446 if (!IS_ERR(pctldev->p)) {
1447 struct pinctrl_state *s =
1448 pinctrl_lookup_state_locked(pctldev->p,
1449 PINCTRL_STATE_DEFAULT);
ad6e1107
JC
1450 if (IS_ERR(s)) {
1451 dev_dbg(dev, "failed to lookup the default state\n");
1452 } else {
da9aecb0 1453 if (pinctrl_select_state_locked(pctldev->p, s))
ad6e1107
JC
1454 dev_err(dev,
1455 "failed to select default state\n");
ad6e1107 1456 }
6e5e959d 1457 }
57b676f9
SW
1458
1459 mutex_unlock(&pinctrl_mutex);
1460
2304b473
SW
1461 pinctrl_init_device_debugfs(pctldev);
1462
2744e8af
LW
1463 return pctldev;
1464
51cd24ee
SW
1465out_err:
1466 kfree(pctldev);
2744e8af
LW
1467 return NULL;
1468}
1469EXPORT_SYMBOL_GPL(pinctrl_register);
1470
1471/**
1472 * pinctrl_unregister() - unregister pinmux
1473 * @pctldev: pin controller to unregister
1474 *
1475 * Called by pinmux drivers to unregister a pinmux.
1476 */
1477void pinctrl_unregister(struct pinctrl_dev *pctldev)
1478{
5d589b09 1479 struct pinctrl_gpio_range *range, *n;
2744e8af
LW
1480 if (pctldev == NULL)
1481 return;
1482
02157160 1483 pinctrl_remove_device_debugfs(pctldev);
57b676f9
SW
1484
1485 mutex_lock(&pinctrl_mutex);
1486
6e5e959d
SW
1487 if (!IS_ERR(pctldev->p))
1488 pinctrl_put_locked(pctldev->p, true);
57b676f9 1489
2744e8af 1490 /* TODO: check that no pinmuxes are still active? */
2744e8af 1491 list_del(&pctldev->node);
2744e8af
LW
1492 /* Destroy descriptor tree */
1493 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1494 pctldev->desc->npins);
5d589b09
DA
1495 /* remove gpio ranges map */
1496 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
1497 list_del(&range->node);
1498
51cd24ee 1499 kfree(pctldev);
57b676f9
SW
1500
1501 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1502}
1503EXPORT_SYMBOL_GPL(pinctrl_unregister);
1504
1505static int __init pinctrl_init(void)
1506{
1507 pr_info("initialized pinctrl subsystem\n");
1508 pinctrl_init_debugfs();
1509 return 0;
1510}
1511
1512/* init early since many drivers really need to initialized pinmux early */
1513core_initcall(pinctrl_init);