Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/debugfs.h> |
25 | #include <linux/seq_file.h> | |
6d4ca1fb | 26 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
27 | #include <linux/pinctrl/pinctrl.h> |
28 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
29 | |
30 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 31 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
32 | #endif |
33 | ||
2744e8af | 34 | #include "core.h" |
57291ce2 | 35 | #include "devicetree.h" |
2744e8af | 36 | #include "pinmux.h" |
ae6b4d85 | 37 | #include "pinconf.h" |
2744e8af | 38 | |
b2b3e66e | 39 | |
5b3aa5f7 DA |
40 | static bool pinctrl_dummy_state; |
41 | ||
42fed7ba | 42 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 43 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
44 | |
45 | /* Mutex taken to protect pinctrl_maps */ | |
46 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
47 | ||
48 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 49 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
50 | |
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 52 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 58 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 59 | |
befe5bdf | 60 | |
5b3aa5f7 DA |
61 | /** |
62 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
63 | * | |
64 | * Usually this function is called by platforms without pinctrl driver support | |
65 | * but run with some shared drivers using pinctrl APIs. | |
66 | * After calling this function, the pinctrl core will return successfully | |
67 | * with creating a dummy state for the driver to keep going smoothly. | |
68 | */ | |
69 | void pinctrl_provide_dummies(void) | |
70 | { | |
71 | pinctrl_dummy_state = true; | |
72 | } | |
73 | ||
2744e8af LW |
74 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
75 | { | |
76 | /* We're not allowed to register devices without name */ | |
77 | return pctldev->desc->name; | |
78 | } | |
79 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
80 | ||
d6e99abb HZ |
81 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
82 | { | |
83 | return dev_name(pctldev->dev); | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
86 | ||
2744e8af LW |
87 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
88 | { | |
89 | return pctldev->driver_data; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
92 | ||
93 | /** | |
9dfac4fd LW |
94 | * get_pinctrl_dev_from_devname() - look up pin controller device |
95 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
96 | * |
97 | * Looks up a pin control device matching a certain device name or pure device | |
98 | * pointer, the pure device pointer will take precedence. | |
99 | */ | |
9dfac4fd | 100 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
101 | { |
102 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 103 | |
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
44d5f7bb LW |
107 | mutex_lock(&pinctrldev_list_mutex); |
108 | ||
2744e8af | 109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 110 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 111 | /* Matched on device name */ |
44d5f7bb LW |
112 | mutex_unlock(&pinctrldev_list_mutex); |
113 | return pctldev; | |
2744e8af LW |
114 | } |
115 | } | |
2744e8af | 116 | |
44d5f7bb LW |
117 | mutex_unlock(&pinctrldev_list_mutex); |
118 | ||
119 | return NULL; | |
2744e8af LW |
120 | } |
121 | ||
42fed7ba PC |
122 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
123 | { | |
124 | struct pinctrl_dev *pctldev; | |
125 | ||
126 | mutex_lock(&pinctrldev_list_mutex); | |
127 | ||
128 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
129 | if (pctldev->dev->of_node == np) { | |
130 | mutex_unlock(&pinctrldev_list_mutex); | |
131 | return pctldev; | |
132 | } | |
133 | ||
d463f82d | 134 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
135 | |
136 | return NULL; | |
137 | } | |
138 | ||
ae6b4d85 LW |
139 | /** |
140 | * pin_get_from_name() - look up a pin number from a name | |
141 | * @pctldev: the pin control device to lookup the pin on | |
142 | * @name: the name of the pin to look up | |
143 | */ | |
144 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
145 | { | |
706e8520 | 146 | unsigned i, pin; |
ae6b4d85 | 147 | |
706e8520 CP |
148 | /* The pin number can be retrived from the pin controller descriptor */ |
149 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
150 | struct pin_desc *desc; |
151 | ||
706e8520 | 152 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
153 | desc = pin_desc_get(pctldev, pin); |
154 | /* Pin space may be sparse */ | |
6c325f87 | 155 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
156 | return pin; |
157 | } | |
158 | ||
159 | return -EINVAL; | |
160 | } | |
161 | ||
dcb5dbc3 DA |
162 | /** |
163 | * pin_get_name_from_id() - look up a pin name from a pin id | |
164 | * @pctldev: the pin control device to lookup the pin on | |
165 | * @name: the name of the pin to look up | |
166 | */ | |
167 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
168 | { | |
169 | const struct pin_desc *desc; | |
170 | ||
171 | desc = pin_desc_get(pctldev, pin); | |
cea234e9 | 172 | if (!desc) { |
dcb5dbc3 DA |
173 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", |
174 | pin); | |
175 | return NULL; | |
176 | } | |
177 | ||
178 | return desc->name; | |
179 | } | |
180 | ||
2744e8af LW |
181 | /** |
182 | * pin_is_valid() - check if pin exists on controller | |
183 | * @pctldev: the pin control device to check the pin on | |
184 | * @pin: pin to check, use the local pin controller index number | |
185 | * | |
186 | * This tells us whether a certain pin exist on a certain pin controller or | |
187 | * not. Pin lists may be sparse, so some pins may not exist. | |
188 | */ | |
189 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
190 | { | |
191 | struct pin_desc *pindesc; | |
192 | ||
193 | if (pin < 0) | |
194 | return false; | |
195 | ||
42fed7ba | 196 | mutex_lock(&pctldev->mutex); |
2744e8af | 197 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 198 | mutex_unlock(&pctldev->mutex); |
2744e8af | 199 | |
57b676f9 | 200 | return pindesc != NULL; |
2744e8af LW |
201 | } |
202 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
203 | ||
204 | /* Deletes a range of pin descriptors */ | |
205 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
206 | const struct pinctrl_pin_desc *pins, | |
207 | unsigned num_pins) | |
208 | { | |
209 | int i; | |
210 | ||
2744e8af LW |
211 | for (i = 0; i < num_pins; i++) { |
212 | struct pin_desc *pindesc; | |
213 | ||
214 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
215 | pins[i].number); | |
cea234e9 | 216 | if (pindesc) { |
2744e8af LW |
217 | radix_tree_delete(&pctldev->pin_desc_tree, |
218 | pins[i].number); | |
ca53c5f1 LW |
219 | if (pindesc->dynamic_name) |
220 | kfree(pindesc->name); | |
2744e8af LW |
221 | } |
222 | kfree(pindesc); | |
223 | } | |
2744e8af LW |
224 | } |
225 | ||
226 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 227 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
228 | { |
229 | struct pin_desc *pindesc; | |
230 | ||
cd8f61f1 | 231 | pindesc = pin_desc_get(pctldev, pin->number); |
cea234e9 | 232 | if (pindesc) { |
cd8f61f1 MY |
233 | dev_err(pctldev->dev, "pin %d already registered\n", |
234 | pin->number); | |
2744e8af LW |
235 | return -EINVAL; |
236 | } | |
237 | ||
238 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
2104d12d | 239 | if (!pindesc) |
2744e8af | 240 | return -ENOMEM; |
ae6b4d85 | 241 | |
2744e8af LW |
242 | /* Set owner */ |
243 | pindesc->pctldev = pctldev; | |
244 | ||
9af1e44f | 245 | /* Copy basic pin info */ |
cd8f61f1 MY |
246 | if (pin->name) { |
247 | pindesc->name = pin->name; | |
ca53c5f1 | 248 | } else { |
cd8f61f1 | 249 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
cea234e9 | 250 | if (!pindesc->name) { |
eb26cc9c | 251 | kfree(pindesc); |
ca53c5f1 | 252 | return -ENOMEM; |
eb26cc9c | 253 | } |
ca53c5f1 LW |
254 | pindesc->dynamic_name = true; |
255 | } | |
2744e8af | 256 | |
cd8f61f1 MY |
257 | pindesc->drv_data = pin->drv_data; |
258 | ||
259 | radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); | |
2744e8af | 260 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 261 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
262 | return 0; |
263 | } | |
264 | ||
265 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
3f713b7c | 266 | const struct pinctrl_pin_desc *pins, |
2744e8af LW |
267 | unsigned num_descs) |
268 | { | |
269 | unsigned i; | |
270 | int ret = 0; | |
271 | ||
272 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 273 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
274 | if (ret) |
275 | return ret; | |
276 | } | |
277 | ||
278 | return 0; | |
279 | } | |
280 | ||
c8587eee CR |
281 | /** |
282 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
283 | * @range: GPIO range used for the translation | |
284 | * @gpio: gpio pin to translate to a pin number | |
285 | * | |
286 | * Finds the pin number for a given GPIO using the specified GPIO range | |
287 | * as a base for translation. The distinction between linear GPIO ranges | |
288 | * and pin list based GPIO ranges is managed correctly by this function. | |
289 | * | |
290 | * This function assumes the gpio is part of the specified GPIO range, use | |
291 | * only after making sure this is the case (e.g. by calling it on the | |
292 | * result of successful pinctrl_get_device_gpio_range calls)! | |
293 | */ | |
294 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
295 | unsigned int gpio) | |
296 | { | |
297 | unsigned int offset = gpio - range->base; | |
298 | if (range->pins) | |
299 | return range->pins[offset]; | |
300 | else | |
301 | return range->pin_base + offset; | |
302 | } | |
303 | ||
2744e8af LW |
304 | /** |
305 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
306 | * @pctldev: pin controller device to check | |
307 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
308 | * | |
309 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
310 | * controller, return the range or NULL | |
311 | */ | |
312 | static struct pinctrl_gpio_range * | |
313 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
314 | { | |
315 | struct pinctrl_gpio_range *range = NULL; | |
316 | ||
42fed7ba | 317 | mutex_lock(&pctldev->mutex); |
2744e8af | 318 | /* Loop over the ranges */ |
2744e8af LW |
319 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
320 | /* Check if we're in the valid range */ | |
321 | if (gpio >= range->base && | |
322 | gpio < range->base + range->npins) { | |
42fed7ba | 323 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
324 | return range; |
325 | } | |
326 | } | |
42fed7ba | 327 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
328 | return NULL; |
329 | } | |
330 | ||
51e13c24 HZ |
331 | /** |
332 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
333 | * the same GPIO chip are in range | |
334 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
335 | * | |
336 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
337 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
338 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
339 | * of the same GPIO chip don't have back-end pinctrl interface. | |
340 | * If the return value is true, it means that pinctrl device is ready & the | |
341 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
342 | * is false, it means that pinctrl device may not be ready. | |
343 | */ | |
2afe8229 | 344 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
345 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
346 | { | |
347 | struct pinctrl_dev *pctldev; | |
348 | struct pinctrl_gpio_range *range = NULL; | |
349 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
350 | ||
942cde72 TL |
351 | if (WARN(!chip, "no gpio_chip for gpio%i?", gpio)) |
352 | return false; | |
353 | ||
44d5f7bb LW |
354 | mutex_lock(&pinctrldev_list_mutex); |
355 | ||
51e13c24 HZ |
356 | /* Loop over the pin controllers */ |
357 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
358 | /* Loop over the ranges */ | |
5ffbe2e6 | 359 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
360 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
361 | /* Check if any gpio range overlapped with gpio chip */ | |
362 | if (range->base + range->npins - 1 < chip->base || | |
363 | range->base > chip->base + chip->ngpio - 1) | |
364 | continue; | |
5ffbe2e6 | 365 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 366 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
367 | return true; |
368 | } | |
5ffbe2e6 | 369 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 370 | } |
44d5f7bb LW |
371 | |
372 | mutex_unlock(&pinctrldev_list_mutex); | |
373 | ||
51e13c24 HZ |
374 | return false; |
375 | } | |
2afe8229 HZ |
376 | #else |
377 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
378 | #endif | |
51e13c24 | 379 | |
2744e8af LW |
380 | /** |
381 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
382 | * @gpio: the pin to locate the pin controller for | |
383 | * @outdev: the pin control device if found | |
384 | * @outrange: the GPIO range if found | |
385 | * | |
386 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
387 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
388 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
389 | * may still have not been registered. | |
2744e8af | 390 | */ |
4ecce45d SW |
391 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
392 | struct pinctrl_dev **outdev, | |
393 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
394 | { |
395 | struct pinctrl_dev *pctldev = NULL; | |
396 | ||
f0059021 AL |
397 | mutex_lock(&pinctrldev_list_mutex); |
398 | ||
2744e8af | 399 | /* Loop over the pin controllers */ |
2744e8af LW |
400 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
401 | struct pinctrl_gpio_range *range; | |
402 | ||
403 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
cea234e9 | 404 | if (range) { |
2744e8af LW |
405 | *outdev = pctldev; |
406 | *outrange = range; | |
f0059021 | 407 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
408 | return 0; |
409 | } | |
410 | } | |
2744e8af | 411 | |
f0059021 AL |
412 | mutex_unlock(&pinctrldev_list_mutex); |
413 | ||
4650b7cb | 414 | return -EPROBE_DEFER; |
2744e8af LW |
415 | } |
416 | ||
417 | /** | |
418 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
419 | * @pctldev: pin controller device to add the range to | |
420 | * @range: the GPIO range to add | |
421 | * | |
422 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
423 | * this to register handled ranges after registering your pin controller. | |
424 | */ | |
425 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
426 | struct pinctrl_gpio_range *range) | |
427 | { | |
42fed7ba | 428 | mutex_lock(&pctldev->mutex); |
8b9c139f | 429 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 430 | mutex_unlock(&pctldev->mutex); |
2744e8af | 431 | } |
4ecce45d | 432 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 433 | |
3e5e00b6 DA |
434 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
435 | struct pinctrl_gpio_range *ranges, | |
436 | unsigned nranges) | |
437 | { | |
438 | int i; | |
439 | ||
440 | for (i = 0; i < nranges; i++) | |
441 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
442 | } | |
443 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
444 | ||
192c369c | 445 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
446 | struct pinctrl_gpio_range *range) |
447 | { | |
42fed7ba PC |
448 | struct pinctrl_dev *pctldev; |
449 | ||
42fed7ba | 450 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 451 | |
dfa97515 LW |
452 | /* |
453 | * If we can't find this device, let's assume that is because | |
454 | * it has not probed yet, so the driver trying to register this | |
455 | * range need to defer probing. | |
456 | */ | |
42fed7ba | 457 | if (!pctldev) { |
dfa97515 | 458 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 459 | } |
f23f1516 | 460 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 461 | |
f23f1516 SH |
462 | return pctldev; |
463 | } | |
192c369c | 464 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 465 | |
586a87e6 CR |
466 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
467 | const unsigned **pins, unsigned *num_pins) | |
468 | { | |
469 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
470 | int gs; | |
471 | ||
e5b3b2d9 AT |
472 | if (!pctlops->get_group_pins) |
473 | return -EINVAL; | |
474 | ||
586a87e6 CR |
475 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
476 | if (gs < 0) | |
477 | return gs; | |
478 | ||
479 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
480 | } | |
481 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
482 | ||
9afbefb2 | 483 | struct pinctrl_gpio_range * |
b18537cd JE |
484 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
485 | unsigned int pin) | |
9afbefb2 | 486 | { |
c8f50e86 | 487 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
488 | |
489 | /* Loop over the ranges */ | |
490 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
491 | /* Check if we're in the valid range */ | |
c8587eee CR |
492 | if (range->pins) { |
493 | int a; | |
494 | for (a = 0; a < range->npins; a++) { | |
495 | if (range->pins[a] == pin) | |
b18537cd | 496 | return range; |
c8587eee CR |
497 | } |
498 | } else if (pin >= range->pin_base && | |
c8f50e86 | 499 | pin < range->pin_base + range->npins) |
b18537cd | 500 | return range; |
9afbefb2 | 501 | } |
b18537cd JE |
502 | |
503 | return NULL; | |
504 | } | |
505 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
506 | ||
507 | /** | |
508 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
509 | * @pctldev: the pin controller device to look in | |
510 | * @pin: a controller-local number to find the range for | |
511 | */ | |
512 | struct pinctrl_gpio_range * | |
513 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
514 | unsigned int pin) | |
515 | { | |
516 | struct pinctrl_gpio_range *range; | |
517 | ||
518 | mutex_lock(&pctldev->mutex); | |
519 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 520 | mutex_unlock(&pctldev->mutex); |
b18537cd | 521 | |
c8f50e86 | 522 | return range; |
9afbefb2 LW |
523 | } |
524 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
525 | ||
7e10ee68 | 526 | /** |
50842cbd | 527 | * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller |
7e10ee68 VK |
528 | * @pctldev: pin controller device to remove the range from |
529 | * @range: the GPIO range to remove | |
530 | */ | |
531 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
532 | struct pinctrl_gpio_range *range) | |
533 | { | |
42fed7ba | 534 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 535 | list_del(&range->node); |
42fed7ba | 536 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
537 | } |
538 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
539 | ||
c033a718 | 540 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
541 | |
542 | /** | |
543 | * pinctrl_generic_get_group_count() - returns the number of pin groups | |
544 | * @pctldev: pin controller device | |
545 | */ | |
546 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev) | |
547 | { | |
548 | return pctldev->num_groups; | |
549 | } | |
550 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count); | |
551 | ||
552 | /** | |
553 | * pinctrl_generic_get_group_name() - returns the name of a pin group | |
554 | * @pctldev: pin controller device | |
555 | * @selector: group number | |
556 | */ | |
557 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
558 | unsigned int selector) | |
559 | { | |
560 | struct group_desc *group; | |
561 | ||
562 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
563 | selector); | |
564 | if (!group) | |
565 | return NULL; | |
566 | ||
567 | return group->name; | |
568 | } | |
569 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); | |
570 | ||
571 | /** | |
572 | * pinctrl_generic_get_group_pins() - gets the pin group pins | |
573 | * @pctldev: pin controller device | |
574 | * @selector: group number | |
575 | * @pins: pins in the group | |
576 | * @num_pins: number of pins in the group | |
577 | */ | |
578 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
579 | unsigned int selector, | |
580 | const unsigned int **pins, | |
581 | unsigned int *num_pins) | |
582 | { | |
583 | struct group_desc *group; | |
584 | ||
585 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
586 | selector); | |
587 | if (!group) { | |
588 | dev_err(pctldev->dev, "%s could not find pingroup%i\n", | |
589 | __func__, selector); | |
590 | return -EINVAL; | |
591 | } | |
592 | ||
593 | *pins = group->pins; | |
594 | *num_pins = group->num_pins; | |
595 | ||
596 | return 0; | |
597 | } | |
598 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins); | |
599 | ||
600 | /** | |
601 | * pinctrl_generic_get_group() - returns a pin group based on the number | |
602 | * @pctldev: pin controller device | |
603 | * @gselector: group number | |
604 | */ | |
605 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
606 | unsigned int selector) | |
607 | { | |
608 | struct group_desc *group; | |
609 | ||
610 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
611 | selector); | |
612 | if (!group) | |
613 | return NULL; | |
614 | ||
615 | return group; | |
616 | } | |
617 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group); | |
618 | ||
a203728a TL |
619 | static int pinctrl_generic_group_name_to_selector(struct pinctrl_dev *pctldev, |
620 | const char *function) | |
621 | { | |
622 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
623 | int ngroups = ops->get_groups_count(pctldev); | |
624 | int selector = 0; | |
625 | ||
626 | /* See if this pctldev has this group */ | |
627 | while (selector < ngroups) { | |
628 | const char *gname = ops->get_group_name(pctldev, selector); | |
629 | ||
54a58185 | 630 | if (gname && !strcmp(function, gname)) |
a203728a TL |
631 | return selector; |
632 | ||
633 | selector++; | |
634 | } | |
635 | ||
636 | return -EINVAL; | |
637 | } | |
638 | ||
c7059c5a TL |
639 | /** |
640 | * pinctrl_generic_add_group() - adds a new pin group | |
641 | * @pctldev: pin controller device | |
642 | * @name: name of the pin group | |
643 | * @pins: pins in the pin group | |
644 | * @num_pins: number of pins in the pin group | |
645 | * @data: pin controller driver specific data | |
646 | * | |
647 | * Note that the caller must take care of locking. | |
648 | */ | |
649 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
650 | int *pins, int num_pins, void *data) | |
651 | { | |
652 | struct group_desc *group; | |
a203728a TL |
653 | int selector; |
654 | ||
655 | if (!name) | |
656 | return -EINVAL; | |
657 | ||
658 | selector = pinctrl_generic_group_name_to_selector(pctldev, name); | |
659 | if (selector >= 0) | |
660 | return selector; | |
661 | ||
662 | selector = pctldev->num_groups; | |
c7059c5a TL |
663 | |
664 | group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL); | |
665 | if (!group) | |
666 | return -ENOMEM; | |
667 | ||
668 | group->name = name; | |
669 | group->pins = pins; | |
670 | group->num_pins = num_pins; | |
671 | group->data = data; | |
672 | ||
a203728a | 673 | radix_tree_insert(&pctldev->pin_group_tree, selector, group); |
c7059c5a TL |
674 | |
675 | pctldev->num_groups++; | |
676 | ||
a203728a | 677 | return selector; |
c7059c5a TL |
678 | } |
679 | EXPORT_SYMBOL_GPL(pinctrl_generic_add_group); | |
680 | ||
681 | /** | |
682 | * pinctrl_generic_remove_group() - removes a numbered pin group | |
683 | * @pctldev: pin controller device | |
684 | * @selector: group number | |
685 | * | |
686 | * Note that the caller must take care of locking. | |
687 | */ | |
688 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
689 | unsigned int selector) | |
690 | { | |
691 | struct group_desc *group; | |
692 | ||
693 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
694 | selector); | |
695 | if (!group) | |
696 | return -ENOENT; | |
697 | ||
698 | radix_tree_delete(&pctldev->pin_group_tree, selector); | |
699 | devm_kfree(pctldev->dev, group); | |
700 | ||
701 | pctldev->num_groups--; | |
702 | ||
703 | return 0; | |
704 | } | |
705 | EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); | |
706 | ||
707 | /** | |
708 | * pinctrl_generic_free_groups() - removes all pin groups | |
709 | * @pctldev: pin controller device | |
710 | * | |
664b7c47 TL |
711 | * Note that the caller must take care of locking. The pinctrl groups |
712 | * are allocated with devm_kzalloc() so no need to free them here. | |
c7059c5a TL |
713 | */ |
714 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
715 | { | |
716 | struct radix_tree_iter iter; | |
906a2a39 | 717 | void __rcu **slot; |
c7059c5a TL |
718 | |
719 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) | |
664b7c47 | 720 | radix_tree_delete(&pctldev->pin_group_tree, iter.index); |
c7059c5a TL |
721 | |
722 | pctldev->num_groups = 0; | |
723 | } | |
724 | ||
725 | #else | |
726 | static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
727 | { | |
728 | } | |
c033a718 | 729 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 730 | |
7afde8ba LW |
731 | /** |
732 | * pinctrl_get_group_selector() - returns the group selector for a group | |
733 | * @pctldev: the pin controller handling the group | |
734 | * @pin_group: the pin group to look up | |
735 | */ | |
736 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
737 | const char *pin_group) | |
738 | { | |
739 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 740 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
741 | unsigned group_selector = 0; |
742 | ||
d1e90e9e | 743 | while (group_selector < ngroups) { |
7afde8ba LW |
744 | const char *gname = pctlops->get_group_name(pctldev, |
745 | group_selector); | |
54a58185 | 746 | if (gname && !strcmp(gname, pin_group)) { |
51cd24ee | 747 | dev_dbg(pctldev->dev, |
7afde8ba LW |
748 | "found group selector %u for %s\n", |
749 | group_selector, | |
750 | pin_group); | |
751 | return group_selector; | |
752 | } | |
753 | ||
754 | group_selector++; | |
755 | } | |
756 | ||
51cd24ee | 757 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
758 | pin_group); |
759 | ||
760 | return -EINVAL; | |
761 | } | |
762 | ||
befe5bdf | 763 | /** |
a9a1d2a7 | 764 | * pinctrl_gpio_request() - request a single pin to be used as GPIO |
befe5bdf LW |
765 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
766 | * | |
767 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
768 | * as part of their gpio_request() semantics, platforms and individual drivers | |
769 | * shall *NOT* request GPIO pins to be muxed in. | |
770 | */ | |
a9a1d2a7 | 771 | int pinctrl_gpio_request(unsigned gpio) |
befe5bdf LW |
772 | { |
773 | struct pinctrl_dev *pctldev; | |
774 | struct pinctrl_gpio_range *range; | |
775 | int ret; | |
776 | int pin; | |
777 | ||
778 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 779 | if (ret) { |
51e13c24 HZ |
780 | if (pinctrl_ready_for_gpio_range(gpio)) |
781 | ret = 0; | |
4650b7cb | 782 | return ret; |
57b676f9 | 783 | } |
befe5bdf | 784 | |
9b77ace4 AL |
785 | mutex_lock(&pctldev->mutex); |
786 | ||
befe5bdf | 787 | /* Convert to the pin controllers number space */ |
c8587eee | 788 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 789 | |
57b676f9 SW |
790 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
791 | ||
9b77ace4 AL |
792 | mutex_unlock(&pctldev->mutex); |
793 | ||
57b676f9 | 794 | return ret; |
befe5bdf | 795 | } |
a9a1d2a7 | 796 | EXPORT_SYMBOL_GPL(pinctrl_gpio_request); |
befe5bdf LW |
797 | |
798 | /** | |
a9a1d2a7 | 799 | * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO |
befe5bdf LW |
800 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
801 | * | |
802 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
803 | * as part of their gpio_free() semantics, platforms and individual drivers | |
804 | * shall *NOT* request GPIO pins to be muxed out. | |
805 | */ | |
a9a1d2a7 | 806 | void pinctrl_gpio_free(unsigned gpio) |
befe5bdf LW |
807 | { |
808 | struct pinctrl_dev *pctldev; | |
809 | struct pinctrl_gpio_range *range; | |
810 | int ret; | |
811 | int pin; | |
812 | ||
813 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 814 | if (ret) { |
befe5bdf | 815 | return; |
57b676f9 | 816 | } |
42fed7ba | 817 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
818 | |
819 | /* Convert to the pin controllers number space */ | |
c8587eee | 820 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 821 | |
57b676f9 SW |
822 | pinmux_free_gpio(pctldev, pin, range); |
823 | ||
42fed7ba | 824 | mutex_unlock(&pctldev->mutex); |
befe5bdf | 825 | } |
a9a1d2a7 | 826 | EXPORT_SYMBOL_GPL(pinctrl_gpio_free); |
befe5bdf LW |
827 | |
828 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
829 | { | |
830 | struct pinctrl_dev *pctldev; | |
831 | struct pinctrl_gpio_range *range; | |
832 | int ret; | |
833 | int pin; | |
834 | ||
835 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 836 | if (ret) { |
befe5bdf | 837 | return ret; |
42fed7ba PC |
838 | } |
839 | ||
840 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
841 | |
842 | /* Convert to the pin controllers number space */ | |
c8587eee | 843 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
844 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
845 | ||
846 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 847 | |
42fed7ba | 848 | return ret; |
befe5bdf LW |
849 | } |
850 | ||
851 | /** | |
852 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
853 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
854 | * | |
855 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
856 | * as part of their gpio_direction_input() semantics, platforms and individual | |
857 | * drivers shall *NOT* touch pin control GPIO calls. | |
858 | */ | |
859 | int pinctrl_gpio_direction_input(unsigned gpio) | |
860 | { | |
42fed7ba | 861 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
862 | } |
863 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
864 | ||
865 | /** | |
866 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
867 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
868 | * | |
869 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
870 | * as part of their gpio_direction_output() semantics, platforms and individual | |
871 | * drivers shall *NOT* touch pin control GPIO calls. | |
872 | */ | |
873 | int pinctrl_gpio_direction_output(unsigned gpio) | |
874 | { | |
42fed7ba | 875 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
876 | } |
877 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
878 | ||
15381bc7 MW |
879 | /** |
880 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin | |
881 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
882 | * @config: the configuration to apply to the GPIO | |
883 | * | |
884 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | |
885 | * they need to call the underlying pin controller to change GPIO config | |
886 | * (for example set debounce time). | |
887 | */ | |
888 | int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) | |
889 | { | |
890 | unsigned long configs[] = { config }; | |
891 | struct pinctrl_gpio_range *range; | |
892 | struct pinctrl_dev *pctldev; | |
893 | int ret, pin; | |
894 | ||
895 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
896 | if (ret) | |
897 | return ret; | |
898 | ||
899 | mutex_lock(&pctldev->mutex); | |
900 | pin = gpio_to_pin(range, gpio); | |
901 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); | |
902 | mutex_unlock(&pctldev->mutex); | |
903 | ||
904 | return ret; | |
905 | } | |
906 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); | |
907 | ||
6e5e959d SW |
908 | static struct pinctrl_state *find_state(struct pinctrl *p, |
909 | const char *name) | |
befe5bdf | 910 | { |
6e5e959d SW |
911 | struct pinctrl_state *state; |
912 | ||
913 | list_for_each_entry(state, &p->states, node) | |
914 | if (!strcmp(state->name, name)) | |
915 | return state; | |
916 | ||
917 | return NULL; | |
918 | } | |
919 | ||
920 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
921 | const char *name) | |
922 | { | |
923 | struct pinctrl_state *state; | |
924 | ||
925 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
2104d12d | 926 | if (!state) |
6e5e959d | 927 | return ERR_PTR(-ENOMEM); |
6e5e959d SW |
928 | |
929 | state->name = name; | |
930 | INIT_LIST_HEAD(&state->settings); | |
931 | ||
932 | list_add_tail(&state->node, &p->states); | |
933 | ||
934 | return state; | |
935 | } | |
936 | ||
99e4f675 | 937 | static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev, |
3f713b7c | 938 | const struct pinctrl_map *map) |
6e5e959d SW |
939 | { |
940 | struct pinctrl_state *state; | |
7ecdb16f | 941 | struct pinctrl_setting *setting; |
6e5e959d | 942 | int ret; |
befe5bdf | 943 | |
6e5e959d SW |
944 | state = find_state(p, map->name); |
945 | if (!state) | |
946 | state = create_state(p, map->name); | |
947 | if (IS_ERR(state)) | |
948 | return PTR_ERR(state); | |
befe5bdf | 949 | |
1e2082b5 SW |
950 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
951 | return 0; | |
952 | ||
6e5e959d | 953 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
2104d12d | 954 | if (!setting) |
6e5e959d | 955 | return -ENOMEM; |
befe5bdf | 956 | |
1e2082b5 SW |
957 | setting->type = map->type; |
958 | ||
99e4f675 TL |
959 | if (pctldev) |
960 | setting->pctldev = pctldev; | |
961 | else | |
962 | setting->pctldev = | |
963 | get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
cea234e9 | 964 | if (!setting->pctldev) { |
6e5e959d | 965 | kfree(setting); |
89216494 LW |
966 | /* Do not defer probing of hogs (circular loop) */ |
967 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
968 | return -ENODEV; | |
c05127c4 LW |
969 | /* |
970 | * OK let us guess that the driver is not there yet, and | |
971 | * let's defer obtaining this pinctrl handle to later... | |
972 | */ | |
89216494 LW |
973 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
974 | map->ctrl_dev_name); | |
c05127c4 | 975 | return -EPROBE_DEFER; |
6e5e959d SW |
976 | } |
977 | ||
1a78958d LW |
978 | setting->dev_name = map->dev_name; |
979 | ||
1e2082b5 SW |
980 | switch (map->type) { |
981 | case PIN_MAP_TYPE_MUX_GROUP: | |
982 | ret = pinmux_map_to_setting(map, setting); | |
983 | break; | |
984 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
985 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
986 | ret = pinconf_map_to_setting(map, setting); | |
987 | break; | |
988 | default: | |
989 | ret = -EINVAL; | |
990 | break; | |
991 | } | |
6e5e959d SW |
992 | if (ret < 0) { |
993 | kfree(setting); | |
994 | return ret; | |
995 | } | |
996 | ||
997 | list_add_tail(&setting->node, &state->settings); | |
998 | ||
999 | return 0; | |
1000 | } | |
1001 | ||
1002 | static struct pinctrl *find_pinctrl(struct device *dev) | |
1003 | { | |
1004 | struct pinctrl *p; | |
1005 | ||
42fed7ba | 1006 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 1007 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
1008 | if (p->dev == dev) { |
1009 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 1010 | return p; |
42fed7ba | 1011 | } |
6e5e959d | 1012 | |
42fed7ba | 1013 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
1014 | return NULL; |
1015 | } | |
1016 | ||
42fed7ba | 1017 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d | 1018 | |
99e4f675 TL |
1019 | static struct pinctrl *create_pinctrl(struct device *dev, |
1020 | struct pinctrl_dev *pctldev) | |
6e5e959d SW |
1021 | { |
1022 | struct pinctrl *p; | |
1023 | const char *devname; | |
1024 | struct pinctrl_maps *maps_node; | |
1025 | int i; | |
3f713b7c | 1026 | const struct pinctrl_map *map; |
6e5e959d | 1027 | int ret; |
befe5bdf LW |
1028 | |
1029 | /* | |
1030 | * create the state cookie holder struct pinctrl for each | |
1031 | * mapping, this is what consumers will get when requesting | |
1032 | * a pin control handle with pinctrl_get() | |
1033 | */ | |
02f5b989 | 1034 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
2104d12d | 1035 | if (!p) |
befe5bdf | 1036 | return ERR_PTR(-ENOMEM); |
7ecdb16f | 1037 | p->dev = dev; |
6e5e959d | 1038 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
1039 | INIT_LIST_HEAD(&p->dt_maps); |
1040 | ||
99e4f675 | 1041 | ret = pinctrl_dt_to_map(p, pctldev); |
57291ce2 SW |
1042 | if (ret < 0) { |
1043 | kfree(p); | |
1044 | return ERR_PTR(ret); | |
1045 | } | |
6e5e959d SW |
1046 | |
1047 | devname = dev_name(dev); | |
befe5bdf | 1048 | |
42fed7ba | 1049 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 1050 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 1051 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
1052 | /* Map must be for this device */ |
1053 | if (strcmp(map->dev_name, devname)) | |
1054 | continue; | |
7f0ff06c NY |
1055 | /* |
1056 | * If pctldev is not null, we are claiming hog for it, | |
1057 | * that means, setting that is served by pctldev by itself. | |
1058 | * | |
1059 | * Thus we must skip map that is for this device but is served | |
1060 | * by other device. | |
1061 | */ | |
1062 | if (pctldev && | |
1063 | strcmp(dev_name(pctldev->dev), map->ctrl_dev_name)) | |
1064 | continue; | |
7ecdb16f | 1065 | |
99e4f675 | 1066 | ret = add_setting(p, pctldev, map); |
89216494 LW |
1067 | /* |
1068 | * At this point the adding of a setting may: | |
1069 | * | |
1070 | * - Defer, if the pinctrl device is not yet available | |
1071 | * - Fail, if the pinctrl device is not yet available, | |
1072 | * AND the setting is a hog. We cannot defer that, since | |
1073 | * the hog will kick in immediately after the device | |
1074 | * is registered. | |
1075 | * | |
1076 | * If the error returned was not -EPROBE_DEFER then we | |
1077 | * accumulate the errors to see if we end up with | |
1078 | * an -EPROBE_DEFER later, as that is the worst case. | |
1079 | */ | |
1080 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
1081 | pinctrl_free(p, false); |
1082 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 1083 | return ERR_PTR(ret); |
7ecdb16f | 1084 | } |
befe5bdf | 1085 | } |
42fed7ba PC |
1086 | mutex_unlock(&pinctrl_maps_mutex); |
1087 | ||
89216494 | 1088 | if (ret < 0) { |
3ec440e3 | 1089 | /* If some other error than deferral occurred, return here */ |
42fed7ba | 1090 | pinctrl_free(p, false); |
89216494 LW |
1091 | return ERR_PTR(ret); |
1092 | } | |
befe5bdf | 1093 | |
ab78029e LW |
1094 | kref_init(&p->users); |
1095 | ||
b0666ba4 | 1096 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 1097 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 1098 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 1099 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
1100 | |
1101 | return p; | |
6e5e959d | 1102 | } |
7ecdb16f | 1103 | |
42fed7ba PC |
1104 | /** |
1105 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
1106 | * @dev: the device to obtain the handle for | |
1107 | */ | |
1108 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
1109 | { |
1110 | struct pinctrl *p; | |
7ecdb16f | 1111 | |
6e5e959d SW |
1112 | if (WARN_ON(!dev)) |
1113 | return ERR_PTR(-EINVAL); | |
1114 | ||
ab78029e LW |
1115 | /* |
1116 | * See if somebody else (such as the device core) has already | |
1117 | * obtained a handle to the pinctrl for this device. In that case, | |
1118 | * return another pointer to it. | |
1119 | */ | |
6e5e959d | 1120 | p = find_pinctrl(dev); |
cea234e9 | 1121 | if (p) { |
ab78029e LW |
1122 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); |
1123 | kref_get(&p->users); | |
1124 | return p; | |
1125 | } | |
7ecdb16f | 1126 | |
99e4f675 | 1127 | return create_pinctrl(dev, NULL); |
befe5bdf LW |
1128 | } |
1129 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
1130 | ||
d3cee830 RG |
1131 | static void pinctrl_free_setting(bool disable_setting, |
1132 | struct pinctrl_setting *setting) | |
1133 | { | |
1134 | switch (setting->type) { | |
1135 | case PIN_MAP_TYPE_MUX_GROUP: | |
1136 | if (disable_setting) | |
1137 | pinmux_disable_setting(setting); | |
1138 | pinmux_free_setting(setting); | |
1139 | break; | |
1140 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1141 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1142 | pinconf_free_setting(setting); | |
1143 | break; | |
1144 | default: | |
1145 | break; | |
1146 | } | |
1147 | } | |
1148 | ||
42fed7ba | 1149 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 1150 | { |
6e5e959d SW |
1151 | struct pinctrl_state *state, *n1; |
1152 | struct pinctrl_setting *setting, *n2; | |
1153 | ||
42fed7ba | 1154 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
1155 | list_for_each_entry_safe(state, n1, &p->states, node) { |
1156 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 1157 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
1158 | list_del(&setting->node); |
1159 | kfree(setting); | |
1160 | } | |
1161 | list_del(&state->node); | |
1162 | kfree(state); | |
7ecdb16f | 1163 | } |
befe5bdf | 1164 | |
57291ce2 SW |
1165 | pinctrl_dt_free_maps(p); |
1166 | ||
6e5e959d SW |
1167 | if (inlist) |
1168 | list_del(&p->node); | |
befe5bdf | 1169 | kfree(p); |
42fed7ba | 1170 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 1171 | } |
befe5bdf LW |
1172 | |
1173 | /** | |
ab78029e LW |
1174 | * pinctrl_release() - release the pinctrl handle |
1175 | * @kref: the kref in the pinctrl being released | |
1176 | */ | |
2917e833 | 1177 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
1178 | { |
1179 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
1180 | ||
42fed7ba | 1181 | pinctrl_free(p, true); |
ab78029e LW |
1182 | } |
1183 | ||
1184 | /** | |
1185 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 1186 | * @p: the pinctrl handle to release |
befe5bdf | 1187 | */ |
57b676f9 SW |
1188 | void pinctrl_put(struct pinctrl *p) |
1189 | { | |
ab78029e | 1190 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
1191 | } |
1192 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
1193 | ||
42fed7ba PC |
1194 | /** |
1195 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
1196 | * @p: the pinctrl handle to retrieve the state from | |
1197 | * @name: the state name to retrieve | |
1198 | */ | |
1199 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
1200 | const char *name) | |
befe5bdf | 1201 | { |
6e5e959d | 1202 | struct pinctrl_state *state; |
befe5bdf | 1203 | |
6e5e959d | 1204 | state = find_state(p, name); |
5b3aa5f7 DA |
1205 | if (!state) { |
1206 | if (pinctrl_dummy_state) { | |
1207 | /* create dummy state */ | |
1208 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
1209 | name); | |
1210 | state = create_state(p, name); | |
d599bfb3 RG |
1211 | } else |
1212 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 1213 | } |
57b676f9 | 1214 | |
6e5e959d | 1215 | return state; |
befe5bdf | 1216 | } |
42fed7ba | 1217 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
1218 | |
1219 | /** | |
981ed1bf | 1220 | * pinctrl_commit_state() - select/activate/program a pinctrl state to HW |
42fed7ba PC |
1221 | * @p: the pinctrl handle for the device that requests configuration |
1222 | * @state: the state handle to select/activate/program | |
befe5bdf | 1223 | */ |
981ed1bf | 1224 | static int pinctrl_commit_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1225 | { |
6e5e959d | 1226 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 1227 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 1228 | int ret; |
7ecdb16f | 1229 | |
6e5e959d SW |
1230 | if (p->state) { |
1231 | /* | |
2243a87d FW |
1232 | * For each pinmux setting in the old state, forget SW's record |
1233 | * of mux owner for that pingroup. Any pingroups which are | |
1234 | * still owned by the new state will be re-acquired by the call | |
1235 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d SW |
1236 | */ |
1237 | list_for_each_entry(setting, &p->state->settings, node) { | |
1e2082b5 SW |
1238 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1239 | continue; | |
2243a87d | 1240 | pinmux_disable_setting(setting); |
6e5e959d SW |
1241 | } |
1242 | } | |
1243 | ||
3102a76c | 1244 | p->state = NULL; |
6e5e959d SW |
1245 | |
1246 | /* Apply all the settings for the new state */ | |
1247 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1248 | switch (setting->type) { |
1249 | case PIN_MAP_TYPE_MUX_GROUP: | |
1250 | ret = pinmux_enable_setting(setting); | |
1251 | break; | |
1252 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1253 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1254 | ret = pinconf_apply_setting(setting); | |
1255 | break; | |
1256 | default: | |
1257 | ret = -EINVAL; | |
1258 | break; | |
1259 | } | |
3102a76c | 1260 | |
42fed7ba | 1261 | if (ret < 0) { |
3102a76c | 1262 | goto unapply_new_state; |
42fed7ba | 1263 | } |
befe5bdf | 1264 | } |
6e5e959d | 1265 | |
3102a76c RG |
1266 | p->state = state; |
1267 | ||
6e5e959d | 1268 | return 0; |
3102a76c RG |
1269 | |
1270 | unapply_new_state: | |
da58751c | 1271 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1272 | |
3102a76c RG |
1273 | list_for_each_entry(setting2, &state->settings, node) { |
1274 | if (&setting2->node == &setting->node) | |
1275 | break; | |
af606177 RG |
1276 | /* |
1277 | * All we can do here is pinmux_disable_setting. | |
1278 | * That means that some pins are muxed differently now | |
1279 | * than they were before applying the setting (We can't | |
1280 | * "unmux a pin"!), but it's not a big deal since the pins | |
1281 | * are free to be muxed by another apply_setting. | |
1282 | */ | |
1283 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1284 | pinmux_disable_setting(setting2); | |
3102a76c | 1285 | } |
8009d5ff | 1286 | |
385d9424 RG |
1287 | /* There's no infinite recursive loop here because p->state is NULL */ |
1288 | if (old_state) | |
42fed7ba | 1289 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1290 | |
1291 | return ret; | |
befe5bdf | 1292 | } |
981ed1bf FF |
1293 | |
1294 | /** | |
1295 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW | |
1296 | * @p: the pinctrl handle for the device that requests configuration | |
1297 | * @state: the state handle to select/activate/program | |
1298 | */ | |
1299 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) | |
1300 | { | |
1301 | if (p->state == state) | |
1302 | return 0; | |
1303 | ||
1304 | return pinctrl_commit_state(p, state); | |
1305 | } | |
6e5e959d | 1306 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1307 | |
6d4ca1fb SW |
1308 | static void devm_pinctrl_release(struct device *dev, void *res) |
1309 | { | |
1310 | pinctrl_put(*(struct pinctrl **)res); | |
1311 | } | |
1312 | ||
1313 | /** | |
1314 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1315 | * @dev: the device to obtain the handle for | |
1316 | * | |
1317 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1318 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1319 | */ | |
1320 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1321 | { | |
1322 | struct pinctrl **ptr, *p; | |
1323 | ||
1324 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1325 | if (!ptr) | |
1326 | return ERR_PTR(-ENOMEM); | |
1327 | ||
1328 | p = pinctrl_get(dev); | |
1329 | if (!IS_ERR(p)) { | |
1330 | *ptr = p; | |
1331 | devres_add(dev, ptr); | |
1332 | } else { | |
1333 | devres_free(ptr); | |
1334 | } | |
1335 | ||
1336 | return p; | |
1337 | } | |
1338 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1339 | ||
1340 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1341 | { | |
1342 | struct pinctrl **p = res; | |
1343 | ||
1344 | return *p == data; | |
1345 | } | |
1346 | ||
1347 | /** | |
1348 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1349 | * @p: the pinctrl handle to release | |
1350 | * | |
1351 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1352 | * this function will not need to be called and the resource management | |
1353 | * code will ensure that the resource is freed. | |
1354 | */ | |
1355 | void devm_pinctrl_put(struct pinctrl *p) | |
1356 | { | |
a72149e8 | 1357 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1358 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1359 | } |
1360 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1361 | ||
3f713b7c | 1362 | int pinctrl_register_map(const struct pinctrl_map *maps, unsigned num_maps, |
c5272a28 | 1363 | bool dup) |
befe5bdf | 1364 | { |
1e2082b5 | 1365 | int i, ret; |
b2b3e66e | 1366 | struct pinctrl_maps *maps_node; |
befe5bdf | 1367 | |
7e9236ff | 1368 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1369 | |
1370 | /* First sanity check the new mapping */ | |
1371 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1372 | if (!maps[i].dev_name) { |
1373 | pr_err("failed to register map %s (%d): no device given\n", | |
1374 | maps[i].name, i); | |
1375 | return -EINVAL; | |
1376 | } | |
1377 | ||
befe5bdf LW |
1378 | if (!maps[i].name) { |
1379 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1380 | i); |
befe5bdf LW |
1381 | return -EINVAL; |
1382 | } | |
1383 | ||
1e2082b5 SW |
1384 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1385 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1386 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1387 | maps[i].name, i); | |
1388 | return -EINVAL; | |
1389 | } | |
1390 | ||
1e2082b5 SW |
1391 | switch (maps[i].type) { |
1392 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1393 | break; | |
1394 | case PIN_MAP_TYPE_MUX_GROUP: | |
1395 | ret = pinmux_validate_map(&maps[i], i); | |
1396 | if (ret < 0) | |
fde04f41 | 1397 | return ret; |
1e2082b5 SW |
1398 | break; |
1399 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1400 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1401 | ret = pinconf_validate_map(&maps[i], i); | |
1402 | if (ret < 0) | |
fde04f41 | 1403 | return ret; |
1e2082b5 SW |
1404 | break; |
1405 | default: | |
1406 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1407 | maps[i].name, i); |
1681f5ae SW |
1408 | return -EINVAL; |
1409 | } | |
befe5bdf LW |
1410 | } |
1411 | ||
b2b3e66e | 1412 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
2104d12d | 1413 | if (!maps_node) |
b2b3e66e | 1414 | return -ENOMEM; |
befe5bdf | 1415 | |
b2b3e66e | 1416 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1417 | if (dup) { |
1418 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1419 | GFP_KERNEL); | |
1420 | if (!maps_node->maps) { | |
57291ce2 SW |
1421 | kfree(maps_node); |
1422 | return -ENOMEM; | |
1423 | } | |
1424 | } else { | |
1425 | maps_node->maps = maps; | |
befe5bdf LW |
1426 | } |
1427 | ||
c5272a28 | 1428 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1429 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1430 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1431 | |
befe5bdf LW |
1432 | return 0; |
1433 | } | |
1434 | ||
57291ce2 SW |
1435 | /** |
1436 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1437 | * @maps: the pincontrol mappings table to register. This should probably be | |
1438 | * marked with __initdata so it can be discarded after boot. This | |
1439 | * function will perform a shallow copy for the mapping entries. | |
1440 | * @num_maps: the number of maps in the mapping table | |
1441 | */ | |
3f713b7c | 1442 | int pinctrl_register_mappings(const struct pinctrl_map *maps, |
57291ce2 SW |
1443 | unsigned num_maps) |
1444 | { | |
c5272a28 | 1445 | return pinctrl_register_map(maps, num_maps, true); |
57291ce2 | 1446 | } |
8b1b2dc7 | 1447 | EXPORT_SYMBOL_GPL(pinctrl_register_mappings); |
57291ce2 | 1448 | |
3f713b7c | 1449 | void pinctrl_unregister_map(const struct pinctrl_map *map) |
57291ce2 SW |
1450 | { |
1451 | struct pinctrl_maps *maps_node; | |
1452 | ||
42fed7ba | 1453 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1454 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1455 | if (maps_node->maps == map) { | |
1456 | list_del(&maps_node->node); | |
db6c2c69 | 1457 | kfree(maps_node); |
42fed7ba | 1458 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1459 | return; |
1460 | } | |
1461 | } | |
42fed7ba | 1462 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1463 | } |
1464 | ||
840a47ba JD |
1465 | /** |
1466 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1467 | * @pctldev: pin controller device | |
1468 | */ | |
1469 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1470 | { | |
1471 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
981ed1bf | 1472 | return pinctrl_commit_state(pctldev->p, pctldev->hog_sleep); |
840a47ba JD |
1473 | return 0; |
1474 | } | |
1475 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1476 | ||
1477 | /** | |
1478 | * pinctrl_force_default() - turn a given controller device into default state | |
1479 | * @pctldev: pin controller device | |
1480 | */ | |
1481 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1482 | { | |
1483 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
981ed1bf | 1484 | return pinctrl_commit_state(pctldev->p, pctldev->hog_default); |
840a47ba JD |
1485 | return 0; |
1486 | } | |
1487 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1488 | ||
ef0eebc0 DA |
1489 | /** |
1490 | * pinctrl_init_done() - tell pinctrl probe is done | |
1491 | * | |
1492 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1493 | * driver selected some other state. | |
1494 | * | |
1495 | * @dev: device to that's done probing | |
1496 | */ | |
1497 | int pinctrl_init_done(struct device *dev) | |
1498 | { | |
1499 | struct dev_pin_info *pins = dev->pins; | |
1500 | int ret; | |
1501 | ||
1502 | if (!pins) | |
1503 | return 0; | |
1504 | ||
1505 | if (IS_ERR(pins->init_state)) | |
1506 | return 0; /* No such state */ | |
1507 | ||
1508 | if (pins->p->state != pins->init_state) | |
1509 | return 0; /* Not at init anyway */ | |
1510 | ||
1511 | if (IS_ERR(pins->default_state)) | |
1512 | return 0; /* No default state */ | |
1513 | ||
1514 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1515 | if (ret) | |
1516 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1517 | ||
1518 | return ret; | |
1519 | } | |
1520 | ||
14005ee2 LW |
1521 | #ifdef CONFIG_PM |
1522 | ||
1523 | /** | |
f3333497 | 1524 | * pinctrl_pm_select_state() - select pinctrl state for PM |
14005ee2 | 1525 | * @dev: device to select default state for |
f3333497 | 1526 | * @state: state to set |
14005ee2 | 1527 | */ |
f3333497 TL |
1528 | static int pinctrl_pm_select_state(struct device *dev, |
1529 | struct pinctrl_state *state) | |
14005ee2 LW |
1530 | { |
1531 | struct dev_pin_info *pins = dev->pins; | |
1532 | int ret; | |
1533 | ||
f3333497 TL |
1534 | if (IS_ERR(state)) |
1535 | return 0; /* No such state */ | |
1536 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1537 | if (ret) |
f3333497 TL |
1538 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1539 | state->name); | |
14005ee2 LW |
1540 | return ret; |
1541 | } | |
f3333497 TL |
1542 | |
1543 | /** | |
1544 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1545 | * @dev: device to select default state for | |
1546 | */ | |
1547 | int pinctrl_pm_select_default_state(struct device *dev) | |
1548 | { | |
1549 | if (!dev->pins) | |
1550 | return 0; | |
1551 | ||
1552 | return pinctrl_pm_select_state(dev, dev->pins->default_state); | |
1553 | } | |
f472dead | 1554 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1555 | |
1556 | /** | |
1557 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1558 | * @dev: device to select sleep state for | |
1559 | */ | |
1560 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1561 | { | |
f3333497 | 1562 | if (!dev->pins) |
14005ee2 | 1563 | return 0; |
f3333497 TL |
1564 | |
1565 | return pinctrl_pm_select_state(dev, dev->pins->sleep_state); | |
14005ee2 | 1566 | } |
f472dead | 1567 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1568 | |
1569 | /** | |
1570 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1571 | * @dev: device to select idle state for | |
1572 | */ | |
1573 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1574 | { | |
f3333497 | 1575 | if (!dev->pins) |
14005ee2 | 1576 | return 0; |
f3333497 TL |
1577 | |
1578 | return pinctrl_pm_select_state(dev, dev->pins->idle_state); | |
14005ee2 | 1579 | } |
f472dead | 1580 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1581 | #endif |
1582 | ||
2744e8af LW |
1583 | #ifdef CONFIG_DEBUG_FS |
1584 | ||
1585 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1586 | { | |
1587 | struct pinctrl_dev *pctldev = s->private; | |
1588 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1589 | unsigned i, pin; |
2744e8af LW |
1590 | |
1591 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1592 | |
42fed7ba | 1593 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1594 | |
706e8520 CP |
1595 | /* The pin number can be retrived from the pin controller descriptor */ |
1596 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1597 | struct pin_desc *desc; |
1598 | ||
706e8520 | 1599 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1600 | desc = pin_desc_get(pctldev, pin); |
1601 | /* Pin space may be sparse */ | |
cea234e9 | 1602 | if (!desc) |
2744e8af LW |
1603 | continue; |
1604 | ||
cf9d994d | 1605 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af LW |
1606 | |
1607 | /* Driver-specific info per pin */ | |
1608 | if (ops->pin_dbg_show) | |
1609 | ops->pin_dbg_show(pctldev, s, pin); | |
1610 | ||
1611 | seq_puts(s, "\n"); | |
1612 | } | |
1613 | ||
42fed7ba | 1614 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1615 | |
2744e8af LW |
1616 | return 0; |
1617 | } | |
b5520891 | 1618 | DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); |
2744e8af LW |
1619 | |
1620 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1621 | { | |
1622 | struct pinctrl_dev *pctldev = s->private; | |
1623 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1624 | unsigned ngroups, selector = 0; |
2744e8af | 1625 | |
42fed7ba PC |
1626 | mutex_lock(&pctldev->mutex); |
1627 | ||
d1e90e9e | 1628 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1629 | |
2744e8af | 1630 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1631 | while (selector < ngroups) { |
e5b3b2d9 AT |
1632 | const unsigned *pins = NULL; |
1633 | unsigned num_pins = 0; | |
2744e8af | 1634 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1635 | const char *pname; |
e5b3b2d9 | 1636 | int ret = 0; |
2744e8af LW |
1637 | int i; |
1638 | ||
e5b3b2d9 AT |
1639 | if (ops->get_group_pins) |
1640 | ret = ops->get_group_pins(pctldev, selector, | |
1641 | &pins, &num_pins); | |
2744e8af LW |
1642 | if (ret) |
1643 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1644 | gname); | |
1645 | else { | |
dcb5dbc3 DA |
1646 | seq_printf(s, "group: %s\n", gname); |
1647 | for (i = 0; i < num_pins; i++) { | |
1648 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1649 | if (WARN_ON(!pname)) { |
42fed7ba | 1650 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1651 | return -EINVAL; |
b4dd784b | 1652 | } |
dcb5dbc3 DA |
1653 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1654 | } | |
1655 | seq_puts(s, "\n"); | |
2744e8af LW |
1656 | } |
1657 | selector++; | |
1658 | } | |
1659 | ||
42fed7ba | 1660 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1661 | |
1662 | return 0; | |
1663 | } | |
b5520891 | 1664 | DEFINE_SHOW_ATTRIBUTE(pinctrl_groups); |
2744e8af LW |
1665 | |
1666 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1667 | { | |
1668 | struct pinctrl_dev *pctldev = s->private; | |
1669 | struct pinctrl_gpio_range *range = NULL; | |
1670 | ||
1671 | seq_puts(s, "GPIO ranges handled:\n"); | |
1672 | ||
42fed7ba | 1673 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1674 | |
2744e8af | 1675 | /* Loop over the ranges */ |
2744e8af | 1676 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1677 | if (range->pins) { |
1678 | int a; | |
1679 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1680 | range->id, range->name, | |
1681 | range->base, (range->base + range->npins - 1)); | |
1682 | for (a = 0; a < range->npins - 1; a++) | |
1683 | seq_printf(s, "%u, ", range->pins[a]); | |
1684 | seq_printf(s, "%u}\n", range->pins[a]); | |
1685 | } | |
1686 | else | |
1687 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1688 | range->id, range->name, | |
1689 | range->base, (range->base + range->npins - 1), | |
1690 | range->pin_base, | |
1691 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1692 | } |
57b676f9 | 1693 | |
42fed7ba | 1694 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1695 | |
1696 | return 0; | |
1697 | } | |
b5520891 | 1698 | DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges); |
2744e8af LW |
1699 | |
1700 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1701 | { | |
1702 | struct pinctrl_dev *pctldev; | |
1703 | ||
ae6b4d85 | 1704 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1705 | |
42fed7ba | 1706 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1707 | |
2744e8af LW |
1708 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1709 | seq_printf(s, "%s ", pctldev->desc->name); | |
1710 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1711 | seq_puts(s, "yes "); |
1712 | else | |
1713 | seq_puts(s, "no "); | |
1714 | if (pctldev->desc->confops) | |
2744e8af LW |
1715 | seq_puts(s, "yes"); |
1716 | else | |
1717 | seq_puts(s, "no"); | |
1718 | seq_puts(s, "\n"); | |
1719 | } | |
57b676f9 | 1720 | |
42fed7ba | 1721 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1722 | |
1723 | return 0; | |
1724 | } | |
b5520891 | 1725 | DEFINE_SHOW_ATTRIBUTE(pinctrl_devices); |
2744e8af | 1726 | |
1e2082b5 SW |
1727 | static inline const char *map_type(enum pinctrl_map_type type) |
1728 | { | |
1729 | static const char * const names[] = { | |
1730 | "INVALID", | |
1731 | "DUMMY_STATE", | |
1732 | "MUX_GROUP", | |
1733 | "CONFIGS_PIN", | |
1734 | "CONFIGS_GROUP", | |
1735 | }; | |
1736 | ||
1737 | if (type >= ARRAY_SIZE(names)) | |
1738 | return "UNKNOWN"; | |
1739 | ||
1740 | return names[type]; | |
1741 | } | |
1742 | ||
3eedb437 SW |
1743 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1744 | { | |
1745 | struct pinctrl_maps *maps_node; | |
1746 | int i; | |
3f713b7c | 1747 | const struct pinctrl_map *map; |
3eedb437 SW |
1748 | |
1749 | seq_puts(s, "Pinctrl maps:\n"); | |
1750 | ||
42fed7ba | 1751 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1752 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1753 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1754 | map->dev_name, map->name, map_type(map->type), | |
1755 | map->type); | |
1756 | ||
1757 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1758 | seq_printf(s, "controlling device %s\n", | |
1759 | map->ctrl_dev_name); | |
1760 | ||
1761 | switch (map->type) { | |
1762 | case PIN_MAP_TYPE_MUX_GROUP: | |
1763 | pinmux_show_map(s, map); | |
1764 | break; | |
1765 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1766 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1767 | pinconf_show_map(s, map); | |
1768 | break; | |
1769 | default: | |
1770 | break; | |
1771 | } | |
1772 | ||
390e1046 | 1773 | seq_putc(s, '\n'); |
3eedb437 | 1774 | } |
42fed7ba | 1775 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1776 | |
1777 | return 0; | |
1778 | } | |
b5520891 | 1779 | DEFINE_SHOW_ATTRIBUTE(pinctrl_maps); |
3eedb437 | 1780 | |
befe5bdf LW |
1781 | static int pinctrl_show(struct seq_file *s, void *what) |
1782 | { | |
1783 | struct pinctrl *p; | |
6e5e959d | 1784 | struct pinctrl_state *state; |
7ecdb16f | 1785 | struct pinctrl_setting *setting; |
befe5bdf LW |
1786 | |
1787 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1788 | |
42fed7ba | 1789 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1790 | |
befe5bdf | 1791 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1792 | seq_printf(s, "device: %s current state: %s\n", |
1793 | dev_name(p->dev), | |
1794 | p->state ? p->state->name : "none"); | |
1795 | ||
1796 | list_for_each_entry(state, &p->states, node) { | |
1797 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1798 | |
6e5e959d | 1799 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1800 | struct pinctrl_dev *pctldev = setting->pctldev; |
1801 | ||
1802 | seq_printf(s, " type: %s controller %s ", | |
1803 | map_type(setting->type), | |
1804 | pinctrl_dev_get_name(pctldev)); | |
1805 | ||
1806 | switch (setting->type) { | |
1807 | case PIN_MAP_TYPE_MUX_GROUP: | |
1808 | pinmux_show_setting(s, setting); | |
1809 | break; | |
1810 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1811 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1812 | pinconf_show_setting(s, setting); | |
1813 | break; | |
1814 | default: | |
1815 | break; | |
1816 | } | |
6e5e959d | 1817 | } |
befe5bdf | 1818 | } |
befe5bdf LW |
1819 | } |
1820 | ||
42fed7ba | 1821 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1822 | |
befe5bdf LW |
1823 | return 0; |
1824 | } | |
b5520891 | 1825 | DEFINE_SHOW_ATTRIBUTE(pinctrl); |
befe5bdf | 1826 | |
2744e8af LW |
1827 | static struct dentry *debugfs_root; |
1828 | ||
1829 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1830 | { | |
02157160 | 1831 | struct dentry *device_root; |
1781af56 JK |
1832 | const char *debugfs_name; |
1833 | ||
1834 | if (pctldev->desc->name && | |
1835 | strcmp(dev_name(pctldev->dev), pctldev->desc->name)) { | |
1836 | debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL, | |
1837 | "%s-%s", dev_name(pctldev->dev), | |
1838 | pctldev->desc->name); | |
1839 | if (!debugfs_name) { | |
1840 | pr_warn("failed to determine debugfs dir name for %s\n", | |
1841 | dev_name(pctldev->dev)); | |
1842 | return; | |
1843 | } | |
1844 | } else { | |
1845 | debugfs_name = dev_name(pctldev->dev); | |
1846 | } | |
2744e8af | 1847 | |
1781af56 | 1848 | device_root = debugfs_create_dir(debugfs_name, debugfs_root); |
02157160 TL |
1849 | pctldev->device_root = device_root; |
1850 | ||
2744e8af LW |
1851 | if (IS_ERR(device_root) || !device_root) { |
1852 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1853 | dev_name(pctldev->dev)); |
2744e8af LW |
1854 | return; |
1855 | } | |
1856 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
b5520891 | 1857 | device_root, pctldev, &pinctrl_pins_fops); |
2744e8af | 1858 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, |
b5520891 | 1859 | device_root, pctldev, &pinctrl_groups_fops); |
2744e8af | 1860 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, |
b5520891 | 1861 | device_root, pctldev, &pinctrl_gpioranges_fops); |
e7f2a444 FV |
1862 | if (pctldev->desc->pmxops) |
1863 | pinmux_init_device_debugfs(device_root, pctldev); | |
1864 | if (pctldev->desc->confops) | |
1865 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1866 | } |
1867 | ||
02157160 TL |
1868 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1869 | { | |
1870 | debugfs_remove_recursive(pctldev->device_root); | |
1871 | } | |
1872 | ||
2744e8af LW |
1873 | static void pinctrl_init_debugfs(void) |
1874 | { | |
1875 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1876 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1877 | pr_warn("failed to create debugfs directory\n"); | |
1878 | debugfs_root = NULL; | |
1879 | return; | |
1880 | } | |
1881 | ||
1882 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
b5520891 | 1883 | debugfs_root, NULL, &pinctrl_devices_fops); |
3eedb437 | 1884 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
b5520891 | 1885 | debugfs_root, NULL, &pinctrl_maps_fops); |
befe5bdf | 1886 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
b5520891 | 1887 | debugfs_root, NULL, &pinctrl_fops); |
2744e8af LW |
1888 | } |
1889 | ||
1890 | #else /* CONFIG_DEBUG_FS */ | |
1891 | ||
1892 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1893 | { | |
1894 | } | |
1895 | ||
1896 | static void pinctrl_init_debugfs(void) | |
1897 | { | |
1898 | } | |
1899 | ||
02157160 TL |
1900 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1901 | { | |
1902 | } | |
1903 | ||
2744e8af LW |
1904 | #endif |
1905 | ||
d26bc49f SW |
1906 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1907 | { | |
1908 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1909 | ||
1910 | if (!ops || | |
d1e90e9e | 1911 | !ops->get_groups_count || |
e5b3b2d9 | 1912 | !ops->get_group_name) |
d26bc49f SW |
1913 | return -EINVAL; |
1914 | ||
1915 | return 0; | |
1916 | } | |
1917 | ||
99e4f675 | 1918 | /** |
950b0d91 | 1919 | * pinctrl_init_controller() - init a pin controller device |
2744e8af LW |
1920 | * @pctldesc: descriptor for this pin controller |
1921 | * @dev: parent device for this pin controller | |
1922 | * @driver_data: private pin controller data for this pin controller | |
1923 | */ | |
0ca4921f AS |
1924 | static struct pinctrl_dev * |
1925 | pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, | |
1926 | void *driver_data) | |
2744e8af | 1927 | { |
2744e8af LW |
1928 | struct pinctrl_dev *pctldev; |
1929 | int ret; | |
1930 | ||
da9aecb0 | 1931 | if (!pctldesc) |
323de9ef | 1932 | return ERR_PTR(-EINVAL); |
da9aecb0 | 1933 | if (!pctldesc->name) |
323de9ef | 1934 | return ERR_PTR(-EINVAL); |
2744e8af | 1935 | |
02f5b989 | 1936 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
2104d12d | 1937 | if (!pctldev) |
323de9ef | 1938 | return ERR_PTR(-ENOMEM); |
b9130b77 TL |
1939 | |
1940 | /* Initialize pin control device struct */ | |
1941 | pctldev->owner = pctldesc->owner; | |
1942 | pctldev->desc = pctldesc; | |
1943 | pctldev->driver_data = driver_data; | |
1944 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
c033a718 | 1945 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a | 1946 | INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL); |
a76edc89 TL |
1947 | #endif |
1948 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
1949 | INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL); | |
c033a718 | 1950 | #endif |
b9130b77 | 1951 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
46daed6e | 1952 | INIT_LIST_HEAD(&pctldev->node); |
b9130b77 | 1953 | pctldev->dev = dev; |
42fed7ba | 1954 | mutex_init(&pctldev->mutex); |
b9130b77 | 1955 | |
d26bc49f | 1956 | /* check core ops for sanity */ |
323de9ef MY |
1957 | ret = pinctrl_check_ops(pctldev); |
1958 | if (ret) { | |
ad6e1107 | 1959 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1960 | goto out_err; |
1961 | } | |
1962 | ||
2744e8af LW |
1963 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1964 | if (pctldesc->pmxops) { | |
323de9ef MY |
1965 | ret = pinmux_check_ops(pctldev); |
1966 | if (ret) | |
b9130b77 | 1967 | goto out_err; |
2744e8af LW |
1968 | } |
1969 | ||
ae6b4d85 LW |
1970 | /* If we're implementing pinconfig, check the ops for sanity */ |
1971 | if (pctldesc->confops) { | |
323de9ef MY |
1972 | ret = pinconf_check_ops(pctldev); |
1973 | if (ret) | |
b9130b77 | 1974 | goto out_err; |
ae6b4d85 LW |
1975 | } |
1976 | ||
2744e8af | 1977 | /* Register all the pins */ |
ad6e1107 | 1978 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1979 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1980 | if (ret) { | |
ad6e1107 | 1981 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1982 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1983 | pctldesc->npins); | |
51cd24ee | 1984 | goto out_err; |
2744e8af LW |
1985 | } |
1986 | ||
2744e8af LW |
1987 | return pctldev; |
1988 | ||
51cd24ee | 1989 | out_err: |
42fed7ba | 1990 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1991 | kfree(pctldev); |
323de9ef | 1992 | return ERR_PTR(ret); |
2744e8af | 1993 | } |
950b0d91 | 1994 | |
61187142 | 1995 | static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) |
950b0d91 TL |
1996 | { |
1997 | pctldev->p = create_pinctrl(pctldev->dev, pctldev); | |
61187142 TL |
1998 | if (PTR_ERR(pctldev->p) == -ENODEV) { |
1999 | dev_dbg(pctldev->dev, "no hogs found\n"); | |
950b0d91 | 2000 | |
61187142 TL |
2001 | return 0; |
2002 | } | |
2003 | ||
2004 | if (IS_ERR(pctldev->p)) { | |
2005 | dev_err(pctldev->dev, "error claiming hogs: %li\n", | |
2006 | PTR_ERR(pctldev->p)); | |
2007 | ||
2008 | return PTR_ERR(pctldev->p); | |
2009 | } | |
2010 | ||
2011 | kref_get(&pctldev->p->users); | |
2012 | pctldev->hog_default = | |
2013 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); | |
2014 | if (IS_ERR(pctldev->hog_default)) { | |
2015 | dev_dbg(pctldev->dev, | |
2016 | "failed to lookup the default state\n"); | |
2017 | } else { | |
2018 | if (pinctrl_select_state(pctldev->p, | |
2019 | pctldev->hog_default)) | |
2020 | dev_err(pctldev->dev, | |
2021 | "failed to select default state\n"); | |
2022 | } | |
2023 | ||
2024 | pctldev->hog_sleep = | |
2025 | pinctrl_lookup_state(pctldev->p, | |
2026 | PINCTRL_STATE_SLEEP); | |
2027 | if (IS_ERR(pctldev->hog_sleep)) | |
2028 | dev_dbg(pctldev->dev, | |
2029 | "failed to lookup the sleep state\n"); | |
2030 | ||
2031 | return 0; | |
2032 | } | |
2033 | ||
2034 | int pinctrl_enable(struct pinctrl_dev *pctldev) | |
2035 | { | |
2036 | int error; | |
2037 | ||
2038 | error = pinctrl_claim_hogs(pctldev); | |
2039 | if (error) { | |
2040 | dev_err(pctldev->dev, "could not claim hogs: %i\n", | |
2041 | error); | |
2042 | mutex_destroy(&pctldev->mutex); | |
2043 | kfree(pctldev); | |
2044 | ||
2045 | return error; | |
950b0d91 TL |
2046 | } |
2047 | ||
2048 | mutex_lock(&pinctrldev_list_mutex); | |
2049 | list_add_tail(&pctldev->node, &pinctrldev_list); | |
2050 | mutex_unlock(&pinctrldev_list_mutex); | |
2051 | ||
2052 | pinctrl_init_device_debugfs(pctldev); | |
2053 | ||
2054 | return 0; | |
2055 | } | |
61187142 | 2056 | EXPORT_SYMBOL_GPL(pinctrl_enable); |
950b0d91 TL |
2057 | |
2058 | /** | |
2059 | * pinctrl_register() - register a pin controller device | |
2060 | * @pctldesc: descriptor for this pin controller | |
2061 | * @dev: parent device for this pin controller | |
2062 | * @driver_data: private pin controller data for this pin controller | |
2063 | * | |
2064 | * Note that pinctrl_register() is known to have problems as the pin | |
2065 | * controller driver functions are called before the driver has a | |
2066 | * struct pinctrl_dev handle. To avoid issues later on, please use the | |
2067 | * new pinctrl_register_and_init() below instead. | |
2068 | */ | |
2069 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
2070 | struct device *dev, void *driver_data) | |
2071 | { | |
2072 | struct pinctrl_dev *pctldev; | |
2073 | int error; | |
2074 | ||
2075 | pctldev = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2076 | if (IS_ERR(pctldev)) | |
2077 | return pctldev; | |
2078 | ||
61187142 TL |
2079 | error = pinctrl_enable(pctldev); |
2080 | if (error) | |
950b0d91 | 2081 | return ERR_PTR(error); |
950b0d91 TL |
2082 | |
2083 | return pctldev; | |
2084 | ||
2085 | } | |
2744e8af LW |
2086 | EXPORT_SYMBOL_GPL(pinctrl_register); |
2087 | ||
61187142 TL |
2088 | /** |
2089 | * pinctrl_register_and_init() - register and init pin controller device | |
2090 | * @pctldesc: descriptor for this pin controller | |
2091 | * @dev: parent device for this pin controller | |
2092 | * @driver_data: private pin controller data for this pin controller | |
2093 | * @pctldev: pin controller device | |
2094 | * | |
2095 | * Note that pinctrl_enable() still needs to be manually called after | |
2096 | * this once the driver is ready. | |
2097 | */ | |
950b0d91 TL |
2098 | int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, |
2099 | struct device *dev, void *driver_data, | |
2100 | struct pinctrl_dev **pctldev) | |
2101 | { | |
2102 | struct pinctrl_dev *p; | |
950b0d91 TL |
2103 | |
2104 | p = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2105 | if (IS_ERR(p)) | |
2106 | return PTR_ERR(p); | |
2107 | ||
2108 | /* | |
2109 | * We have pinctrl_start() call functions in the pin controller | |
2110 | * driver with create_pinctrl() for at least dt_node_to_map(). So | |
2111 | * let's make sure pctldev is properly initialized for the | |
2112 | * pin controller driver before we do anything. | |
2113 | */ | |
2114 | *pctldev = p; | |
2115 | ||
950b0d91 TL |
2116 | return 0; |
2117 | } | |
2118 | EXPORT_SYMBOL_GPL(pinctrl_register_and_init); | |
2119 | ||
2744e8af LW |
2120 | /** |
2121 | * pinctrl_unregister() - unregister pinmux | |
2122 | * @pctldev: pin controller to unregister | |
2123 | * | |
2124 | * Called by pinmux drivers to unregister a pinmux. | |
2125 | */ | |
2126 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
2127 | { | |
5d589b09 | 2128 | struct pinctrl_gpio_range *range, *n; |
3429fb3c | 2129 | |
cea234e9 | 2130 | if (!pctldev) |
2744e8af LW |
2131 | return; |
2132 | ||
42fed7ba | 2133 | mutex_lock(&pctldev->mutex); |
42fed7ba | 2134 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 2135 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 2136 | |
3429fb3c | 2137 | if (!IS_ERR_OR_NULL(pctldev->p)) |
42fed7ba | 2138 | pinctrl_put(pctldev->p); |
57b676f9 | 2139 | |
db93facf JL |
2140 | mutex_lock(&pinctrldev_list_mutex); |
2141 | mutex_lock(&pctldev->mutex); | |
2744e8af | 2142 | /* TODO: check that no pinmuxes are still active? */ |
46daed6e | 2143 | list_del(&pctldev->node); |
a76edc89 | 2144 | pinmux_generic_free_functions(pctldev); |
c7059c5a | 2145 | pinctrl_generic_free_groups(pctldev); |
2744e8af LW |
2146 | /* Destroy descriptor tree */ |
2147 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
2148 | pctldev->desc->npins); | |
5d589b09 DA |
2149 | /* remove gpio ranges map */ |
2150 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
2151 | list_del(&range->node); | |
2152 | ||
42fed7ba PC |
2153 | mutex_unlock(&pctldev->mutex); |
2154 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 2155 | kfree(pctldev); |
42fed7ba | 2156 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
2157 | } |
2158 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
2159 | ||
80e0f8d9 LD |
2160 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
2161 | { | |
2162 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
2163 | ||
2164 | pinctrl_unregister(pctldev); | |
2165 | } | |
2166 | ||
2167 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
2168 | { | |
2169 | struct pctldev **r = res; | |
2170 | ||
3024f920 | 2171 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
2172 | return 0; |
2173 | ||
2174 | return *r == data; | |
2175 | } | |
2176 | ||
2177 | /** | |
2178 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
2179 | * @dev: parent device for this pin controller | |
2180 | * @pctldesc: descriptor for this pin controller | |
2181 | * @driver_data: private pin controller data for this pin controller | |
2182 | * | |
2183 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2184 | * it returns valid pinctrl handle. | |
2185 | * | |
2186 | * The pinctrl device will be automatically released when the device is unbound. | |
2187 | */ | |
2188 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
2189 | struct pinctrl_desc *pctldesc, | |
2190 | void *driver_data) | |
2191 | { | |
2192 | struct pinctrl_dev **ptr, *pctldev; | |
2193 | ||
2194 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2195 | if (!ptr) | |
2196 | return ERR_PTR(-ENOMEM); | |
2197 | ||
2198 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
2199 | if (IS_ERR(pctldev)) { | |
2200 | devres_free(ptr); | |
2201 | return pctldev; | |
2202 | } | |
2203 | ||
2204 | *ptr = pctldev; | |
2205 | devres_add(dev, ptr); | |
2206 | ||
2207 | return pctldev; | |
2208 | } | |
2209 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
2210 | ||
950b0d91 TL |
2211 | /** |
2212 | * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init | |
2213 | * @dev: parent device for this pin controller | |
2214 | * @pctldesc: descriptor for this pin controller | |
2215 | * @driver_data: private pin controller data for this pin controller | |
2216 | * | |
2217 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2218 | * it returns valid pinctrl handle. | |
2219 | * | |
2220 | * The pinctrl device will be automatically released when the device is unbound. | |
2221 | */ | |
2222 | int devm_pinctrl_register_and_init(struct device *dev, | |
2223 | struct pinctrl_desc *pctldesc, | |
2224 | void *driver_data, | |
2225 | struct pinctrl_dev **pctldev) | |
2226 | { | |
2227 | struct pinctrl_dev **ptr; | |
2228 | int error; | |
2229 | ||
2230 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2231 | if (!ptr) | |
2232 | return -ENOMEM; | |
2233 | ||
2234 | error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev); | |
2235 | if (error) { | |
2236 | devres_free(ptr); | |
2237 | return error; | |
2238 | } | |
2239 | ||
2240 | *ptr = *pctldev; | |
2241 | devres_add(dev, ptr); | |
2242 | ||
2243 | return 0; | |
2244 | } | |
2245 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init); | |
2246 | ||
80e0f8d9 LD |
2247 | /** |
2248 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
2249 | * @dev: device for which which resource was allocated | |
2250 | * @pctldev: the pinctrl device to unregister. | |
2251 | */ | |
2252 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
2253 | { | |
2254 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
2255 | devm_pinctrl_dev_match, pctldev)); | |
2256 | } | |
2257 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
2258 | ||
2744e8af LW |
2259 | static int __init pinctrl_init(void) |
2260 | { | |
2261 | pr_info("initialized pinctrl subsystem\n"); | |
2262 | pinctrl_init_debugfs(); | |
2263 | return 0; | |
2264 | } | |
2265 | ||
2266 | /* init early since many drivers really need to initialized pinmux early */ | |
2267 | core_initcall(pinctrl_init); |