Commit | Line | Data |
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af873fce | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | /* |
3 | * Core driver for the pin control subsystem | |
4 | * | |
befe5bdf | 5 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
6 | * Written on behalf of Linaro for ST-Ericsson |
7 | * Based on bits of regulator core, gpio core and clk core | |
8 | * | |
9 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
10 | * | |
b2b3e66e | 11 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
2744e8af LW |
12 | */ |
13 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
14 | ||
15 | #include <linux/kernel.h> | |
ab78029e | 16 | #include <linux/kref.h> |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/debugfs.h> |
24 | #include <linux/seq_file.h> | |
6d4ca1fb | 25 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
26 | #include <linux/pinctrl/pinctrl.h> |
27 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
28 | |
29 | #ifdef CONFIG_GPIOLIB | |
f1b206cf | 30 | #include "../gpio/gpiolib.h" |
51e13c24 | 31 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
32 | #endif |
33 | ||
2744e8af | 34 | #include "core.h" |
57291ce2 | 35 | #include "devicetree.h" |
2744e8af | 36 | #include "pinmux.h" |
ae6b4d85 | 37 | #include "pinconf.h" |
2744e8af | 38 | |
b2b3e66e | 39 | |
5b3aa5f7 DA |
40 | static bool pinctrl_dummy_state; |
41 | ||
42fed7ba | 42 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 43 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
44 | |
45 | /* Mutex taken to protect pinctrl_maps */ | |
46 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
47 | ||
48 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 49 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
50 | |
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 52 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 58 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 59 | |
befe5bdf | 60 | |
5b3aa5f7 DA |
61 | /** |
62 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
63 | * | |
64 | * Usually this function is called by platforms without pinctrl driver support | |
65 | * but run with some shared drivers using pinctrl APIs. | |
66 | * After calling this function, the pinctrl core will return successfully | |
67 | * with creating a dummy state for the driver to keep going smoothly. | |
68 | */ | |
69 | void pinctrl_provide_dummies(void) | |
70 | { | |
71 | pinctrl_dummy_state = true; | |
72 | } | |
73 | ||
2744e8af LW |
74 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
75 | { | |
76 | /* We're not allowed to register devices without name */ | |
77 | return pctldev->desc->name; | |
78 | } | |
79 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
80 | ||
d6e99abb HZ |
81 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
82 | { | |
83 | return dev_name(pctldev->dev); | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
86 | ||
2744e8af LW |
87 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
88 | { | |
89 | return pctldev->driver_data; | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
92 | ||
93 | /** | |
9dfac4fd LW |
94 | * get_pinctrl_dev_from_devname() - look up pin controller device |
95 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
96 | * |
97 | * Looks up a pin control device matching a certain device name or pure device | |
98 | * pointer, the pure device pointer will take precedence. | |
99 | */ | |
9dfac4fd | 100 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af | 101 | { |
6cadafb3 | 102 | struct pinctrl_dev *pctldev; |
2744e8af | 103 | |
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
44d5f7bb LW |
107 | mutex_lock(&pinctrldev_list_mutex); |
108 | ||
2744e8af | 109 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 110 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 111 | /* Matched on device name */ |
44d5f7bb LW |
112 | mutex_unlock(&pinctrldev_list_mutex); |
113 | return pctldev; | |
2744e8af LW |
114 | } |
115 | } | |
2744e8af | 116 | |
44d5f7bb LW |
117 | mutex_unlock(&pinctrldev_list_mutex); |
118 | ||
119 | return NULL; | |
2744e8af LW |
120 | } |
121 | ||
42fed7ba PC |
122 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
123 | { | |
124 | struct pinctrl_dev *pctldev; | |
125 | ||
126 | mutex_lock(&pinctrldev_list_mutex); | |
127 | ||
128 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
129 | if (pctldev->dev->of_node == np) { | |
130 | mutex_unlock(&pinctrldev_list_mutex); | |
131 | return pctldev; | |
132 | } | |
133 | ||
d463f82d | 134 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
135 | |
136 | return NULL; | |
137 | } | |
138 | ||
ae6b4d85 LW |
139 | /** |
140 | * pin_get_from_name() - look up a pin number from a name | |
141 | * @pctldev: the pin control device to lookup the pin on | |
142 | * @name: the name of the pin to look up | |
143 | */ | |
144 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
145 | { | |
706e8520 | 146 | unsigned i, pin; |
ae6b4d85 | 147 | |
706e8520 CP |
148 | /* The pin number can be retrived from the pin controller descriptor */ |
149 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
150 | struct pin_desc *desc; |
151 | ||
706e8520 | 152 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
153 | desc = pin_desc_get(pctldev, pin); |
154 | /* Pin space may be sparse */ | |
6c325f87 | 155 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
156 | return pin; |
157 | } | |
158 | ||
159 | return -EINVAL; | |
160 | } | |
161 | ||
dcb5dbc3 DA |
162 | /** |
163 | * pin_get_name_from_id() - look up a pin name from a pin id | |
164 | * @pctldev: the pin control device to lookup the pin on | |
9c340bbb | 165 | * @pin: pin number/id to look up |
dcb5dbc3 DA |
166 | */ |
167 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
168 | { | |
169 | const struct pin_desc *desc; | |
170 | ||
171 | desc = pin_desc_get(pctldev, pin); | |
cea234e9 | 172 | if (!desc) { |
dcb5dbc3 DA |
173 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", |
174 | pin); | |
175 | return NULL; | |
176 | } | |
177 | ||
178 | return desc->name; | |
179 | } | |
b88d1451 | 180 | EXPORT_SYMBOL_GPL(pin_get_name); |
dcb5dbc3 | 181 | |
2744e8af LW |
182 | /* Deletes a range of pin descriptors */ |
183 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
184 | const struct pinctrl_pin_desc *pins, | |
185 | unsigned num_pins) | |
186 | { | |
187 | int i; | |
188 | ||
2744e8af LW |
189 | for (i = 0; i < num_pins; i++) { |
190 | struct pin_desc *pindesc; | |
191 | ||
192 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
193 | pins[i].number); | |
cea234e9 | 194 | if (pindesc) { |
2744e8af LW |
195 | radix_tree_delete(&pctldev->pin_desc_tree, |
196 | pins[i].number); | |
ca53c5f1 LW |
197 | if (pindesc->dynamic_name) |
198 | kfree(pindesc->name); | |
2744e8af LW |
199 | } |
200 | kfree(pindesc); | |
201 | } | |
2744e8af LW |
202 | } |
203 | ||
204 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 205 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
206 | { |
207 | struct pin_desc *pindesc; | |
208 | ||
cd8f61f1 | 209 | pindesc = pin_desc_get(pctldev, pin->number); |
cea234e9 | 210 | if (pindesc) { |
cd8f61f1 MY |
211 | dev_err(pctldev->dev, "pin %d already registered\n", |
212 | pin->number); | |
2744e8af LW |
213 | return -EINVAL; |
214 | } | |
215 | ||
216 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
2104d12d | 217 | if (!pindesc) |
2744e8af | 218 | return -ENOMEM; |
ae6b4d85 | 219 | |
2744e8af LW |
220 | /* Set owner */ |
221 | pindesc->pctldev = pctldev; | |
222 | ||
9af1e44f | 223 | /* Copy basic pin info */ |
cd8f61f1 MY |
224 | if (pin->name) { |
225 | pindesc->name = pin->name; | |
ca53c5f1 | 226 | } else { |
cd8f61f1 | 227 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
cea234e9 | 228 | if (!pindesc->name) { |
eb26cc9c | 229 | kfree(pindesc); |
ca53c5f1 | 230 | return -ENOMEM; |
eb26cc9c | 231 | } |
ca53c5f1 LW |
232 | pindesc->dynamic_name = true; |
233 | } | |
2744e8af | 234 | |
cd8f61f1 MY |
235 | pindesc->drv_data = pin->drv_data; |
236 | ||
237 | radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); | |
2744e8af | 238 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 239 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
240 | return 0; |
241 | } | |
242 | ||
243 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
3f713b7c | 244 | const struct pinctrl_pin_desc *pins, |
2744e8af LW |
245 | unsigned num_descs) |
246 | { | |
247 | unsigned i; | |
248 | int ret = 0; | |
249 | ||
250 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 251 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
252 | if (ret) |
253 | return ret; | |
254 | } | |
255 | ||
256 | return 0; | |
257 | } | |
258 | ||
c8587eee CR |
259 | /** |
260 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
261 | * @range: GPIO range used for the translation | |
262 | * @gpio: gpio pin to translate to a pin number | |
263 | * | |
264 | * Finds the pin number for a given GPIO using the specified GPIO range | |
265 | * as a base for translation. The distinction between linear GPIO ranges | |
266 | * and pin list based GPIO ranges is managed correctly by this function. | |
267 | * | |
268 | * This function assumes the gpio is part of the specified GPIO range, use | |
269 | * only after making sure this is the case (e.g. by calling it on the | |
270 | * result of successful pinctrl_get_device_gpio_range calls)! | |
271 | */ | |
272 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
273 | unsigned int gpio) | |
274 | { | |
275 | unsigned int offset = gpio - range->base; | |
276 | if (range->pins) | |
277 | return range->pins[offset]; | |
278 | else | |
279 | return range->pin_base + offset; | |
280 | } | |
281 | ||
2744e8af LW |
282 | /** |
283 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
284 | * @pctldev: pin controller device to check | |
285 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
286 | * | |
287 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
288 | * controller, return the range or NULL | |
289 | */ | |
290 | static struct pinctrl_gpio_range * | |
291 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
292 | { | |
6cadafb3 | 293 | struct pinctrl_gpio_range *range; |
2744e8af | 294 | |
42fed7ba | 295 | mutex_lock(&pctldev->mutex); |
2744e8af | 296 | /* Loop over the ranges */ |
2744e8af LW |
297 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
298 | /* Check if we're in the valid range */ | |
299 | if (gpio >= range->base && | |
300 | gpio < range->base + range->npins) { | |
42fed7ba | 301 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
302 | return range; |
303 | } | |
304 | } | |
42fed7ba | 305 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
306 | return NULL; |
307 | } | |
308 | ||
51e13c24 HZ |
309 | /** |
310 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
311 | * the same GPIO chip are in range | |
312 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
313 | * | |
314 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
315 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
316 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
317 | * of the same GPIO chip don't have back-end pinctrl interface. | |
318 | * If the return value is true, it means that pinctrl device is ready & the | |
319 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
320 | * is false, it means that pinctrl device may not be ready. | |
321 | */ | |
2afe8229 | 322 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
323 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
324 | { | |
325 | struct pinctrl_dev *pctldev; | |
326 | struct pinctrl_gpio_range *range = NULL; | |
327 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
328 | ||
942cde72 TL |
329 | if (WARN(!chip, "no gpio_chip for gpio%i?", gpio)) |
330 | return false; | |
331 | ||
44d5f7bb LW |
332 | mutex_lock(&pinctrldev_list_mutex); |
333 | ||
51e13c24 HZ |
334 | /* Loop over the pin controllers */ |
335 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
336 | /* Loop over the ranges */ | |
5ffbe2e6 | 337 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
338 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
339 | /* Check if any gpio range overlapped with gpio chip */ | |
340 | if (range->base + range->npins - 1 < chip->base || | |
341 | range->base > chip->base + chip->ngpio - 1) | |
342 | continue; | |
5ffbe2e6 | 343 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 344 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
345 | return true; |
346 | } | |
5ffbe2e6 | 347 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 348 | } |
44d5f7bb LW |
349 | |
350 | mutex_unlock(&pinctrldev_list_mutex); | |
351 | ||
51e13c24 HZ |
352 | return false; |
353 | } | |
2afe8229 HZ |
354 | #else |
355 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
356 | #endif | |
51e13c24 | 357 | |
2744e8af LW |
358 | /** |
359 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
360 | * @gpio: the pin to locate the pin controller for | |
361 | * @outdev: the pin control device if found | |
362 | * @outrange: the GPIO range if found | |
363 | * | |
364 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
365 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
366 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
367 | * may still have not been registered. | |
2744e8af | 368 | */ |
4ecce45d SW |
369 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
370 | struct pinctrl_dev **outdev, | |
371 | struct pinctrl_gpio_range **outrange) | |
2744e8af | 372 | { |
6cadafb3 | 373 | struct pinctrl_dev *pctldev; |
2744e8af | 374 | |
f0059021 AL |
375 | mutex_lock(&pinctrldev_list_mutex); |
376 | ||
2744e8af | 377 | /* Loop over the pin controllers */ |
2744e8af LW |
378 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
379 | struct pinctrl_gpio_range *range; | |
380 | ||
381 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
cea234e9 | 382 | if (range) { |
2744e8af LW |
383 | *outdev = pctldev; |
384 | *outrange = range; | |
f0059021 | 385 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
386 | return 0; |
387 | } | |
388 | } | |
2744e8af | 389 | |
f0059021 AL |
390 | mutex_unlock(&pinctrldev_list_mutex); |
391 | ||
4650b7cb | 392 | return -EPROBE_DEFER; |
2744e8af LW |
393 | } |
394 | ||
395 | /** | |
396 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
397 | * @pctldev: pin controller device to add the range to | |
398 | * @range: the GPIO range to add | |
399 | * | |
400 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
401 | * this to register handled ranges after registering your pin controller. | |
402 | */ | |
403 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
404 | struct pinctrl_gpio_range *range) | |
405 | { | |
42fed7ba | 406 | mutex_lock(&pctldev->mutex); |
8b9c139f | 407 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 408 | mutex_unlock(&pctldev->mutex); |
2744e8af | 409 | } |
4ecce45d | 410 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 411 | |
3e5e00b6 DA |
412 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
413 | struct pinctrl_gpio_range *ranges, | |
414 | unsigned nranges) | |
415 | { | |
416 | int i; | |
417 | ||
418 | for (i = 0; i < nranges; i++) | |
419 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
420 | } | |
421 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
422 | ||
192c369c | 423 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
424 | struct pinctrl_gpio_range *range) |
425 | { | |
42fed7ba PC |
426 | struct pinctrl_dev *pctldev; |
427 | ||
42fed7ba | 428 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 429 | |
dfa97515 LW |
430 | /* |
431 | * If we can't find this device, let's assume that is because | |
432 | * it has not probed yet, so the driver trying to register this | |
433 | * range need to defer probing. | |
434 | */ | |
42fed7ba | 435 | if (!pctldev) { |
dfa97515 | 436 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 437 | } |
f23f1516 | 438 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 439 | |
f23f1516 SH |
440 | return pctldev; |
441 | } | |
192c369c | 442 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 443 | |
586a87e6 CR |
444 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
445 | const unsigned **pins, unsigned *num_pins) | |
446 | { | |
447 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
448 | int gs; | |
449 | ||
e5b3b2d9 AT |
450 | if (!pctlops->get_group_pins) |
451 | return -EINVAL; | |
452 | ||
586a87e6 CR |
453 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
454 | if (gs < 0) | |
455 | return gs; | |
456 | ||
457 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
458 | } | |
459 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
460 | ||
9afbefb2 | 461 | struct pinctrl_gpio_range * |
b18537cd JE |
462 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
463 | unsigned int pin) | |
9afbefb2 | 464 | { |
c8f50e86 | 465 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
466 | |
467 | /* Loop over the ranges */ | |
468 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
469 | /* Check if we're in the valid range */ | |
c8587eee CR |
470 | if (range->pins) { |
471 | int a; | |
472 | for (a = 0; a < range->npins; a++) { | |
473 | if (range->pins[a] == pin) | |
b18537cd | 474 | return range; |
c8587eee CR |
475 | } |
476 | } else if (pin >= range->pin_base && | |
c8f50e86 | 477 | pin < range->pin_base + range->npins) |
b18537cd | 478 | return range; |
9afbefb2 | 479 | } |
b18537cd JE |
480 | |
481 | return NULL; | |
482 | } | |
483 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
484 | ||
485 | /** | |
486 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
487 | * @pctldev: the pin controller device to look in | |
488 | * @pin: a controller-local number to find the range for | |
489 | */ | |
490 | struct pinctrl_gpio_range * | |
491 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
492 | unsigned int pin) | |
493 | { | |
494 | struct pinctrl_gpio_range *range; | |
495 | ||
496 | mutex_lock(&pctldev->mutex); | |
497 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 498 | mutex_unlock(&pctldev->mutex); |
b18537cd | 499 | |
c8f50e86 | 500 | return range; |
9afbefb2 LW |
501 | } |
502 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
503 | ||
7e10ee68 | 504 | /** |
50842cbd | 505 | * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller |
7e10ee68 VK |
506 | * @pctldev: pin controller device to remove the range from |
507 | * @range: the GPIO range to remove | |
508 | */ | |
509 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
510 | struct pinctrl_gpio_range *range) | |
511 | { | |
42fed7ba | 512 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 513 | list_del(&range->node); |
42fed7ba | 514 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
515 | } |
516 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
517 | ||
c033a718 | 518 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
519 | |
520 | /** | |
521 | * pinctrl_generic_get_group_count() - returns the number of pin groups | |
522 | * @pctldev: pin controller device | |
523 | */ | |
524 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev) | |
525 | { | |
526 | return pctldev->num_groups; | |
527 | } | |
528 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count); | |
529 | ||
530 | /** | |
531 | * pinctrl_generic_get_group_name() - returns the name of a pin group | |
532 | * @pctldev: pin controller device | |
533 | * @selector: group number | |
534 | */ | |
535 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
536 | unsigned int selector) | |
537 | { | |
538 | struct group_desc *group; | |
539 | ||
540 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
541 | selector); | |
542 | if (!group) | |
543 | return NULL; | |
544 | ||
545 | return group->name; | |
546 | } | |
547 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); | |
548 | ||
549 | /** | |
550 | * pinctrl_generic_get_group_pins() - gets the pin group pins | |
551 | * @pctldev: pin controller device | |
552 | * @selector: group number | |
553 | * @pins: pins in the group | |
554 | * @num_pins: number of pins in the group | |
555 | */ | |
556 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
557 | unsigned int selector, | |
558 | const unsigned int **pins, | |
559 | unsigned int *num_pins) | |
560 | { | |
561 | struct group_desc *group; | |
562 | ||
563 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
564 | selector); | |
565 | if (!group) { | |
566 | dev_err(pctldev->dev, "%s could not find pingroup%i\n", | |
567 | __func__, selector); | |
568 | return -EINVAL; | |
569 | } | |
570 | ||
571 | *pins = group->pins; | |
572 | *num_pins = group->num_pins; | |
573 | ||
574 | return 0; | |
575 | } | |
576 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins); | |
577 | ||
578 | /** | |
579 | * pinctrl_generic_get_group() - returns a pin group based on the number | |
580 | * @pctldev: pin controller device | |
9c340bbb | 581 | * @selector: group number |
c7059c5a TL |
582 | */ |
583 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
584 | unsigned int selector) | |
585 | { | |
586 | struct group_desc *group; | |
587 | ||
588 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
589 | selector); | |
590 | if (!group) | |
591 | return NULL; | |
592 | ||
593 | return group; | |
594 | } | |
595 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group); | |
596 | ||
a203728a TL |
597 | static int pinctrl_generic_group_name_to_selector(struct pinctrl_dev *pctldev, |
598 | const char *function) | |
599 | { | |
600 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
601 | int ngroups = ops->get_groups_count(pctldev); | |
602 | int selector = 0; | |
603 | ||
604 | /* See if this pctldev has this group */ | |
605 | while (selector < ngroups) { | |
606 | const char *gname = ops->get_group_name(pctldev, selector); | |
607 | ||
54a58185 | 608 | if (gname && !strcmp(function, gname)) |
a203728a TL |
609 | return selector; |
610 | ||
611 | selector++; | |
612 | } | |
613 | ||
614 | return -EINVAL; | |
615 | } | |
616 | ||
c7059c5a TL |
617 | /** |
618 | * pinctrl_generic_add_group() - adds a new pin group | |
619 | * @pctldev: pin controller device | |
620 | * @name: name of the pin group | |
621 | * @pins: pins in the pin group | |
622 | * @num_pins: number of pins in the pin group | |
623 | * @data: pin controller driver specific data | |
624 | * | |
625 | * Note that the caller must take care of locking. | |
626 | */ | |
627 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
628 | int *pins, int num_pins, void *data) | |
629 | { | |
630 | struct group_desc *group; | |
a203728a TL |
631 | int selector; |
632 | ||
633 | if (!name) | |
634 | return -EINVAL; | |
635 | ||
636 | selector = pinctrl_generic_group_name_to_selector(pctldev, name); | |
637 | if (selector >= 0) | |
638 | return selector; | |
639 | ||
640 | selector = pctldev->num_groups; | |
c7059c5a TL |
641 | |
642 | group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL); | |
643 | if (!group) | |
644 | return -ENOMEM; | |
645 | ||
646 | group->name = name; | |
647 | group->pins = pins; | |
648 | group->num_pins = num_pins; | |
649 | group->data = data; | |
650 | ||
a203728a | 651 | radix_tree_insert(&pctldev->pin_group_tree, selector, group); |
c7059c5a TL |
652 | |
653 | pctldev->num_groups++; | |
654 | ||
a203728a | 655 | return selector; |
c7059c5a TL |
656 | } |
657 | EXPORT_SYMBOL_GPL(pinctrl_generic_add_group); | |
658 | ||
659 | /** | |
660 | * pinctrl_generic_remove_group() - removes a numbered pin group | |
661 | * @pctldev: pin controller device | |
662 | * @selector: group number | |
663 | * | |
664 | * Note that the caller must take care of locking. | |
665 | */ | |
666 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
667 | unsigned int selector) | |
668 | { | |
669 | struct group_desc *group; | |
670 | ||
671 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
672 | selector); | |
673 | if (!group) | |
674 | return -ENOENT; | |
675 | ||
676 | radix_tree_delete(&pctldev->pin_group_tree, selector); | |
677 | devm_kfree(pctldev->dev, group); | |
678 | ||
679 | pctldev->num_groups--; | |
680 | ||
681 | return 0; | |
682 | } | |
683 | EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); | |
684 | ||
685 | /** | |
686 | * pinctrl_generic_free_groups() - removes all pin groups | |
687 | * @pctldev: pin controller device | |
688 | * | |
664b7c47 TL |
689 | * Note that the caller must take care of locking. The pinctrl groups |
690 | * are allocated with devm_kzalloc() so no need to free them here. | |
c7059c5a TL |
691 | */ |
692 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
693 | { | |
694 | struct radix_tree_iter iter; | |
906a2a39 | 695 | void __rcu **slot; |
c7059c5a TL |
696 | |
697 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) | |
664b7c47 | 698 | radix_tree_delete(&pctldev->pin_group_tree, iter.index); |
c7059c5a TL |
699 | |
700 | pctldev->num_groups = 0; | |
701 | } | |
702 | ||
703 | #else | |
704 | static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
705 | { | |
706 | } | |
c033a718 | 707 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 708 | |
7afde8ba LW |
709 | /** |
710 | * pinctrl_get_group_selector() - returns the group selector for a group | |
711 | * @pctldev: the pin controller handling the group | |
712 | * @pin_group: the pin group to look up | |
713 | */ | |
714 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
715 | const char *pin_group) | |
716 | { | |
717 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 718 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
719 | unsigned group_selector = 0; |
720 | ||
d1e90e9e | 721 | while (group_selector < ngroups) { |
7afde8ba LW |
722 | const char *gname = pctlops->get_group_name(pctldev, |
723 | group_selector); | |
54a58185 | 724 | if (gname && !strcmp(gname, pin_group)) { |
51cd24ee | 725 | dev_dbg(pctldev->dev, |
7afde8ba LW |
726 | "found group selector %u for %s\n", |
727 | group_selector, | |
728 | pin_group); | |
729 | return group_selector; | |
730 | } | |
731 | ||
732 | group_selector++; | |
733 | } | |
734 | ||
51cd24ee | 735 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
736 | pin_group); |
737 | ||
738 | return -EINVAL; | |
739 | } | |
740 | ||
472a61e7 SW |
741 | bool pinctrl_gpio_can_use_line(unsigned gpio) |
742 | { | |
743 | struct pinctrl_dev *pctldev; | |
744 | struct pinctrl_gpio_range *range; | |
745 | bool result; | |
746 | int pin; | |
747 | ||
748 | /* | |
749 | * Try to obtain GPIO range, if it fails | |
750 | * we're probably dealing with GPIO driver | |
751 | * without a backing pin controller - bail out. | |
752 | */ | |
753 | if (pinctrl_get_device_gpio_range(gpio, &pctldev, &range)) | |
754 | return true; | |
755 | ||
756 | mutex_lock(&pctldev->mutex); | |
757 | ||
758 | /* Convert to the pin controllers number space */ | |
759 | pin = gpio_to_pin(range, gpio); | |
760 | ||
761 | result = pinmux_can_be_used_for_gpio(pctldev, pin); | |
762 | ||
763 | mutex_unlock(&pctldev->mutex); | |
764 | ||
765 | return result; | |
766 | } | |
767 | EXPORT_SYMBOL_GPL(pinctrl_gpio_can_use_line); | |
768 | ||
befe5bdf | 769 | /** |
a9a1d2a7 | 770 | * pinctrl_gpio_request() - request a single pin to be used as GPIO |
befe5bdf LW |
771 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
772 | * | |
773 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
774 | * as part of their gpio_request() semantics, platforms and individual drivers | |
775 | * shall *NOT* request GPIO pins to be muxed in. | |
776 | */ | |
a9a1d2a7 | 777 | int pinctrl_gpio_request(unsigned gpio) |
befe5bdf LW |
778 | { |
779 | struct pinctrl_dev *pctldev; | |
780 | struct pinctrl_gpio_range *range; | |
781 | int ret; | |
782 | int pin; | |
783 | ||
784 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 785 | if (ret) { |
51e13c24 HZ |
786 | if (pinctrl_ready_for_gpio_range(gpio)) |
787 | ret = 0; | |
4650b7cb | 788 | return ret; |
57b676f9 | 789 | } |
befe5bdf | 790 | |
9b77ace4 AL |
791 | mutex_lock(&pctldev->mutex); |
792 | ||
befe5bdf | 793 | /* Convert to the pin controllers number space */ |
c8587eee | 794 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 795 | |
57b676f9 SW |
796 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
797 | ||
9b77ace4 AL |
798 | mutex_unlock(&pctldev->mutex); |
799 | ||
57b676f9 | 800 | return ret; |
befe5bdf | 801 | } |
a9a1d2a7 | 802 | EXPORT_SYMBOL_GPL(pinctrl_gpio_request); |
befe5bdf LW |
803 | |
804 | /** | |
a9a1d2a7 | 805 | * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO |
befe5bdf LW |
806 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
807 | * | |
808 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
809 | * as part of their gpio_free() semantics, platforms and individual drivers | |
810 | * shall *NOT* request GPIO pins to be muxed out. | |
811 | */ | |
a9a1d2a7 | 812 | void pinctrl_gpio_free(unsigned gpio) |
befe5bdf LW |
813 | { |
814 | struct pinctrl_dev *pctldev; | |
815 | struct pinctrl_gpio_range *range; | |
816 | int ret; | |
817 | int pin; | |
818 | ||
819 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 820 | if (ret) { |
befe5bdf | 821 | return; |
57b676f9 | 822 | } |
42fed7ba | 823 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
824 | |
825 | /* Convert to the pin controllers number space */ | |
c8587eee | 826 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 827 | |
57b676f9 SW |
828 | pinmux_free_gpio(pctldev, pin, range); |
829 | ||
42fed7ba | 830 | mutex_unlock(&pctldev->mutex); |
befe5bdf | 831 | } |
a9a1d2a7 | 832 | EXPORT_SYMBOL_GPL(pinctrl_gpio_free); |
befe5bdf LW |
833 | |
834 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
835 | { | |
836 | struct pinctrl_dev *pctldev; | |
837 | struct pinctrl_gpio_range *range; | |
838 | int ret; | |
839 | int pin; | |
840 | ||
841 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 842 | if (ret) { |
befe5bdf | 843 | return ret; |
42fed7ba PC |
844 | } |
845 | ||
846 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
847 | |
848 | /* Convert to the pin controllers number space */ | |
c8587eee | 849 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
850 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
851 | ||
852 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 853 | |
42fed7ba | 854 | return ret; |
befe5bdf LW |
855 | } |
856 | ||
857 | /** | |
858 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
859 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
860 | * | |
861 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
862 | * as part of their gpio_direction_input() semantics, platforms and individual | |
863 | * drivers shall *NOT* touch pin control GPIO calls. | |
864 | */ | |
865 | int pinctrl_gpio_direction_input(unsigned gpio) | |
866 | { | |
42fed7ba | 867 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
868 | } |
869 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
870 | ||
871 | /** | |
872 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
873 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
874 | * | |
875 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
876 | * as part of their gpio_direction_output() semantics, platforms and individual | |
877 | * drivers shall *NOT* touch pin control GPIO calls. | |
878 | */ | |
879 | int pinctrl_gpio_direction_output(unsigned gpio) | |
880 | { | |
42fed7ba | 881 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
882 | } |
883 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
884 | ||
15381bc7 MW |
885 | /** |
886 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin | |
887 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
888 | * @config: the configuration to apply to the GPIO | |
889 | * | |
890 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | |
891 | * they need to call the underlying pin controller to change GPIO config | |
892 | * (for example set debounce time). | |
893 | */ | |
894 | int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) | |
895 | { | |
896 | unsigned long configs[] = { config }; | |
897 | struct pinctrl_gpio_range *range; | |
898 | struct pinctrl_dev *pctldev; | |
899 | int ret, pin; | |
900 | ||
901 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
902 | if (ret) | |
903 | return ret; | |
904 | ||
905 | mutex_lock(&pctldev->mutex); | |
906 | pin = gpio_to_pin(range, gpio); | |
907 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); | |
908 | mutex_unlock(&pctldev->mutex); | |
909 | ||
910 | return ret; | |
911 | } | |
912 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); | |
913 | ||
6e5e959d SW |
914 | static struct pinctrl_state *find_state(struct pinctrl *p, |
915 | const char *name) | |
befe5bdf | 916 | { |
6e5e959d SW |
917 | struct pinctrl_state *state; |
918 | ||
919 | list_for_each_entry(state, &p->states, node) | |
920 | if (!strcmp(state->name, name)) | |
921 | return state; | |
922 | ||
923 | return NULL; | |
924 | } | |
925 | ||
926 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
927 | const char *name) | |
928 | { | |
929 | struct pinctrl_state *state; | |
930 | ||
931 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
2104d12d | 932 | if (!state) |
6e5e959d | 933 | return ERR_PTR(-ENOMEM); |
6e5e959d SW |
934 | |
935 | state->name = name; | |
936 | INIT_LIST_HEAD(&state->settings); | |
937 | ||
938 | list_add_tail(&state->node, &p->states); | |
939 | ||
940 | return state; | |
941 | } | |
942 | ||
99e4f675 | 943 | static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev, |
3f713b7c | 944 | const struct pinctrl_map *map) |
6e5e959d SW |
945 | { |
946 | struct pinctrl_state *state; | |
7ecdb16f | 947 | struct pinctrl_setting *setting; |
6e5e959d | 948 | int ret; |
befe5bdf | 949 | |
6e5e959d SW |
950 | state = find_state(p, map->name); |
951 | if (!state) | |
952 | state = create_state(p, map->name); | |
953 | if (IS_ERR(state)) | |
954 | return PTR_ERR(state); | |
befe5bdf | 955 | |
1e2082b5 SW |
956 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
957 | return 0; | |
958 | ||
6e5e959d | 959 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
2104d12d | 960 | if (!setting) |
6e5e959d | 961 | return -ENOMEM; |
befe5bdf | 962 | |
1e2082b5 SW |
963 | setting->type = map->type; |
964 | ||
99e4f675 TL |
965 | if (pctldev) |
966 | setting->pctldev = pctldev; | |
967 | else | |
968 | setting->pctldev = | |
969 | get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
cea234e9 | 970 | if (!setting->pctldev) { |
6e5e959d | 971 | kfree(setting); |
89216494 LW |
972 | /* Do not defer probing of hogs (circular loop) */ |
973 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
974 | return -ENODEV; | |
c05127c4 LW |
975 | /* |
976 | * OK let us guess that the driver is not there yet, and | |
977 | * let's defer obtaining this pinctrl handle to later... | |
978 | */ | |
89216494 LW |
979 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
980 | map->ctrl_dev_name); | |
c05127c4 | 981 | return -EPROBE_DEFER; |
6e5e959d SW |
982 | } |
983 | ||
1a78958d LW |
984 | setting->dev_name = map->dev_name; |
985 | ||
1e2082b5 SW |
986 | switch (map->type) { |
987 | case PIN_MAP_TYPE_MUX_GROUP: | |
988 | ret = pinmux_map_to_setting(map, setting); | |
989 | break; | |
990 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
991 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
992 | ret = pinconf_map_to_setting(map, setting); | |
993 | break; | |
994 | default: | |
995 | ret = -EINVAL; | |
996 | break; | |
997 | } | |
6e5e959d SW |
998 | if (ret < 0) { |
999 | kfree(setting); | |
1000 | return ret; | |
1001 | } | |
1002 | ||
1003 | list_add_tail(&setting->node, &state->settings); | |
1004 | ||
1005 | return 0; | |
1006 | } | |
1007 | ||
1008 | static struct pinctrl *find_pinctrl(struct device *dev) | |
1009 | { | |
1010 | struct pinctrl *p; | |
1011 | ||
42fed7ba | 1012 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 1013 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
1014 | if (p->dev == dev) { |
1015 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 1016 | return p; |
42fed7ba | 1017 | } |
6e5e959d | 1018 | |
42fed7ba | 1019 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
1020 | return NULL; |
1021 | } | |
1022 | ||
42fed7ba | 1023 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d | 1024 | |
99e4f675 TL |
1025 | static struct pinctrl *create_pinctrl(struct device *dev, |
1026 | struct pinctrl_dev *pctldev) | |
6e5e959d SW |
1027 | { |
1028 | struct pinctrl *p; | |
1029 | const char *devname; | |
1030 | struct pinctrl_maps *maps_node; | |
1031 | int i; | |
3f713b7c | 1032 | const struct pinctrl_map *map; |
6e5e959d | 1033 | int ret; |
befe5bdf LW |
1034 | |
1035 | /* | |
1036 | * create the state cookie holder struct pinctrl for each | |
1037 | * mapping, this is what consumers will get when requesting | |
1038 | * a pin control handle with pinctrl_get() | |
1039 | */ | |
02f5b989 | 1040 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
2104d12d | 1041 | if (!p) |
befe5bdf | 1042 | return ERR_PTR(-ENOMEM); |
7ecdb16f | 1043 | p->dev = dev; |
6e5e959d | 1044 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
1045 | INIT_LIST_HEAD(&p->dt_maps); |
1046 | ||
99e4f675 | 1047 | ret = pinctrl_dt_to_map(p, pctldev); |
57291ce2 SW |
1048 | if (ret < 0) { |
1049 | kfree(p); | |
1050 | return ERR_PTR(ret); | |
1051 | } | |
6e5e959d SW |
1052 | |
1053 | devname = dev_name(dev); | |
befe5bdf | 1054 | |
42fed7ba | 1055 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 1056 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 1057 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
1058 | /* Map must be for this device */ |
1059 | if (strcmp(map->dev_name, devname)) | |
1060 | continue; | |
7f0ff06c NY |
1061 | /* |
1062 | * If pctldev is not null, we are claiming hog for it, | |
1063 | * that means, setting that is served by pctldev by itself. | |
1064 | * | |
1065 | * Thus we must skip map that is for this device but is served | |
1066 | * by other device. | |
1067 | */ | |
1068 | if (pctldev && | |
1069 | strcmp(dev_name(pctldev->dev), map->ctrl_dev_name)) | |
1070 | continue; | |
7ecdb16f | 1071 | |
99e4f675 | 1072 | ret = add_setting(p, pctldev, map); |
89216494 LW |
1073 | /* |
1074 | * At this point the adding of a setting may: | |
1075 | * | |
1076 | * - Defer, if the pinctrl device is not yet available | |
1077 | * - Fail, if the pinctrl device is not yet available, | |
1078 | * AND the setting is a hog. We cannot defer that, since | |
1079 | * the hog will kick in immediately after the device | |
1080 | * is registered. | |
1081 | * | |
1082 | * If the error returned was not -EPROBE_DEFER then we | |
1083 | * accumulate the errors to see if we end up with | |
1084 | * an -EPROBE_DEFER later, as that is the worst case. | |
1085 | */ | |
1086 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
1087 | pinctrl_free(p, false); |
1088 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 1089 | return ERR_PTR(ret); |
7ecdb16f | 1090 | } |
befe5bdf | 1091 | } |
42fed7ba PC |
1092 | mutex_unlock(&pinctrl_maps_mutex); |
1093 | ||
89216494 | 1094 | if (ret < 0) { |
3ec440e3 | 1095 | /* If some other error than deferral occurred, return here */ |
42fed7ba | 1096 | pinctrl_free(p, false); |
89216494 LW |
1097 | return ERR_PTR(ret); |
1098 | } | |
befe5bdf | 1099 | |
ab78029e LW |
1100 | kref_init(&p->users); |
1101 | ||
b0666ba4 | 1102 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 1103 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 1104 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 1105 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
1106 | |
1107 | return p; | |
6e5e959d | 1108 | } |
7ecdb16f | 1109 | |
42fed7ba PC |
1110 | /** |
1111 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
1112 | * @dev: the device to obtain the handle for | |
1113 | */ | |
1114 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
1115 | { |
1116 | struct pinctrl *p; | |
7ecdb16f | 1117 | |
6e5e959d SW |
1118 | if (WARN_ON(!dev)) |
1119 | return ERR_PTR(-EINVAL); | |
1120 | ||
ab78029e LW |
1121 | /* |
1122 | * See if somebody else (such as the device core) has already | |
1123 | * obtained a handle to the pinctrl for this device. In that case, | |
1124 | * return another pointer to it. | |
1125 | */ | |
6e5e959d | 1126 | p = find_pinctrl(dev); |
cea234e9 | 1127 | if (p) { |
ab78029e LW |
1128 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); |
1129 | kref_get(&p->users); | |
1130 | return p; | |
1131 | } | |
7ecdb16f | 1132 | |
99e4f675 | 1133 | return create_pinctrl(dev, NULL); |
befe5bdf LW |
1134 | } |
1135 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
1136 | ||
d3cee830 RG |
1137 | static void pinctrl_free_setting(bool disable_setting, |
1138 | struct pinctrl_setting *setting) | |
1139 | { | |
1140 | switch (setting->type) { | |
1141 | case PIN_MAP_TYPE_MUX_GROUP: | |
1142 | if (disable_setting) | |
1143 | pinmux_disable_setting(setting); | |
1144 | pinmux_free_setting(setting); | |
1145 | break; | |
1146 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1147 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1148 | pinconf_free_setting(setting); | |
1149 | break; | |
1150 | default: | |
1151 | break; | |
1152 | } | |
1153 | } | |
1154 | ||
42fed7ba | 1155 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 1156 | { |
6e5e959d SW |
1157 | struct pinctrl_state *state, *n1; |
1158 | struct pinctrl_setting *setting, *n2; | |
1159 | ||
42fed7ba | 1160 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
1161 | list_for_each_entry_safe(state, n1, &p->states, node) { |
1162 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 1163 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
1164 | list_del(&setting->node); |
1165 | kfree(setting); | |
1166 | } | |
1167 | list_del(&state->node); | |
1168 | kfree(state); | |
7ecdb16f | 1169 | } |
befe5bdf | 1170 | |
57291ce2 SW |
1171 | pinctrl_dt_free_maps(p); |
1172 | ||
6e5e959d SW |
1173 | if (inlist) |
1174 | list_del(&p->node); | |
befe5bdf | 1175 | kfree(p); |
42fed7ba | 1176 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 1177 | } |
befe5bdf LW |
1178 | |
1179 | /** | |
ab78029e LW |
1180 | * pinctrl_release() - release the pinctrl handle |
1181 | * @kref: the kref in the pinctrl being released | |
1182 | */ | |
2917e833 | 1183 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
1184 | { |
1185 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
1186 | ||
42fed7ba | 1187 | pinctrl_free(p, true); |
ab78029e LW |
1188 | } |
1189 | ||
1190 | /** | |
1191 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 1192 | * @p: the pinctrl handle to release |
befe5bdf | 1193 | */ |
57b676f9 SW |
1194 | void pinctrl_put(struct pinctrl *p) |
1195 | { | |
ab78029e | 1196 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
1197 | } |
1198 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
1199 | ||
42fed7ba PC |
1200 | /** |
1201 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
1202 | * @p: the pinctrl handle to retrieve the state from | |
1203 | * @name: the state name to retrieve | |
1204 | */ | |
1205 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
1206 | const char *name) | |
befe5bdf | 1207 | { |
6e5e959d | 1208 | struct pinctrl_state *state; |
befe5bdf | 1209 | |
6e5e959d | 1210 | state = find_state(p, name); |
5b3aa5f7 DA |
1211 | if (!state) { |
1212 | if (pinctrl_dummy_state) { | |
1213 | /* create dummy state */ | |
1214 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
1215 | name); | |
1216 | state = create_state(p, name); | |
d599bfb3 RG |
1217 | } else |
1218 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 1219 | } |
57b676f9 | 1220 | |
6e5e959d | 1221 | return state; |
befe5bdf | 1222 | } |
42fed7ba | 1223 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf | 1224 | |
036f394d BG |
1225 | static void pinctrl_link_add(struct pinctrl_dev *pctldev, |
1226 | struct device *consumer) | |
1227 | { | |
1228 | if (pctldev->desc->link_consumers) | |
1229 | device_link_add(consumer, pctldev->dev, | |
1230 | DL_FLAG_PM_RUNTIME | | |
1231 | DL_FLAG_AUTOREMOVE_CONSUMER); | |
1232 | } | |
1233 | ||
befe5bdf | 1234 | /** |
981ed1bf | 1235 | * pinctrl_commit_state() - select/activate/program a pinctrl state to HW |
42fed7ba PC |
1236 | * @p: the pinctrl handle for the device that requests configuration |
1237 | * @state: the state handle to select/activate/program | |
befe5bdf | 1238 | */ |
981ed1bf | 1239 | static int pinctrl_commit_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1240 | { |
6e5e959d | 1241 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 1242 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 1243 | int ret; |
7ecdb16f | 1244 | |
6e5e959d SW |
1245 | if (p->state) { |
1246 | /* | |
2243a87d FW |
1247 | * For each pinmux setting in the old state, forget SW's record |
1248 | * of mux owner for that pingroup. Any pingroups which are | |
1249 | * still owned by the new state will be re-acquired by the call | |
1250 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d SW |
1251 | */ |
1252 | list_for_each_entry(setting, &p->state->settings, node) { | |
1e2082b5 SW |
1253 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1254 | continue; | |
2243a87d | 1255 | pinmux_disable_setting(setting); |
6e5e959d SW |
1256 | } |
1257 | } | |
1258 | ||
3102a76c | 1259 | p->state = NULL; |
6e5e959d SW |
1260 | |
1261 | /* Apply all the settings for the new state */ | |
1262 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1263 | switch (setting->type) { |
1264 | case PIN_MAP_TYPE_MUX_GROUP: | |
1265 | ret = pinmux_enable_setting(setting); | |
1266 | break; | |
1267 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1268 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1269 | ret = pinconf_apply_setting(setting); | |
1270 | break; | |
1271 | default: | |
1272 | ret = -EINVAL; | |
1273 | break; | |
1274 | } | |
3102a76c | 1275 | |
42fed7ba | 1276 | if (ret < 0) { |
3102a76c | 1277 | goto unapply_new_state; |
42fed7ba | 1278 | } |
036f394d | 1279 | |
b672a87a LW |
1280 | /* Do not link hogs (circular dependency) */ |
1281 | if (p != setting->pctldev->p) | |
1282 | pinctrl_link_add(setting->pctldev, p->dev); | |
befe5bdf | 1283 | } |
6e5e959d | 1284 | |
3102a76c RG |
1285 | p->state = state; |
1286 | ||
6e5e959d | 1287 | return 0; |
3102a76c RG |
1288 | |
1289 | unapply_new_state: | |
da58751c | 1290 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1291 | |
3102a76c RG |
1292 | list_for_each_entry(setting2, &state->settings, node) { |
1293 | if (&setting2->node == &setting->node) | |
1294 | break; | |
af606177 RG |
1295 | /* |
1296 | * All we can do here is pinmux_disable_setting. | |
1297 | * That means that some pins are muxed differently now | |
1298 | * than they were before applying the setting (We can't | |
1299 | * "unmux a pin"!), but it's not a big deal since the pins | |
1300 | * are free to be muxed by another apply_setting. | |
1301 | */ | |
1302 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1303 | pinmux_disable_setting(setting2); | |
3102a76c | 1304 | } |
8009d5ff | 1305 | |
385d9424 RG |
1306 | /* There's no infinite recursive loop here because p->state is NULL */ |
1307 | if (old_state) | |
42fed7ba | 1308 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1309 | |
1310 | return ret; | |
befe5bdf | 1311 | } |
981ed1bf FF |
1312 | |
1313 | /** | |
1314 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW | |
1315 | * @p: the pinctrl handle for the device that requests configuration | |
1316 | * @state: the state handle to select/activate/program | |
1317 | */ | |
1318 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) | |
1319 | { | |
1320 | if (p->state == state) | |
1321 | return 0; | |
1322 | ||
1323 | return pinctrl_commit_state(p, state); | |
1324 | } | |
6e5e959d | 1325 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1326 | |
6d4ca1fb SW |
1327 | static void devm_pinctrl_release(struct device *dev, void *res) |
1328 | { | |
1329 | pinctrl_put(*(struct pinctrl **)res); | |
1330 | } | |
1331 | ||
1332 | /** | |
9c340bbb | 1333 | * devm_pinctrl_get() - Resource managed pinctrl_get() |
6d4ca1fb SW |
1334 | * @dev: the device to obtain the handle for |
1335 | * | |
1336 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1337 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1338 | */ | |
1339 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1340 | { | |
1341 | struct pinctrl **ptr, *p; | |
1342 | ||
1343 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1344 | if (!ptr) | |
1345 | return ERR_PTR(-ENOMEM); | |
1346 | ||
1347 | p = pinctrl_get(dev); | |
1348 | if (!IS_ERR(p)) { | |
1349 | *ptr = p; | |
1350 | devres_add(dev, ptr); | |
1351 | } else { | |
1352 | devres_free(ptr); | |
1353 | } | |
1354 | ||
1355 | return p; | |
1356 | } | |
1357 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1358 | ||
1359 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1360 | { | |
1361 | struct pinctrl **p = res; | |
1362 | ||
1363 | return *p == data; | |
1364 | } | |
1365 | ||
1366 | /** | |
1367 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1368 | * @p: the pinctrl handle to release | |
1369 | * | |
1370 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1371 | * this function will not need to be called and the resource management | |
1372 | * code will ensure that the resource is freed. | |
1373 | */ | |
1374 | void devm_pinctrl_put(struct pinctrl *p) | |
1375 | { | |
a72149e8 | 1376 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1377 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1378 | } |
1379 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1380 | ||
c72bed23 HG |
1381 | /** |
1382 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1383 | * @maps: the pincontrol mappings table to register. Note the pinctrl-core | |
1384 | * keeps a reference to the passed in maps, so they should _not_ be | |
1385 | * marked with __initdata. | |
1386 | * @num_maps: the number of maps in the mapping table | |
1387 | */ | |
1388 | int pinctrl_register_mappings(const struct pinctrl_map *maps, | |
1389 | unsigned num_maps) | |
befe5bdf | 1390 | { |
1e2082b5 | 1391 | int i, ret; |
b2b3e66e | 1392 | struct pinctrl_maps *maps_node; |
befe5bdf | 1393 | |
7e9236ff | 1394 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1395 | |
1396 | /* First sanity check the new mapping */ | |
1397 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1398 | if (!maps[i].dev_name) { |
1399 | pr_err("failed to register map %s (%d): no device given\n", | |
1400 | maps[i].name, i); | |
1401 | return -EINVAL; | |
1402 | } | |
1403 | ||
befe5bdf LW |
1404 | if (!maps[i].name) { |
1405 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1406 | i); |
befe5bdf LW |
1407 | return -EINVAL; |
1408 | } | |
1409 | ||
1e2082b5 SW |
1410 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1411 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1412 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1413 | maps[i].name, i); | |
1414 | return -EINVAL; | |
1415 | } | |
1416 | ||
1e2082b5 SW |
1417 | switch (maps[i].type) { |
1418 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1419 | break; | |
1420 | case PIN_MAP_TYPE_MUX_GROUP: | |
1421 | ret = pinmux_validate_map(&maps[i], i); | |
1422 | if (ret < 0) | |
fde04f41 | 1423 | return ret; |
1e2082b5 SW |
1424 | break; |
1425 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1426 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1427 | ret = pinconf_validate_map(&maps[i], i); | |
1428 | if (ret < 0) | |
fde04f41 | 1429 | return ret; |
1e2082b5 SW |
1430 | break; |
1431 | default: | |
1432 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1433 | maps[i].name, i); |
1681f5ae SW |
1434 | return -EINVAL; |
1435 | } | |
befe5bdf LW |
1436 | } |
1437 | ||
b2b3e66e | 1438 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
2104d12d | 1439 | if (!maps_node) |
b2b3e66e | 1440 | return -ENOMEM; |
befe5bdf | 1441 | |
c72bed23 | 1442 | maps_node->maps = maps; |
b2b3e66e | 1443 | maps_node->num_maps = num_maps; |
befe5bdf | 1444 | |
c5272a28 | 1445 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1446 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1447 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1448 | |
befe5bdf LW |
1449 | return 0; |
1450 | } | |
c72bed23 | 1451 | EXPORT_SYMBOL_GPL(pinctrl_register_mappings); |
befe5bdf | 1452 | |
57291ce2 | 1453 | /** |
c72bed23 | 1454 | * pinctrl_unregister_mappings() - unregister a set of pin controller mappings |
9c340bbb | 1455 | * @map: the pincontrol mappings table passed to pinctrl_register_mappings() |
c72bed23 | 1456 | * when registering the mappings. |
57291ce2 | 1457 | */ |
c72bed23 | 1458 | void pinctrl_unregister_mappings(const struct pinctrl_map *map) |
57291ce2 SW |
1459 | { |
1460 | struct pinctrl_maps *maps_node; | |
1461 | ||
42fed7ba | 1462 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1463 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1464 | if (maps_node->maps == map) { | |
1465 | list_del(&maps_node->node); | |
db6c2c69 | 1466 | kfree(maps_node); |
42fed7ba | 1467 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1468 | return; |
1469 | } | |
1470 | } | |
42fed7ba | 1471 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 | 1472 | } |
c72bed23 | 1473 | EXPORT_SYMBOL_GPL(pinctrl_unregister_mappings); |
57291ce2 | 1474 | |
840a47ba JD |
1475 | /** |
1476 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1477 | * @pctldev: pin controller device | |
1478 | */ | |
1479 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1480 | { | |
1481 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
981ed1bf | 1482 | return pinctrl_commit_state(pctldev->p, pctldev->hog_sleep); |
840a47ba JD |
1483 | return 0; |
1484 | } | |
1485 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1486 | ||
1487 | /** | |
1488 | * pinctrl_force_default() - turn a given controller device into default state | |
1489 | * @pctldev: pin controller device | |
1490 | */ | |
1491 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1492 | { | |
1493 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
981ed1bf | 1494 | return pinctrl_commit_state(pctldev->p, pctldev->hog_default); |
840a47ba JD |
1495 | return 0; |
1496 | } | |
1497 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1498 | ||
ef0eebc0 DA |
1499 | /** |
1500 | * pinctrl_init_done() - tell pinctrl probe is done | |
1501 | * | |
1502 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1503 | * driver selected some other state. | |
1504 | * | |
1505 | * @dev: device to that's done probing | |
1506 | */ | |
1507 | int pinctrl_init_done(struct device *dev) | |
1508 | { | |
1509 | struct dev_pin_info *pins = dev->pins; | |
1510 | int ret; | |
1511 | ||
1512 | if (!pins) | |
1513 | return 0; | |
1514 | ||
1515 | if (IS_ERR(pins->init_state)) | |
1516 | return 0; /* No such state */ | |
1517 | ||
1518 | if (pins->p->state != pins->init_state) | |
1519 | return 0; /* Not at init anyway */ | |
1520 | ||
1521 | if (IS_ERR(pins->default_state)) | |
1522 | return 0; /* No default state */ | |
1523 | ||
1524 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1525 | if (ret) | |
1526 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1527 | ||
1528 | return ret; | |
1529 | } | |
1530 | ||
55d54d1e UH |
1531 | static int pinctrl_select_bound_state(struct device *dev, |
1532 | struct pinctrl_state *state) | |
14005ee2 LW |
1533 | { |
1534 | struct dev_pin_info *pins = dev->pins; | |
1535 | int ret; | |
1536 | ||
f3333497 TL |
1537 | if (IS_ERR(state)) |
1538 | return 0; /* No such state */ | |
1539 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1540 | if (ret) |
f3333497 TL |
1541 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1542 | state->name); | |
14005ee2 LW |
1543 | return ret; |
1544 | } | |
f3333497 TL |
1545 | |
1546 | /** | |
55d54d1e | 1547 | * pinctrl_select_default_state() - select default pinctrl state |
f3333497 TL |
1548 | * @dev: device to select default state for |
1549 | */ | |
55d54d1e | 1550 | int pinctrl_select_default_state(struct device *dev) |
f3333497 TL |
1551 | { |
1552 | if (!dev->pins) | |
1553 | return 0; | |
1554 | ||
55d54d1e UH |
1555 | return pinctrl_select_bound_state(dev, dev->pins->default_state); |
1556 | } | |
1557 | EXPORT_SYMBOL_GPL(pinctrl_select_default_state); | |
1558 | ||
1559 | #ifdef CONFIG_PM | |
1560 | ||
1561 | /** | |
1562 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1563 | * @dev: device to select default state for | |
1564 | */ | |
1565 | int pinctrl_pm_select_default_state(struct device *dev) | |
1566 | { | |
1567 | return pinctrl_select_default_state(dev); | |
f3333497 | 1568 | } |
f472dead | 1569 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1570 | |
1571 | /** | |
1572 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1573 | * @dev: device to select sleep state for | |
1574 | */ | |
1575 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1576 | { | |
f3333497 | 1577 | if (!dev->pins) |
14005ee2 | 1578 | return 0; |
f3333497 | 1579 | |
55d54d1e | 1580 | return pinctrl_select_bound_state(dev, dev->pins->sleep_state); |
14005ee2 | 1581 | } |
f472dead | 1582 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1583 | |
1584 | /** | |
1585 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1586 | * @dev: device to select idle state for | |
1587 | */ | |
1588 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1589 | { | |
f3333497 | 1590 | if (!dev->pins) |
14005ee2 | 1591 | return 0; |
f3333497 | 1592 | |
55d54d1e | 1593 | return pinctrl_select_bound_state(dev, dev->pins->idle_state); |
14005ee2 | 1594 | } |
f472dead | 1595 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1596 | #endif |
1597 | ||
2744e8af LW |
1598 | #ifdef CONFIG_DEBUG_FS |
1599 | ||
1600 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1601 | { | |
1602 | struct pinctrl_dev *pctldev = s->private; | |
1603 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1604 | unsigned i, pin; |
b507cb92 | 1605 | #ifdef CONFIG_GPIOLIB |
f1b206cf DF |
1606 | struct pinctrl_gpio_range *range; |
1607 | unsigned int gpio_num; | |
1608 | struct gpio_chip *chip; | |
b507cb92 | 1609 | #endif |
2744e8af LW |
1610 | |
1611 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1612 | |
42fed7ba | 1613 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1614 | |
706e8520 CP |
1615 | /* The pin number can be retrived from the pin controller descriptor */ |
1616 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1617 | struct pin_desc *desc; |
1618 | ||
706e8520 | 1619 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1620 | desc = pin_desc_get(pctldev, pin); |
1621 | /* Pin space may be sparse */ | |
cea234e9 | 1622 | if (!desc) |
2744e8af LW |
1623 | continue; |
1624 | ||
cf9d994d | 1625 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af | 1626 | |
f1b206cf DF |
1627 | #ifdef CONFIG_GPIOLIB |
1628 | gpio_num = 0; | |
1629 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
1630 | if ((pin >= range->pin_base) && | |
1631 | (pin < (range->pin_base + range->npins))) { | |
1632 | gpio_num = range->base + (pin - range->pin_base); | |
1633 | break; | |
1634 | } | |
1635 | } | |
1636 | chip = gpio_to_chip(gpio_num); | |
1637 | if (chip && chip->gpiodev && chip->gpiodev->base) | |
1638 | seq_printf(s, "%u:%s ", gpio_num - | |
1639 | chip->gpiodev->base, chip->label); | |
1640 | else | |
1641 | seq_puts(s, "0:? "); | |
1642 | #endif | |
1643 | ||
2744e8af LW |
1644 | /* Driver-specific info per pin */ |
1645 | if (ops->pin_dbg_show) | |
1646 | ops->pin_dbg_show(pctldev, s, pin); | |
1647 | ||
1648 | seq_puts(s, "\n"); | |
1649 | } | |
1650 | ||
42fed7ba | 1651 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1652 | |
2744e8af LW |
1653 | return 0; |
1654 | } | |
b5520891 | 1655 | DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); |
2744e8af LW |
1656 | |
1657 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1658 | { | |
1659 | struct pinctrl_dev *pctldev = s->private; | |
1660 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1661 | unsigned ngroups, selector = 0; |
2744e8af | 1662 | |
42fed7ba PC |
1663 | mutex_lock(&pctldev->mutex); |
1664 | ||
d1e90e9e | 1665 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1666 | |
2744e8af | 1667 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1668 | while (selector < ngroups) { |
e5b3b2d9 AT |
1669 | const unsigned *pins = NULL; |
1670 | unsigned num_pins = 0; | |
2744e8af | 1671 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1672 | const char *pname; |
e5b3b2d9 | 1673 | int ret = 0; |
2744e8af LW |
1674 | int i; |
1675 | ||
e5b3b2d9 AT |
1676 | if (ops->get_group_pins) |
1677 | ret = ops->get_group_pins(pctldev, selector, | |
1678 | &pins, &num_pins); | |
2744e8af LW |
1679 | if (ret) |
1680 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1681 | gname); | |
1682 | else { | |
dcb5dbc3 DA |
1683 | seq_printf(s, "group: %s\n", gname); |
1684 | for (i = 0; i < num_pins; i++) { | |
1685 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1686 | if (WARN_ON(!pname)) { |
42fed7ba | 1687 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1688 | return -EINVAL; |
b4dd784b | 1689 | } |
dcb5dbc3 DA |
1690 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1691 | } | |
1692 | seq_puts(s, "\n"); | |
2744e8af LW |
1693 | } |
1694 | selector++; | |
1695 | } | |
1696 | ||
42fed7ba | 1697 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1698 | |
1699 | return 0; | |
1700 | } | |
b5520891 | 1701 | DEFINE_SHOW_ATTRIBUTE(pinctrl_groups); |
2744e8af LW |
1702 | |
1703 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1704 | { | |
1705 | struct pinctrl_dev *pctldev = s->private; | |
6cadafb3 | 1706 | struct pinctrl_gpio_range *range; |
2744e8af LW |
1707 | |
1708 | seq_puts(s, "GPIO ranges handled:\n"); | |
1709 | ||
42fed7ba | 1710 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1711 | |
2744e8af | 1712 | /* Loop over the ranges */ |
2744e8af | 1713 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1714 | if (range->pins) { |
1715 | int a; | |
1716 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1717 | range->id, range->name, | |
1718 | range->base, (range->base + range->npins - 1)); | |
1719 | for (a = 0; a < range->npins - 1; a++) | |
1720 | seq_printf(s, "%u, ", range->pins[a]); | |
1721 | seq_printf(s, "%u}\n", range->pins[a]); | |
1722 | } | |
1723 | else | |
1724 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1725 | range->id, range->name, | |
1726 | range->base, (range->base + range->npins - 1), | |
1727 | range->pin_base, | |
1728 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1729 | } |
57b676f9 | 1730 | |
42fed7ba | 1731 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1732 | |
1733 | return 0; | |
1734 | } | |
b5520891 | 1735 | DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges); |
2744e8af LW |
1736 | |
1737 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1738 | { | |
1739 | struct pinctrl_dev *pctldev; | |
1740 | ||
ae6b4d85 | 1741 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1742 | |
42fed7ba | 1743 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1744 | |
2744e8af LW |
1745 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1746 | seq_printf(s, "%s ", pctldev->desc->name); | |
1747 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1748 | seq_puts(s, "yes "); |
1749 | else | |
1750 | seq_puts(s, "no "); | |
1751 | if (pctldev->desc->confops) | |
2744e8af LW |
1752 | seq_puts(s, "yes"); |
1753 | else | |
1754 | seq_puts(s, "no"); | |
1755 | seq_puts(s, "\n"); | |
1756 | } | |
57b676f9 | 1757 | |
42fed7ba | 1758 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1759 | |
1760 | return 0; | |
1761 | } | |
b5520891 | 1762 | DEFINE_SHOW_ATTRIBUTE(pinctrl_devices); |
2744e8af | 1763 | |
1e2082b5 SW |
1764 | static inline const char *map_type(enum pinctrl_map_type type) |
1765 | { | |
1766 | static const char * const names[] = { | |
1767 | "INVALID", | |
1768 | "DUMMY_STATE", | |
1769 | "MUX_GROUP", | |
1770 | "CONFIGS_PIN", | |
1771 | "CONFIGS_GROUP", | |
1772 | }; | |
1773 | ||
1774 | if (type >= ARRAY_SIZE(names)) | |
1775 | return "UNKNOWN"; | |
1776 | ||
1777 | return names[type]; | |
1778 | } | |
1779 | ||
3eedb437 SW |
1780 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1781 | { | |
1782 | struct pinctrl_maps *maps_node; | |
1783 | int i; | |
3f713b7c | 1784 | const struct pinctrl_map *map; |
3eedb437 SW |
1785 | |
1786 | seq_puts(s, "Pinctrl maps:\n"); | |
1787 | ||
42fed7ba | 1788 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1789 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1790 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1791 | map->dev_name, map->name, map_type(map->type), | |
1792 | map->type); | |
1793 | ||
1794 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1795 | seq_printf(s, "controlling device %s\n", | |
1796 | map->ctrl_dev_name); | |
1797 | ||
1798 | switch (map->type) { | |
1799 | case PIN_MAP_TYPE_MUX_GROUP: | |
1800 | pinmux_show_map(s, map); | |
1801 | break; | |
1802 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1803 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1804 | pinconf_show_map(s, map); | |
1805 | break; | |
1806 | default: | |
1807 | break; | |
1808 | } | |
1809 | ||
390e1046 | 1810 | seq_putc(s, '\n'); |
3eedb437 | 1811 | } |
42fed7ba | 1812 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1813 | |
1814 | return 0; | |
1815 | } | |
b5520891 | 1816 | DEFINE_SHOW_ATTRIBUTE(pinctrl_maps); |
3eedb437 | 1817 | |
befe5bdf LW |
1818 | static int pinctrl_show(struct seq_file *s, void *what) |
1819 | { | |
1820 | struct pinctrl *p; | |
6e5e959d | 1821 | struct pinctrl_state *state; |
7ecdb16f | 1822 | struct pinctrl_setting *setting; |
befe5bdf LW |
1823 | |
1824 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1825 | |
42fed7ba | 1826 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1827 | |
befe5bdf | 1828 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1829 | seq_printf(s, "device: %s current state: %s\n", |
1830 | dev_name(p->dev), | |
1831 | p->state ? p->state->name : "none"); | |
1832 | ||
1833 | list_for_each_entry(state, &p->states, node) { | |
1834 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1835 | |
6e5e959d | 1836 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1837 | struct pinctrl_dev *pctldev = setting->pctldev; |
1838 | ||
1839 | seq_printf(s, " type: %s controller %s ", | |
1840 | map_type(setting->type), | |
1841 | pinctrl_dev_get_name(pctldev)); | |
1842 | ||
1843 | switch (setting->type) { | |
1844 | case PIN_MAP_TYPE_MUX_GROUP: | |
1845 | pinmux_show_setting(s, setting); | |
1846 | break; | |
1847 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1848 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1849 | pinconf_show_setting(s, setting); | |
1850 | break; | |
1851 | default: | |
1852 | break; | |
1853 | } | |
6e5e959d | 1854 | } |
befe5bdf | 1855 | } |
befe5bdf LW |
1856 | } |
1857 | ||
42fed7ba | 1858 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1859 | |
befe5bdf LW |
1860 | return 0; |
1861 | } | |
b5520891 | 1862 | DEFINE_SHOW_ATTRIBUTE(pinctrl); |
befe5bdf | 1863 | |
2744e8af LW |
1864 | static struct dentry *debugfs_root; |
1865 | ||
1866 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1867 | { | |
02157160 | 1868 | struct dentry *device_root; |
1781af56 JK |
1869 | const char *debugfs_name; |
1870 | ||
1871 | if (pctldev->desc->name && | |
1872 | strcmp(dev_name(pctldev->dev), pctldev->desc->name)) { | |
1873 | debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL, | |
1874 | "%s-%s", dev_name(pctldev->dev), | |
1875 | pctldev->desc->name); | |
1876 | if (!debugfs_name) { | |
1877 | pr_warn("failed to determine debugfs dir name for %s\n", | |
1878 | dev_name(pctldev->dev)); | |
1879 | return; | |
1880 | } | |
1881 | } else { | |
1882 | debugfs_name = dev_name(pctldev->dev); | |
1883 | } | |
2744e8af | 1884 | |
1781af56 | 1885 | device_root = debugfs_create_dir(debugfs_name, debugfs_root); |
02157160 TL |
1886 | pctldev->device_root = device_root; |
1887 | ||
2744e8af LW |
1888 | if (IS_ERR(device_root) || !device_root) { |
1889 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1890 | dev_name(pctldev->dev)); |
2744e8af LW |
1891 | return; |
1892 | } | |
1893 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
b5520891 | 1894 | device_root, pctldev, &pinctrl_pins_fops); |
2744e8af | 1895 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, |
b5520891 | 1896 | device_root, pctldev, &pinctrl_groups_fops); |
2744e8af | 1897 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, |
b5520891 | 1898 | device_root, pctldev, &pinctrl_gpioranges_fops); |
e7f2a444 FV |
1899 | if (pctldev->desc->pmxops) |
1900 | pinmux_init_device_debugfs(device_root, pctldev); | |
1901 | if (pctldev->desc->confops) | |
1902 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1903 | } |
1904 | ||
02157160 TL |
1905 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1906 | { | |
1907 | debugfs_remove_recursive(pctldev->device_root); | |
1908 | } | |
1909 | ||
2744e8af LW |
1910 | static void pinctrl_init_debugfs(void) |
1911 | { | |
1912 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1913 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1914 | pr_warn("failed to create debugfs directory\n"); | |
1915 | debugfs_root = NULL; | |
1916 | return; | |
1917 | } | |
1918 | ||
1919 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
b5520891 | 1920 | debugfs_root, NULL, &pinctrl_devices_fops); |
3eedb437 | 1921 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
b5520891 | 1922 | debugfs_root, NULL, &pinctrl_maps_fops); |
befe5bdf | 1923 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
b5520891 | 1924 | debugfs_root, NULL, &pinctrl_fops); |
2744e8af LW |
1925 | } |
1926 | ||
1927 | #else /* CONFIG_DEBUG_FS */ | |
1928 | ||
1929 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1930 | { | |
1931 | } | |
1932 | ||
1933 | static void pinctrl_init_debugfs(void) | |
1934 | { | |
1935 | } | |
1936 | ||
02157160 TL |
1937 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1938 | { | |
1939 | } | |
1940 | ||
2744e8af LW |
1941 | #endif |
1942 | ||
d26bc49f SW |
1943 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1944 | { | |
1945 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1946 | ||
1947 | if (!ops || | |
d1e90e9e | 1948 | !ops->get_groups_count || |
e5b3b2d9 | 1949 | !ops->get_group_name) |
d26bc49f SW |
1950 | return -EINVAL; |
1951 | ||
1952 | return 0; | |
1953 | } | |
1954 | ||
99e4f675 | 1955 | /** |
950b0d91 | 1956 | * pinctrl_init_controller() - init a pin controller device |
2744e8af LW |
1957 | * @pctldesc: descriptor for this pin controller |
1958 | * @dev: parent device for this pin controller | |
1959 | * @driver_data: private pin controller data for this pin controller | |
1960 | */ | |
0ca4921f AS |
1961 | static struct pinctrl_dev * |
1962 | pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, | |
1963 | void *driver_data) | |
2744e8af | 1964 | { |
2744e8af LW |
1965 | struct pinctrl_dev *pctldev; |
1966 | int ret; | |
1967 | ||
da9aecb0 | 1968 | if (!pctldesc) |
323de9ef | 1969 | return ERR_PTR(-EINVAL); |
da9aecb0 | 1970 | if (!pctldesc->name) |
323de9ef | 1971 | return ERR_PTR(-EINVAL); |
2744e8af | 1972 | |
02f5b989 | 1973 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
2104d12d | 1974 | if (!pctldev) |
323de9ef | 1975 | return ERR_PTR(-ENOMEM); |
b9130b77 TL |
1976 | |
1977 | /* Initialize pin control device struct */ | |
1978 | pctldev->owner = pctldesc->owner; | |
1979 | pctldev->desc = pctldesc; | |
1980 | pctldev->driver_data = driver_data; | |
1981 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
c033a718 | 1982 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a | 1983 | INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL); |
a76edc89 TL |
1984 | #endif |
1985 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
1986 | INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL); | |
c033a718 | 1987 | #endif |
b9130b77 | 1988 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
46daed6e | 1989 | INIT_LIST_HEAD(&pctldev->node); |
b9130b77 | 1990 | pctldev->dev = dev; |
42fed7ba | 1991 | mutex_init(&pctldev->mutex); |
b9130b77 | 1992 | |
d26bc49f | 1993 | /* check core ops for sanity */ |
323de9ef MY |
1994 | ret = pinctrl_check_ops(pctldev); |
1995 | if (ret) { | |
ad6e1107 | 1996 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1997 | goto out_err; |
1998 | } | |
1999 | ||
2744e8af LW |
2000 | /* If we're implementing pinmuxing, check the ops for sanity */ |
2001 | if (pctldesc->pmxops) { | |
323de9ef MY |
2002 | ret = pinmux_check_ops(pctldev); |
2003 | if (ret) | |
b9130b77 | 2004 | goto out_err; |
2744e8af LW |
2005 | } |
2006 | ||
ae6b4d85 LW |
2007 | /* If we're implementing pinconfig, check the ops for sanity */ |
2008 | if (pctldesc->confops) { | |
323de9ef MY |
2009 | ret = pinconf_check_ops(pctldev); |
2010 | if (ret) | |
b9130b77 | 2011 | goto out_err; |
ae6b4d85 LW |
2012 | } |
2013 | ||
2744e8af | 2014 | /* Register all the pins */ |
ad6e1107 | 2015 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
2016 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
2017 | if (ret) { | |
ad6e1107 | 2018 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
2019 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
2020 | pctldesc->npins); | |
51cd24ee | 2021 | goto out_err; |
2744e8af LW |
2022 | } |
2023 | ||
2744e8af LW |
2024 | return pctldev; |
2025 | ||
51cd24ee | 2026 | out_err: |
42fed7ba | 2027 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 2028 | kfree(pctldev); |
323de9ef | 2029 | return ERR_PTR(ret); |
2744e8af | 2030 | } |
950b0d91 | 2031 | |
61187142 | 2032 | static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) |
950b0d91 TL |
2033 | { |
2034 | pctldev->p = create_pinctrl(pctldev->dev, pctldev); | |
61187142 TL |
2035 | if (PTR_ERR(pctldev->p) == -ENODEV) { |
2036 | dev_dbg(pctldev->dev, "no hogs found\n"); | |
950b0d91 | 2037 | |
61187142 TL |
2038 | return 0; |
2039 | } | |
2040 | ||
2041 | if (IS_ERR(pctldev->p)) { | |
2042 | dev_err(pctldev->dev, "error claiming hogs: %li\n", | |
2043 | PTR_ERR(pctldev->p)); | |
2044 | ||
2045 | return PTR_ERR(pctldev->p); | |
2046 | } | |
2047 | ||
61187142 TL |
2048 | pctldev->hog_default = |
2049 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); | |
2050 | if (IS_ERR(pctldev->hog_default)) { | |
2051 | dev_dbg(pctldev->dev, | |
2052 | "failed to lookup the default state\n"); | |
2053 | } else { | |
2054 | if (pinctrl_select_state(pctldev->p, | |
2055 | pctldev->hog_default)) | |
2056 | dev_err(pctldev->dev, | |
2057 | "failed to select default state\n"); | |
2058 | } | |
2059 | ||
2060 | pctldev->hog_sleep = | |
2061 | pinctrl_lookup_state(pctldev->p, | |
2062 | PINCTRL_STATE_SLEEP); | |
2063 | if (IS_ERR(pctldev->hog_sleep)) | |
2064 | dev_dbg(pctldev->dev, | |
2065 | "failed to lookup the sleep state\n"); | |
2066 | ||
2067 | return 0; | |
2068 | } | |
2069 | ||
2070 | int pinctrl_enable(struct pinctrl_dev *pctldev) | |
2071 | { | |
2072 | int error; | |
2073 | ||
2074 | error = pinctrl_claim_hogs(pctldev); | |
2075 | if (error) { | |
2076 | dev_err(pctldev->dev, "could not claim hogs: %i\n", | |
2077 | error); | |
2078 | mutex_destroy(&pctldev->mutex); | |
2079 | kfree(pctldev); | |
2080 | ||
2081 | return error; | |
950b0d91 TL |
2082 | } |
2083 | ||
2084 | mutex_lock(&pinctrldev_list_mutex); | |
2085 | list_add_tail(&pctldev->node, &pinctrldev_list); | |
2086 | mutex_unlock(&pinctrldev_list_mutex); | |
2087 | ||
2088 | pinctrl_init_device_debugfs(pctldev); | |
2089 | ||
2090 | return 0; | |
2091 | } | |
61187142 | 2092 | EXPORT_SYMBOL_GPL(pinctrl_enable); |
950b0d91 TL |
2093 | |
2094 | /** | |
2095 | * pinctrl_register() - register a pin controller device | |
2096 | * @pctldesc: descriptor for this pin controller | |
2097 | * @dev: parent device for this pin controller | |
2098 | * @driver_data: private pin controller data for this pin controller | |
2099 | * | |
2100 | * Note that pinctrl_register() is known to have problems as the pin | |
2101 | * controller driver functions are called before the driver has a | |
2102 | * struct pinctrl_dev handle. To avoid issues later on, please use the | |
2103 | * new pinctrl_register_and_init() below instead. | |
2104 | */ | |
2105 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
2106 | struct device *dev, void *driver_data) | |
2107 | { | |
2108 | struct pinctrl_dev *pctldev; | |
2109 | int error; | |
2110 | ||
2111 | pctldev = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2112 | if (IS_ERR(pctldev)) | |
2113 | return pctldev; | |
2114 | ||
61187142 TL |
2115 | error = pinctrl_enable(pctldev); |
2116 | if (error) | |
950b0d91 | 2117 | return ERR_PTR(error); |
950b0d91 TL |
2118 | |
2119 | return pctldev; | |
2120 | ||
2121 | } | |
2744e8af LW |
2122 | EXPORT_SYMBOL_GPL(pinctrl_register); |
2123 | ||
61187142 TL |
2124 | /** |
2125 | * pinctrl_register_and_init() - register and init pin controller device | |
2126 | * @pctldesc: descriptor for this pin controller | |
2127 | * @dev: parent device for this pin controller | |
2128 | * @driver_data: private pin controller data for this pin controller | |
2129 | * @pctldev: pin controller device | |
2130 | * | |
2131 | * Note that pinctrl_enable() still needs to be manually called after | |
2132 | * this once the driver is ready. | |
2133 | */ | |
950b0d91 TL |
2134 | int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, |
2135 | struct device *dev, void *driver_data, | |
2136 | struct pinctrl_dev **pctldev) | |
2137 | { | |
2138 | struct pinctrl_dev *p; | |
950b0d91 TL |
2139 | |
2140 | p = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2141 | if (IS_ERR(p)) | |
2142 | return PTR_ERR(p); | |
2143 | ||
2144 | /* | |
2145 | * We have pinctrl_start() call functions in the pin controller | |
2146 | * driver with create_pinctrl() for at least dt_node_to_map(). So | |
2147 | * let's make sure pctldev is properly initialized for the | |
2148 | * pin controller driver before we do anything. | |
2149 | */ | |
2150 | *pctldev = p; | |
2151 | ||
950b0d91 TL |
2152 | return 0; |
2153 | } | |
2154 | EXPORT_SYMBOL_GPL(pinctrl_register_and_init); | |
2155 | ||
2744e8af LW |
2156 | /** |
2157 | * pinctrl_unregister() - unregister pinmux | |
2158 | * @pctldev: pin controller to unregister | |
2159 | * | |
2160 | * Called by pinmux drivers to unregister a pinmux. | |
2161 | */ | |
2162 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
2163 | { | |
5d589b09 | 2164 | struct pinctrl_gpio_range *range, *n; |
3429fb3c | 2165 | |
cea234e9 | 2166 | if (!pctldev) |
2744e8af LW |
2167 | return; |
2168 | ||
42fed7ba | 2169 | mutex_lock(&pctldev->mutex); |
42fed7ba | 2170 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 2171 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 2172 | |
3429fb3c | 2173 | if (!IS_ERR_OR_NULL(pctldev->p)) |
42fed7ba | 2174 | pinctrl_put(pctldev->p); |
57b676f9 | 2175 | |
db93facf JL |
2176 | mutex_lock(&pinctrldev_list_mutex); |
2177 | mutex_lock(&pctldev->mutex); | |
2744e8af | 2178 | /* TODO: check that no pinmuxes are still active? */ |
46daed6e | 2179 | list_del(&pctldev->node); |
a76edc89 | 2180 | pinmux_generic_free_functions(pctldev); |
c7059c5a | 2181 | pinctrl_generic_free_groups(pctldev); |
2744e8af LW |
2182 | /* Destroy descriptor tree */ |
2183 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
2184 | pctldev->desc->npins); | |
5d589b09 DA |
2185 | /* remove gpio ranges map */ |
2186 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
2187 | list_del(&range->node); | |
2188 | ||
42fed7ba PC |
2189 | mutex_unlock(&pctldev->mutex); |
2190 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 2191 | kfree(pctldev); |
42fed7ba | 2192 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
2193 | } |
2194 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
2195 | ||
80e0f8d9 LD |
2196 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
2197 | { | |
2198 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
2199 | ||
2200 | pinctrl_unregister(pctldev); | |
2201 | } | |
2202 | ||
2203 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
2204 | { | |
2205 | struct pctldev **r = res; | |
2206 | ||
3024f920 | 2207 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
2208 | return 0; |
2209 | ||
2210 | return *r == data; | |
2211 | } | |
2212 | ||
2213 | /** | |
2214 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
2215 | * @dev: parent device for this pin controller | |
2216 | * @pctldesc: descriptor for this pin controller | |
2217 | * @driver_data: private pin controller data for this pin controller | |
2218 | * | |
2219 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2220 | * it returns valid pinctrl handle. | |
2221 | * | |
2222 | * The pinctrl device will be automatically released when the device is unbound. | |
2223 | */ | |
2224 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
2225 | struct pinctrl_desc *pctldesc, | |
2226 | void *driver_data) | |
2227 | { | |
2228 | struct pinctrl_dev **ptr, *pctldev; | |
2229 | ||
2230 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2231 | if (!ptr) | |
2232 | return ERR_PTR(-ENOMEM); | |
2233 | ||
2234 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
2235 | if (IS_ERR(pctldev)) { | |
2236 | devres_free(ptr); | |
2237 | return pctldev; | |
2238 | } | |
2239 | ||
2240 | *ptr = pctldev; | |
2241 | devres_add(dev, ptr); | |
2242 | ||
2243 | return pctldev; | |
2244 | } | |
2245 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
2246 | ||
950b0d91 TL |
2247 | /** |
2248 | * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init | |
2249 | * @dev: parent device for this pin controller | |
2250 | * @pctldesc: descriptor for this pin controller | |
2251 | * @driver_data: private pin controller data for this pin controller | |
9c340bbb | 2252 | * @pctldev: pin controller device |
950b0d91 | 2253 | * |
9c340bbb | 2254 | * Returns zero on success or an error number on failure. |
950b0d91 TL |
2255 | * |
2256 | * The pinctrl device will be automatically released when the device is unbound. | |
2257 | */ | |
2258 | int devm_pinctrl_register_and_init(struct device *dev, | |
2259 | struct pinctrl_desc *pctldesc, | |
2260 | void *driver_data, | |
2261 | struct pinctrl_dev **pctldev) | |
2262 | { | |
2263 | struct pinctrl_dev **ptr; | |
2264 | int error; | |
2265 | ||
2266 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2267 | if (!ptr) | |
2268 | return -ENOMEM; | |
2269 | ||
2270 | error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev); | |
2271 | if (error) { | |
2272 | devres_free(ptr); | |
2273 | return error; | |
2274 | } | |
2275 | ||
2276 | *ptr = *pctldev; | |
2277 | devres_add(dev, ptr); | |
2278 | ||
2279 | return 0; | |
2280 | } | |
2281 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init); | |
2282 | ||
80e0f8d9 LD |
2283 | /** |
2284 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
2285 | * @dev: device for which which resource was allocated | |
2286 | * @pctldev: the pinctrl device to unregister. | |
2287 | */ | |
2288 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
2289 | { | |
2290 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
2291 | devm_pinctrl_dev_match, pctldev)); | |
2292 | } | |
2293 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
2294 | ||
2744e8af LW |
2295 | static int __init pinctrl_init(void) |
2296 | { | |
2297 | pr_info("initialized pinctrl subsystem\n"); | |
2298 | pinctrl_init_debugfs(); | |
2299 | return 0; | |
2300 | } | |
2301 | ||
2302 | /* init early since many drivers really need to initialized pinmux early */ | |
2303 | core_initcall(pinctrl_init); |