Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba | 43 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 44 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
45 | |
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 50 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
6c325f87 | 156 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
157 | return pin; |
158 | } | |
159 | ||
160 | return -EINVAL; | |
161 | } | |
162 | ||
dcb5dbc3 DA |
163 | /** |
164 | * pin_get_name_from_id() - look up a pin name from a pin id | |
165 | * @pctldev: the pin control device to lookup the pin on | |
166 | * @name: the name of the pin to look up | |
167 | */ | |
168 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
169 | { | |
170 | const struct pin_desc *desc; | |
171 | ||
172 | desc = pin_desc_get(pctldev, pin); | |
cea234e9 | 173 | if (!desc) { |
dcb5dbc3 DA |
174 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", |
175 | pin); | |
176 | return NULL; | |
177 | } | |
178 | ||
179 | return desc->name; | |
180 | } | |
181 | ||
2744e8af LW |
182 | /** |
183 | * pin_is_valid() - check if pin exists on controller | |
184 | * @pctldev: the pin control device to check the pin on | |
185 | * @pin: pin to check, use the local pin controller index number | |
186 | * | |
187 | * This tells us whether a certain pin exist on a certain pin controller or | |
188 | * not. Pin lists may be sparse, so some pins may not exist. | |
189 | */ | |
190 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
191 | { | |
192 | struct pin_desc *pindesc; | |
193 | ||
194 | if (pin < 0) | |
195 | return false; | |
196 | ||
42fed7ba | 197 | mutex_lock(&pctldev->mutex); |
2744e8af | 198 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 199 | mutex_unlock(&pctldev->mutex); |
2744e8af | 200 | |
57b676f9 | 201 | return pindesc != NULL; |
2744e8af LW |
202 | } |
203 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
204 | ||
205 | /* Deletes a range of pin descriptors */ | |
206 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
207 | const struct pinctrl_pin_desc *pins, | |
208 | unsigned num_pins) | |
209 | { | |
210 | int i; | |
211 | ||
2744e8af LW |
212 | for (i = 0; i < num_pins; i++) { |
213 | struct pin_desc *pindesc; | |
214 | ||
215 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
216 | pins[i].number); | |
cea234e9 | 217 | if (pindesc) { |
2744e8af LW |
218 | radix_tree_delete(&pctldev->pin_desc_tree, |
219 | pins[i].number); | |
ca53c5f1 LW |
220 | if (pindesc->dynamic_name) |
221 | kfree(pindesc->name); | |
2744e8af LW |
222 | } |
223 | kfree(pindesc); | |
224 | } | |
2744e8af LW |
225 | } |
226 | ||
227 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
cd8f61f1 | 228 | const struct pinctrl_pin_desc *pin) |
2744e8af LW |
229 | { |
230 | struct pin_desc *pindesc; | |
231 | ||
cd8f61f1 | 232 | pindesc = pin_desc_get(pctldev, pin->number); |
cea234e9 | 233 | if (pindesc) { |
cd8f61f1 MY |
234 | dev_err(pctldev->dev, "pin %d already registered\n", |
235 | pin->number); | |
2744e8af LW |
236 | return -EINVAL; |
237 | } | |
238 | ||
239 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
2104d12d | 240 | if (!pindesc) |
2744e8af | 241 | return -ENOMEM; |
ae6b4d85 | 242 | |
2744e8af LW |
243 | /* Set owner */ |
244 | pindesc->pctldev = pctldev; | |
245 | ||
9af1e44f | 246 | /* Copy basic pin info */ |
cd8f61f1 MY |
247 | if (pin->name) { |
248 | pindesc->name = pin->name; | |
ca53c5f1 | 249 | } else { |
cd8f61f1 | 250 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", pin->number); |
cea234e9 | 251 | if (!pindesc->name) { |
eb26cc9c | 252 | kfree(pindesc); |
ca53c5f1 | 253 | return -ENOMEM; |
eb26cc9c | 254 | } |
ca53c5f1 LW |
255 | pindesc->dynamic_name = true; |
256 | } | |
2744e8af | 257 | |
cd8f61f1 MY |
258 | pindesc->drv_data = pin->drv_data; |
259 | ||
260 | radix_tree_insert(&pctldev->pin_desc_tree, pin->number, pindesc); | |
2744e8af | 261 | pr_debug("registered pin %d (%s) on %s\n", |
cd8f61f1 | 262 | pin->number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
263 | return 0; |
264 | } | |
265 | ||
266 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
3f713b7c | 267 | const struct pinctrl_pin_desc *pins, |
2744e8af LW |
268 | unsigned num_descs) |
269 | { | |
270 | unsigned i; | |
271 | int ret = 0; | |
272 | ||
273 | for (i = 0; i < num_descs; i++) { | |
cd8f61f1 | 274 | ret = pinctrl_register_one_pin(pctldev, &pins[i]); |
2744e8af LW |
275 | if (ret) |
276 | return ret; | |
277 | } | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
c8587eee CR |
282 | /** |
283 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
284 | * @range: GPIO range used for the translation | |
285 | * @gpio: gpio pin to translate to a pin number | |
286 | * | |
287 | * Finds the pin number for a given GPIO using the specified GPIO range | |
288 | * as a base for translation. The distinction between linear GPIO ranges | |
289 | * and pin list based GPIO ranges is managed correctly by this function. | |
290 | * | |
291 | * This function assumes the gpio is part of the specified GPIO range, use | |
292 | * only after making sure this is the case (e.g. by calling it on the | |
293 | * result of successful pinctrl_get_device_gpio_range calls)! | |
294 | */ | |
295 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
296 | unsigned int gpio) | |
297 | { | |
298 | unsigned int offset = gpio - range->base; | |
299 | if (range->pins) | |
300 | return range->pins[offset]; | |
301 | else | |
302 | return range->pin_base + offset; | |
303 | } | |
304 | ||
2744e8af LW |
305 | /** |
306 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
307 | * @pctldev: pin controller device to check | |
308 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
309 | * | |
310 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
311 | * controller, return the range or NULL | |
312 | */ | |
313 | static struct pinctrl_gpio_range * | |
314 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
315 | { | |
316 | struct pinctrl_gpio_range *range = NULL; | |
317 | ||
42fed7ba | 318 | mutex_lock(&pctldev->mutex); |
2744e8af | 319 | /* Loop over the ranges */ |
2744e8af LW |
320 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
321 | /* Check if we're in the valid range */ | |
322 | if (gpio >= range->base && | |
323 | gpio < range->base + range->npins) { | |
42fed7ba | 324 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
325 | return range; |
326 | } | |
327 | } | |
42fed7ba | 328 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
329 | return NULL; |
330 | } | |
331 | ||
51e13c24 HZ |
332 | /** |
333 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
334 | * the same GPIO chip are in range | |
335 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
336 | * | |
337 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
338 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
339 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
340 | * of the same GPIO chip don't have back-end pinctrl interface. | |
341 | * If the return value is true, it means that pinctrl device is ready & the | |
342 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
343 | * is false, it means that pinctrl device may not be ready. | |
344 | */ | |
2afe8229 | 345 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
346 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
347 | { | |
348 | struct pinctrl_dev *pctldev; | |
349 | struct pinctrl_gpio_range *range = NULL; | |
350 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
351 | ||
942cde72 TL |
352 | if (WARN(!chip, "no gpio_chip for gpio%i?", gpio)) |
353 | return false; | |
354 | ||
44d5f7bb LW |
355 | mutex_lock(&pinctrldev_list_mutex); |
356 | ||
51e13c24 HZ |
357 | /* Loop over the pin controllers */ |
358 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
359 | /* Loop over the ranges */ | |
5ffbe2e6 | 360 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
361 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
362 | /* Check if any gpio range overlapped with gpio chip */ | |
363 | if (range->base + range->npins - 1 < chip->base || | |
364 | range->base > chip->base + chip->ngpio - 1) | |
365 | continue; | |
5ffbe2e6 | 366 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 367 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
368 | return true; |
369 | } | |
5ffbe2e6 | 370 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 371 | } |
44d5f7bb LW |
372 | |
373 | mutex_unlock(&pinctrldev_list_mutex); | |
374 | ||
51e13c24 HZ |
375 | return false; |
376 | } | |
2afe8229 HZ |
377 | #else |
378 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
379 | #endif | |
51e13c24 | 380 | |
2744e8af LW |
381 | /** |
382 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
383 | * @gpio: the pin to locate the pin controller for | |
384 | * @outdev: the pin control device if found | |
385 | * @outrange: the GPIO range if found | |
386 | * | |
387 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
388 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
389 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
390 | * may still have not been registered. | |
2744e8af | 391 | */ |
4ecce45d SW |
392 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
393 | struct pinctrl_dev **outdev, | |
394 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
395 | { |
396 | struct pinctrl_dev *pctldev = NULL; | |
397 | ||
f0059021 AL |
398 | mutex_lock(&pinctrldev_list_mutex); |
399 | ||
2744e8af | 400 | /* Loop over the pin controllers */ |
2744e8af LW |
401 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
402 | struct pinctrl_gpio_range *range; | |
403 | ||
404 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
cea234e9 | 405 | if (range) { |
2744e8af LW |
406 | *outdev = pctldev; |
407 | *outrange = range; | |
f0059021 | 408 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
409 | return 0; |
410 | } | |
411 | } | |
2744e8af | 412 | |
f0059021 AL |
413 | mutex_unlock(&pinctrldev_list_mutex); |
414 | ||
4650b7cb | 415 | return -EPROBE_DEFER; |
2744e8af LW |
416 | } |
417 | ||
418 | /** | |
419 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
420 | * @pctldev: pin controller device to add the range to | |
421 | * @range: the GPIO range to add | |
422 | * | |
423 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
424 | * this to register handled ranges after registering your pin controller. | |
425 | */ | |
426 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
427 | struct pinctrl_gpio_range *range) | |
428 | { | |
42fed7ba | 429 | mutex_lock(&pctldev->mutex); |
8b9c139f | 430 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 431 | mutex_unlock(&pctldev->mutex); |
2744e8af | 432 | } |
4ecce45d | 433 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 434 | |
3e5e00b6 DA |
435 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
436 | struct pinctrl_gpio_range *ranges, | |
437 | unsigned nranges) | |
438 | { | |
439 | int i; | |
440 | ||
441 | for (i = 0; i < nranges; i++) | |
442 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
443 | } | |
444 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
445 | ||
192c369c | 446 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
447 | struct pinctrl_gpio_range *range) |
448 | { | |
42fed7ba PC |
449 | struct pinctrl_dev *pctldev; |
450 | ||
42fed7ba | 451 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 452 | |
dfa97515 LW |
453 | /* |
454 | * If we can't find this device, let's assume that is because | |
455 | * it has not probed yet, so the driver trying to register this | |
456 | * range need to defer probing. | |
457 | */ | |
42fed7ba | 458 | if (!pctldev) { |
dfa97515 | 459 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 460 | } |
f23f1516 | 461 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 462 | |
f23f1516 SH |
463 | return pctldev; |
464 | } | |
192c369c | 465 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 466 | |
586a87e6 CR |
467 | int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group, |
468 | const unsigned **pins, unsigned *num_pins) | |
469 | { | |
470 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
471 | int gs; | |
472 | ||
e5b3b2d9 AT |
473 | if (!pctlops->get_group_pins) |
474 | return -EINVAL; | |
475 | ||
586a87e6 CR |
476 | gs = pinctrl_get_group_selector(pctldev, pin_group); |
477 | if (gs < 0) | |
478 | return gs; | |
479 | ||
480 | return pctlops->get_group_pins(pctldev, gs, pins, num_pins); | |
481 | } | |
482 | EXPORT_SYMBOL_GPL(pinctrl_get_group_pins); | |
483 | ||
9afbefb2 | 484 | struct pinctrl_gpio_range * |
b18537cd JE |
485 | pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev, |
486 | unsigned int pin) | |
9afbefb2 | 487 | { |
c8f50e86 | 488 | struct pinctrl_gpio_range *range; |
9afbefb2 LW |
489 | |
490 | /* Loop over the ranges */ | |
491 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
492 | /* Check if we're in the valid range */ | |
c8587eee CR |
493 | if (range->pins) { |
494 | int a; | |
495 | for (a = 0; a < range->npins; a++) { | |
496 | if (range->pins[a] == pin) | |
b18537cd | 497 | return range; |
c8587eee CR |
498 | } |
499 | } else if (pin >= range->pin_base && | |
c8f50e86 | 500 | pin < range->pin_base + range->npins) |
b18537cd | 501 | return range; |
9afbefb2 | 502 | } |
b18537cd JE |
503 | |
504 | return NULL; | |
505 | } | |
506 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock); | |
507 | ||
508 | /** | |
509 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
510 | * @pctldev: the pin controller device to look in | |
511 | * @pin: a controller-local number to find the range for | |
512 | */ | |
513 | struct pinctrl_gpio_range * | |
514 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
515 | unsigned int pin) | |
516 | { | |
517 | struct pinctrl_gpio_range *range; | |
518 | ||
519 | mutex_lock(&pctldev->mutex); | |
520 | range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin); | |
42fed7ba | 521 | mutex_unlock(&pctldev->mutex); |
b18537cd | 522 | |
c8f50e86 | 523 | return range; |
9afbefb2 LW |
524 | } |
525 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
526 | ||
7e10ee68 | 527 | /** |
50842cbd | 528 | * pinctrl_remove_gpio_range() - remove a range of GPIOs from a pin controller |
7e10ee68 VK |
529 | * @pctldev: pin controller device to remove the range from |
530 | * @range: the GPIO range to remove | |
531 | */ | |
532 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
533 | struct pinctrl_gpio_range *range) | |
534 | { | |
42fed7ba | 535 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 536 | list_del(&range->node); |
42fed7ba | 537 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
538 | } |
539 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
540 | ||
c033a718 | 541 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
542 | |
543 | /** | |
544 | * pinctrl_generic_get_group_count() - returns the number of pin groups | |
545 | * @pctldev: pin controller device | |
546 | */ | |
547 | int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev) | |
548 | { | |
549 | return pctldev->num_groups; | |
550 | } | |
551 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_count); | |
552 | ||
553 | /** | |
554 | * pinctrl_generic_get_group_name() - returns the name of a pin group | |
555 | * @pctldev: pin controller device | |
556 | * @selector: group number | |
557 | */ | |
558 | const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev, | |
559 | unsigned int selector) | |
560 | { | |
561 | struct group_desc *group; | |
562 | ||
563 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
564 | selector); | |
565 | if (!group) | |
566 | return NULL; | |
567 | ||
568 | return group->name; | |
569 | } | |
570 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_name); | |
571 | ||
572 | /** | |
573 | * pinctrl_generic_get_group_pins() - gets the pin group pins | |
574 | * @pctldev: pin controller device | |
575 | * @selector: group number | |
576 | * @pins: pins in the group | |
577 | * @num_pins: number of pins in the group | |
578 | */ | |
579 | int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev, | |
580 | unsigned int selector, | |
581 | const unsigned int **pins, | |
582 | unsigned int *num_pins) | |
583 | { | |
584 | struct group_desc *group; | |
585 | ||
586 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
587 | selector); | |
588 | if (!group) { | |
589 | dev_err(pctldev->dev, "%s could not find pingroup%i\n", | |
590 | __func__, selector); | |
591 | return -EINVAL; | |
592 | } | |
593 | ||
594 | *pins = group->pins; | |
595 | *num_pins = group->num_pins; | |
596 | ||
597 | return 0; | |
598 | } | |
599 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins); | |
600 | ||
601 | /** | |
602 | * pinctrl_generic_get_group() - returns a pin group based on the number | |
603 | * @pctldev: pin controller device | |
604 | * @gselector: group number | |
605 | */ | |
606 | struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev, | |
607 | unsigned int selector) | |
608 | { | |
609 | struct group_desc *group; | |
610 | ||
611 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
612 | selector); | |
613 | if (!group) | |
614 | return NULL; | |
615 | ||
616 | return group; | |
617 | } | |
618 | EXPORT_SYMBOL_GPL(pinctrl_generic_get_group); | |
619 | ||
620 | /** | |
621 | * pinctrl_generic_add_group() - adds a new pin group | |
622 | * @pctldev: pin controller device | |
623 | * @name: name of the pin group | |
624 | * @pins: pins in the pin group | |
625 | * @num_pins: number of pins in the pin group | |
626 | * @data: pin controller driver specific data | |
627 | * | |
628 | * Note that the caller must take care of locking. | |
629 | */ | |
630 | int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name, | |
631 | int *pins, int num_pins, void *data) | |
632 | { | |
633 | struct group_desc *group; | |
634 | ||
635 | group = devm_kzalloc(pctldev->dev, sizeof(*group), GFP_KERNEL); | |
636 | if (!group) | |
637 | return -ENOMEM; | |
638 | ||
639 | group->name = name; | |
640 | group->pins = pins; | |
641 | group->num_pins = num_pins; | |
642 | group->data = data; | |
643 | ||
644 | radix_tree_insert(&pctldev->pin_group_tree, pctldev->num_groups, | |
645 | group); | |
646 | ||
647 | pctldev->num_groups++; | |
648 | ||
649 | return 0; | |
650 | } | |
651 | EXPORT_SYMBOL_GPL(pinctrl_generic_add_group); | |
652 | ||
653 | /** | |
654 | * pinctrl_generic_remove_group() - removes a numbered pin group | |
655 | * @pctldev: pin controller device | |
656 | * @selector: group number | |
657 | * | |
658 | * Note that the caller must take care of locking. | |
659 | */ | |
660 | int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev, | |
661 | unsigned int selector) | |
662 | { | |
663 | struct group_desc *group; | |
664 | ||
665 | group = radix_tree_lookup(&pctldev->pin_group_tree, | |
666 | selector); | |
667 | if (!group) | |
668 | return -ENOENT; | |
669 | ||
670 | radix_tree_delete(&pctldev->pin_group_tree, selector); | |
671 | devm_kfree(pctldev->dev, group); | |
672 | ||
673 | pctldev->num_groups--; | |
674 | ||
675 | return 0; | |
676 | } | |
677 | EXPORT_SYMBOL_GPL(pinctrl_generic_remove_group); | |
678 | ||
679 | /** | |
680 | * pinctrl_generic_free_groups() - removes all pin groups | |
681 | * @pctldev: pin controller device | |
682 | * | |
664b7c47 TL |
683 | * Note that the caller must take care of locking. The pinctrl groups |
684 | * are allocated with devm_kzalloc() so no need to free them here. | |
c7059c5a TL |
685 | */ |
686 | static void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
687 | { | |
688 | struct radix_tree_iter iter; | |
906a2a39 | 689 | void __rcu **slot; |
c7059c5a TL |
690 | |
691 | radix_tree_for_each_slot(slot, &pctldev->pin_group_tree, &iter, 0) | |
664b7c47 | 692 | radix_tree_delete(&pctldev->pin_group_tree, iter.index); |
c7059c5a TL |
693 | |
694 | pctldev->num_groups = 0; | |
695 | } | |
696 | ||
697 | #else | |
698 | static inline void pinctrl_generic_free_groups(struct pinctrl_dev *pctldev) | |
699 | { | |
700 | } | |
c033a718 | 701 | #endif /* CONFIG_GENERIC_PINCTRL_GROUPS */ |
c7059c5a | 702 | |
7afde8ba LW |
703 | /** |
704 | * pinctrl_get_group_selector() - returns the group selector for a group | |
705 | * @pctldev: the pin controller handling the group | |
706 | * @pin_group: the pin group to look up | |
707 | */ | |
708 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
709 | const char *pin_group) | |
710 | { | |
711 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 712 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
713 | unsigned group_selector = 0; |
714 | ||
d1e90e9e | 715 | while (group_selector < ngroups) { |
7afde8ba LW |
716 | const char *gname = pctlops->get_group_name(pctldev, |
717 | group_selector); | |
718 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 719 | dev_dbg(pctldev->dev, |
7afde8ba LW |
720 | "found group selector %u for %s\n", |
721 | group_selector, | |
722 | pin_group); | |
723 | return group_selector; | |
724 | } | |
725 | ||
726 | group_selector++; | |
727 | } | |
728 | ||
51cd24ee | 729 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
730 | pin_group); |
731 | ||
732 | return -EINVAL; | |
733 | } | |
734 | ||
befe5bdf | 735 | /** |
a9a1d2a7 | 736 | * pinctrl_gpio_request() - request a single pin to be used as GPIO |
befe5bdf LW |
737 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
738 | * | |
739 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
740 | * as part of their gpio_request() semantics, platforms and individual drivers | |
741 | * shall *NOT* request GPIO pins to be muxed in. | |
742 | */ | |
a9a1d2a7 | 743 | int pinctrl_gpio_request(unsigned gpio) |
befe5bdf LW |
744 | { |
745 | struct pinctrl_dev *pctldev; | |
746 | struct pinctrl_gpio_range *range; | |
747 | int ret; | |
748 | int pin; | |
749 | ||
750 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 751 | if (ret) { |
51e13c24 HZ |
752 | if (pinctrl_ready_for_gpio_range(gpio)) |
753 | ret = 0; | |
4650b7cb | 754 | return ret; |
57b676f9 | 755 | } |
befe5bdf | 756 | |
9b77ace4 AL |
757 | mutex_lock(&pctldev->mutex); |
758 | ||
befe5bdf | 759 | /* Convert to the pin controllers number space */ |
c8587eee | 760 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 761 | |
57b676f9 SW |
762 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
763 | ||
9b77ace4 AL |
764 | mutex_unlock(&pctldev->mutex); |
765 | ||
57b676f9 | 766 | return ret; |
befe5bdf | 767 | } |
a9a1d2a7 | 768 | EXPORT_SYMBOL_GPL(pinctrl_gpio_request); |
befe5bdf LW |
769 | |
770 | /** | |
a9a1d2a7 | 771 | * pinctrl_gpio_free() - free control on a single pin, currently used as GPIO |
befe5bdf LW |
772 | * @gpio: the GPIO pin number from the GPIO subsystem number space |
773 | * | |
774 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
775 | * as part of their gpio_free() semantics, platforms and individual drivers | |
776 | * shall *NOT* request GPIO pins to be muxed out. | |
777 | */ | |
a9a1d2a7 | 778 | void pinctrl_gpio_free(unsigned gpio) |
befe5bdf LW |
779 | { |
780 | struct pinctrl_dev *pctldev; | |
781 | struct pinctrl_gpio_range *range; | |
782 | int ret; | |
783 | int pin; | |
784 | ||
785 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 786 | if (ret) { |
befe5bdf | 787 | return; |
57b676f9 | 788 | } |
42fed7ba | 789 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
790 | |
791 | /* Convert to the pin controllers number space */ | |
c8587eee | 792 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 793 | |
57b676f9 SW |
794 | pinmux_free_gpio(pctldev, pin, range); |
795 | ||
42fed7ba | 796 | mutex_unlock(&pctldev->mutex); |
befe5bdf | 797 | } |
a9a1d2a7 | 798 | EXPORT_SYMBOL_GPL(pinctrl_gpio_free); |
befe5bdf LW |
799 | |
800 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
801 | { | |
802 | struct pinctrl_dev *pctldev; | |
803 | struct pinctrl_gpio_range *range; | |
804 | int ret; | |
805 | int pin; | |
806 | ||
807 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 808 | if (ret) { |
befe5bdf | 809 | return ret; |
42fed7ba PC |
810 | } |
811 | ||
812 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
813 | |
814 | /* Convert to the pin controllers number space */ | |
c8587eee | 815 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
816 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
817 | ||
818 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 819 | |
42fed7ba | 820 | return ret; |
befe5bdf LW |
821 | } |
822 | ||
823 | /** | |
824 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
825 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
826 | * | |
827 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
828 | * as part of their gpio_direction_input() semantics, platforms and individual | |
829 | * drivers shall *NOT* touch pin control GPIO calls. | |
830 | */ | |
831 | int pinctrl_gpio_direction_input(unsigned gpio) | |
832 | { | |
42fed7ba | 833 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
834 | } |
835 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
836 | ||
837 | /** | |
838 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
839 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
840 | * | |
841 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
842 | * as part of their gpio_direction_output() semantics, platforms and individual | |
843 | * drivers shall *NOT* touch pin control GPIO calls. | |
844 | */ | |
845 | int pinctrl_gpio_direction_output(unsigned gpio) | |
846 | { | |
42fed7ba | 847 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
848 | } |
849 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
850 | ||
15381bc7 MW |
851 | /** |
852 | * pinctrl_gpio_set_config() - Apply config to given GPIO pin | |
853 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
854 | * @config: the configuration to apply to the GPIO | |
855 | * | |
856 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, if | |
857 | * they need to call the underlying pin controller to change GPIO config | |
858 | * (for example set debounce time). | |
859 | */ | |
860 | int pinctrl_gpio_set_config(unsigned gpio, unsigned long config) | |
861 | { | |
862 | unsigned long configs[] = { config }; | |
863 | struct pinctrl_gpio_range *range; | |
864 | struct pinctrl_dev *pctldev; | |
865 | int ret, pin; | |
866 | ||
867 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
868 | if (ret) | |
869 | return ret; | |
870 | ||
871 | mutex_lock(&pctldev->mutex); | |
872 | pin = gpio_to_pin(range, gpio); | |
873 | ret = pinconf_set_config(pctldev, pin, configs, ARRAY_SIZE(configs)); | |
874 | mutex_unlock(&pctldev->mutex); | |
875 | ||
876 | return ret; | |
877 | } | |
878 | EXPORT_SYMBOL_GPL(pinctrl_gpio_set_config); | |
879 | ||
6e5e959d SW |
880 | static struct pinctrl_state *find_state(struct pinctrl *p, |
881 | const char *name) | |
befe5bdf | 882 | { |
6e5e959d SW |
883 | struct pinctrl_state *state; |
884 | ||
885 | list_for_each_entry(state, &p->states, node) | |
886 | if (!strcmp(state->name, name)) | |
887 | return state; | |
888 | ||
889 | return NULL; | |
890 | } | |
891 | ||
892 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
893 | const char *name) | |
894 | { | |
895 | struct pinctrl_state *state; | |
896 | ||
897 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
2104d12d | 898 | if (!state) |
6e5e959d | 899 | return ERR_PTR(-ENOMEM); |
6e5e959d SW |
900 | |
901 | state->name = name; | |
902 | INIT_LIST_HEAD(&state->settings); | |
903 | ||
904 | list_add_tail(&state->node, &p->states); | |
905 | ||
906 | return state; | |
907 | } | |
908 | ||
99e4f675 | 909 | static int add_setting(struct pinctrl *p, struct pinctrl_dev *pctldev, |
3f713b7c | 910 | const struct pinctrl_map *map) |
6e5e959d SW |
911 | { |
912 | struct pinctrl_state *state; | |
7ecdb16f | 913 | struct pinctrl_setting *setting; |
6e5e959d | 914 | int ret; |
befe5bdf | 915 | |
6e5e959d SW |
916 | state = find_state(p, map->name); |
917 | if (!state) | |
918 | state = create_state(p, map->name); | |
919 | if (IS_ERR(state)) | |
920 | return PTR_ERR(state); | |
befe5bdf | 921 | |
1e2082b5 SW |
922 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
923 | return 0; | |
924 | ||
6e5e959d | 925 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
2104d12d | 926 | if (!setting) |
6e5e959d | 927 | return -ENOMEM; |
befe5bdf | 928 | |
1e2082b5 SW |
929 | setting->type = map->type; |
930 | ||
99e4f675 TL |
931 | if (pctldev) |
932 | setting->pctldev = pctldev; | |
933 | else | |
934 | setting->pctldev = | |
935 | get_pinctrl_dev_from_devname(map->ctrl_dev_name); | |
cea234e9 | 936 | if (!setting->pctldev) { |
6e5e959d | 937 | kfree(setting); |
89216494 LW |
938 | /* Do not defer probing of hogs (circular loop) */ |
939 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
940 | return -ENODEV; | |
c05127c4 LW |
941 | /* |
942 | * OK let us guess that the driver is not there yet, and | |
943 | * let's defer obtaining this pinctrl handle to later... | |
944 | */ | |
89216494 LW |
945 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
946 | map->ctrl_dev_name); | |
c05127c4 | 947 | return -EPROBE_DEFER; |
6e5e959d SW |
948 | } |
949 | ||
1a78958d LW |
950 | setting->dev_name = map->dev_name; |
951 | ||
1e2082b5 SW |
952 | switch (map->type) { |
953 | case PIN_MAP_TYPE_MUX_GROUP: | |
954 | ret = pinmux_map_to_setting(map, setting); | |
955 | break; | |
956 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
957 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
958 | ret = pinconf_map_to_setting(map, setting); | |
959 | break; | |
960 | default: | |
961 | ret = -EINVAL; | |
962 | break; | |
963 | } | |
6e5e959d SW |
964 | if (ret < 0) { |
965 | kfree(setting); | |
966 | return ret; | |
967 | } | |
968 | ||
969 | list_add_tail(&setting->node, &state->settings); | |
970 | ||
971 | return 0; | |
972 | } | |
973 | ||
974 | static struct pinctrl *find_pinctrl(struct device *dev) | |
975 | { | |
976 | struct pinctrl *p; | |
977 | ||
42fed7ba | 978 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 979 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
980 | if (p->dev == dev) { |
981 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 982 | return p; |
42fed7ba | 983 | } |
6e5e959d | 984 | |
42fed7ba | 985 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
986 | return NULL; |
987 | } | |
988 | ||
42fed7ba | 989 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d | 990 | |
99e4f675 TL |
991 | static struct pinctrl *create_pinctrl(struct device *dev, |
992 | struct pinctrl_dev *pctldev) | |
6e5e959d SW |
993 | { |
994 | struct pinctrl *p; | |
995 | const char *devname; | |
996 | struct pinctrl_maps *maps_node; | |
997 | int i; | |
3f713b7c | 998 | const struct pinctrl_map *map; |
6e5e959d | 999 | int ret; |
befe5bdf LW |
1000 | |
1001 | /* | |
1002 | * create the state cookie holder struct pinctrl for each | |
1003 | * mapping, this is what consumers will get when requesting | |
1004 | * a pin control handle with pinctrl_get() | |
1005 | */ | |
02f5b989 | 1006 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
2104d12d | 1007 | if (!p) |
befe5bdf | 1008 | return ERR_PTR(-ENOMEM); |
7ecdb16f | 1009 | p->dev = dev; |
6e5e959d | 1010 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
1011 | INIT_LIST_HEAD(&p->dt_maps); |
1012 | ||
99e4f675 | 1013 | ret = pinctrl_dt_to_map(p, pctldev); |
57291ce2 SW |
1014 | if (ret < 0) { |
1015 | kfree(p); | |
1016 | return ERR_PTR(ret); | |
1017 | } | |
6e5e959d SW |
1018 | |
1019 | devname = dev_name(dev); | |
befe5bdf | 1020 | |
42fed7ba | 1021 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 1022 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 1023 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
1024 | /* Map must be for this device */ |
1025 | if (strcmp(map->dev_name, devname)) | |
1026 | continue; | |
7f0ff06c NY |
1027 | /* |
1028 | * If pctldev is not null, we are claiming hog for it, | |
1029 | * that means, setting that is served by pctldev by itself. | |
1030 | * | |
1031 | * Thus we must skip map that is for this device but is served | |
1032 | * by other device. | |
1033 | */ | |
1034 | if (pctldev && | |
1035 | strcmp(dev_name(pctldev->dev), map->ctrl_dev_name)) | |
1036 | continue; | |
7ecdb16f | 1037 | |
99e4f675 | 1038 | ret = add_setting(p, pctldev, map); |
89216494 LW |
1039 | /* |
1040 | * At this point the adding of a setting may: | |
1041 | * | |
1042 | * - Defer, if the pinctrl device is not yet available | |
1043 | * - Fail, if the pinctrl device is not yet available, | |
1044 | * AND the setting is a hog. We cannot defer that, since | |
1045 | * the hog will kick in immediately after the device | |
1046 | * is registered. | |
1047 | * | |
1048 | * If the error returned was not -EPROBE_DEFER then we | |
1049 | * accumulate the errors to see if we end up with | |
1050 | * an -EPROBE_DEFER later, as that is the worst case. | |
1051 | */ | |
1052 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
1053 | pinctrl_free(p, false); |
1054 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 1055 | return ERR_PTR(ret); |
7ecdb16f | 1056 | } |
befe5bdf | 1057 | } |
42fed7ba PC |
1058 | mutex_unlock(&pinctrl_maps_mutex); |
1059 | ||
89216494 | 1060 | if (ret < 0) { |
3ec440e3 | 1061 | /* If some other error than deferral occurred, return here */ |
42fed7ba | 1062 | pinctrl_free(p, false); |
89216494 LW |
1063 | return ERR_PTR(ret); |
1064 | } | |
befe5bdf | 1065 | |
ab78029e LW |
1066 | kref_init(&p->users); |
1067 | ||
b0666ba4 | 1068 | /* Add the pinctrl handle to the global list */ |
7b320cb1 | 1069 | mutex_lock(&pinctrl_list_mutex); |
8b9c139f | 1070 | list_add_tail(&p->node, &pinctrl_list); |
7b320cb1 | 1071 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf LW |
1072 | |
1073 | return p; | |
6e5e959d | 1074 | } |
7ecdb16f | 1075 | |
42fed7ba PC |
1076 | /** |
1077 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
1078 | * @dev: the device to obtain the handle for | |
1079 | */ | |
1080 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
1081 | { |
1082 | struct pinctrl *p; | |
7ecdb16f | 1083 | |
6e5e959d SW |
1084 | if (WARN_ON(!dev)) |
1085 | return ERR_PTR(-EINVAL); | |
1086 | ||
ab78029e LW |
1087 | /* |
1088 | * See if somebody else (such as the device core) has already | |
1089 | * obtained a handle to the pinctrl for this device. In that case, | |
1090 | * return another pointer to it. | |
1091 | */ | |
6e5e959d | 1092 | p = find_pinctrl(dev); |
cea234e9 | 1093 | if (p) { |
ab78029e LW |
1094 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); |
1095 | kref_get(&p->users); | |
1096 | return p; | |
1097 | } | |
7ecdb16f | 1098 | |
99e4f675 | 1099 | return create_pinctrl(dev, NULL); |
befe5bdf LW |
1100 | } |
1101 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
1102 | ||
d3cee830 RG |
1103 | static void pinctrl_free_setting(bool disable_setting, |
1104 | struct pinctrl_setting *setting) | |
1105 | { | |
1106 | switch (setting->type) { | |
1107 | case PIN_MAP_TYPE_MUX_GROUP: | |
1108 | if (disable_setting) | |
1109 | pinmux_disable_setting(setting); | |
1110 | pinmux_free_setting(setting); | |
1111 | break; | |
1112 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1113 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1114 | pinconf_free_setting(setting); | |
1115 | break; | |
1116 | default: | |
1117 | break; | |
1118 | } | |
1119 | } | |
1120 | ||
42fed7ba | 1121 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 1122 | { |
6e5e959d SW |
1123 | struct pinctrl_state *state, *n1; |
1124 | struct pinctrl_setting *setting, *n2; | |
1125 | ||
42fed7ba | 1126 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
1127 | list_for_each_entry_safe(state, n1, &p->states, node) { |
1128 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 1129 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
1130 | list_del(&setting->node); |
1131 | kfree(setting); | |
1132 | } | |
1133 | list_del(&state->node); | |
1134 | kfree(state); | |
7ecdb16f | 1135 | } |
befe5bdf | 1136 | |
57291ce2 SW |
1137 | pinctrl_dt_free_maps(p); |
1138 | ||
6e5e959d SW |
1139 | if (inlist) |
1140 | list_del(&p->node); | |
befe5bdf | 1141 | kfree(p); |
42fed7ba | 1142 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 1143 | } |
befe5bdf LW |
1144 | |
1145 | /** | |
ab78029e LW |
1146 | * pinctrl_release() - release the pinctrl handle |
1147 | * @kref: the kref in the pinctrl being released | |
1148 | */ | |
2917e833 | 1149 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
1150 | { |
1151 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
1152 | ||
42fed7ba | 1153 | pinctrl_free(p, true); |
ab78029e LW |
1154 | } |
1155 | ||
1156 | /** | |
1157 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 1158 | * @p: the pinctrl handle to release |
befe5bdf | 1159 | */ |
57b676f9 SW |
1160 | void pinctrl_put(struct pinctrl *p) |
1161 | { | |
ab78029e | 1162 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
1163 | } |
1164 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
1165 | ||
42fed7ba PC |
1166 | /** |
1167 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
1168 | * @p: the pinctrl handle to retrieve the state from | |
1169 | * @name: the state name to retrieve | |
1170 | */ | |
1171 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
1172 | const char *name) | |
befe5bdf | 1173 | { |
6e5e959d | 1174 | struct pinctrl_state *state; |
befe5bdf | 1175 | |
6e5e959d | 1176 | state = find_state(p, name); |
5b3aa5f7 DA |
1177 | if (!state) { |
1178 | if (pinctrl_dummy_state) { | |
1179 | /* create dummy state */ | |
1180 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
1181 | name); | |
1182 | state = create_state(p, name); | |
d599bfb3 RG |
1183 | } else |
1184 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 1185 | } |
57b676f9 | 1186 | |
6e5e959d | 1187 | return state; |
befe5bdf | 1188 | } |
42fed7ba | 1189 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
1190 | |
1191 | /** | |
42fed7ba PC |
1192 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
1193 | * @p: the pinctrl handle for the device that requests configuration | |
1194 | * @state: the state handle to select/activate/program | |
befe5bdf | 1195 | */ |
42fed7ba | 1196 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 1197 | { |
6e5e959d | 1198 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 1199 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 1200 | int ret; |
7ecdb16f | 1201 | |
6e5e959d SW |
1202 | if (p->state == state) |
1203 | return 0; | |
befe5bdf | 1204 | |
6e5e959d SW |
1205 | if (p->state) { |
1206 | /* | |
2243a87d FW |
1207 | * For each pinmux setting in the old state, forget SW's record |
1208 | * of mux owner for that pingroup. Any pingroups which are | |
1209 | * still owned by the new state will be re-acquired by the call | |
1210 | * to pinmux_enable_setting() in the loop below. | |
6e5e959d SW |
1211 | */ |
1212 | list_for_each_entry(setting, &p->state->settings, node) { | |
1e2082b5 SW |
1213 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
1214 | continue; | |
2243a87d | 1215 | pinmux_disable_setting(setting); |
6e5e959d SW |
1216 | } |
1217 | } | |
1218 | ||
3102a76c | 1219 | p->state = NULL; |
6e5e959d SW |
1220 | |
1221 | /* Apply all the settings for the new state */ | |
1222 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1223 | switch (setting->type) { |
1224 | case PIN_MAP_TYPE_MUX_GROUP: | |
1225 | ret = pinmux_enable_setting(setting); | |
1226 | break; | |
1227 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1228 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1229 | ret = pinconf_apply_setting(setting); | |
1230 | break; | |
1231 | default: | |
1232 | ret = -EINVAL; | |
1233 | break; | |
1234 | } | |
3102a76c | 1235 | |
42fed7ba | 1236 | if (ret < 0) { |
3102a76c | 1237 | goto unapply_new_state; |
42fed7ba | 1238 | } |
befe5bdf | 1239 | } |
6e5e959d | 1240 | |
3102a76c RG |
1241 | p->state = state; |
1242 | ||
6e5e959d | 1243 | return 0; |
3102a76c RG |
1244 | |
1245 | unapply_new_state: | |
da58751c | 1246 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1247 | |
3102a76c RG |
1248 | list_for_each_entry(setting2, &state->settings, node) { |
1249 | if (&setting2->node == &setting->node) | |
1250 | break; | |
af606177 RG |
1251 | /* |
1252 | * All we can do here is pinmux_disable_setting. | |
1253 | * That means that some pins are muxed differently now | |
1254 | * than they were before applying the setting (We can't | |
1255 | * "unmux a pin"!), but it's not a big deal since the pins | |
1256 | * are free to be muxed by another apply_setting. | |
1257 | */ | |
1258 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1259 | pinmux_disable_setting(setting2); | |
3102a76c | 1260 | } |
8009d5ff | 1261 | |
385d9424 RG |
1262 | /* There's no infinite recursive loop here because p->state is NULL */ |
1263 | if (old_state) | |
42fed7ba | 1264 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1265 | |
1266 | return ret; | |
befe5bdf | 1267 | } |
6e5e959d | 1268 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1269 | |
6d4ca1fb SW |
1270 | static void devm_pinctrl_release(struct device *dev, void *res) |
1271 | { | |
1272 | pinctrl_put(*(struct pinctrl **)res); | |
1273 | } | |
1274 | ||
1275 | /** | |
1276 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1277 | * @dev: the device to obtain the handle for | |
1278 | * | |
1279 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1280 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1281 | */ | |
1282 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1283 | { | |
1284 | struct pinctrl **ptr, *p; | |
1285 | ||
1286 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1287 | if (!ptr) | |
1288 | return ERR_PTR(-ENOMEM); | |
1289 | ||
1290 | p = pinctrl_get(dev); | |
1291 | if (!IS_ERR(p)) { | |
1292 | *ptr = p; | |
1293 | devres_add(dev, ptr); | |
1294 | } else { | |
1295 | devres_free(ptr); | |
1296 | } | |
1297 | ||
1298 | return p; | |
1299 | } | |
1300 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1301 | ||
1302 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1303 | { | |
1304 | struct pinctrl **p = res; | |
1305 | ||
1306 | return *p == data; | |
1307 | } | |
1308 | ||
1309 | /** | |
1310 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1311 | * @p: the pinctrl handle to release | |
1312 | * | |
1313 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1314 | * this function will not need to be called and the resource management | |
1315 | * code will ensure that the resource is freed. | |
1316 | */ | |
1317 | void devm_pinctrl_put(struct pinctrl *p) | |
1318 | { | |
a72149e8 | 1319 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1320 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1321 | } |
1322 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1323 | ||
3f713b7c | 1324 | int pinctrl_register_map(const struct pinctrl_map *maps, unsigned num_maps, |
c5272a28 | 1325 | bool dup) |
befe5bdf | 1326 | { |
1e2082b5 | 1327 | int i, ret; |
b2b3e66e | 1328 | struct pinctrl_maps *maps_node; |
befe5bdf | 1329 | |
7e9236ff | 1330 | pr_debug("add %u pinctrl maps\n", num_maps); |
befe5bdf LW |
1331 | |
1332 | /* First sanity check the new mapping */ | |
1333 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1334 | if (!maps[i].dev_name) { |
1335 | pr_err("failed to register map %s (%d): no device given\n", | |
1336 | maps[i].name, i); | |
1337 | return -EINVAL; | |
1338 | } | |
1339 | ||
befe5bdf LW |
1340 | if (!maps[i].name) { |
1341 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1342 | i); |
befe5bdf LW |
1343 | return -EINVAL; |
1344 | } | |
1345 | ||
1e2082b5 SW |
1346 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1347 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1348 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1349 | maps[i].name, i); | |
1350 | return -EINVAL; | |
1351 | } | |
1352 | ||
1e2082b5 SW |
1353 | switch (maps[i].type) { |
1354 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1355 | break; | |
1356 | case PIN_MAP_TYPE_MUX_GROUP: | |
1357 | ret = pinmux_validate_map(&maps[i], i); | |
1358 | if (ret < 0) | |
fde04f41 | 1359 | return ret; |
1e2082b5 SW |
1360 | break; |
1361 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1362 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1363 | ret = pinconf_validate_map(&maps[i], i); | |
1364 | if (ret < 0) | |
fde04f41 | 1365 | return ret; |
1e2082b5 SW |
1366 | break; |
1367 | default: | |
1368 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1369 | maps[i].name, i); |
1681f5ae SW |
1370 | return -EINVAL; |
1371 | } | |
befe5bdf LW |
1372 | } |
1373 | ||
b2b3e66e | 1374 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
2104d12d | 1375 | if (!maps_node) |
b2b3e66e | 1376 | return -ENOMEM; |
befe5bdf | 1377 | |
b2b3e66e | 1378 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1379 | if (dup) { |
1380 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1381 | GFP_KERNEL); | |
1382 | if (!maps_node->maps) { | |
57291ce2 SW |
1383 | kfree(maps_node); |
1384 | return -ENOMEM; | |
1385 | } | |
1386 | } else { | |
1387 | maps_node->maps = maps; | |
befe5bdf LW |
1388 | } |
1389 | ||
c5272a28 | 1390 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1391 | list_add_tail(&maps_node->node, &pinctrl_maps); |
c5272a28 | 1392 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1393 | |
befe5bdf LW |
1394 | return 0; |
1395 | } | |
1396 | ||
57291ce2 SW |
1397 | /** |
1398 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1399 | * @maps: the pincontrol mappings table to register. This should probably be | |
1400 | * marked with __initdata so it can be discarded after boot. This | |
1401 | * function will perform a shallow copy for the mapping entries. | |
1402 | * @num_maps: the number of maps in the mapping table | |
1403 | */ | |
3f713b7c | 1404 | int pinctrl_register_mappings(const struct pinctrl_map *maps, |
57291ce2 SW |
1405 | unsigned num_maps) |
1406 | { | |
c5272a28 | 1407 | return pinctrl_register_map(maps, num_maps, true); |
57291ce2 SW |
1408 | } |
1409 | ||
3f713b7c | 1410 | void pinctrl_unregister_map(const struct pinctrl_map *map) |
57291ce2 SW |
1411 | { |
1412 | struct pinctrl_maps *maps_node; | |
1413 | ||
42fed7ba | 1414 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1415 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1416 | if (maps_node->maps == map) { | |
1417 | list_del(&maps_node->node); | |
db6c2c69 | 1418 | kfree(maps_node); |
42fed7ba | 1419 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1420 | return; |
1421 | } | |
1422 | } | |
42fed7ba | 1423 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1424 | } |
1425 | ||
840a47ba JD |
1426 | /** |
1427 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1428 | * @pctldev: pin controller device | |
1429 | */ | |
1430 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1431 | { | |
1432 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1433 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1434 | return 0; | |
1435 | } | |
1436 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1437 | ||
1438 | /** | |
1439 | * pinctrl_force_default() - turn a given controller device into default state | |
1440 | * @pctldev: pin controller device | |
1441 | */ | |
1442 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1443 | { | |
1444 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1445 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1446 | return 0; | |
1447 | } | |
1448 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1449 | ||
ef0eebc0 DA |
1450 | /** |
1451 | * pinctrl_init_done() - tell pinctrl probe is done | |
1452 | * | |
1453 | * We'll use this time to switch the pins from "init" to "default" unless the | |
1454 | * driver selected some other state. | |
1455 | * | |
1456 | * @dev: device to that's done probing | |
1457 | */ | |
1458 | int pinctrl_init_done(struct device *dev) | |
1459 | { | |
1460 | struct dev_pin_info *pins = dev->pins; | |
1461 | int ret; | |
1462 | ||
1463 | if (!pins) | |
1464 | return 0; | |
1465 | ||
1466 | if (IS_ERR(pins->init_state)) | |
1467 | return 0; /* No such state */ | |
1468 | ||
1469 | if (pins->p->state != pins->init_state) | |
1470 | return 0; /* Not at init anyway */ | |
1471 | ||
1472 | if (IS_ERR(pins->default_state)) | |
1473 | return 0; /* No default state */ | |
1474 | ||
1475 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1476 | if (ret) | |
1477 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1478 | ||
1479 | return ret; | |
1480 | } | |
1481 | ||
14005ee2 LW |
1482 | #ifdef CONFIG_PM |
1483 | ||
1484 | /** | |
f3333497 | 1485 | * pinctrl_pm_select_state() - select pinctrl state for PM |
14005ee2 | 1486 | * @dev: device to select default state for |
f3333497 | 1487 | * @state: state to set |
14005ee2 | 1488 | */ |
f3333497 TL |
1489 | static int pinctrl_pm_select_state(struct device *dev, |
1490 | struct pinctrl_state *state) | |
14005ee2 LW |
1491 | { |
1492 | struct dev_pin_info *pins = dev->pins; | |
1493 | int ret; | |
1494 | ||
f3333497 TL |
1495 | if (IS_ERR(state)) |
1496 | return 0; /* No such state */ | |
1497 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1498 | if (ret) |
f3333497 TL |
1499 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1500 | state->name); | |
14005ee2 LW |
1501 | return ret; |
1502 | } | |
f3333497 TL |
1503 | |
1504 | /** | |
1505 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1506 | * @dev: device to select default state for | |
1507 | */ | |
1508 | int pinctrl_pm_select_default_state(struct device *dev) | |
1509 | { | |
1510 | if (!dev->pins) | |
1511 | return 0; | |
1512 | ||
1513 | return pinctrl_pm_select_state(dev, dev->pins->default_state); | |
1514 | } | |
f472dead | 1515 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1516 | |
1517 | /** | |
1518 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1519 | * @dev: device to select sleep state for | |
1520 | */ | |
1521 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1522 | { | |
f3333497 | 1523 | if (!dev->pins) |
14005ee2 | 1524 | return 0; |
f3333497 TL |
1525 | |
1526 | return pinctrl_pm_select_state(dev, dev->pins->sleep_state); | |
14005ee2 | 1527 | } |
f472dead | 1528 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1529 | |
1530 | /** | |
1531 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1532 | * @dev: device to select idle state for | |
1533 | */ | |
1534 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1535 | { | |
f3333497 | 1536 | if (!dev->pins) |
14005ee2 | 1537 | return 0; |
f3333497 TL |
1538 | |
1539 | return pinctrl_pm_select_state(dev, dev->pins->idle_state); | |
14005ee2 | 1540 | } |
f472dead | 1541 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1542 | #endif |
1543 | ||
2744e8af LW |
1544 | #ifdef CONFIG_DEBUG_FS |
1545 | ||
1546 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1547 | { | |
1548 | struct pinctrl_dev *pctldev = s->private; | |
1549 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1550 | unsigned i, pin; |
2744e8af LW |
1551 | |
1552 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1553 | |
42fed7ba | 1554 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1555 | |
706e8520 CP |
1556 | /* The pin number can be retrived from the pin controller descriptor */ |
1557 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1558 | struct pin_desc *desc; |
1559 | ||
706e8520 | 1560 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1561 | desc = pin_desc_get(pctldev, pin); |
1562 | /* Pin space may be sparse */ | |
cea234e9 | 1563 | if (!desc) |
2744e8af LW |
1564 | continue; |
1565 | ||
cf9d994d | 1566 | seq_printf(s, "pin %d (%s) ", pin, desc->name); |
2744e8af LW |
1567 | |
1568 | /* Driver-specific info per pin */ | |
1569 | if (ops->pin_dbg_show) | |
1570 | ops->pin_dbg_show(pctldev, s, pin); | |
1571 | ||
1572 | seq_puts(s, "\n"); | |
1573 | } | |
1574 | ||
42fed7ba | 1575 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1576 | |
2744e8af LW |
1577 | return 0; |
1578 | } | |
1579 | ||
1580 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1581 | { | |
1582 | struct pinctrl_dev *pctldev = s->private; | |
1583 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1584 | unsigned ngroups, selector = 0; |
2744e8af | 1585 | |
42fed7ba PC |
1586 | mutex_lock(&pctldev->mutex); |
1587 | ||
d1e90e9e | 1588 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1589 | |
2744e8af | 1590 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1591 | while (selector < ngroups) { |
e5b3b2d9 AT |
1592 | const unsigned *pins = NULL; |
1593 | unsigned num_pins = 0; | |
2744e8af | 1594 | const char *gname = ops->get_group_name(pctldev, selector); |
dcb5dbc3 | 1595 | const char *pname; |
e5b3b2d9 | 1596 | int ret = 0; |
2744e8af LW |
1597 | int i; |
1598 | ||
e5b3b2d9 AT |
1599 | if (ops->get_group_pins) |
1600 | ret = ops->get_group_pins(pctldev, selector, | |
1601 | &pins, &num_pins); | |
2744e8af LW |
1602 | if (ret) |
1603 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1604 | gname); | |
1605 | else { | |
dcb5dbc3 DA |
1606 | seq_printf(s, "group: %s\n", gname); |
1607 | for (i = 0; i < num_pins; i++) { | |
1608 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1609 | if (WARN_ON(!pname)) { |
42fed7ba | 1610 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1611 | return -EINVAL; |
b4dd784b | 1612 | } |
dcb5dbc3 DA |
1613 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1614 | } | |
1615 | seq_puts(s, "\n"); | |
2744e8af LW |
1616 | } |
1617 | selector++; | |
1618 | } | |
1619 | ||
42fed7ba | 1620 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1621 | |
1622 | return 0; | |
1623 | } | |
1624 | ||
1625 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1626 | { | |
1627 | struct pinctrl_dev *pctldev = s->private; | |
1628 | struct pinctrl_gpio_range *range = NULL; | |
1629 | ||
1630 | seq_puts(s, "GPIO ranges handled:\n"); | |
1631 | ||
42fed7ba | 1632 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1633 | |
2744e8af | 1634 | /* Loop over the ranges */ |
2744e8af | 1635 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1636 | if (range->pins) { |
1637 | int a; | |
1638 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1639 | range->id, range->name, | |
1640 | range->base, (range->base + range->npins - 1)); | |
1641 | for (a = 0; a < range->npins - 1; a++) | |
1642 | seq_printf(s, "%u, ", range->pins[a]); | |
1643 | seq_printf(s, "%u}\n", range->pins[a]); | |
1644 | } | |
1645 | else | |
1646 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1647 | range->id, range->name, | |
1648 | range->base, (range->base + range->npins - 1), | |
1649 | range->pin_base, | |
1650 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1651 | } |
57b676f9 | 1652 | |
42fed7ba | 1653 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1654 | |
1655 | return 0; | |
1656 | } | |
1657 | ||
1658 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1659 | { | |
1660 | struct pinctrl_dev *pctldev; | |
1661 | ||
ae6b4d85 | 1662 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1663 | |
42fed7ba | 1664 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1665 | |
2744e8af LW |
1666 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1667 | seq_printf(s, "%s ", pctldev->desc->name); | |
1668 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1669 | seq_puts(s, "yes "); |
1670 | else | |
1671 | seq_puts(s, "no "); | |
1672 | if (pctldev->desc->confops) | |
2744e8af LW |
1673 | seq_puts(s, "yes"); |
1674 | else | |
1675 | seq_puts(s, "no"); | |
1676 | seq_puts(s, "\n"); | |
1677 | } | |
57b676f9 | 1678 | |
42fed7ba | 1679 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1680 | |
1681 | return 0; | |
1682 | } | |
1683 | ||
1e2082b5 SW |
1684 | static inline const char *map_type(enum pinctrl_map_type type) |
1685 | { | |
1686 | static const char * const names[] = { | |
1687 | "INVALID", | |
1688 | "DUMMY_STATE", | |
1689 | "MUX_GROUP", | |
1690 | "CONFIGS_PIN", | |
1691 | "CONFIGS_GROUP", | |
1692 | }; | |
1693 | ||
1694 | if (type >= ARRAY_SIZE(names)) | |
1695 | return "UNKNOWN"; | |
1696 | ||
1697 | return names[type]; | |
1698 | } | |
1699 | ||
3eedb437 SW |
1700 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1701 | { | |
1702 | struct pinctrl_maps *maps_node; | |
1703 | int i; | |
3f713b7c | 1704 | const struct pinctrl_map *map; |
3eedb437 SW |
1705 | |
1706 | seq_puts(s, "Pinctrl maps:\n"); | |
1707 | ||
42fed7ba | 1708 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1709 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1710 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1711 | map->dev_name, map->name, map_type(map->type), | |
1712 | map->type); | |
1713 | ||
1714 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1715 | seq_printf(s, "controlling device %s\n", | |
1716 | map->ctrl_dev_name); | |
1717 | ||
1718 | switch (map->type) { | |
1719 | case PIN_MAP_TYPE_MUX_GROUP: | |
1720 | pinmux_show_map(s, map); | |
1721 | break; | |
1722 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1723 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1724 | pinconf_show_map(s, map); | |
1725 | break; | |
1726 | default: | |
1727 | break; | |
1728 | } | |
1729 | ||
390e1046 | 1730 | seq_putc(s, '\n'); |
3eedb437 | 1731 | } |
42fed7ba | 1732 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1733 | |
1734 | return 0; | |
1735 | } | |
1736 | ||
befe5bdf LW |
1737 | static int pinctrl_show(struct seq_file *s, void *what) |
1738 | { | |
1739 | struct pinctrl *p; | |
6e5e959d | 1740 | struct pinctrl_state *state; |
7ecdb16f | 1741 | struct pinctrl_setting *setting; |
befe5bdf LW |
1742 | |
1743 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1744 | |
42fed7ba | 1745 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1746 | |
befe5bdf | 1747 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1748 | seq_printf(s, "device: %s current state: %s\n", |
1749 | dev_name(p->dev), | |
1750 | p->state ? p->state->name : "none"); | |
1751 | ||
1752 | list_for_each_entry(state, &p->states, node) { | |
1753 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1754 | |
6e5e959d | 1755 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1756 | struct pinctrl_dev *pctldev = setting->pctldev; |
1757 | ||
1758 | seq_printf(s, " type: %s controller %s ", | |
1759 | map_type(setting->type), | |
1760 | pinctrl_dev_get_name(pctldev)); | |
1761 | ||
1762 | switch (setting->type) { | |
1763 | case PIN_MAP_TYPE_MUX_GROUP: | |
1764 | pinmux_show_setting(s, setting); | |
1765 | break; | |
1766 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1767 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1768 | pinconf_show_setting(s, setting); | |
1769 | break; | |
1770 | default: | |
1771 | break; | |
1772 | } | |
6e5e959d | 1773 | } |
befe5bdf | 1774 | } |
befe5bdf LW |
1775 | } |
1776 | ||
42fed7ba | 1777 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1778 | |
befe5bdf LW |
1779 | return 0; |
1780 | } | |
1781 | ||
2744e8af LW |
1782 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1783 | { | |
1784 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1785 | } | |
1786 | ||
1787 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1788 | { | |
1789 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1790 | } | |
1791 | ||
1792 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1793 | { | |
1794 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1795 | } | |
1796 | ||
1797 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1798 | { | |
1799 | return single_open(file, pinctrl_devices_show, NULL); | |
1800 | } | |
1801 | ||
3eedb437 SW |
1802 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1803 | { | |
1804 | return single_open(file, pinctrl_maps_show, NULL); | |
1805 | } | |
1806 | ||
befe5bdf LW |
1807 | static int pinctrl_open(struct inode *inode, struct file *file) |
1808 | { | |
1809 | return single_open(file, pinctrl_show, NULL); | |
1810 | } | |
1811 | ||
2744e8af LW |
1812 | static const struct file_operations pinctrl_pins_ops = { |
1813 | .open = pinctrl_pins_open, | |
1814 | .read = seq_read, | |
1815 | .llseek = seq_lseek, | |
1816 | .release = single_release, | |
1817 | }; | |
1818 | ||
1819 | static const struct file_operations pinctrl_groups_ops = { | |
1820 | .open = pinctrl_groups_open, | |
1821 | .read = seq_read, | |
1822 | .llseek = seq_lseek, | |
1823 | .release = single_release, | |
1824 | }; | |
1825 | ||
1826 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1827 | .open = pinctrl_gpioranges_open, | |
1828 | .read = seq_read, | |
1829 | .llseek = seq_lseek, | |
1830 | .release = single_release, | |
1831 | }; | |
1832 | ||
3eedb437 SW |
1833 | static const struct file_operations pinctrl_devices_ops = { |
1834 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1835 | .read = seq_read, |
1836 | .llseek = seq_lseek, | |
1837 | .release = single_release, | |
1838 | }; | |
1839 | ||
3eedb437 SW |
1840 | static const struct file_operations pinctrl_maps_ops = { |
1841 | .open = pinctrl_maps_open, | |
2744e8af LW |
1842 | .read = seq_read, |
1843 | .llseek = seq_lseek, | |
1844 | .release = single_release, | |
1845 | }; | |
1846 | ||
befe5bdf LW |
1847 | static const struct file_operations pinctrl_ops = { |
1848 | .open = pinctrl_open, | |
1849 | .read = seq_read, | |
1850 | .llseek = seq_lseek, | |
1851 | .release = single_release, | |
1852 | }; | |
1853 | ||
2744e8af LW |
1854 | static struct dentry *debugfs_root; |
1855 | ||
1856 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1857 | { | |
02157160 | 1858 | struct dentry *device_root; |
2744e8af | 1859 | |
51cd24ee | 1860 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1861 | debugfs_root); |
02157160 TL |
1862 | pctldev->device_root = device_root; |
1863 | ||
2744e8af LW |
1864 | if (IS_ERR(device_root) || !device_root) { |
1865 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1866 | dev_name(pctldev->dev)); |
2744e8af LW |
1867 | return; |
1868 | } | |
1869 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1870 | device_root, pctldev, &pinctrl_pins_ops); | |
1871 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1872 | device_root, pctldev, &pinctrl_groups_ops); | |
1873 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1874 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
e7f2a444 FV |
1875 | if (pctldev->desc->pmxops) |
1876 | pinmux_init_device_debugfs(device_root, pctldev); | |
1877 | if (pctldev->desc->confops) | |
1878 | pinconf_init_device_debugfs(device_root, pctldev); | |
2744e8af LW |
1879 | } |
1880 | ||
02157160 TL |
1881 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1882 | { | |
1883 | debugfs_remove_recursive(pctldev->device_root); | |
1884 | } | |
1885 | ||
2744e8af LW |
1886 | static void pinctrl_init_debugfs(void) |
1887 | { | |
1888 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1889 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1890 | pr_warn("failed to create debugfs directory\n"); | |
1891 | debugfs_root = NULL; | |
1892 | return; | |
1893 | } | |
1894 | ||
1895 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1896 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1897 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1898 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1899 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1900 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1901 | } |
1902 | ||
1903 | #else /* CONFIG_DEBUG_FS */ | |
1904 | ||
1905 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1906 | { | |
1907 | } | |
1908 | ||
1909 | static void pinctrl_init_debugfs(void) | |
1910 | { | |
1911 | } | |
1912 | ||
02157160 TL |
1913 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1914 | { | |
1915 | } | |
1916 | ||
2744e8af LW |
1917 | #endif |
1918 | ||
d26bc49f SW |
1919 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1920 | { | |
1921 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1922 | ||
1923 | if (!ops || | |
d1e90e9e | 1924 | !ops->get_groups_count || |
e5b3b2d9 | 1925 | !ops->get_group_name) |
d26bc49f SW |
1926 | return -EINVAL; |
1927 | ||
1928 | return 0; | |
1929 | } | |
1930 | ||
99e4f675 | 1931 | /** |
950b0d91 | 1932 | * pinctrl_init_controller() - init a pin controller device |
2744e8af LW |
1933 | * @pctldesc: descriptor for this pin controller |
1934 | * @dev: parent device for this pin controller | |
1935 | * @driver_data: private pin controller data for this pin controller | |
1936 | */ | |
0ca4921f AS |
1937 | static struct pinctrl_dev * |
1938 | pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, | |
1939 | void *driver_data) | |
2744e8af | 1940 | { |
2744e8af LW |
1941 | struct pinctrl_dev *pctldev; |
1942 | int ret; | |
1943 | ||
da9aecb0 | 1944 | if (!pctldesc) |
323de9ef | 1945 | return ERR_PTR(-EINVAL); |
da9aecb0 | 1946 | if (!pctldesc->name) |
323de9ef | 1947 | return ERR_PTR(-EINVAL); |
2744e8af | 1948 | |
02f5b989 | 1949 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
2104d12d | 1950 | if (!pctldev) |
323de9ef | 1951 | return ERR_PTR(-ENOMEM); |
b9130b77 TL |
1952 | |
1953 | /* Initialize pin control device struct */ | |
1954 | pctldev->owner = pctldesc->owner; | |
1955 | pctldev->desc = pctldesc; | |
1956 | pctldev->driver_data = driver_data; | |
1957 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
c033a718 | 1958 | #ifdef CONFIG_GENERIC_PINCTRL_GROUPS |
c7059c5a | 1959 | INIT_RADIX_TREE(&pctldev->pin_group_tree, GFP_KERNEL); |
a76edc89 TL |
1960 | #endif |
1961 | #ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS | |
1962 | INIT_RADIX_TREE(&pctldev->pin_function_tree, GFP_KERNEL); | |
c033a718 | 1963 | #endif |
b9130b77 | 1964 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
46daed6e | 1965 | INIT_LIST_HEAD(&pctldev->node); |
b9130b77 | 1966 | pctldev->dev = dev; |
42fed7ba | 1967 | mutex_init(&pctldev->mutex); |
b9130b77 | 1968 | |
d26bc49f | 1969 | /* check core ops for sanity */ |
323de9ef MY |
1970 | ret = pinctrl_check_ops(pctldev); |
1971 | if (ret) { | |
ad6e1107 | 1972 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1973 | goto out_err; |
1974 | } | |
1975 | ||
2744e8af LW |
1976 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1977 | if (pctldesc->pmxops) { | |
323de9ef MY |
1978 | ret = pinmux_check_ops(pctldev); |
1979 | if (ret) | |
b9130b77 | 1980 | goto out_err; |
2744e8af LW |
1981 | } |
1982 | ||
ae6b4d85 LW |
1983 | /* If we're implementing pinconfig, check the ops for sanity */ |
1984 | if (pctldesc->confops) { | |
323de9ef MY |
1985 | ret = pinconf_check_ops(pctldev); |
1986 | if (ret) | |
b9130b77 | 1987 | goto out_err; |
ae6b4d85 LW |
1988 | } |
1989 | ||
2744e8af | 1990 | /* Register all the pins */ |
ad6e1107 | 1991 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1992 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1993 | if (ret) { | |
ad6e1107 | 1994 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1995 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1996 | pctldesc->npins); | |
51cd24ee | 1997 | goto out_err; |
2744e8af LW |
1998 | } |
1999 | ||
2744e8af LW |
2000 | return pctldev; |
2001 | ||
51cd24ee | 2002 | out_err: |
42fed7ba | 2003 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 2004 | kfree(pctldev); |
323de9ef | 2005 | return ERR_PTR(ret); |
2744e8af | 2006 | } |
950b0d91 | 2007 | |
61187142 | 2008 | static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) |
950b0d91 TL |
2009 | { |
2010 | pctldev->p = create_pinctrl(pctldev->dev, pctldev); | |
61187142 TL |
2011 | if (PTR_ERR(pctldev->p) == -ENODEV) { |
2012 | dev_dbg(pctldev->dev, "no hogs found\n"); | |
950b0d91 | 2013 | |
61187142 TL |
2014 | return 0; |
2015 | } | |
2016 | ||
2017 | if (IS_ERR(pctldev->p)) { | |
2018 | dev_err(pctldev->dev, "error claiming hogs: %li\n", | |
2019 | PTR_ERR(pctldev->p)); | |
2020 | ||
2021 | return PTR_ERR(pctldev->p); | |
2022 | } | |
2023 | ||
2024 | kref_get(&pctldev->p->users); | |
2025 | pctldev->hog_default = | |
2026 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); | |
2027 | if (IS_ERR(pctldev->hog_default)) { | |
2028 | dev_dbg(pctldev->dev, | |
2029 | "failed to lookup the default state\n"); | |
2030 | } else { | |
2031 | if (pinctrl_select_state(pctldev->p, | |
2032 | pctldev->hog_default)) | |
2033 | dev_err(pctldev->dev, | |
2034 | "failed to select default state\n"); | |
2035 | } | |
2036 | ||
2037 | pctldev->hog_sleep = | |
2038 | pinctrl_lookup_state(pctldev->p, | |
2039 | PINCTRL_STATE_SLEEP); | |
2040 | if (IS_ERR(pctldev->hog_sleep)) | |
2041 | dev_dbg(pctldev->dev, | |
2042 | "failed to lookup the sleep state\n"); | |
2043 | ||
2044 | return 0; | |
2045 | } | |
2046 | ||
2047 | int pinctrl_enable(struct pinctrl_dev *pctldev) | |
2048 | { | |
2049 | int error; | |
2050 | ||
2051 | error = pinctrl_claim_hogs(pctldev); | |
2052 | if (error) { | |
2053 | dev_err(pctldev->dev, "could not claim hogs: %i\n", | |
2054 | error); | |
2055 | mutex_destroy(&pctldev->mutex); | |
2056 | kfree(pctldev); | |
2057 | ||
2058 | return error; | |
950b0d91 TL |
2059 | } |
2060 | ||
2061 | mutex_lock(&pinctrldev_list_mutex); | |
2062 | list_add_tail(&pctldev->node, &pinctrldev_list); | |
2063 | mutex_unlock(&pinctrldev_list_mutex); | |
2064 | ||
2065 | pinctrl_init_device_debugfs(pctldev); | |
2066 | ||
2067 | return 0; | |
2068 | } | |
61187142 | 2069 | EXPORT_SYMBOL_GPL(pinctrl_enable); |
950b0d91 TL |
2070 | |
2071 | /** | |
2072 | * pinctrl_register() - register a pin controller device | |
2073 | * @pctldesc: descriptor for this pin controller | |
2074 | * @dev: parent device for this pin controller | |
2075 | * @driver_data: private pin controller data for this pin controller | |
2076 | * | |
2077 | * Note that pinctrl_register() is known to have problems as the pin | |
2078 | * controller driver functions are called before the driver has a | |
2079 | * struct pinctrl_dev handle. To avoid issues later on, please use the | |
2080 | * new pinctrl_register_and_init() below instead. | |
2081 | */ | |
2082 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
2083 | struct device *dev, void *driver_data) | |
2084 | { | |
2085 | struct pinctrl_dev *pctldev; | |
2086 | int error; | |
2087 | ||
2088 | pctldev = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2089 | if (IS_ERR(pctldev)) | |
2090 | return pctldev; | |
2091 | ||
61187142 TL |
2092 | error = pinctrl_enable(pctldev); |
2093 | if (error) | |
950b0d91 | 2094 | return ERR_PTR(error); |
950b0d91 TL |
2095 | |
2096 | return pctldev; | |
2097 | ||
2098 | } | |
2744e8af LW |
2099 | EXPORT_SYMBOL_GPL(pinctrl_register); |
2100 | ||
61187142 TL |
2101 | /** |
2102 | * pinctrl_register_and_init() - register and init pin controller device | |
2103 | * @pctldesc: descriptor for this pin controller | |
2104 | * @dev: parent device for this pin controller | |
2105 | * @driver_data: private pin controller data for this pin controller | |
2106 | * @pctldev: pin controller device | |
2107 | * | |
2108 | * Note that pinctrl_enable() still needs to be manually called after | |
2109 | * this once the driver is ready. | |
2110 | */ | |
950b0d91 TL |
2111 | int pinctrl_register_and_init(struct pinctrl_desc *pctldesc, |
2112 | struct device *dev, void *driver_data, | |
2113 | struct pinctrl_dev **pctldev) | |
2114 | { | |
2115 | struct pinctrl_dev *p; | |
950b0d91 TL |
2116 | |
2117 | p = pinctrl_init_controller(pctldesc, dev, driver_data); | |
2118 | if (IS_ERR(p)) | |
2119 | return PTR_ERR(p); | |
2120 | ||
2121 | /* | |
2122 | * We have pinctrl_start() call functions in the pin controller | |
2123 | * driver with create_pinctrl() for at least dt_node_to_map(). So | |
2124 | * let's make sure pctldev is properly initialized for the | |
2125 | * pin controller driver before we do anything. | |
2126 | */ | |
2127 | *pctldev = p; | |
2128 | ||
950b0d91 TL |
2129 | return 0; |
2130 | } | |
2131 | EXPORT_SYMBOL_GPL(pinctrl_register_and_init); | |
2132 | ||
2744e8af LW |
2133 | /** |
2134 | * pinctrl_unregister() - unregister pinmux | |
2135 | * @pctldev: pin controller to unregister | |
2136 | * | |
2137 | * Called by pinmux drivers to unregister a pinmux. | |
2138 | */ | |
2139 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
2140 | { | |
5d589b09 | 2141 | struct pinctrl_gpio_range *range, *n; |
3429fb3c | 2142 | |
cea234e9 | 2143 | if (!pctldev) |
2744e8af LW |
2144 | return; |
2145 | ||
42fed7ba | 2146 | mutex_lock(&pctldev->mutex); |
42fed7ba | 2147 | pinctrl_remove_device_debugfs(pctldev); |
db93facf | 2148 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 2149 | |
3429fb3c | 2150 | if (!IS_ERR_OR_NULL(pctldev->p)) |
42fed7ba | 2151 | pinctrl_put(pctldev->p); |
57b676f9 | 2152 | |
db93facf JL |
2153 | mutex_lock(&pinctrldev_list_mutex); |
2154 | mutex_lock(&pctldev->mutex); | |
2744e8af | 2155 | /* TODO: check that no pinmuxes are still active? */ |
46daed6e | 2156 | list_del(&pctldev->node); |
a76edc89 | 2157 | pinmux_generic_free_functions(pctldev); |
c7059c5a | 2158 | pinctrl_generic_free_groups(pctldev); |
2744e8af LW |
2159 | /* Destroy descriptor tree */ |
2160 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
2161 | pctldev->desc->npins); | |
5d589b09 DA |
2162 | /* remove gpio ranges map */ |
2163 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
2164 | list_del(&range->node); | |
2165 | ||
42fed7ba PC |
2166 | mutex_unlock(&pctldev->mutex); |
2167 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 2168 | kfree(pctldev); |
42fed7ba | 2169 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
2170 | } |
2171 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
2172 | ||
80e0f8d9 LD |
2173 | static void devm_pinctrl_dev_release(struct device *dev, void *res) |
2174 | { | |
2175 | struct pinctrl_dev *pctldev = *(struct pinctrl_dev **)res; | |
2176 | ||
2177 | pinctrl_unregister(pctldev); | |
2178 | } | |
2179 | ||
2180 | static int devm_pinctrl_dev_match(struct device *dev, void *res, void *data) | |
2181 | { | |
2182 | struct pctldev **r = res; | |
2183 | ||
3024f920 | 2184 | if (WARN_ON(!r || !*r)) |
80e0f8d9 LD |
2185 | return 0; |
2186 | ||
2187 | return *r == data; | |
2188 | } | |
2189 | ||
2190 | /** | |
2191 | * devm_pinctrl_register() - Resource managed version of pinctrl_register(). | |
2192 | * @dev: parent device for this pin controller | |
2193 | * @pctldesc: descriptor for this pin controller | |
2194 | * @driver_data: private pin controller data for this pin controller | |
2195 | * | |
2196 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2197 | * it returns valid pinctrl handle. | |
2198 | * | |
2199 | * The pinctrl device will be automatically released when the device is unbound. | |
2200 | */ | |
2201 | struct pinctrl_dev *devm_pinctrl_register(struct device *dev, | |
2202 | struct pinctrl_desc *pctldesc, | |
2203 | void *driver_data) | |
2204 | { | |
2205 | struct pinctrl_dev **ptr, *pctldev; | |
2206 | ||
2207 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2208 | if (!ptr) | |
2209 | return ERR_PTR(-ENOMEM); | |
2210 | ||
2211 | pctldev = pinctrl_register(pctldesc, dev, driver_data); | |
2212 | if (IS_ERR(pctldev)) { | |
2213 | devres_free(ptr); | |
2214 | return pctldev; | |
2215 | } | |
2216 | ||
2217 | *ptr = pctldev; | |
2218 | devres_add(dev, ptr); | |
2219 | ||
2220 | return pctldev; | |
2221 | } | |
2222 | EXPORT_SYMBOL_GPL(devm_pinctrl_register); | |
2223 | ||
950b0d91 TL |
2224 | /** |
2225 | * devm_pinctrl_register_and_init() - Resource managed pinctrl register and init | |
2226 | * @dev: parent device for this pin controller | |
2227 | * @pctldesc: descriptor for this pin controller | |
2228 | * @driver_data: private pin controller data for this pin controller | |
2229 | * | |
2230 | * Returns an error pointer if pincontrol register failed. Otherwise | |
2231 | * it returns valid pinctrl handle. | |
2232 | * | |
2233 | * The pinctrl device will be automatically released when the device is unbound. | |
2234 | */ | |
2235 | int devm_pinctrl_register_and_init(struct device *dev, | |
2236 | struct pinctrl_desc *pctldesc, | |
2237 | void *driver_data, | |
2238 | struct pinctrl_dev **pctldev) | |
2239 | { | |
2240 | struct pinctrl_dev **ptr; | |
2241 | int error; | |
2242 | ||
2243 | ptr = devres_alloc(devm_pinctrl_dev_release, sizeof(*ptr), GFP_KERNEL); | |
2244 | if (!ptr) | |
2245 | return -ENOMEM; | |
2246 | ||
2247 | error = pinctrl_register_and_init(pctldesc, dev, driver_data, pctldev); | |
2248 | if (error) { | |
2249 | devres_free(ptr); | |
2250 | return error; | |
2251 | } | |
2252 | ||
2253 | *ptr = *pctldev; | |
2254 | devres_add(dev, ptr); | |
2255 | ||
2256 | return 0; | |
2257 | } | |
2258 | EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init); | |
2259 | ||
80e0f8d9 LD |
2260 | /** |
2261 | * devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister(). | |
2262 | * @dev: device for which which resource was allocated | |
2263 | * @pctldev: the pinctrl device to unregister. | |
2264 | */ | |
2265 | void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev) | |
2266 | { | |
2267 | WARN_ON(devres_release(dev, devm_pinctrl_dev_release, | |
2268 | devm_pinctrl_dev_match, pctldev)); | |
2269 | } | |
2270 | EXPORT_SYMBOL_GPL(devm_pinctrl_unregister); | |
2271 | ||
2744e8af LW |
2272 | static int __init pinctrl_init(void) |
2273 | { | |
2274 | pr_info("initialized pinctrl subsystem\n"); | |
2275 | pinctrl_init_debugfs(); | |
2276 | return 0; | |
2277 | } | |
2278 | ||
2279 | /* init early since many drivers really need to initialized pinmux early */ | |
2280 | core_initcall(pinctrl_init); |