pinctrl: pinctrl-imx: free if of_get_parent fails to get the parent node
[linux-2.6-block.git] / drivers / pinctrl / core.c
CommitLineData
2744e8af
LW
1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
2744e8af
LW
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
b2b3e66e
SW
10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
2744e8af
LW
12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
a5a697cd 17#include <linux/export.h>
2744e8af
LW
18#include <linux/init.h>
19#include <linux/device.h>
20#include <linux/slab.h>
2744e8af
LW
21#include <linux/err.h>
22#include <linux/list.h>
2744e8af
LW
23#include <linux/sysfs.h>
24#include <linux/debugfs.h>
25#include <linux/seq_file.h>
6d4ca1fb 26#include <linux/pinctrl/consumer.h>
2744e8af
LW
27#include <linux/pinctrl/pinctrl.h>
28#include <linux/pinctrl/machine.h>
29#include "core.h"
57291ce2 30#include "devicetree.h"
2744e8af 31#include "pinmux.h"
ae6b4d85 32#include "pinconf.h"
2744e8af 33
b2b3e66e
SW
34/**
35 * struct pinctrl_maps - a list item containing part of the mapping table
36 * @node: mapping table list node
37 * @maps: array of mapping table entries
38 * @num_maps: the number of entries in @maps
39 */
40struct pinctrl_maps {
41 struct list_head node;
42 struct pinctrl_map const *maps;
43 unsigned num_maps;
44};
45
5b3aa5f7
DA
46static bool pinctrl_dummy_state;
47
57b676f9
SW
48/* Mutex taken by all entry points */
49DEFINE_MUTEX(pinctrl_mutex);
50
51/* Global list of pin control devices (struct pinctrl_dev) */
57291ce2 52LIST_HEAD(pinctrldev_list);
2744e8af 53
57b676f9 54/* List of pin controller handles (struct pinctrl) */
befe5bdf
LW
55static LIST_HEAD(pinctrl_list);
56
57b676f9 57/* List of pinctrl maps (struct pinctrl_maps) */
b2b3e66e
SW
58static LIST_HEAD(pinctrl_maps);
59
60#define for_each_maps(_maps_node_, _i_, _map_) \
61 list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
62 for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
63 _i_ < _maps_node_->num_maps; \
bc66468c 64 _i_++, _map_ = &_maps_node_->maps[_i_])
befe5bdf 65
5b3aa5f7
DA
66/**
67 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
68 *
69 * Usually this function is called by platforms without pinctrl driver support
70 * but run with some shared drivers using pinctrl APIs.
71 * After calling this function, the pinctrl core will return successfully
72 * with creating a dummy state for the driver to keep going smoothly.
73 */
74void pinctrl_provide_dummies(void)
75{
76 pinctrl_dummy_state = true;
77}
78
2744e8af
LW
79const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
80{
81 /* We're not allowed to register devices without name */
82 return pctldev->desc->name;
83}
84EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
85
86void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
87{
88 return pctldev->driver_data;
89}
90EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
91
92/**
9dfac4fd
LW
93 * get_pinctrl_dev_from_devname() - look up pin controller device
94 * @devname: the name of a device instance, as returned by dev_name()
2744e8af
LW
95 *
96 * Looks up a pin control device matching a certain device name or pure device
97 * pointer, the pure device pointer will take precedence.
98 */
9dfac4fd 99struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
2744e8af
LW
100{
101 struct pinctrl_dev *pctldev = NULL;
102 bool found = false;
103
9dfac4fd
LW
104 if (!devname)
105 return NULL;
106
2744e8af 107 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 108 if (!strcmp(dev_name(pctldev->dev), devname)) {
2744e8af
LW
109 /* Matched on device name */
110 found = true;
111 break;
112 }
113 }
2744e8af
LW
114
115 return found ? pctldev : NULL;
116}
117
ae6b4d85
LW
118/**
119 * pin_get_from_name() - look up a pin number from a name
120 * @pctldev: the pin control device to lookup the pin on
121 * @name: the name of the pin to look up
122 */
123int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
124{
706e8520 125 unsigned i, pin;
ae6b4d85 126
706e8520
CP
127 /* The pin number can be retrived from the pin controller descriptor */
128 for (i = 0; i < pctldev->desc->npins; i++) {
ae6b4d85
LW
129 struct pin_desc *desc;
130
706e8520 131 pin = pctldev->desc->pins[i].number;
ae6b4d85
LW
132 desc = pin_desc_get(pctldev, pin);
133 /* Pin space may be sparse */
134 if (desc == NULL)
135 continue;
136 if (desc->name && !strcmp(name, desc->name))
137 return pin;
138 }
139
140 return -EINVAL;
141}
142
dcb5dbc3
DA
143/**
144 * pin_get_name_from_id() - look up a pin name from a pin id
145 * @pctldev: the pin control device to lookup the pin on
146 * @name: the name of the pin to look up
147 */
148const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
149{
150 const struct pin_desc *desc;
151
152 desc = pin_desc_get(pctldev, pin);
153 if (desc == NULL) {
154 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
155 pin);
156 return NULL;
157 }
158
159 return desc->name;
160}
161
2744e8af
LW
162/**
163 * pin_is_valid() - check if pin exists on controller
164 * @pctldev: the pin control device to check the pin on
165 * @pin: pin to check, use the local pin controller index number
166 *
167 * This tells us whether a certain pin exist on a certain pin controller or
168 * not. Pin lists may be sparse, so some pins may not exist.
169 */
170bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
171{
172 struct pin_desc *pindesc;
173
174 if (pin < 0)
175 return false;
176
57b676f9 177 mutex_lock(&pinctrl_mutex);
2744e8af 178 pindesc = pin_desc_get(pctldev, pin);
57b676f9 179 mutex_unlock(&pinctrl_mutex);
2744e8af 180
57b676f9 181 return pindesc != NULL;
2744e8af
LW
182}
183EXPORT_SYMBOL_GPL(pin_is_valid);
184
185/* Deletes a range of pin descriptors */
186static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
187 const struct pinctrl_pin_desc *pins,
188 unsigned num_pins)
189{
190 int i;
191
2744e8af
LW
192 for (i = 0; i < num_pins; i++) {
193 struct pin_desc *pindesc;
194
195 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
196 pins[i].number);
197 if (pindesc != NULL) {
198 radix_tree_delete(&pctldev->pin_desc_tree,
199 pins[i].number);
ca53c5f1
LW
200 if (pindesc->dynamic_name)
201 kfree(pindesc->name);
2744e8af
LW
202 }
203 kfree(pindesc);
204 }
2744e8af
LW
205}
206
207static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
208 unsigned number, const char *name)
209{
210 struct pin_desc *pindesc;
211
212 pindesc = pin_desc_get(pctldev, number);
213 if (pindesc != NULL) {
214 pr_err("pin %d already registered on %s\n", number,
215 pctldev->desc->name);
216 return -EINVAL;
217 }
218
219 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
95dcd4ae
SW
220 if (pindesc == NULL) {
221 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 222 return -ENOMEM;
95dcd4ae 223 }
ae6b4d85 224
2744e8af
LW
225 /* Set owner */
226 pindesc->pctldev = pctldev;
227
9af1e44f 228 /* Copy basic pin info */
8dc6ae4d 229 if (name) {
ca53c5f1
LW
230 pindesc->name = name;
231 } else {
232 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
233 if (pindesc->name == NULL)
234 return -ENOMEM;
235 pindesc->dynamic_name = true;
236 }
2744e8af 237
2744e8af 238 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 239 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 240 number, pindesc->name, pctldev->desc->name);
2744e8af
LW
241 return 0;
242}
243
244static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
245 struct pinctrl_pin_desc const *pins,
246 unsigned num_descs)
247{
248 unsigned i;
249 int ret = 0;
250
251 for (i = 0; i < num_descs; i++) {
252 ret = pinctrl_register_one_pin(pctldev,
253 pins[i].number, pins[i].name);
254 if (ret)
255 return ret;
256 }
257
258 return 0;
259}
260
261/**
262 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
263 * @pctldev: pin controller device to check
264 * @gpio: gpio pin to check taken from the global GPIO pin space
265 *
266 * Tries to match a GPIO pin number to the ranges handled by a certain pin
267 * controller, return the range or NULL
268 */
269static struct pinctrl_gpio_range *
270pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
271{
272 struct pinctrl_gpio_range *range = NULL;
273
274 /* Loop over the ranges */
2744e8af
LW
275 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
276 /* Check if we're in the valid range */
277 if (gpio >= range->base &&
278 gpio < range->base + range->npins) {
2744e8af
LW
279 return range;
280 }
281 }
2744e8af
LW
282
283 return NULL;
284}
285
286/**
287 * pinctrl_get_device_gpio_range() - find device for GPIO range
288 * @gpio: the pin to locate the pin controller for
289 * @outdev: the pin control device if found
290 * @outrange: the GPIO range if found
291 *
292 * Find the pin controller handling a certain GPIO pin from the pinspace of
293 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
294 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
295 * may still have not been registered.
2744e8af 296 */
4ecce45d
SW
297static int pinctrl_get_device_gpio_range(unsigned gpio,
298 struct pinctrl_dev **outdev,
299 struct pinctrl_gpio_range **outrange)
2744e8af
LW
300{
301 struct pinctrl_dev *pctldev = NULL;
302
303 /* Loop over the pin controllers */
2744e8af
LW
304 list_for_each_entry(pctldev, &pinctrldev_list, node) {
305 struct pinctrl_gpio_range *range;
306
307 range = pinctrl_match_gpio_range(pctldev, gpio);
308 if (range != NULL) {
309 *outdev = pctldev;
310 *outrange = range;
2744e8af
LW
311 return 0;
312 }
313 }
2744e8af 314
4650b7cb 315 return -EPROBE_DEFER;
2744e8af
LW
316}
317
318/**
319 * pinctrl_add_gpio_range() - register a GPIO range for a controller
320 * @pctldev: pin controller device to add the range to
321 * @range: the GPIO range to add
322 *
323 * This adds a range of GPIOs to be handled by a certain pin controller. Call
324 * this to register handled ranges after registering your pin controller.
325 */
326void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
327 struct pinctrl_gpio_range *range)
328{
57b676f9 329 mutex_lock(&pinctrl_mutex);
8b9c139f 330 list_add_tail(&range->node, &pctldev->gpio_ranges);
57b676f9 331 mutex_unlock(&pinctrl_mutex);
2744e8af 332}
4ecce45d 333EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af
LW
334
335/**
336 * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
337 * @pctldev: pin controller device to remove the range from
338 * @range: the GPIO range to remove
339 */
340void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
341 struct pinctrl_gpio_range *range)
342{
57b676f9 343 mutex_lock(&pinctrl_mutex);
2744e8af 344 list_del(&range->node);
57b676f9 345 mutex_unlock(&pinctrl_mutex);
2744e8af 346}
4ecce45d 347EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
2744e8af 348
7afde8ba
LW
349/**
350 * pinctrl_get_group_selector() - returns the group selector for a group
351 * @pctldev: the pin controller handling the group
352 * @pin_group: the pin group to look up
353 */
354int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
355 const char *pin_group)
356{
357 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 358 unsigned ngroups = pctlops->get_groups_count(pctldev);
7afde8ba
LW
359 unsigned group_selector = 0;
360
d1e90e9e 361 while (group_selector < ngroups) {
7afde8ba
LW
362 const char *gname = pctlops->get_group_name(pctldev,
363 group_selector);
364 if (!strcmp(gname, pin_group)) {
51cd24ee 365 dev_dbg(pctldev->dev,
7afde8ba
LW
366 "found group selector %u for %s\n",
367 group_selector,
368 pin_group);
369 return group_selector;
370 }
371
372 group_selector++;
373 }
374
51cd24ee 375 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
376 pin_group);
377
378 return -EINVAL;
379}
380
befe5bdf
LW
381/**
382 * pinctrl_request_gpio() - request a single pin to be used in as GPIO
383 * @gpio: the GPIO pin number from the GPIO subsystem number space
384 *
385 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
386 * as part of their gpio_request() semantics, platforms and individual drivers
387 * shall *NOT* request GPIO pins to be muxed in.
388 */
389int pinctrl_request_gpio(unsigned gpio)
390{
391 struct pinctrl_dev *pctldev;
392 struct pinctrl_gpio_range *range;
393 int ret;
394 int pin;
395
57b676f9
SW
396 mutex_lock(&pinctrl_mutex);
397
befe5bdf 398 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9
SW
399 if (ret) {
400 mutex_unlock(&pinctrl_mutex);
4650b7cb 401 return ret;
57b676f9 402 }
befe5bdf
LW
403
404 /* Convert to the pin controllers number space */
405 pin = gpio - range->base + range->pin_base;
406
57b676f9
SW
407 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
408
409 mutex_unlock(&pinctrl_mutex);
410 return ret;
befe5bdf
LW
411}
412EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
413
414/**
415 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
416 * @gpio: the GPIO pin number from the GPIO subsystem number space
417 *
418 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
419 * as part of their gpio_free() semantics, platforms and individual drivers
420 * shall *NOT* request GPIO pins to be muxed out.
421 */
422void pinctrl_free_gpio(unsigned gpio)
423{
424 struct pinctrl_dev *pctldev;
425 struct pinctrl_gpio_range *range;
426 int ret;
427 int pin;
428
57b676f9
SW
429 mutex_lock(&pinctrl_mutex);
430
befe5bdf 431 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9
SW
432 if (ret) {
433 mutex_unlock(&pinctrl_mutex);
befe5bdf 434 return;
57b676f9 435 }
befe5bdf
LW
436
437 /* Convert to the pin controllers number space */
438 pin = gpio - range->base + range->pin_base;
439
57b676f9
SW
440 pinmux_free_gpio(pctldev, pin, range);
441
442 mutex_unlock(&pinctrl_mutex);
befe5bdf
LW
443}
444EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
445
446static int pinctrl_gpio_direction(unsigned gpio, bool input)
447{
448 struct pinctrl_dev *pctldev;
449 struct pinctrl_gpio_range *range;
450 int ret;
451 int pin;
452
453 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
454 if (ret)
455 return ret;
456
457 /* Convert to the pin controllers number space */
458 pin = gpio - range->base + range->pin_base;
459
460 return pinmux_gpio_direction(pctldev, range, pin, input);
461}
462
463/**
464 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
465 * @gpio: the GPIO pin number from the GPIO subsystem number space
466 *
467 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
468 * as part of their gpio_direction_input() semantics, platforms and individual
469 * drivers shall *NOT* touch pin control GPIO calls.
470 */
471int pinctrl_gpio_direction_input(unsigned gpio)
472{
57b676f9
SW
473 int ret;
474 mutex_lock(&pinctrl_mutex);
475 ret = pinctrl_gpio_direction(gpio, true);
476 mutex_unlock(&pinctrl_mutex);
477 return ret;
befe5bdf
LW
478}
479EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
480
481/**
482 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
483 * @gpio: the GPIO pin number from the GPIO subsystem number space
484 *
485 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
486 * as part of their gpio_direction_output() semantics, platforms and individual
487 * drivers shall *NOT* touch pin control GPIO calls.
488 */
489int pinctrl_gpio_direction_output(unsigned gpio)
490{
57b676f9
SW
491 int ret;
492 mutex_lock(&pinctrl_mutex);
493 ret = pinctrl_gpio_direction(gpio, false);
494 mutex_unlock(&pinctrl_mutex);
495 return ret;
befe5bdf
LW
496}
497EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
498
6e5e959d
SW
499static struct pinctrl_state *find_state(struct pinctrl *p,
500 const char *name)
befe5bdf 501{
6e5e959d
SW
502 struct pinctrl_state *state;
503
504 list_for_each_entry(state, &p->states, node)
505 if (!strcmp(state->name, name))
506 return state;
507
508 return NULL;
509}
510
511static struct pinctrl_state *create_state(struct pinctrl *p,
512 const char *name)
513{
514 struct pinctrl_state *state;
515
516 state = kzalloc(sizeof(*state), GFP_KERNEL);
517 if (state == NULL) {
518 dev_err(p->dev,
519 "failed to alloc struct pinctrl_state\n");
520 return ERR_PTR(-ENOMEM);
521 }
522
523 state->name = name;
524 INIT_LIST_HEAD(&state->settings);
525
526 list_add_tail(&state->node, &p->states);
527
528 return state;
529}
530
531static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
532{
533 struct pinctrl_state *state;
7ecdb16f 534 struct pinctrl_setting *setting;
6e5e959d 535 int ret;
befe5bdf 536
6e5e959d
SW
537 state = find_state(p, map->name);
538 if (!state)
539 state = create_state(p, map->name);
540 if (IS_ERR(state))
541 return PTR_ERR(state);
befe5bdf 542
1e2082b5
SW
543 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
544 return 0;
545
6e5e959d
SW
546 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
547 if (setting == NULL) {
548 dev_err(p->dev,
549 "failed to alloc struct pinctrl_setting\n");
550 return -ENOMEM;
551 }
befe5bdf 552
1e2082b5
SW
553 setting->type = map->type;
554
6e5e959d
SW
555 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
556 if (setting->pctldev == NULL) {
c05127c4 557 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
6e5e959d
SW
558 map->ctrl_dev_name);
559 kfree(setting);
c05127c4
LW
560 /*
561 * OK let us guess that the driver is not there yet, and
562 * let's defer obtaining this pinctrl handle to later...
563 */
564 return -EPROBE_DEFER;
6e5e959d
SW
565 }
566
1e2082b5
SW
567 switch (map->type) {
568 case PIN_MAP_TYPE_MUX_GROUP:
569 ret = pinmux_map_to_setting(map, setting);
570 break;
571 case PIN_MAP_TYPE_CONFIGS_PIN:
572 case PIN_MAP_TYPE_CONFIGS_GROUP:
573 ret = pinconf_map_to_setting(map, setting);
574 break;
575 default:
576 ret = -EINVAL;
577 break;
578 }
6e5e959d
SW
579 if (ret < 0) {
580 kfree(setting);
581 return ret;
582 }
583
584 list_add_tail(&setting->node, &state->settings);
585
586 return 0;
587}
588
589static struct pinctrl *find_pinctrl(struct device *dev)
590{
591 struct pinctrl *p;
592
1e2082b5 593 list_for_each_entry(p, &pinctrl_list, node)
6e5e959d
SW
594 if (p->dev == dev)
595 return p;
596
597 return NULL;
598}
599
600static void pinctrl_put_locked(struct pinctrl *p, bool inlist);
601
602static struct pinctrl *create_pinctrl(struct device *dev)
603{
604 struct pinctrl *p;
605 const char *devname;
606 struct pinctrl_maps *maps_node;
607 int i;
608 struct pinctrl_map const *map;
609 int ret;
befe5bdf
LW
610
611 /*
612 * create the state cookie holder struct pinctrl for each
613 * mapping, this is what consumers will get when requesting
614 * a pin control handle with pinctrl_get()
615 */
02f5b989 616 p = kzalloc(sizeof(*p), GFP_KERNEL);
95dcd4ae
SW
617 if (p == NULL) {
618 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 619 return ERR_PTR(-ENOMEM);
95dcd4ae 620 }
7ecdb16f 621 p->dev = dev;
6e5e959d 622 INIT_LIST_HEAD(&p->states);
57291ce2
SW
623 INIT_LIST_HEAD(&p->dt_maps);
624
625 ret = pinctrl_dt_to_map(p);
626 if (ret < 0) {
627 kfree(p);
628 return ERR_PTR(ret);
629 }
6e5e959d
SW
630
631 devname = dev_name(dev);
befe5bdf
LW
632
633 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 634 for_each_maps(maps_node, i, map) {
7ecdb16f
SW
635 /* Map must be for this device */
636 if (strcmp(map->dev_name, devname))
637 continue;
638
6e5e959d
SW
639 ret = add_setting(p, map);
640 if (ret < 0) {
641 pinctrl_put_locked(p, false);
642 return ERR_PTR(ret);
7ecdb16f 643 }
befe5bdf
LW
644 }
645
befe5bdf 646 /* Add the pinmux to the global list */
8b9c139f 647 list_add_tail(&p->node, &pinctrl_list);
befe5bdf
LW
648
649 return p;
6e5e959d 650}
7ecdb16f 651
6e5e959d
SW
652static struct pinctrl *pinctrl_get_locked(struct device *dev)
653{
654 struct pinctrl *p;
7ecdb16f 655
6e5e959d
SW
656 if (WARN_ON(!dev))
657 return ERR_PTR(-EINVAL);
658
659 p = find_pinctrl(dev);
660 if (p != NULL)
661 return ERR_PTR(-EBUSY);
7ecdb16f 662
6e5e959d
SW
663 p = create_pinctrl(dev);
664 if (IS_ERR(p))
665 return p;
666
667 return p;
befe5bdf 668}
b2b3e66e
SW
669
670/**
6e5e959d
SW
671 * pinctrl_get() - retrieves the pinctrl handle for a device
672 * @dev: the device to obtain the handle for
b2b3e66e 673 */
6e5e959d 674struct pinctrl *pinctrl_get(struct device *dev)
b2b3e66e
SW
675{
676 struct pinctrl *p;
677
57b676f9 678 mutex_lock(&pinctrl_mutex);
6e5e959d 679 p = pinctrl_get_locked(dev);
57b676f9 680 mutex_unlock(&pinctrl_mutex);
b2b3e66e
SW
681
682 return p;
683}
befe5bdf
LW
684EXPORT_SYMBOL_GPL(pinctrl_get);
685
6e5e959d 686static void pinctrl_put_locked(struct pinctrl *p, bool inlist)
befe5bdf 687{
6e5e959d
SW
688 struct pinctrl_state *state, *n1;
689 struct pinctrl_setting *setting, *n2;
690
691 list_for_each_entry_safe(state, n1, &p->states, node) {
692 list_for_each_entry_safe(setting, n2, &state->settings, node) {
1e2082b5
SW
693 switch (setting->type) {
694 case PIN_MAP_TYPE_MUX_GROUP:
695 if (state == p->state)
696 pinmux_disable_setting(setting);
697 pinmux_free_setting(setting);
698 break;
699 case PIN_MAP_TYPE_CONFIGS_PIN:
700 case PIN_MAP_TYPE_CONFIGS_GROUP:
701 pinconf_free_setting(setting);
702 break;
703 default:
704 break;
705 }
6e5e959d
SW
706 list_del(&setting->node);
707 kfree(setting);
708 }
709 list_del(&state->node);
710 kfree(state);
7ecdb16f 711 }
befe5bdf 712
57291ce2
SW
713 pinctrl_dt_free_maps(p);
714
6e5e959d
SW
715 if (inlist)
716 list_del(&p->node);
befe5bdf
LW
717 kfree(p);
718}
befe5bdf
LW
719
720/**
6e5e959d
SW
721 * pinctrl_put() - release a previously claimed pinctrl handle
722 * @p: the pinctrl handle to release
befe5bdf 723 */
57b676f9
SW
724void pinctrl_put(struct pinctrl *p)
725{
726 mutex_lock(&pinctrl_mutex);
6e5e959d 727 pinctrl_put_locked(p, true);
57b676f9
SW
728 mutex_unlock(&pinctrl_mutex);
729}
730EXPORT_SYMBOL_GPL(pinctrl_put);
731
6e5e959d
SW
732static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p,
733 const char *name)
befe5bdf 734{
6e5e959d 735 struct pinctrl_state *state;
befe5bdf 736
6e5e959d 737 state = find_state(p, name);
5b3aa5f7
DA
738 if (!state) {
739 if (pinctrl_dummy_state) {
740 /* create dummy state */
741 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
742 name);
743 state = create_state(p, name);
744 if (IS_ERR(state))
745 return state;
746 } else {
747 return ERR_PTR(-ENODEV);
748 }
749 }
57b676f9 750
6e5e959d 751 return state;
befe5bdf 752}
befe5bdf
LW
753
754/**
6e5e959d
SW
755 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
756 * @p: the pinctrl handle to retrieve the state from
757 * @name: the state name to retrieve
befe5bdf 758 */
6e5e959d 759struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name)
57b676f9 760{
6e5e959d
SW
761 struct pinctrl_state *s;
762
57b676f9 763 mutex_lock(&pinctrl_mutex);
6e5e959d 764 s = pinctrl_lookup_state_locked(p, name);
57b676f9 765 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
766
767 return s;
57b676f9 768}
6e5e959d 769EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
57b676f9 770
6e5e959d
SW
771static int pinctrl_select_state_locked(struct pinctrl *p,
772 struct pinctrl_state *state)
befe5bdf 773{
6e5e959d
SW
774 struct pinctrl_setting *setting, *setting2;
775 int ret;
7ecdb16f 776
6e5e959d
SW
777 if (p->state == state)
778 return 0;
befe5bdf 779
6e5e959d
SW
780 if (p->state) {
781 /*
782 * The set of groups with a mux configuration in the old state
783 * may not be identical to the set of groups with a mux setting
784 * in the new state. While this might be unusual, it's entirely
785 * possible for the "user"-supplied mapping table to be written
786 * that way. For each group that was configured in the old state
787 * but not in the new state, this code puts that group into a
788 * safe/disabled state.
789 */
790 list_for_each_entry(setting, &p->state->settings, node) {
791 bool found = false;
1e2082b5
SW
792 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
793 continue;
6e5e959d 794 list_for_each_entry(setting2, &state->settings, node) {
1e2082b5
SW
795 if (setting2->type != PIN_MAP_TYPE_MUX_GROUP)
796 continue;
797 if (setting2->data.mux.group ==
798 setting->data.mux.group) {
6e5e959d
SW
799 found = true;
800 break;
801 }
802 }
803 if (!found)
804 pinmux_disable_setting(setting);
805 }
806 }
807
808 p->state = state;
809
810 /* Apply all the settings for the new state */
811 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
812 switch (setting->type) {
813 case PIN_MAP_TYPE_MUX_GROUP:
814 ret = pinmux_enable_setting(setting);
815 break;
816 case PIN_MAP_TYPE_CONFIGS_PIN:
817 case PIN_MAP_TYPE_CONFIGS_GROUP:
818 ret = pinconf_apply_setting(setting);
819 break;
820 default:
821 ret = -EINVAL;
822 break;
823 }
6e5e959d
SW
824 if (ret < 0) {
825 /* FIXME: Difficult to return to prev state */
826 return ret;
827 }
befe5bdf 828 }
6e5e959d
SW
829
830 return 0;
57b676f9
SW
831}
832
833/**
6e5e959d
SW
834 * pinctrl_select() - select/activate/program a pinctrl state to HW
835 * @p: the pinctrl handle for the device that requests configuratio
836 * @state: the state handle to select/activate/program
57b676f9 837 */
6e5e959d 838int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
57b676f9 839{
6e5e959d
SW
840 int ret;
841
57b676f9 842 mutex_lock(&pinctrl_mutex);
6e5e959d 843 ret = pinctrl_select_state_locked(p, state);
57b676f9 844 mutex_unlock(&pinctrl_mutex);
6e5e959d
SW
845
846 return ret;
befe5bdf 847}
6e5e959d 848EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 849
6d4ca1fb
SW
850static void devm_pinctrl_release(struct device *dev, void *res)
851{
852 pinctrl_put(*(struct pinctrl **)res);
853}
854
855/**
856 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
857 * @dev: the device to obtain the handle for
858 *
859 * If there is a need to explicitly destroy the returned struct pinctrl,
860 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
861 */
862struct pinctrl *devm_pinctrl_get(struct device *dev)
863{
864 struct pinctrl **ptr, *p;
865
866 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
867 if (!ptr)
868 return ERR_PTR(-ENOMEM);
869
870 p = pinctrl_get(dev);
871 if (!IS_ERR(p)) {
872 *ptr = p;
873 devres_add(dev, ptr);
874 } else {
875 devres_free(ptr);
876 }
877
878 return p;
879}
880EXPORT_SYMBOL_GPL(devm_pinctrl_get);
881
882static int devm_pinctrl_match(struct device *dev, void *res, void *data)
883{
884 struct pinctrl **p = res;
885
886 return *p == data;
887}
888
889/**
890 * devm_pinctrl_put() - Resource managed pinctrl_put()
891 * @p: the pinctrl handle to release
892 *
893 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
894 * this function will not need to be called and the resource management
895 * code will ensure that the resource is freed.
896 */
897void devm_pinctrl_put(struct pinctrl *p)
898{
899 WARN_ON(devres_destroy(p->dev, devm_pinctrl_release,
900 devm_pinctrl_match, p));
901 pinctrl_put(p);
902}
903EXPORT_SYMBOL_GPL(devm_pinctrl_put);
904
57291ce2
SW
905int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
906 bool dup, bool locked)
befe5bdf 907{
1e2082b5 908 int i, ret;
b2b3e66e 909 struct pinctrl_maps *maps_node;
befe5bdf
LW
910
911 pr_debug("add %d pinmux maps\n", num_maps);
912
913 /* First sanity check the new mapping */
914 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
915 if (!maps[i].dev_name) {
916 pr_err("failed to register map %s (%d): no device given\n",
917 maps[i].name, i);
918 return -EINVAL;
919 }
920
befe5bdf
LW
921 if (!maps[i].name) {
922 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 923 i);
befe5bdf
LW
924 return -EINVAL;
925 }
926
1e2082b5
SW
927 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
928 !maps[i].ctrl_dev_name) {
befe5bdf
LW
929 pr_err("failed to register map %s (%d): no pin control device given\n",
930 maps[i].name, i);
931 return -EINVAL;
932 }
933
1e2082b5
SW
934 switch (maps[i].type) {
935 case PIN_MAP_TYPE_DUMMY_STATE:
936 break;
937 case PIN_MAP_TYPE_MUX_GROUP:
938 ret = pinmux_validate_map(&maps[i], i);
939 if (ret < 0)
fde04f41 940 return ret;
1e2082b5
SW
941 break;
942 case PIN_MAP_TYPE_CONFIGS_PIN:
943 case PIN_MAP_TYPE_CONFIGS_GROUP:
944 ret = pinconf_validate_map(&maps[i], i);
945 if (ret < 0)
fde04f41 946 return ret;
1e2082b5
SW
947 break;
948 default:
949 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 950 maps[i].name, i);
1681f5ae
SW
951 return -EINVAL;
952 }
befe5bdf
LW
953 }
954
b2b3e66e
SW
955 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
956 if (!maps_node) {
957 pr_err("failed to alloc struct pinctrl_maps\n");
958 return -ENOMEM;
959 }
befe5bdf 960
b2b3e66e 961 maps_node->num_maps = num_maps;
57291ce2
SW
962 if (dup) {
963 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
964 GFP_KERNEL);
965 if (!maps_node->maps) {
966 pr_err("failed to duplicate mapping table\n");
967 kfree(maps_node);
968 return -ENOMEM;
969 }
970 } else {
971 maps_node->maps = maps;
befe5bdf
LW
972 }
973
57291ce2
SW
974 if (!locked)
975 mutex_lock(&pinctrl_mutex);
b2b3e66e 976 list_add_tail(&maps_node->node, &pinctrl_maps);
57291ce2
SW
977 if (!locked)
978 mutex_unlock(&pinctrl_mutex);
b2b3e66e 979
befe5bdf
LW
980 return 0;
981}
982
57291ce2
SW
983/**
984 * pinctrl_register_mappings() - register a set of pin controller mappings
985 * @maps: the pincontrol mappings table to register. This should probably be
986 * marked with __initdata so it can be discarded after boot. This
987 * function will perform a shallow copy for the mapping entries.
988 * @num_maps: the number of maps in the mapping table
989 */
990int pinctrl_register_mappings(struct pinctrl_map const *maps,
991 unsigned num_maps)
992{
993 return pinctrl_register_map(maps, num_maps, true, false);
994}
995
996void pinctrl_unregister_map(struct pinctrl_map const *map)
997{
998 struct pinctrl_maps *maps_node;
999
1000 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1001 if (maps_node->maps == map) {
1002 list_del(&maps_node->node);
1003 return;
1004 }
1005 }
1006}
1007
2744e8af
LW
1008#ifdef CONFIG_DEBUG_FS
1009
1010static int pinctrl_pins_show(struct seq_file *s, void *what)
1011{
1012 struct pinctrl_dev *pctldev = s->private;
1013 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1014 unsigned i, pin;
2744e8af
LW
1015
1016 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1017
57b676f9
SW
1018 mutex_lock(&pinctrl_mutex);
1019
706e8520
CP
1020 /* The pin number can be retrived from the pin controller descriptor */
1021 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1022 struct pin_desc *desc;
1023
706e8520 1024 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1025 desc = pin_desc_get(pctldev, pin);
1026 /* Pin space may be sparse */
1027 if (desc == NULL)
1028 continue;
1029
1030 seq_printf(s, "pin %d (%s) ", pin,
1031 desc->name ? desc->name : "unnamed");
1032
1033 /* Driver-specific info per pin */
1034 if (ops->pin_dbg_show)
1035 ops->pin_dbg_show(pctldev, s, pin);
1036
1037 seq_puts(s, "\n");
1038 }
1039
57b676f9
SW
1040 mutex_unlock(&pinctrl_mutex);
1041
2744e8af
LW
1042 return 0;
1043}
1044
1045static int pinctrl_groups_show(struct seq_file *s, void *what)
1046{
1047 struct pinctrl_dev *pctldev = s->private;
1048 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1049 unsigned ngroups, selector = 0;
2744e8af 1050
d1e90e9e 1051 ngroups = ops->get_groups_count(pctldev);
57b676f9
SW
1052 mutex_lock(&pinctrl_mutex);
1053
2744e8af 1054 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1055 while (selector < ngroups) {
a5818a8b 1056 const unsigned *pins;
2744e8af
LW
1057 unsigned num_pins;
1058 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1059 const char *pname;
2744e8af
LW
1060 int ret;
1061 int i;
1062
1063 ret = ops->get_group_pins(pctldev, selector,
1064 &pins, &num_pins);
1065 if (ret)
1066 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1067 gname);
1068 else {
dcb5dbc3
DA
1069 seq_printf(s, "group: %s\n", gname);
1070 for (i = 0; i < num_pins; i++) {
1071 pname = pin_get_name(pctldev, pins[i]);
1072 if (WARN_ON(!pname))
1073 return -EINVAL;
1074 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1075 }
1076 seq_puts(s, "\n");
2744e8af
LW
1077 }
1078 selector++;
1079 }
1080
57b676f9 1081 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1082
1083 return 0;
1084}
1085
1086static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1087{
1088 struct pinctrl_dev *pctldev = s->private;
1089 struct pinctrl_gpio_range *range = NULL;
1090
1091 seq_puts(s, "GPIO ranges handled:\n");
1092
57b676f9
SW
1093 mutex_lock(&pinctrl_mutex);
1094
2744e8af 1095 /* Loop over the ranges */
2744e8af 1096 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
75d6642a
LW
1097 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1098 range->id, range->name,
1099 range->base, (range->base + range->npins - 1),
1100 range->pin_base,
1101 (range->pin_base + range->npins - 1));
2744e8af 1102 }
57b676f9
SW
1103
1104 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1105
1106 return 0;
1107}
1108
1109static int pinctrl_devices_show(struct seq_file *s, void *what)
1110{
1111 struct pinctrl_dev *pctldev;
1112
ae6b4d85 1113 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9
SW
1114
1115 mutex_lock(&pinctrl_mutex);
1116
2744e8af
LW
1117 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1118 seq_printf(s, "%s ", pctldev->desc->name);
1119 if (pctldev->desc->pmxops)
ae6b4d85
LW
1120 seq_puts(s, "yes ");
1121 else
1122 seq_puts(s, "no ");
1123 if (pctldev->desc->confops)
2744e8af
LW
1124 seq_puts(s, "yes");
1125 else
1126 seq_puts(s, "no");
1127 seq_puts(s, "\n");
1128 }
57b676f9
SW
1129
1130 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1131
1132 return 0;
1133}
1134
1e2082b5
SW
1135static inline const char *map_type(enum pinctrl_map_type type)
1136{
1137 static const char * const names[] = {
1138 "INVALID",
1139 "DUMMY_STATE",
1140 "MUX_GROUP",
1141 "CONFIGS_PIN",
1142 "CONFIGS_GROUP",
1143 };
1144
1145 if (type >= ARRAY_SIZE(names))
1146 return "UNKNOWN";
1147
1148 return names[type];
1149}
1150
3eedb437
SW
1151static int pinctrl_maps_show(struct seq_file *s, void *what)
1152{
1153 struct pinctrl_maps *maps_node;
1154 int i;
1155 struct pinctrl_map const *map;
1156
1157 seq_puts(s, "Pinctrl maps:\n");
1158
57b676f9
SW
1159 mutex_lock(&pinctrl_mutex);
1160
3eedb437 1161 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1162 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1163 map->dev_name, map->name, map_type(map->type),
1164 map->type);
1165
1166 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1167 seq_printf(s, "controlling device %s\n",
1168 map->ctrl_dev_name);
1169
1170 switch (map->type) {
1171 case PIN_MAP_TYPE_MUX_GROUP:
1172 pinmux_show_map(s, map);
1173 break;
1174 case PIN_MAP_TYPE_CONFIGS_PIN:
1175 case PIN_MAP_TYPE_CONFIGS_GROUP:
1176 pinconf_show_map(s, map);
1177 break;
1178 default:
1179 break;
1180 }
1181
1182 seq_printf(s, "\n");
3eedb437 1183 }
57b676f9
SW
1184
1185 mutex_unlock(&pinctrl_mutex);
3eedb437
SW
1186
1187 return 0;
1188}
1189
befe5bdf
LW
1190static int pinctrl_show(struct seq_file *s, void *what)
1191{
1192 struct pinctrl *p;
6e5e959d 1193 struct pinctrl_state *state;
7ecdb16f 1194 struct pinctrl_setting *setting;
befe5bdf
LW
1195
1196 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9
SW
1197
1198 mutex_lock(&pinctrl_mutex);
1199
befe5bdf 1200 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1201 seq_printf(s, "device: %s current state: %s\n",
1202 dev_name(p->dev),
1203 p->state ? p->state->name : "none");
1204
1205 list_for_each_entry(state, &p->states, node) {
1206 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1207
6e5e959d 1208 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1209 struct pinctrl_dev *pctldev = setting->pctldev;
1210
1211 seq_printf(s, " type: %s controller %s ",
1212 map_type(setting->type),
1213 pinctrl_dev_get_name(pctldev));
1214
1215 switch (setting->type) {
1216 case PIN_MAP_TYPE_MUX_GROUP:
1217 pinmux_show_setting(s, setting);
1218 break;
1219 case PIN_MAP_TYPE_CONFIGS_PIN:
1220 case PIN_MAP_TYPE_CONFIGS_GROUP:
1221 pinconf_show_setting(s, setting);
1222 break;
1223 default:
1224 break;
1225 }
6e5e959d 1226 }
befe5bdf 1227 }
befe5bdf
LW
1228 }
1229
57b676f9
SW
1230 mutex_unlock(&pinctrl_mutex);
1231
befe5bdf
LW
1232 return 0;
1233}
1234
2744e8af
LW
1235static int pinctrl_pins_open(struct inode *inode, struct file *file)
1236{
1237 return single_open(file, pinctrl_pins_show, inode->i_private);
1238}
1239
1240static int pinctrl_groups_open(struct inode *inode, struct file *file)
1241{
1242 return single_open(file, pinctrl_groups_show, inode->i_private);
1243}
1244
1245static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1246{
1247 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1248}
1249
1250static int pinctrl_devices_open(struct inode *inode, struct file *file)
1251{
1252 return single_open(file, pinctrl_devices_show, NULL);
1253}
1254
3eedb437
SW
1255static int pinctrl_maps_open(struct inode *inode, struct file *file)
1256{
1257 return single_open(file, pinctrl_maps_show, NULL);
1258}
1259
befe5bdf
LW
1260static int pinctrl_open(struct inode *inode, struct file *file)
1261{
1262 return single_open(file, pinctrl_show, NULL);
1263}
1264
2744e8af
LW
1265static const struct file_operations pinctrl_pins_ops = {
1266 .open = pinctrl_pins_open,
1267 .read = seq_read,
1268 .llseek = seq_lseek,
1269 .release = single_release,
1270};
1271
1272static const struct file_operations pinctrl_groups_ops = {
1273 .open = pinctrl_groups_open,
1274 .read = seq_read,
1275 .llseek = seq_lseek,
1276 .release = single_release,
1277};
1278
1279static const struct file_operations pinctrl_gpioranges_ops = {
1280 .open = pinctrl_gpioranges_open,
1281 .read = seq_read,
1282 .llseek = seq_lseek,
1283 .release = single_release,
1284};
1285
3eedb437
SW
1286static const struct file_operations pinctrl_devices_ops = {
1287 .open = pinctrl_devices_open,
befe5bdf
LW
1288 .read = seq_read,
1289 .llseek = seq_lseek,
1290 .release = single_release,
1291};
1292
3eedb437
SW
1293static const struct file_operations pinctrl_maps_ops = {
1294 .open = pinctrl_maps_open,
2744e8af
LW
1295 .read = seq_read,
1296 .llseek = seq_lseek,
1297 .release = single_release,
1298};
1299
befe5bdf
LW
1300static const struct file_operations pinctrl_ops = {
1301 .open = pinctrl_open,
1302 .read = seq_read,
1303 .llseek = seq_lseek,
1304 .release = single_release,
1305};
1306
2744e8af
LW
1307static struct dentry *debugfs_root;
1308
1309static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1310{
02157160 1311 struct dentry *device_root;
2744e8af 1312
51cd24ee 1313 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1314 debugfs_root);
02157160
TL
1315 pctldev->device_root = device_root;
1316
2744e8af
LW
1317 if (IS_ERR(device_root) || !device_root) {
1318 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1319 dev_name(pctldev->dev));
2744e8af
LW
1320 return;
1321 }
1322 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1323 device_root, pctldev, &pinctrl_pins_ops);
1324 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1325 device_root, pctldev, &pinctrl_groups_ops);
1326 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1327 device_root, pctldev, &pinctrl_gpioranges_ops);
1328 pinmux_init_device_debugfs(device_root, pctldev);
ae6b4d85 1329 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1330}
1331
02157160
TL
1332static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1333{
1334 debugfs_remove_recursive(pctldev->device_root);
1335}
1336
2744e8af
LW
1337static void pinctrl_init_debugfs(void)
1338{
1339 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1340 if (IS_ERR(debugfs_root) || !debugfs_root) {
1341 pr_warn("failed to create debugfs directory\n");
1342 debugfs_root = NULL;
1343 return;
1344 }
1345
1346 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1347 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1348 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1349 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1350 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1351 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1352}
1353
1354#else /* CONFIG_DEBUG_FS */
1355
1356static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1357{
1358}
1359
1360static void pinctrl_init_debugfs(void)
1361{
1362}
1363
02157160
TL
1364static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1365{
1366}
1367
2744e8af
LW
1368#endif
1369
d26bc49f
SW
1370static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1371{
1372 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1373
1374 if (!ops ||
d1e90e9e 1375 !ops->get_groups_count ||
d26bc49f
SW
1376 !ops->get_group_name ||
1377 !ops->get_group_pins)
1378 return -EINVAL;
1379
57291ce2
SW
1380 if (ops->dt_node_to_map && !ops->dt_free_map)
1381 return -EINVAL;
1382
d26bc49f
SW
1383 return 0;
1384}
1385
2744e8af
LW
1386/**
1387 * pinctrl_register() - register a pin controller device
1388 * @pctldesc: descriptor for this pin controller
1389 * @dev: parent device for this pin controller
1390 * @driver_data: private pin controller data for this pin controller
1391 */
1392struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1393 struct device *dev, void *driver_data)
1394{
2744e8af
LW
1395 struct pinctrl_dev *pctldev;
1396 int ret;
1397
1398 if (pctldesc == NULL)
1399 return NULL;
1400 if (pctldesc->name == NULL)
1401 return NULL;
1402
02f5b989 1403 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1404 if (pctldev == NULL) {
1405 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
b9130b77 1406 return NULL;
95dcd4ae 1407 }
b9130b77
TL
1408
1409 /* Initialize pin control device struct */
1410 pctldev->owner = pctldesc->owner;
1411 pctldev->desc = pctldesc;
1412 pctldev->driver_data = driver_data;
1413 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1414 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77
TL
1415 pctldev->dev = dev;
1416
d26bc49f
SW
1417 /* check core ops for sanity */
1418 ret = pinctrl_check_ops(pctldev);
1419 if (ret) {
ad6e1107 1420 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1421 goto out_err;
1422 }
1423
2744e8af
LW
1424 /* If we're implementing pinmuxing, check the ops for sanity */
1425 if (pctldesc->pmxops) {
b9130b77 1426 ret = pinmux_check_ops(pctldev);
ad6e1107 1427 if (ret)
b9130b77 1428 goto out_err;
2744e8af
LW
1429 }
1430
ae6b4d85
LW
1431 /* If we're implementing pinconfig, check the ops for sanity */
1432 if (pctldesc->confops) {
b9130b77 1433 ret = pinconf_check_ops(pctldev);
ad6e1107 1434 if (ret)
b9130b77 1435 goto out_err;
ae6b4d85
LW
1436 }
1437
2744e8af 1438 /* Register all the pins */
ad6e1107 1439 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1440 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1441 if (ret) {
ad6e1107 1442 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1443 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1444 pctldesc->npins);
51cd24ee 1445 goto out_err;
2744e8af
LW
1446 }
1447
57b676f9
SW
1448 mutex_lock(&pinctrl_mutex);
1449
8b9c139f 1450 list_add_tail(&pctldev->node, &pinctrldev_list);
57b676f9 1451
6e5e959d
SW
1452 pctldev->p = pinctrl_get_locked(pctldev->dev);
1453 if (!IS_ERR(pctldev->p)) {
1454 struct pinctrl_state *s =
1455 pinctrl_lookup_state_locked(pctldev->p,
1456 PINCTRL_STATE_DEFAULT);
ad6e1107
JC
1457 if (IS_ERR(s)) {
1458 dev_dbg(dev, "failed to lookup the default state\n");
1459 } else {
1460 ret = pinctrl_select_state_locked(pctldev->p, s);
1461 if (ret) {
1462 dev_err(dev,
1463 "failed to select default state\n");
1464 }
1465 }
6e5e959d 1466 }
57b676f9
SW
1467
1468 mutex_unlock(&pinctrl_mutex);
1469
2304b473
SW
1470 pinctrl_init_device_debugfs(pctldev);
1471
2744e8af
LW
1472 return pctldev;
1473
51cd24ee
SW
1474out_err:
1475 kfree(pctldev);
2744e8af
LW
1476 return NULL;
1477}
1478EXPORT_SYMBOL_GPL(pinctrl_register);
1479
1480/**
1481 * pinctrl_unregister() - unregister pinmux
1482 * @pctldev: pin controller to unregister
1483 *
1484 * Called by pinmux drivers to unregister a pinmux.
1485 */
1486void pinctrl_unregister(struct pinctrl_dev *pctldev)
1487{
1488 if (pctldev == NULL)
1489 return;
1490
02157160 1491 pinctrl_remove_device_debugfs(pctldev);
57b676f9
SW
1492
1493 mutex_lock(&pinctrl_mutex);
1494
6e5e959d
SW
1495 if (!IS_ERR(pctldev->p))
1496 pinctrl_put_locked(pctldev->p, true);
57b676f9 1497
2744e8af 1498 /* TODO: check that no pinmuxes are still active? */
2744e8af 1499 list_del(&pctldev->node);
2744e8af
LW
1500 /* Destroy descriptor tree */
1501 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1502 pctldev->desc->npins);
51cd24ee 1503 kfree(pctldev);
57b676f9
SW
1504
1505 mutex_unlock(&pinctrl_mutex);
2744e8af
LW
1506}
1507EXPORT_SYMBOL_GPL(pinctrl_unregister);
1508
1509static int __init pinctrl_init(void)
1510{
1511 pr_info("initialized pinctrl subsystem\n");
1512 pinctrl_init_debugfs();
1513 return 0;
1514}
1515
1516/* init early since many drivers really need to initialized pinmux early */
1517core_initcall(pinctrl_init);