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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
4d3d0e42 AJ |
2 | /* |
3 | * Copyright (C) 2016 IBM Corp. | |
4d3d0e42 AJ |
4 | */ |
5 | ||
6 | #include <linux/mfd/syscon.h> | |
7 | #include <linux/platform_device.h> | |
52240f91 | 8 | #include <linux/seq_file.h> |
4d3d0e42 AJ |
9 | #include <linux/slab.h> |
10 | #include <linux/string.h> | |
11 | #include "../core.h" | |
12 | #include "pinctrl-aspeed.h" | |
13 | ||
14 | int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev) | |
15 | { | |
16 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
17 | ||
efa56239 | 18 | return pdata->pinmux.ngroups; |
4d3d0e42 AJ |
19 | } |
20 | ||
21 | const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev, | |
22 | unsigned int group) | |
23 | { | |
24 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
25 | ||
efa56239 | 26 | return pdata->pinmux.groups[group].name; |
4d3d0e42 AJ |
27 | } |
28 | ||
29 | int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, | |
30 | unsigned int group, const unsigned int **pins, | |
31 | unsigned int *npins) | |
32 | { | |
33 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
34 | ||
efa56239 AJ |
35 | *pins = &pdata->pinmux.groups[group].pins[0]; |
36 | *npins = pdata->pinmux.groups[group].npins; | |
4d3d0e42 AJ |
37 | |
38 | return 0; | |
39 | } | |
40 | ||
41 | void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev, | |
42 | struct seq_file *s, unsigned int offset) | |
43 | { | |
44 | seq_printf(s, " %s", dev_name(pctldev->dev)); | |
45 | } | |
46 | ||
47 | int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev) | |
48 | { | |
49 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
50 | ||
efa56239 | 51 | return pdata->pinmux.nfunctions; |
4d3d0e42 AJ |
52 | } |
53 | ||
54 | const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev, | |
55 | unsigned int function) | |
56 | { | |
57 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
58 | ||
efa56239 | 59 | return pdata->pinmux.functions[function].name; |
4d3d0e42 AJ |
60 | } |
61 | ||
62 | int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev, | |
63 | unsigned int function, | |
64 | const char * const **groups, | |
65 | unsigned int * const num_groups) | |
66 | { | |
67 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); | |
68 | ||
efa56239 AJ |
69 | *groups = pdata->pinmux.functions[function].groups; |
70 | *num_groups = pdata->pinmux.functions[function].ngroups; | |
4d3d0e42 AJ |
71 | |
72 | return 0; | |
73 | } | |
74 | ||
674fa8da | 75 | static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx, |
efa56239 | 76 | const struct aspeed_sig_expr *expr) |
4d3d0e42 | 77 | { |
7d29ed88 | 78 | int ret; |
4d3d0e42 | 79 | |
aa639e44 AJ |
80 | pr_debug("Enabling signal %s for %s\n", expr->signal, |
81 | expr->function); | |
82 | ||
efa56239 | 83 | ret = aspeed_sig_expr_eval(ctx, expr, true); |
7d29ed88 AJ |
84 | if (ret < 0) |
85 | return ret; | |
86 | ||
87 | if (!ret) | |
efa56239 | 88 | return aspeed_sig_expr_set(ctx, expr, true); |
5366f146 | 89 | |
7d29ed88 | 90 | return 0; |
4d3d0e42 AJ |
91 | } |
92 | ||
674fa8da | 93 | static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx, |
efa56239 | 94 | const struct aspeed_sig_expr *expr) |
4d3d0e42 | 95 | { |
aa639e44 AJ |
96 | pr_debug("Disabling signal %s for %s\n", expr->signal, |
97 | expr->function); | |
98 | ||
cf517fef | 99 | return aspeed_sig_expr_set(ctx, expr, false); |
4d3d0e42 AJ |
100 | } |
101 | ||
102 | /** | |
333944c7 SJ |
103 | * aspeed_disable_sig() - Disable a signal on a pin by disabling all provided |
104 | * signal expressions. | |
4d3d0e42 | 105 | * |
efa56239 | 106 | * @ctx: The pinmux context |
4d3d0e42 | 107 | * @exprs: The list of signal expressions (from a priority level on a pin) |
4d3d0e42 | 108 | * |
b75dd872 | 109 | * Return: 0 if all expressions are disabled, otherwise a negative error code |
4d3d0e42 | 110 | */ |
674fa8da | 111 | static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx, |
efa56239 | 112 | const struct aspeed_sig_expr **exprs) |
4d3d0e42 | 113 | { |
7d29ed88 | 114 | int ret = 0; |
4d3d0e42 AJ |
115 | |
116 | if (!exprs) | |
287a344a | 117 | return -EINVAL; |
4d3d0e42 | 118 | |
7d29ed88 | 119 | while (*exprs && !ret) { |
efa56239 | 120 | ret = aspeed_sig_expr_disable(ctx, *exprs); |
4d3d0e42 AJ |
121 | exprs++; |
122 | } | |
123 | ||
7d29ed88 | 124 | return ret; |
4d3d0e42 AJ |
125 | } |
126 | ||
127 | /** | |
5fa9d19b RD |
128 | * aspeed_find_expr_by_name - Search for the signal expression needed to |
129 | * enable the pin's signal for the requested function. | |
4d3d0e42 AJ |
130 | * |
131 | * @exprs: List of signal expressions (haystack) | |
132 | * @name: The name of the requested function (needle) | |
133 | * | |
b75dd872 AJ |
134 | * Return: A pointer to the signal expression whose function tag matches the |
135 | * provided name, otherwise NULL. | |
4d3d0e42 AJ |
136 | * |
137 | */ | |
138 | static const struct aspeed_sig_expr *aspeed_find_expr_by_name( | |
139 | const struct aspeed_sig_expr **exprs, const char *name) | |
140 | { | |
141 | while (*exprs) { | |
142 | if (strcmp((*exprs)->function, name) == 0) | |
143 | return *exprs; | |
144 | exprs++; | |
145 | } | |
146 | ||
147 | return NULL; | |
148 | } | |
149 | ||
150 | static char *get_defined_attribute(const struct aspeed_pin_desc *pdesc, | |
151 | const char *(*get)( | |
152 | const struct aspeed_sig_expr *)) | |
153 | { | |
154 | char *found = NULL; | |
155 | size_t len = 0; | |
156 | const struct aspeed_sig_expr ***prios, **funcs, *expr; | |
157 | ||
158 | prios = pdesc->prios; | |
159 | ||
160 | while ((funcs = *prios)) { | |
161 | while ((expr = *funcs)) { | |
162 | const char *str = get(expr); | |
163 | size_t delta = strlen(str) + 2; | |
164 | char *expanded; | |
165 | ||
166 | expanded = krealloc(found, len + delta + 1, GFP_KERNEL); | |
167 | if (!expanded) { | |
168 | kfree(found); | |
169 | return expanded; | |
170 | } | |
171 | ||
172 | found = expanded; | |
173 | found[len] = '\0'; | |
174 | len += delta; | |
175 | ||
176 | strcat(found, str); | |
177 | strcat(found, ", "); | |
178 | ||
179 | funcs++; | |
180 | } | |
181 | prios++; | |
182 | } | |
183 | ||
184 | if (len < 2) { | |
185 | kfree(found); | |
186 | return NULL; | |
187 | } | |
188 | ||
189 | found[len - 2] = '\0'; | |
190 | ||
191 | return found; | |
192 | } | |
193 | ||
194 | static const char *aspeed_sig_expr_function(const struct aspeed_sig_expr *expr) | |
195 | { | |
196 | return expr->function; | |
197 | } | |
198 | ||
199 | static char *get_defined_functions(const struct aspeed_pin_desc *pdesc) | |
200 | { | |
201 | return get_defined_attribute(pdesc, aspeed_sig_expr_function); | |
202 | } | |
203 | ||
204 | static const char *aspeed_sig_expr_signal(const struct aspeed_sig_expr *expr) | |
205 | { | |
206 | return expr->signal; | |
207 | } | |
208 | ||
209 | static char *get_defined_signals(const struct aspeed_pin_desc *pdesc) | |
210 | { | |
211 | return get_defined_attribute(pdesc, aspeed_sig_expr_signal); | |
212 | } | |
213 | ||
214 | int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function, | |
215 | unsigned int group) | |
216 | { | |
217 | int i; | |
7d29ed88 | 218 | int ret; |
674fa8da | 219 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); |
efa56239 | 220 | const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group]; |
4d3d0e42 | 221 | const struct aspeed_pin_function *pfunc = |
efa56239 | 222 | &pdata->pinmux.functions[function]; |
4d3d0e42 AJ |
223 | |
224 | for (i = 0; i < pgroup->npins; i++) { | |
225 | int pin = pgroup->pins[i]; | |
226 | const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data; | |
227 | const struct aspeed_sig_expr *expr = NULL; | |
228 | const struct aspeed_sig_expr **funcs; | |
229 | const struct aspeed_sig_expr ***prios; | |
230 | ||
231 | if (!pdesc) | |
232 | return -EINVAL; | |
233 | ||
84a85d3f HB |
234 | pr_debug("Muxing pin %s for %s\n", pdesc->name, pfunc->name); |
235 | ||
4d3d0e42 AJ |
236 | prios = pdesc->prios; |
237 | ||
238 | if (!prios) | |
239 | continue; | |
240 | ||
241 | /* Disable functions at a higher priority than that requested */ | |
242 | while ((funcs = *prios)) { | |
243 | expr = aspeed_find_expr_by_name(funcs, pfunc->name); | |
244 | ||
245 | if (expr) | |
246 | break; | |
247 | ||
efa56239 | 248 | ret = aspeed_disable_sig(&pdata->pinmux, funcs); |
7d29ed88 AJ |
249 | if (ret) |
250 | return ret; | |
4d3d0e42 AJ |
251 | |
252 | prios++; | |
253 | } | |
254 | ||
255 | if (!expr) { | |
256 | char *functions = get_defined_functions(pdesc); | |
257 | char *signals = get_defined_signals(pdesc); | |
258 | ||
259 | pr_warn("No function %s found on pin %s (%d). Found signal(s) %s for function(s) %s\n", | |
260 | pfunc->name, pdesc->name, pin, signals, | |
261 | functions); | |
262 | kfree(signals); | |
263 | kfree(functions); | |
264 | ||
265 | return -ENXIO; | |
266 | } | |
267 | ||
efa56239 | 268 | ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); |
7d29ed88 AJ |
269 | if (ret) |
270 | return ret; | |
aa639e44 AJ |
271 | |
272 | pr_debug("Muxed pin %s as %s for %s\n", pdesc->name, expr->signal, | |
273 | expr->function); | |
4d3d0e42 AJ |
274 | } |
275 | ||
276 | return 0; | |
277 | } | |
278 | ||
279 | static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr) | |
280 | { | |
281 | /* | |
7aeb3538 AJ |
282 | * We need to differentiate between GPIO and non-GPIO signals to |
283 | * implement the gpio_request_enable() interface. For better or worse | |
284 | * the ASPEED pinctrl driver uses the expression names to determine | |
285 | * whether an expression will mux a pin for GPIO. | |
4d3d0e42 | 286 | * |
7aeb3538 AJ |
287 | * Generally we have the following - A GPIO such as B1 has: |
288 | * | |
289 | * - expr->signal set to "GPIOB1" | |
290 | * - expr->function set to "GPIOB1" | |
291 | * | |
292 | * Using this fact we can determine whether the provided expression is | |
293 | * a GPIO expression by testing the signal name for the string prefix | |
294 | * "GPIO". | |
295 | * | |
296 | * However, some GPIOs are input-only, and the ASPEED datasheets name | |
297 | * them differently. An input-only GPIO such as T0 has: | |
298 | * | |
299 | * - expr->signal set to "GPIT0" | |
300 | * - expr->function set to "GPIT0" | |
301 | * | |
302 | * It's tempting to generalise the prefix test from "GPIO" to "GPI" to | |
303 | * account for both GPIOs and GPIs, but in doing so we run aground on | |
304 | * another feature: | |
305 | * | |
306 | * Some pins in the ASPEED BMC SoCs have a "pass-through" GPIO | |
307 | * function where the input state of one pin is replicated as the | |
308 | * output state of another (as if they were shorted together - a mux | |
309 | * configuration that is typically enabled by hardware strapping). | |
310 | * This feature allows the BMC to pass e.g. power button state through | |
311 | * to the host while the BMC is yet to boot, but take control of the | |
312 | * button state once the BMC has booted by muxing each pin as a | |
313 | * separate, pin-specific GPIO. | |
314 | * | |
315 | * Conceptually this pass-through mode is a form of GPIO and is named | |
316 | * as such in the datasheets, e.g. "GPID0". This naming similarity | |
317 | * trips us up with the simple GPI-prefixed-signal-name scheme | |
318 | * discussed above, as the pass-through configuration is not what we | |
319 | * want when muxing a pin as GPIO for the GPIO subsystem. | |
320 | * | |
321 | * On e.g. the AST2400, a pass-through function "GPID0" is grouped on | |
322 | * balls A18 and D16, where we have: | |
323 | * | |
324 | * For ball A18: | |
325 | * - expr->signal set to "GPID0IN" | |
326 | * - expr->function set to "GPID0" | |
327 | * | |
328 | * For ball D16: | |
329 | * - expr->signal set to "GPID0OUT" | |
330 | * - expr->function set to "GPID0" | |
331 | * | |
332 | * By contrast, the pin-specific GPIO expressions for the same pins are | |
333 | * as follows: | |
334 | * | |
335 | * For ball A18: | |
336 | * - expr->signal looks like "GPIOD0" | |
337 | * - expr->function looks like "GPIOD0" | |
338 | * | |
339 | * For ball D16: | |
340 | * - expr->signal looks like "GPIOD1" | |
341 | * - expr->function looks like "GPIOD1" | |
342 | * | |
343 | * Testing both the signal _and_ function names gives us the means | |
344 | * differentiate the pass-through GPIO pinmux configuration from the | |
345 | * pin-specific configuration that the GPIO subsystem is after: An | |
346 | * expression is a pin-specific (non-pass-through) GPIO configuration | |
347 | * if the signal prefix is "GPI" and the signal name matches the | |
348 | * function name. | |
4d3d0e42 | 349 | */ |
7aeb3538 AJ |
350 | return !strncmp(expr->signal, "GPI", 3) && |
351 | !strcmp(expr->signal, expr->function); | |
4d3d0e42 AJ |
352 | } |
353 | ||
354 | static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs) | |
355 | { | |
356 | if (!exprs) | |
357 | return false; | |
358 | ||
359 | while (*exprs) { | |
360 | if (aspeed_expr_is_gpio(*exprs)) | |
361 | return true; | |
362 | exprs++; | |
363 | } | |
364 | ||
365 | return false; | |
366 | } | |
367 | ||
368 | int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev, | |
369 | struct pinctrl_gpio_range *range, | |
370 | unsigned int offset) | |
371 | { | |
7d29ed88 | 372 | int ret; |
674fa8da | 373 | struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev); |
4d3d0e42 AJ |
374 | const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data; |
375 | const struct aspeed_sig_expr ***prios, **funcs, *expr; | |
376 | ||
377 | if (!pdesc) | |
378 | return -EINVAL; | |
379 | ||
380 | prios = pdesc->prios; | |
381 | ||
382 | if (!prios) | |
383 | return -ENXIO; | |
384 | ||
aa639e44 AJ |
385 | pr_debug("Muxing pin %s for GPIO\n", pdesc->name); |
386 | ||
4d3d0e42 AJ |
387 | /* Disable any functions of higher priority than GPIO */ |
388 | while ((funcs = *prios)) { | |
389 | if (aspeed_gpio_in_exprs(funcs)) | |
390 | break; | |
391 | ||
efa56239 | 392 | ret = aspeed_disable_sig(&pdata->pinmux, funcs); |
7d29ed88 AJ |
393 | if (ret) |
394 | return ret; | |
4d3d0e42 AJ |
395 | |
396 | prios++; | |
397 | } | |
398 | ||
399 | if (!funcs) { | |
400 | char *signals = get_defined_signals(pdesc); | |
401 | ||
402 | pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n", | |
403 | pdesc->name, offset, signals); | |
404 | kfree(signals); | |
405 | ||
406 | return -ENXIO; | |
407 | } | |
408 | ||
409 | expr = *funcs; | |
410 | ||
411 | /* | |
412 | * Disabling all higher-priority expressions is enough to enable the | |
413 | * lowest-priority signal type. As such it has no associated | |
414 | * expression. | |
415 | */ | |
aa639e44 AJ |
416 | if (!expr) { |
417 | pr_debug("Muxed pin %s as GPIO\n", pdesc->name); | |
4d3d0e42 | 418 | return 0; |
aa639e44 | 419 | } |
4d3d0e42 AJ |
420 | |
421 | /* | |
422 | * If GPIO is not the lowest priority signal type, assume there is only | |
423 | * one expression defined to enable the GPIO function | |
424 | */ | |
aa639e44 AJ |
425 | ret = aspeed_sig_expr_enable(&pdata->pinmux, expr); |
426 | if (ret) | |
427 | return ret; | |
428 | ||
429 | pr_debug("Muxed pin %s as %s\n", pdesc->name, expr->signal); | |
430 | ||
431 | return 0; | |
4d3d0e42 AJ |
432 | } |
433 | ||
434 | int aspeed_pinctrl_probe(struct platform_device *pdev, | |
435 | struct pinctrl_desc *pdesc, | |
436 | struct aspeed_pinctrl_data *pdata) | |
437 | { | |
438 | struct device *parent; | |
439 | struct pinctrl_dev *pctl; | |
440 | ||
441 | parent = pdev->dev.parent; | |
442 | if (!parent) { | |
443 | dev_err(&pdev->dev, "No parent for syscon pincontroller\n"); | |
444 | return -ENODEV; | |
445 | } | |
446 | ||
efa56239 AJ |
447 | pdata->scu = syscon_node_to_regmap(parent->of_node); |
448 | if (IS_ERR(pdata->scu)) { | |
4d3d0e42 | 449 | dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n"); |
efa56239 | 450 | return PTR_ERR(pdata->scu); |
4d3d0e42 AJ |
451 | } |
452 | ||
efa56239 AJ |
453 | pdata->pinmux.maps[ASPEED_IP_SCU] = pdata->scu; |
454 | ||
4d3d0e42 AJ |
455 | pctl = pinctrl_register(pdesc, &pdev->dev, pdata); |
456 | ||
457 | if (IS_ERR(pctl)) { | |
458 | dev_err(&pdev->dev, "Failed to register pinctrl\n"); | |
459 | return PTR_ERR(pctl); | |
460 | } | |
461 | ||
462 | platform_set_drvdata(pdev, pdata); | |
463 | ||
464 | return 0; | |
465 | } | |
7f354fd1 AJ |
466 | |
467 | static inline bool pin_in_config_range(unsigned int offset, | |
468 | const struct aspeed_pin_config *config) | |
469 | { | |
470 | return offset >= config->pins[0] && offset <= config->pins[1]; | |
471 | } | |
472 | ||
473 | static inline const struct aspeed_pin_config *find_pinconf_config( | |
474 | const struct aspeed_pinctrl_data *pdata, | |
475 | unsigned int offset, | |
476 | enum pin_config_param param) | |
477 | { | |
478 | unsigned int i; | |
479 | ||
480 | for (i = 0; i < pdata->nconfigs; i++) { | |
481 | if (param == pdata->configs[i].param && | |
482 | pin_in_config_range(offset, &pdata->configs[i])) | |
483 | return &pdata->configs[i]; | |
484 | } | |
485 | ||
486 | return NULL; | |
487 | } | |
488 | ||
7f354fd1 AJ |
489 | enum aspeed_pin_config_map_type { MAP_TYPE_ARG, MAP_TYPE_VAL }; |
490 | ||
7f354fd1 | 491 | static const struct aspeed_pin_config_map *find_pinconf_map( |
5b854f28 | 492 | const struct aspeed_pinctrl_data *pdata, |
7f354fd1 AJ |
493 | enum pin_config_param param, |
494 | enum aspeed_pin_config_map_type type, | |
495 | s64 value) | |
496 | { | |
497 | int i; | |
498 | ||
5b854f28 | 499 | for (i = 0; i < pdata->nconfmaps; i++) { |
7f354fd1 AJ |
500 | const struct aspeed_pin_config_map *elem; |
501 | bool match; | |
502 | ||
5b854f28 | 503 | elem = &pdata->confmaps[i]; |
7f354fd1 AJ |
504 | |
505 | switch (type) { | |
506 | case MAP_TYPE_ARG: | |
507 | match = (elem->arg == -1 || elem->arg == value); | |
508 | break; | |
509 | case MAP_TYPE_VAL: | |
510 | match = (elem->val == value); | |
511 | break; | |
512 | } | |
513 | ||
514 | if (param == elem->param && match) | |
515 | return elem; | |
516 | } | |
517 | ||
518 | return NULL; | |
519 | } | |
520 | ||
521 | int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset, | |
522 | unsigned long *config) | |
523 | { | |
524 | const enum pin_config_param param = pinconf_to_config_param(*config); | |
525 | const struct aspeed_pin_config_map *pmap; | |
526 | const struct aspeed_pinctrl_data *pdata; | |
527 | const struct aspeed_pin_config *pconf; | |
528 | unsigned int val; | |
529 | int rc = 0; | |
530 | u32 arg; | |
531 | ||
532 | pdata = pinctrl_dev_get_drvdata(pctldev); | |
533 | pconf = find_pinconf_config(pdata, offset, param); | |
534 | if (!pconf) | |
535 | return -ENOTSUPP; | |
536 | ||
efa56239 | 537 | rc = regmap_read(pdata->scu, pconf->reg, &val); |
7f354fd1 AJ |
538 | if (rc < 0) |
539 | return rc; | |
540 | ||
5b854f28 | 541 | pmap = find_pinconf_map(pdata, param, MAP_TYPE_VAL, |
5f52c853 | 542 | (val & pconf->mask) >> __ffs(pconf->mask)); |
7f354fd1 AJ |
543 | |
544 | if (!pmap) | |
545 | return -EINVAL; | |
546 | ||
547 | if (param == PIN_CONFIG_DRIVE_STRENGTH) | |
548 | arg = (u32) pmap->arg; | |
549 | else if (param == PIN_CONFIG_BIAS_PULL_DOWN) | |
550 | arg = !!pmap->arg; | |
551 | else | |
552 | arg = 1; | |
553 | ||
554 | if (!arg) | |
555 | return -EINVAL; | |
556 | ||
557 | *config = pinconf_to_config_packed(param, arg); | |
558 | ||
559 | return 0; | |
560 | } | |
561 | ||
562 | int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset, | |
563 | unsigned long *configs, unsigned int num_configs) | |
564 | { | |
565 | const struct aspeed_pinctrl_data *pdata; | |
566 | unsigned int i; | |
567 | int rc = 0; | |
568 | ||
569 | pdata = pinctrl_dev_get_drvdata(pctldev); | |
570 | ||
571 | for (i = 0; i < num_configs; i++) { | |
572 | const struct aspeed_pin_config_map *pmap; | |
573 | const struct aspeed_pin_config *pconf; | |
574 | enum pin_config_param param; | |
575 | unsigned int val; | |
576 | u32 arg; | |
577 | ||
578 | param = pinconf_to_config_param(configs[i]); | |
579 | arg = pinconf_to_config_argument(configs[i]); | |
580 | ||
581 | pconf = find_pinconf_config(pdata, offset, param); | |
582 | if (!pconf) | |
583 | return -ENOTSUPP; | |
584 | ||
5b854f28 | 585 | pmap = find_pinconf_map(pdata, param, MAP_TYPE_ARG, arg); |
7f354fd1 | 586 | |
27d91e80 | 587 | if (WARN_ON(!pmap)) |
7f354fd1 AJ |
588 | return -EINVAL; |
589 | ||
5f52c853 | 590 | val = pmap->val << __ffs(pconf->mask); |
7f354fd1 | 591 | |
efa56239 | 592 | rc = regmap_update_bits(pdata->scu, pconf->reg, |
1d6db5ae | 593 | pconf->mask, val); |
7f354fd1 AJ |
594 | |
595 | if (rc < 0) | |
596 | return rc; | |
597 | ||
7e8d8ac7 AJ |
598 | pr_debug("%s: Set SCU%02X[0x%08X]=0x%X for param %d(=%d) on pin %d\n", |
599 | __func__, pconf->reg, pconf->mask, | |
600 | val, param, arg, offset); | |
7f354fd1 AJ |
601 | } |
602 | ||
603 | return 0; | |
604 | } | |
605 | ||
606 | int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev, | |
607 | unsigned int selector, | |
608 | unsigned long *config) | |
609 | { | |
610 | const unsigned int *pins; | |
611 | unsigned int npins; | |
612 | int rc; | |
613 | ||
614 | rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins); | |
615 | if (rc < 0) | |
616 | return rc; | |
617 | ||
618 | if (!npins) | |
619 | return -ENODEV; | |
620 | ||
621 | rc = aspeed_pin_config_get(pctldev, pins[0], config); | |
622 | ||
623 | return rc; | |
624 | } | |
625 | ||
626 | int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev, | |
627 | unsigned int selector, | |
628 | unsigned long *configs, | |
629 | unsigned int num_configs) | |
630 | { | |
631 | const unsigned int *pins; | |
632 | unsigned int npins; | |
633 | int rc; | |
634 | int i; | |
635 | ||
636 | pr_debug("%s: Fetching pins for group selector %d\n", | |
637 | __func__, selector); | |
638 | rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins); | |
639 | if (rc < 0) | |
640 | return rc; | |
641 | ||
642 | for (i = 0; i < npins; i++) { | |
643 | rc = aspeed_pin_config_set(pctldev, pins[i], configs, | |
644 | num_configs); | |
645 | if (rc < 0) | |
646 | return rc; | |
647 | } | |
648 | ||
649 | return 0; | |
650 | } |