Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | # |
3 | # PINCTRL infrastructure and drivers | |
4 | # | |
5 | ||
d219b924 PR |
6 | menuconfig PINCTRL |
7 | bool "Pin controllers" | |
2744e8af | 8 | |
d219b924 | 9 | if PINCTRL |
45f034ef | 10 | |
c033a718 | 11 | config GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
12 | bool |
13 | ||
2744e8af | 14 | config PINMUX |
244e95a7 | 15 | bool "Support pin multiplexing controllers" if COMPILE_TEST |
ae6b4d85 | 16 | |
a76edc89 TL |
17 | config GENERIC_PINMUX_FUNCTIONS |
18 | bool | |
19 | select PINMUX | |
20 | ||
ae6b4d85 | 21 | config PINCONF |
244e95a7 | 22 | bool "Support pin configuration controllers" if COMPILE_TEST |
2744e8af | 23 | |
394349f7 LW |
24 | config GENERIC_PINCONF |
25 | bool | |
26 | select PINCONF | |
27 | ||
2744e8af LW |
28 | config DEBUG_PINCTRL |
29 | bool "Debug PINCTRL calls" | |
30 | depends on DEBUG_KERNEL | |
31 | help | |
32 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. | |
33 | ||
00df0582 | 34 | config PINCTRL_ARTPEC6 |
2635adb4 KK |
35 | bool "Axis ARTPEC-6 pin controller driver" |
36 | depends on MACH_ARTPEC6 | |
37 | select PINMUX | |
38 | select GENERIC_PINCONF | |
39 | help | |
40 | This is the driver for the Axis ARTPEC-6 pin controller. This driver | |
41 | supports pin function multiplexing as well as pin bias and drive | |
42 | strength configuration. Device tree integration instructions can be | |
43 | found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt | |
00df0582 | 44 | |
c8ce8782 | 45 | config PINCTRL_AS3722 |
9385f35d | 46 | tristate "Pinctrl and GPIO driver for ams AS3722 PMIC" |
c8ce8782 LD |
47 | depends on MFD_AS3722 && GPIOLIB |
48 | select PINMUX | |
49 | select GENERIC_PINCONF | |
50 | help | |
51 | AS3722 device supports the configuration of GPIO pins for different | |
52 | functionality. This driver supports the pinmux, push-pull and | |
53 | open drain configuration for the GPIO pins of AS3722 devices. It also | |
54 | supports the GPIO functionality through gpiolib. | |
55 | ||
449317a8 QS |
56 | config PINCTRL_AXP209 |
57 | tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support" | |
58 | depends on MFD_AXP20X | |
971f1b38 QS |
59 | depends on OF |
60 | select PINMUX | |
61 | select GENERIC_PINCONF | |
62 | select GPIOLIB | |
449317a8 QS |
63 | help |
64 | AXP PMICs provides multiple GPIOs that can be muxed for different | |
65 | functions. This driver bundles a pinctrl driver to select the function | |
66 | muxing and a GPIO driver to handle the GPIO when the GPIO function is | |
67 | selected. | |
68 | Say yes to enable pinctrl and GPIO support for the AXP209 PMIC | |
69 | ||
6732ae5c JCPV |
70 | config PINCTRL_AT91 |
71 | bool "AT91 pinctrl driver" | |
72 | depends on OF | |
73 | depends on ARCH_AT91 | |
74 | select PINMUX | |
75 | select PINCONF | |
80cc3732 AS |
76 | select GPIOLIB |
77 | select OF_GPIO | |
78 | select GPIOLIB_IRQCHIP | |
6732ae5c JCPV |
79 | help |
80 | Say Y here to enable the at91 pinctrl driver | |
81 | ||
77618084 LD |
82 | config PINCTRL_AT91PIO4 |
83 | bool "AT91 PIO4 pinctrl driver" | |
84 | depends on OF | |
0a03658d | 85 | depends on HAS_IOMEM |
e682fcc7 | 86 | depends on ARCH_AT91 || COMPILE_TEST |
77618084 LD |
87 | select PINMUX |
88 | select GENERIC_PINCONF | |
89 | select GPIOLIB | |
90 | select GPIOLIB_IRQCHIP | |
91 | select OF_GPIO | |
92 | help | |
93 | Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4 | |
94 | controller available on sama5d2 SoC. | |
95 | ||
dbad75dd | 96 | config PINCTRL_AMD |
337ea0fb | 97 | tristate "AMD GPIO pin control" |
fd35b202 | 98 | depends on HAS_IOMEM |
47fa5c97 | 99 | depends on ACPI || COMPILE_TEST |
e2a021d4 | 100 | select GPIOLIB |
dbad75dd | 101 | select GPIOLIB_IRQCHIP |
83b31c2a | 102 | select PINMUX |
dbad75dd KX |
103 | select PINCONF |
104 | select GENERIC_PINCONF | |
105 | help | |
106 | driver for memory mapped GPIO functionality on AMD platforms | |
107 | (x86 or arm).Most pins are usually muxed to some other | |
108 | functionality by firmware,so only a small amount is available | |
109 | for gpio use. | |
110 | ||
111 | Requires ACPI/FDT device enumeration code to set up a platform | |
112 | device. | |
113 | ||
8f3f0246 MS |
114 | config PINCTRL_BM1880 |
115 | bool "Bitmain BM1880 Pinctrl driver" | |
8293b3c6 MS |
116 | depends on OF && (ARCH_BITMAIN || COMPILE_TEST) |
117 | default ARCH_BITMAIN | |
8f3f0246 MS |
118 | select PINMUX |
119 | help | |
120 | Pinctrl driver for Bitmain BM1880 SoC. | |
121 | ||
1ff91f0a DL |
122 | config PINCTRL_DA850_PUPD |
123 | tristate "TI DA850/OMAP-L138/AM18XX pullup/pulldown groups" | |
124 | depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST) | |
125 | select PINCONF | |
126 | select GENERIC_PINCONF | |
127 | help | |
128 | Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control | |
129 | pullup/pulldown pin groups. | |
130 | ||
56cc3af4 MF |
131 | config PINCTRL_DA9062 |
132 | tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support" | |
133 | depends on MFD_DA9062 | |
134 | select GPIOLIB | |
135 | help | |
136 | The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for | |
137 | different functions. This driver bundles a pinctrl driver to select the | |
138 | function muxing and a GPIO driver to handle the GPIO when the GPIO | |
139 | function is selected. | |
140 | ||
141 | Say yes to enable pinctrl and GPIO support for the DA9062 PMIC. | |
142 | ||
38b0e507 BS |
143 | config PINCTRL_DIGICOLOR |
144 | bool | |
145 | depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST) | |
146 | select PINMUX | |
147 | select GENERIC_PINCONF | |
148 | ||
3f8c50c9 JC |
149 | config PINCTRL_LANTIQ |
150 | bool | |
151 | depends on LANTIQ | |
152 | select PINMUX | |
153 | select PINCONF | |
154 | ||
2f77ac93 JE |
155 | config PINCTRL_LPC18XX |
156 | bool "NXP LPC18XX/43XX SCU pinctrl driver" | |
157 | depends on OF && (ARCH_LPC18XX || COMPILE_TEST) | |
158 | default ARCH_LPC18XX | |
159 | select PINMUX | |
160 | select GENERIC_PINCONF | |
161 | help | |
162 | Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU). | |
163 | ||
e316cb2b JC |
164 | config PINCTRL_FALCON |
165 | bool | |
166 | depends on SOC_FALCON | |
167 | depends on PINCTRL_LANTIQ | |
168 | ||
06351d13 LW |
169 | config PINCTRL_GEMINI |
170 | bool | |
171 | depends on ARCH_GEMINI | |
172 | default ARCH_GEMINI | |
173 | select PINMUX | |
1c5b7f3c | 174 | select GENERIC_PINCONF |
06351d13 LW |
175 | select MFD_SYSCON |
176 | ||
0f04a817 AS |
177 | config PINCTRL_MCP23S08_I2C |
178 | tristate | |
179 | select REGMAP_I2C | |
180 | ||
181 | config PINCTRL_MCP23S08_SPI | |
182 | tristate | |
183 | select REGMAP_SPI | |
184 | ||
64ac43e6 SR |
185 | config PINCTRL_MCP23S08 |
186 | tristate "Microchip MCP23xxx I/O expander" | |
64ac43e6 | 187 | depends on SPI_MASTER || I2C |
e2a021d4 | 188 | select GPIOLIB |
64ac43e6 | 189 | select GPIOLIB_IRQCHIP |
82039d24 | 190 | select GENERIC_PINCONF |
0f04a817 AS |
191 | select PINCTRL_MCP23S08_I2C if I2C |
192 | select PINCTRL_MCP23S08_SPI if SPI_MASTER | |
64ac43e6 | 193 | help |
6ff45566 JK |
194 | SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 / |
195 | MCP23008 / MCP23017 / MCP23018 I/O expanders. | |
196 | This provides a GPIO interface supporting inputs and outputs and a | |
197 | corresponding interrupt-controller. | |
64ac43e6 | 198 | |
611dac1e NA |
199 | config PINCTRL_OXNAS |
200 | bool | |
201 | depends on OF | |
202 | select PINMUX | |
203 | select PINCONF | |
204 | select GENERIC_PINCONF | |
205 | select GPIOLIB | |
206 | select OF_GPIO | |
207 | select GPIOLIB_IRQCHIP | |
208 | select MFD_SYSCON | |
209 | ||
d3e51161 | 210 | config PINCTRL_ROCKCHIP |
be786ac5 | 211 | tristate "Rockchip gpio and pinctrl driver" |
febb4ee2 | 212 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
0662e4a1 | 213 | depends on OF |
25fda51c | 214 | select GPIOLIB |
d3e51161 HS |
215 | select PINMUX |
216 | select GENERIC_PINCONF | |
217 | select GENERIC_IRQ_CHIP | |
751a99ab | 218 | select MFD_SYSCON |
0662e4a1 | 219 | select OF_GPIO |
25fda51c JX |
220 | default ARCH_ROCKCHIP |
221 | help | |
222 | This support pinctrl and gpio driver for Rockchip SoCs. | |
d3e51161 | 223 | |
8b8b091b TL |
224 | config PINCTRL_SINGLE |
225 | tristate "One-register-per-pin type device tree based pinctrl driver" | |
226 | depends on OF | |
fd35b202 | 227 | depends on HAS_IOMEM |
caeb774e | 228 | select GENERIC_PINCTRL_GROUPS |
571aec4d | 229 | select GENERIC_PINMUX_FUNCTIONS |
9dddb4df | 230 | select GENERIC_PINCONF |
8b8b091b TL |
231 | help |
232 | This selects the device tree based generic pinctrl driver. | |
233 | ||
9e80f906 NA |
234 | config PINCTRL_SX150X |
235 | bool "Semtech SX150x I2C GPIO expander pinctrl driver" | |
e2a021d4 | 236 | depends on I2C=y |
9e80f906 NA |
237 | select PINMUX |
238 | select PINCONF | |
239 | select GENERIC_PINCONF | |
e2a021d4 | 240 | select GPIOLIB |
9e80f906 | 241 | select GPIOLIB_IRQCHIP |
0db0f26c | 242 | select REGMAP |
9e80f906 NA |
243 | help |
244 | Say yes here to provide support for Semtech SX150x-series I2C | |
245 | GPIO expanders as pinctrl module. | |
246 | Compatible models include: | |
247 | - 8 bits: sx1508q, sx1502q | |
248 | - 16 bits: sx1509q, sx1506q | |
249 | ||
cefc03e5 AB |
250 | config PINCTRL_PISTACHIO |
251 | def_bool y if MACH_PISTACHIO | |
252 | depends on GPIOLIB | |
253 | select PINMUX | |
254 | select GENERIC_PINCONF | |
255 | select GPIOLIB_IRQCHIP | |
256 | select OF_GPIO | |
257 | ||
701016c0 SK |
258 | config PINCTRL_ST |
259 | bool | |
260 | depends on OF | |
261 | select PINMUX | |
262 | select PINCONF | |
130cbe30 | 263 | select GPIOLIB_IRQCHIP |
701016c0 | 264 | |
1490d9f8 AD |
265 | config PINCTRL_STMFX |
266 | tristate "STMicroelectronics STMFX GPIO expander pinctrl driver" | |
9af2de76 | 267 | depends on I2C |
ec2e0f4f | 268 | depends on OF_GPIO |
1490d9f8 AD |
269 | select GENERIC_PINCONF |
270 | select GPIOLIB_IRQCHIP | |
271 | select MFD_STMFX | |
272 | help | |
273 | Driver for STMicroelectronics Multi-Function eXpander (STMFX) | |
274 | GPIO expander. | |
275 | This provides a GPIO interface supporting inputs and outputs, | |
276 | and configuring push-pull, open-drain, and can also be used as | |
277 | interrupt-controller. | |
278 | ||
2df723d4 LD |
279 | config PINCTRL_MAX77620 |
280 | tristate "MAX77620/MAX20024 Pincontrol support" | |
24d6a91c | 281 | depends on MFD_MAX77620 && OF |
79f28b9f | 282 | select PINMUX |
2df723d4 LD |
283 | select GENERIC_PINCONF |
284 | help | |
285 | Say Yes here to enable Pin control support for Maxim PMIC MAX77620. | |
286 | This PMIC has 8 GPIO pins that work as GPIO as well as special | |
287 | function in alternate mode. This driver also configure push-pull, | |
288 | open drain, FPS slots etc. | |
289 | ||
0a8d3e24 | 290 | config PINCTRL_PALMAS |
767b8ce3 | 291 | tristate "Pinctrl driver for the PALMAS Series MFD devices" |
0a8d3e24 | 292 | depends on OF && MFD_PALMAS |
63ca8db7 | 293 | select PINMUX |
0a8d3e24 LD |
294 | select GENERIC_PINCONF |
295 | help | |
296 | Palmas device supports the configuration of pins for different | |
297 | functionality. This driver supports the pinmux, push-pull and | |
298 | open drain configuration for the Palmas series devices like | |
299 | TPS65913, TPS80036 etc. | |
300 | ||
2ba384e6 JH |
301 | config PINCTRL_PIC32 |
302 | bool "Microchip PIC32 pin controller driver" | |
303 | depends on OF | |
304 | depends on MACH_PIC32 | |
305 | select PINMUX | |
306 | select GENERIC_PINCONF | |
307 | select GPIOLIB_IRQCHIP | |
308 | select OF_GPIO | |
309 | help | |
310 | This is the pin controller and gpio driver for Microchip PIC32 | |
311 | microcontrollers. This option is selected automatically when specific | |
312 | machine and arch are selected to build. | |
313 | ||
314 | config PINCTRL_PIC32MZDA | |
315 | def_bool y if PIC32MZDA | |
316 | select PINCTRL_PIC32 | |
317 | ||
add958ce SB |
318 | config PINCTRL_ZYNQ |
319 | bool "Pinctrl driver for Xilinx Zynq" | |
320 | depends on ARCH_ZYNQ | |
321 | select PINMUX | |
322 | select GENERIC_PINCONF | |
323 | help | |
485dba27 | 324 | This selects the pinctrl driver for Xilinx Zynq. |
add958ce | 325 | |
b5c23aa4 PC |
326 | config PINCTRL_INGENIC |
327 | bool "Pinctrl driver for the Ingenic JZ47xx SoCs" | |
635c20a1 | 328 | default MACH_INGENIC |
c504985e | 329 | depends on OF |
635c20a1 | 330 | depends on MIPS || COMPILE_TEST |
b5c23aa4 PC |
331 | select GENERIC_PINCONF |
332 | select GENERIC_PINCTRL_GROUPS | |
333 | select GENERIC_PINMUX_FUNCTIONS | |
e72394e2 PC |
334 | select GPIOLIB |
335 | select GPIOLIB_IRQCHIP | |
b5c23aa4 PC |
336 | select REGMAP_MMIO |
337 | ||
ea479996 JC |
338 | config PINCTRL_RK805 |
339 | tristate "Pinctrl and GPIO driver for RK805 PMIC" | |
340 | depends on MFD_RK808 | |
341 | select GPIOLIB | |
342 | select PINMUX | |
343 | select GENERIC_PINCONF | |
344 | help | |
345 | This selects the pinctrl driver for RK805. | |
346 | ||
ce8dc094 | 347 | config PINCTRL_OCELOT |
da801ab5 | 348 | bool "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs" |
ce8dc094 | 349 | depends on OF |
2dab3dd1 | 350 | depends on HAS_IOMEM |
ce8dc094 | 351 | select GPIOLIB |
be36abb7 | 352 | select GPIOLIB_IRQCHIP |
ce8dc094 AB |
353 | select GENERIC_PINCONF |
354 | select GENERIC_PINCTRL_GROUPS | |
355 | select GENERIC_PINMUX_FUNCTIONS | |
da801ab5 | 356 | select OF_GPIO |
ce8dc094 AB |
357 | select REGMAP_MMIO |
358 | ||
7e5ea974 LP |
359 | config PINCTRL_MICROCHIP_SGPIO |
360 | bool "Pinctrl driver for Microsemi/Microchip Serial GPIO" | |
552a9cc0 | 361 | depends on OF |
7e5ea974 LP |
362 | depends on HAS_IOMEM |
363 | select GPIOLIB | |
be2dc859 | 364 | select GPIOLIB_IRQCHIP |
7e5ea974 LP |
365 | select GENERIC_PINCONF |
366 | select GENERIC_PINCTRL_GROUPS | |
367 | select GENERIC_PINMUX_FUNCTIONS | |
552a9cc0 | 368 | select OF_GPIO |
7e5ea974 LP |
369 | help |
370 | Support for the serial GPIO interface used on Microsemi and | |
371 | Microchip SoC's. By using a serial interface, the SIO | |
372 | controller significantly extends the number of available | |
373 | GPIOs with a minimum number of additional pins on the | |
374 | device. The primary purpose of the SIO controller is to | |
375 | connect control signals from SFP modules and to act as an | |
376 | LED controller. | |
377 | ||
d4c34d09 DLM |
378 | config PINCTRL_K210 |
379 | bool "Pinctrl driver for the Canaan Kendryte K210 SoC" | |
380 | depends on RISCV && SOC_CANAAN && OF | |
381 | select GENERIC_PINMUX_FUNCTIONS | |
382 | select GENERIC_PINCONF | |
383 | select GPIOLIB | |
384 | select OF_GPIO | |
385 | select REGMAP_MMIO | |
386 | default SOC_CANAAN | |
387 | help | |
388 | Add support for the Canaan Kendryte K210 RISC-V SOC Field | |
389 | Programmable IO Array (FPIOA) controller. | |
390 | ||
2242ddfb | 391 | source "drivers/pinctrl/actions/Kconfig" |
4d3d0e42 | 392 | source "drivers/pinctrl/aspeed/Kconfig" |
b17f2f9b | 393 | source "drivers/pinctrl/bcm/Kconfig" |
3de68d33 | 394 | source "drivers/pinctrl/berlin/Kconfig" |
edad3b2a | 395 | source "drivers/pinctrl/freescale/Kconfig" |
5fae8b86 | 396 | source "drivers/pinctrl/intel/Kconfig" |
06763c74 | 397 | source "drivers/pinctrl/mvebu/Kconfig" |
3a198059 | 398 | source "drivers/pinctrl/nomadik/Kconfig" |
3b588e43 | 399 | source "drivers/pinctrl/nuvoton/Kconfig" |
4b15ec9d | 400 | source "drivers/pinctrl/pxa/Kconfig" |
69b78b8d | 401 | source "drivers/pinctrl/qcom/Kconfig" |
518b466a | 402 | source "drivers/pinctrl/ralink/Kconfig" |
077365a9 | 403 | source "drivers/pinctrl/renesas/Kconfig" |
ebe629a3 | 404 | source "drivers/pinctrl/samsung/Kconfig" |
deda8287 | 405 | source "drivers/pinctrl/spear/Kconfig" |
41d32cfc | 406 | source "drivers/pinctrl/sprd/Kconfig" |
aceb16dc | 407 | source "drivers/pinctrl/stm32/Kconfig" |
5f910777 | 408 | source "drivers/pinctrl/sunxi/Kconfig" |
25cbac77 | 409 | source "drivers/pinctrl/tegra/Kconfig" |
003910eb | 410 | source "drivers/pinctrl/ti/Kconfig" |
6e908892 | 411 | source "drivers/pinctrl/uniphier/Kconfig" |
170c6152 | 412 | source "drivers/pinctrl/vt8500/Kconfig" |
a6df410d | 413 | source "drivers/pinctrl/mediatek/Kconfig" |
277d14eb | 414 | source "drivers/pinctrl/meson/Kconfig" |
218d72a7 | 415 | source "drivers/pinctrl/cirrus/Kconfig" |
a68a7844 | 416 | source "drivers/pinctrl/visconti/Kconfig" |
deda8287 | 417 | |
3f8c50c9 JC |
418 | config PINCTRL_XWAY |
419 | bool | |
420 | depends on SOC_TYPE_XWAY | |
421 | depends on PINCTRL_LANTIQ | |
422 | ||
5aad0db1 CR |
423 | config PINCTRL_TB10X |
424 | bool | |
b99e6fb8 LW |
425 | depends on OF && ARC_PLAT_TB10X |
426 | select GPIOLIB | |
5aad0db1 | 427 | |
1948d5c5 RT |
428 | config PINCTRL_EQUILIBRIUM |
429 | tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC" | |
9e65527a | 430 | depends on OF && HAS_IOMEM |
80691a8a | 431 | depends on X86 || COMPILE_TEST |
1948d5c5 RT |
432 | select PINMUX |
433 | select PINCONF | |
434 | select GPIOLIB | |
435 | select GPIO_GENERIC | |
436 | select GPIOLIB_IRQCHIP | |
437 | select GENERIC_PINCONF | |
438 | select GENERIC_PINCTRL_GROUPS | |
439 | select GENERIC_PINMUX_FUNCTIONS | |
440 | ||
441 | help | |
442 | Equilibrium pinctrl driver is a pinctrl & GPIO driver for Intel Lightning | |
443 | Mountain network processor SoC that supports both the linux GPIO and pin | |
444 | control frameworks. It provides interfaces to setup pinmux, assign desired | |
445 | pin functions, configure GPIO attributes for LGM SoC pins. Pinmux and | |
446 | pinconf settings are retrieved from device tree. | |
447 | ||
d219b924 | 448 | endif |