pinctrl: dt-binding: document Conexant CX92755 SoC
[linux-2.6-block.git] / drivers / pinctrl / Kconfig
CommitLineData
2744e8af
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1#
2# PINCTRL infrastructure and drivers
3#
4
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5config PINCTRL
6 bool
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7
8if PINCTRL
9
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10menu "Pin controllers"
11 depends on PINCTRL
12
2744e8af 13config PINMUX
244e95a7 14 bool "Support pin multiplexing controllers" if COMPILE_TEST
ae6b4d85
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15
16config PINCONF
244e95a7 17 bool "Support pin configuration controllers" if COMPILE_TEST
2744e8af 18
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19config GENERIC_PINCONF
20 bool
21 select PINCONF
22
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23config DEBUG_PINCTRL
24 bool "Debug PINCTRL calls"
25 depends on DEBUG_KERNEL
26 help
27 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
28
e9a03add
SZ
29config PINCTRL_ADI2
30 bool "ADI pin controller driver"
9d7278d0 31 depends on BLACKFIN
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SZ
32 select PINMUX
33 select IRQ_DOMAIN
34 help
35 This is the pin controller and gpio driver for ADI BF54x, BF60x and
36 future processors. This option is selected automatically when specific
37 machine and arch are selected to build.
38
c8ce8782
LD
39config PINCTRL_AS3722
40 bool "Pinctrl and GPIO driver for ams AS3722 PMIC"
41 depends on MFD_AS3722 && GPIOLIB
42 select PINMUX
43 select GENERIC_PINCONF
44 help
45 AS3722 device supports the configuration of GPIO pins for different
46 functionality. This driver supports the pinmux, push-pull and
47 open drain configuration for the GPIO pins of AS3722 devices. It also
48 supports the GPIO functionality through gpiolib.
49
e9a03add
SZ
50config PINCTRL_BF54x
51 def_bool y if BF54x
52 select PINCTRL_ADI2
53
54config PINCTRL_BF60x
55 def_bool y if BF60x
56 select PINCTRL_ADI2
57
6732ae5c
JCPV
58config PINCTRL_AT91
59 bool "AT91 pinctrl driver"
60 depends on OF
61 depends on ARCH_AT91
62 select PINMUX
63 select PINCONF
80cc3732
AS
64 select GPIOLIB
65 select OF_GPIO
66 select GPIOLIB_IRQCHIP
6732ae5c
JCPV
67 help
68 Say Y here to enable the at91 pinctrl driver
69
dbad75dd
KX
70config PINCTRL_AMD
71 bool "AMD GPIO pin control"
72 depends on GPIOLIB
73 select GPIOLIB_IRQCHIP
74 select PINCONF
75 select GENERIC_PINCONF
76 help
77 driver for memory mapped GPIO functionality on AMD platforms
78 (x86 or arm).Most pins are usually muxed to some other
79 functionality by firmware,so only a small amount is available
80 for gpio use.
81
82 Requires ACPI/FDT device enumeration code to set up a platform
83 device.
84
3f8c50c9
JC
85config PINCTRL_LANTIQ
86 bool
87 depends on LANTIQ
88 select PINMUX
89 select PINCONF
90
2f77ac93
JE
91config PINCTRL_LPC18XX
92 bool "NXP LPC18XX/43XX SCU pinctrl driver"
93 depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
94 default ARCH_LPC18XX
95 select PINMUX
96 select GENERIC_PINCONF
97 help
98 Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
99
e316cb2b
JC
100config PINCTRL_FALCON
101 bool
102 depends on SOC_FALCON
103 depends on PINCTRL_LANTIQ
104
6ac73095
BG
105config PINCTRL_MESON
106 bool
b99e6fb8 107 depends on OF
6ac73095
BG
108 select PINMUX
109 select PINCONF
110 select GENERIC_PINCONF
b99e6fb8 111 select GPIOLIB
6ac73095
BG
112 select OF_GPIO
113 select REGMAP_MMIO
114
d3e51161
HS
115config PINCTRL_ROCKCHIP
116 bool
117 select PINMUX
118 select GENERIC_PINCONF
119 select GENERIC_IRQ_CHIP
751a99ab 120 select MFD_SYSCON
d3e51161 121
8b8b091b
TL
122config PINCTRL_SINGLE
123 tristate "One-register-per-pin type device tree based pinctrl driver"
124 depends on OF
125 select PINMUX
126 select PINCONF
9dddb4df 127 select GENERIC_PINCONF
8b8b091b
TL
128 help
129 This selects the device tree based generic pinctrl driver.
130
3bece55a 131config PINCTRL_SIRF
a17272a4 132 bool "CSR SiRFprimaII pin controller driver"
d3e26f2f 133 depends on ARCH_SIRF
393daa81 134 select PINMUX
f9367793
WC
135 select PINCONF
136 select GENERIC_PINCONF
7420d2d0 137 select GPIOLIB_IRQCHIP
393daa81 138
cefc03e5
AB
139config PINCTRL_PISTACHIO
140 def_bool y if MACH_PISTACHIO
141 depends on GPIOLIB
142 select PINMUX
143 select GENERIC_PINCONF
144 select GPIOLIB_IRQCHIP
145 select OF_GPIO
146
701016c0
SK
147config PINCTRL_ST
148 bool
149 depends on OF
150 select PINMUX
151 select PINCONF
130cbe30 152 select GPIOLIB_IRQCHIP
701016c0 153
971dac71
SW
154config PINCTRL_TEGRA
155 bool
507ccdbf
AL
156 select PINMUX
157 select PINCONF
971dac71
SW
158
159config PINCTRL_TEGRA20
160 bool
971dac71
SW
161 select PINCTRL_TEGRA
162
163config PINCTRL_TEGRA30
164 bool
971dac71
SW
165 select PINCTRL_TEGRA
166
b6ae7a26
PR
167config PINCTRL_TEGRA114
168 bool
169 select PINCTRL_TEGRA
170
1a16bee6
AG
171config PINCTRL_TEGRA124
172 bool
173 select PINCTRL_TEGRA
174
9184f756
SW
175config PINCTRL_TEGRA210
176 bool
177 select PINCTRL_TEGRA
178
dc0a3938
TR
179config PINCTRL_TEGRA_XUSB
180 def_bool y if ARCH_TEGRA
181 select GENERIC_PHY
182 select PINCONF
183 select PINMUX
184
d5025f9f
JH
185config PINCTRL_TZ1090
186 bool "Toumaz Xenif TZ1090 pin control driver"
187 depends on SOC_TZ1090
188 select PINMUX
189 select GENERIC_PINCONF
190
b58f0273
JH
191config PINCTRL_TZ1090_PDC
192 bool "Toumaz Xenif TZ1090 PDC pin control driver"
193 depends on SOC_TZ1090
194 select PINMUX
195 select PINCONF
196
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197config PINCTRL_U300
198 bool "U300 pin controller driver"
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199 depends on ARCH_U300
200 select PINMUX
dc0b1aa3 201 select GENERIC_PINCONF
45f034ef 202
ca402d37
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203config PINCTRL_COH901
204 bool "ST-Ericsson U300 COH 901 335/571 GPIO"
3c94d1bb 205 depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
523dcce7 206 select GPIOLIB_IRQCHIP
ca402d37
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207 help
208 Say yes here to support GPIO interface on ST-Ericsson U300.
209 The names of the two IP block variants supported are
210 COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
211 ports of 8 GPIO pins each.
212
0a8d3e24 213config PINCTRL_PALMAS
736658c5 214 bool "Pinctrl driver for the PALMAS Series MFD devices"
0a8d3e24 215 depends on OF && MFD_PALMAS
63ca8db7 216 select PINMUX
0a8d3e24
LD
217 select GENERIC_PINCONF
218 help
219 Palmas device supports the configuration of pins for different
220 functionality. This driver supports the pinmux, push-pull and
221 open drain configuration for the Palmas series devices like
222 TPS65913, TPS80036 etc.
223
add958ce
SB
224config PINCTRL_ZYNQ
225 bool "Pinctrl driver for Xilinx Zynq"
226 depends on ARCH_ZYNQ
227 select PINMUX
228 select GENERIC_PINCONF
229 help
230 This selectes the pinctrl driver for Xilinx Zynq.
231
b17f2f9b 232source "drivers/pinctrl/bcm/Kconfig"
3de68d33 233source "drivers/pinctrl/berlin/Kconfig"
edad3b2a 234source "drivers/pinctrl/freescale/Kconfig"
5fae8b86 235source "drivers/pinctrl/intel/Kconfig"
06763c74 236source "drivers/pinctrl/mvebu/Kconfig"
3a198059 237source "drivers/pinctrl/nomadik/Kconfig"
69b78b8d 238source "drivers/pinctrl/qcom/Kconfig"
ebe629a3 239source "drivers/pinctrl/samsung/Kconfig"
6e54d8d2 240source "drivers/pinctrl/sh-pfc/Kconfig"
deda8287 241source "drivers/pinctrl/spear/Kconfig"
5f910777 242source "drivers/pinctrl/sunxi/Kconfig"
6e908892 243source "drivers/pinctrl/uniphier/Kconfig"
170c6152 244source "drivers/pinctrl/vt8500/Kconfig"
a6df410d 245source "drivers/pinctrl/mediatek/Kconfig"
deda8287 246
3f8c50c9
JC
247config PINCTRL_XWAY
248 bool
249 depends on SOC_TYPE_XWAY
250 depends on PINCTRL_LANTIQ
251
5aad0db1
CR
252config PINCTRL_TB10X
253 bool
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LW
254 depends on OF && ARC_PLAT_TB10X
255 select GPIOLIB
5aad0db1 256
45f034ef 257endmenu
98da3529 258
2744e8af 259endif