Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
2744e8af LW |
2 | # |
3 | # PINCTRL infrastructure and drivers | |
4 | # | |
5 | ||
d219b924 PR |
6 | menuconfig PINCTRL |
7 | bool "Pin controllers" | |
2744e8af | 8 | |
d219b924 | 9 | if PINCTRL |
45f034ef | 10 | |
c033a718 | 11 | config GENERIC_PINCTRL_GROUPS |
c7059c5a TL |
12 | bool |
13 | ||
2744e8af | 14 | config PINMUX |
244e95a7 | 15 | bool "Support pin multiplexing controllers" if COMPILE_TEST |
ae6b4d85 | 16 | |
a76edc89 TL |
17 | config GENERIC_PINMUX_FUNCTIONS |
18 | bool | |
19 | select PINMUX | |
20 | ||
ae6b4d85 | 21 | config PINCONF |
244e95a7 | 22 | bool "Support pin configuration controllers" if COMPILE_TEST |
2744e8af | 23 | |
394349f7 LW |
24 | config GENERIC_PINCONF |
25 | bool | |
26 | select PINCONF | |
27 | ||
2744e8af LW |
28 | config DEBUG_PINCTRL |
29 | bool "Debug PINCTRL calls" | |
30 | depends on DEBUG_KERNEL | |
31 | help | |
32 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. | |
33 | ||
b124c8bd | 34 | config PINCTRL_AMD |
41ef3c1a | 35 | bool "AMD GPIO pin control" |
b124c8bd AS |
36 | depends on HAS_IOMEM |
37 | depends on ACPI || COMPILE_TEST | |
38 | select GPIOLIB | |
39 | select GPIOLIB_IRQCHIP | |
40 | select PINMUX | |
41 | select PINCONF | |
42 | select GENERIC_PINCONF | |
43 | help | |
44 | The driver for memory mapped GPIO functionality on AMD platforms | |
45 | (x86 or arm). Most of the pins are usually muxed to some other | |
46 | functionality by firmware, so only a small amount is available | |
47 | for GPIO use. | |
48 | ||
49 | Requires ACPI/FDT device enumeration code to set up a platform | |
50 | device. | |
51 | ||
a0f160ff JG |
52 | config PINCTRL_APPLE_GPIO |
53 | tristate "Apple SoC GPIO pin controller driver" | |
54 | depends on ARCH_APPLE | |
55 | select PINMUX | |
56 | select GPIOLIB | |
57 | select GPIOLIB_IRQCHIP | |
58 | select GENERIC_PINCTRL_GROUPS | |
59 | select GENERIC_PINMUX_FUNCTIONS | |
60 | select OF_GPIO | |
61 | help | |
62 | This is the driver for the GPIO controller found on Apple ARM SoCs, | |
63 | including M1. | |
64 | ||
65 | This driver can also be built as a module. If so, the module | |
66 | will be called pinctrl-apple-gpio. | |
67 | ||
00df0582 | 68 | config PINCTRL_ARTPEC6 |
2635adb4 KK |
69 | bool "Axis ARTPEC-6 pin controller driver" |
70 | depends on MACH_ARTPEC6 | |
71 | select PINMUX | |
72 | select GENERIC_PINCONF | |
73 | help | |
74 | This is the driver for the Axis ARTPEC-6 pin controller. This driver | |
75 | supports pin function multiplexing as well as pin bias and drive | |
76 | strength configuration. Device tree integration instructions can be | |
77 | found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt | |
00df0582 | 78 | |
c8ce8782 | 79 | config PINCTRL_AS3722 |
9385f35d | 80 | tristate "Pinctrl and GPIO driver for ams AS3722 PMIC" |
c8ce8782 LD |
81 | depends on MFD_AS3722 && GPIOLIB |
82 | select PINMUX | |
83 | select GENERIC_PINCONF | |
84 | help | |
85 | AS3722 device supports the configuration of GPIO pins for different | |
86 | functionality. This driver supports the pinmux, push-pull and | |
87 | open drain configuration for the GPIO pins of AS3722 devices. It also | |
88 | supports the GPIO functionality through gpiolib. | |
89 | ||
6732ae5c JCPV |
90 | config PINCTRL_AT91 |
91 | bool "AT91 pinctrl driver" | |
92 | depends on OF | |
93 | depends on ARCH_AT91 | |
94 | select PINMUX | |
95 | select PINCONF | |
80cc3732 AS |
96 | select GPIOLIB |
97 | select OF_GPIO | |
98 | select GPIOLIB_IRQCHIP | |
6732ae5c JCPV |
99 | help |
100 | Say Y here to enable the at91 pinctrl driver | |
101 | ||
77618084 LD |
102 | config PINCTRL_AT91PIO4 |
103 | bool "AT91 PIO4 pinctrl driver" | |
104 | depends on OF | |
0a03658d | 105 | depends on HAS_IOMEM |
e682fcc7 | 106 | depends on ARCH_AT91 || COMPILE_TEST |
77618084 LD |
107 | select PINMUX |
108 | select GENERIC_PINCONF | |
109 | select GPIOLIB | |
110 | select GPIOLIB_IRQCHIP | |
111 | select OF_GPIO | |
112 | help | |
113 | Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4 | |
114 | controller available on sama5d2 SoC. | |
115 | ||
b124c8bd AS |
116 | config PINCTRL_AXP209 |
117 | tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support" | |
118 | depends on MFD_AXP20X | |
119 | depends on OF | |
83b31c2a | 120 | select PINMUX |
dbad75dd | 121 | select GENERIC_PINCONF |
b124c8bd | 122 | select GPIOLIB |
dbad75dd | 123 | help |
b124c8bd AS |
124 | AXP PMICs provides multiple GPIOs that can be muxed for different |
125 | functions. This driver bundles a pinctrl driver to select the function | |
126 | muxing and a GPIO driver to handle the GPIO when the GPIO function is | |
127 | selected. | |
128 | Say Y to enable pinctrl and GPIO support for the AXP209 PMIC. | |
dbad75dd | 129 | |
576623d7 | 130 | config PINCTRL_AW9523 |
d295ad7e | 131 | tristate "Awinic AW9523/AW9523B I2C GPIO expander pinctrl driver" |
576623d7 ADR |
132 | depends on OF && I2C |
133 | select PINMUX | |
134 | select PINCONF | |
135 | select GENERIC_PINCONF | |
136 | select GPIOLIB | |
137 | select GPIOLIB_IRQCHIP | |
138 | select REGMAP | |
139 | select REGMAP_I2C | |
140 | help | |
141 | The Awinic AW9523/AW9523B is a multi-function I2C GPIO | |
142 | expander with PWM functionality. This driver bundles a | |
143 | pinctrl driver to select the function muxing and a GPIO | |
144 | driver to handle GPIO, when the GPIO function is selected. | |
145 | ||
146 | Say yes to enable pinctrl and GPIO support for the AW9523(B). | |
147 | ||
8f3f0246 MS |
148 | config PINCTRL_BM1880 |
149 | bool "Bitmain BM1880 Pinctrl driver" | |
8293b3c6 MS |
150 | depends on OF && (ARCH_BITMAIN || COMPILE_TEST) |
151 | default ARCH_BITMAIN | |
8f3f0246 MS |
152 | select PINMUX |
153 | help | |
154 | Pinctrl driver for Bitmain BM1880 SoC. | |
155 | ||
e6cbbe42 PR |
156 | config PINCTRL_CY8C95X0 |
157 | tristate "Cypress CY8C95X0 I2C pinctrl and GPIO driver" | |
8586466e | 158 | depends on I2C |
e6cbbe42 PR |
159 | select GPIOLIB |
160 | select GPIOLIB_IRQCHIP | |
161 | select PINMUX | |
162 | select PINCONF | |
163 | select GENERIC_PINCONF | |
164 | select REGMAP_I2C | |
165 | help | |
166 | Support for 20/40/60 pin Cypress Cy8C95x0 pinctrl/gpio I2C expander. | |
167 | This driver can also be built as a module. If so, the module will be | |
168 | called pinctrl-cy8c95x0. | |
169 | ||
1ff91f0a | 170 | config PINCTRL_DA850_PUPD |
b124c8bd | 171 | tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups" |
1ff91f0a DL |
172 | depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST) |
173 | select PINCONF | |
174 | select GENERIC_PINCONF | |
175 | help | |
176 | Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control | |
b124c8bd | 177 | pull-up and pull-down pin groups. |
1ff91f0a | 178 | |
56cc3af4 MF |
179 | config PINCTRL_DA9062 |
180 | tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support" | |
181 | depends on MFD_DA9062 | |
182 | select GPIOLIB | |
183 | help | |
184 | The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for | |
185 | different functions. This driver bundles a pinctrl driver to select the | |
186 | function muxing and a GPIO driver to handle the GPIO when the GPIO | |
187 | function is selected. | |
188 | ||
b124c8bd | 189 | Say Y to enable pinctrl and GPIO support for the DA9062 PMIC. |
56cc3af4 | 190 | |
38b0e507 BS |
191 | config PINCTRL_DIGICOLOR |
192 | bool | |
083b0230 | 193 | depends on ARCH_DIGICOLOR || COMPILE_TEST |
38b0e507 BS |
194 | select PINMUX |
195 | select GENERIC_PINCONF | |
196 | ||
b124c8bd AS |
197 | config PINCTRL_EQUILIBRIUM |
198 | tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC" | |
199 | depends on OF && HAS_IOMEM | |
200 | depends on X86 || COMPILE_TEST | |
201 | select PINMUX | |
202 | select PINCONF | |
203 | select GPIOLIB | |
204 | select GPIO_GENERIC | |
205 | select GPIOLIB_IRQCHIP | |
206 | select GENERIC_PINCONF | |
207 | select GENERIC_PINCTRL_GROUPS | |
208 | select GENERIC_PINMUX_FUNCTIONS | |
209 | help | |
210 | Equilibrium driver is a pinctrl and GPIO driver for Intel Lightning | |
211 | Mountain network processor SoC that supports both the GPIO and pin | |
212 | control frameworks. It provides interfaces to setup pin muxing, assign | |
213 | desired pin functions, configure GPIO attributes for LGM SoC pins. | |
214 | Pin muxing and pin config settings are retrieved from device tree. | |
215 | ||
216 | config PINCTRL_GEMINI | |
217 | bool | |
218 | depends on ARCH_GEMINI | |
219 | default ARCH_GEMINI | |
220 | select PINMUX | |
221 | select GENERIC_PINCONF | |
222 | select MFD_SYSCON | |
223 | ||
224 | config PINCTRL_INGENIC | |
225 | bool "Pinctrl driver for the Ingenic JZ47xx SoCs" | |
226 | default MACH_INGENIC | |
227 | depends on OF | |
228 | depends on MIPS || COMPILE_TEST | |
229 | select GENERIC_PINCONF | |
230 | select GENERIC_PINCTRL_GROUPS | |
231 | select GENERIC_PINMUX_FUNCTIONS | |
232 | select GPIOLIB | |
233 | select GPIOLIB_IRQCHIP | |
234 | select REGMAP_MMIO | |
235 | ||
236 | config PINCTRL_K210 | |
237 | bool "Pinctrl driver for the Canaan Kendryte K210 SoC" | |
c1556a9b | 238 | depends on RISCV && SOC_CANAAN_K210 && OF |
b124c8bd AS |
239 | select GENERIC_PINMUX_FUNCTIONS |
240 | select GENERIC_PINCONF | |
241 | select GPIOLIB | |
242 | select OF_GPIO | |
243 | select REGMAP_MMIO | |
c1556a9b | 244 | default SOC_CANAAN_K210 |
b124c8bd AS |
245 | help |
246 | Add support for the Canaan Kendryte K210 RISC-V SOC Field | |
247 | Programmable IO Array (FPIOA) controller. | |
248 | ||
249 | config PINCTRL_KEEMBAY | |
250 | tristate "Pinctrl driver for Intel Keem Bay SoC" | |
251 | depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) | |
252 | depends on HAS_IOMEM | |
253 | select PINMUX | |
254 | select PINCONF | |
255 | select GENERIC_PINCONF | |
256 | select GENERIC_PINCTRL_GROUPS | |
257 | select GENERIC_PINMUX_FUNCTIONS | |
258 | select GPIOLIB | |
259 | select GPIOLIB_IRQCHIP | |
260 | select GPIO_GENERIC | |
261 | help | |
262 | This selects pin control driver for the Intel Keem Bay SoC. | |
263 | It provides pin config functions such as pull-up, pull-down, | |
264 | interrupt, drive strength, sec lock, Schmitt trigger, slew | |
265 | rate control and direction control. This module will be | |
266 | called as pinctrl-keembay. | |
267 | ||
3f8c50c9 JC |
268 | config PINCTRL_LANTIQ |
269 | bool | |
270 | depends on LANTIQ | |
271 | select PINMUX | |
272 | select PINCONF | |
273 | ||
b124c8bd AS |
274 | config PINCTRL_FALCON |
275 | bool | |
276 | depends on SOC_FALCON | |
277 | depends on PINCTRL_LANTIQ | |
278 | ||
f73f88ac | 279 | config PINCTRL_LOONGSON2 |
280 | tristate "Pinctrl driver for the Loongson-2 SoC" | |
c0f358fd | 281 | depends on OF && (LOONGARCH || COMPILE_TEST) |
f73f88ac | 282 | select PINMUX |
283 | select GENERIC_PINCONF | |
284 | help | |
285 | This selects pin control driver for the Loongson-2 SoC. It | |
286 | provides pin config functions multiplexing. GPIO pin pull-up, | |
287 | pull-down functions are not supported. Say yes to enable | |
288 | pinctrl for Loongson-2 SoC. | |
289 | ||
b124c8bd AS |
290 | config PINCTRL_XWAY |
291 | bool | |
292 | depends on SOC_TYPE_XWAY | |
293 | depends on PINCTRL_LANTIQ | |
294 | ||
2f77ac93 JE |
295 | config PINCTRL_LPC18XX |
296 | bool "NXP LPC18XX/43XX SCU pinctrl driver" | |
297 | depends on OF && (ARCH_LPC18XX || COMPILE_TEST) | |
298 | default ARCH_LPC18XX | |
299 | select PINMUX | |
300 | select GENERIC_PINCONF | |
301 | help | |
302 | Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU). | |
303 | ||
b124c8bd AS |
304 | config PINCTRL_MAX77620 |
305 | tristate "MAX77620/MAX20024 Pincontrol support" | |
306 | depends on MFD_MAX77620 && OF | |
06351d13 | 307 | select PINMUX |
1c5b7f3c | 308 | select GENERIC_PINCONF |
b124c8bd AS |
309 | help |
310 | Say Y here to enable Pin control support for Maxim MAX77620 PMIC. | |
311 | This PMIC has 8 GPIO pins that work as GPIO as well as special | |
312 | function in alternate mode. This driver also configure push-pull, | |
313 | open drain, FPS slots etc. | |
06351d13 | 314 | |
0f04a817 AS |
315 | config PINCTRL_MCP23S08_I2C |
316 | tristate | |
317 | select REGMAP_I2C | |
318 | ||
319 | config PINCTRL_MCP23S08_SPI | |
320 | tristate | |
321 | select REGMAP_SPI | |
322 | ||
64ac43e6 SR |
323 | config PINCTRL_MCP23S08 |
324 | tristate "Microchip MCP23xxx I/O expander" | |
64ac43e6 | 325 | depends on SPI_MASTER || I2C |
e2a021d4 | 326 | select GPIOLIB |
64ac43e6 | 327 | select GPIOLIB_IRQCHIP |
82039d24 | 328 | select GENERIC_PINCONF |
0f04a817 AS |
329 | select PINCTRL_MCP23S08_I2C if I2C |
330 | select PINCTRL_MCP23S08_SPI if SPI_MASTER | |
64ac43e6 | 331 | help |
6ff45566 JK |
332 | SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 / |
333 | MCP23008 / MCP23017 / MCP23018 I/O expanders. | |
334 | This provides a GPIO interface supporting inputs and outputs and a | |
335 | corresponding interrupt-controller. | |
64ac43e6 | 336 | |
b124c8bd | 337 | config PINCTRL_MICROCHIP_SGPIO |
2f65923c | 338 | tristate "Pinctrl driver for Microsemi/Microchip Serial GPIO" |
611dac1e | 339 | depends on OF |
b124c8bd | 340 | depends on HAS_IOMEM |
611dac1e | 341 | select GPIOLIB |
611dac1e | 342 | select GPIOLIB_IRQCHIP |
d3e51161 | 343 | select GENERIC_PINCONF |
b124c8bd AS |
344 | select GENERIC_PINCTRL_GROUPS |
345 | select GENERIC_PINMUX_FUNCTIONS | |
0662e4a1 | 346 | select OF_GPIO |
25fda51c | 347 | help |
b124c8bd AS |
348 | Support for the serial GPIO interface used on Microsemi and |
349 | Microchip SoCs. By using a serial interface, the SIO | |
350 | controller significantly extends the number of available | |
351 | GPIOs with a minimum number of additional pins on the | |
352 | device. The primary purpose of the SIO controller is to | |
353 | connect control signals from SFP modules and to act as an | |
354 | LED controller. | |
d3e51161 | 355 | |
2f65923c CF |
356 | If compiled as a module, the module name will be |
357 | pinctrl-microchip-sgpio. | |
358 | ||
b124c8bd | 359 | config PINCTRL_OCELOT |
4425205e | 360 | tristate "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs" |
8b8b091b | 361 | depends on OF |
fd35b202 | 362 | depends on HAS_IOMEM |
e2a021d4 | 363 | select GPIOLIB |
9e80f906 | 364 | select GPIOLIB_IRQCHIP |
cefc03e5 | 365 | select GENERIC_PINCONF |
b124c8bd AS |
366 | select GENERIC_PINCTRL_GROUPS |
367 | select GENERIC_PINMUX_FUNCTIONS | |
cefc03e5 | 368 | select OF_GPIO |
b124c8bd | 369 | select REGMAP_MMIO |
3f668365 CF |
370 | help |
371 | Support for the internal GPIO interfaces on Microsemi Ocelot and | |
372 | Jaguar2 SoCs. | |
373 | ||
374 | If conpiled as a module, the module name will be pinctrl-ocelot. | |
cefc03e5 | 375 | |
0a8d3e24 | 376 | config PINCTRL_PALMAS |
767b8ce3 | 377 | tristate "Pinctrl driver for the PALMAS Series MFD devices" |
0a8d3e24 | 378 | depends on OF && MFD_PALMAS |
63ca8db7 | 379 | select PINMUX |
0a8d3e24 LD |
380 | select GENERIC_PINCONF |
381 | help | |
382 | Palmas device supports the configuration of pins for different | |
383 | functionality. This driver supports the pinmux, push-pull and | |
384 | open drain configuration for the Palmas series devices like | |
385 | TPS65913, TPS80036 etc. | |
386 | ||
37c646dc HC |
387 | config PINCTRL_PEF2256 |
388 | tristate "Lantiq PEF2256 (FALC56) pin controller driver" | |
389 | depends on OF && FRAMER_PEF2256 | |
390 | select PINMUX | |
391 | select PINCONF | |
392 | select GENERIC_PINCONF | |
393 | help | |
394 | This option enables the pin controller support for the Lantiq PEF2256 | |
395 | framer, also known as FALC56. | |
396 | ||
397 | If unsure, say N. | |
398 | ||
399 | To compile this driver as a module, choose M here: the | |
400 | module will be called pinctrl-pef2256. | |
401 | ||
2ba384e6 JH |
402 | config PINCTRL_PIC32 |
403 | bool "Microchip PIC32 pin controller driver" | |
404 | depends on OF | |
405 | depends on MACH_PIC32 | |
406 | select PINMUX | |
407 | select GENERIC_PINCONF | |
408 | select GPIOLIB_IRQCHIP | |
409 | select OF_GPIO | |
410 | help | |
411 | This is the pin controller and gpio driver for Microchip PIC32 | |
412 | microcontrollers. This option is selected automatically when specific | |
413 | machine and arch are selected to build. | |
414 | ||
415 | config PINCTRL_PIC32MZDA | |
416 | def_bool y if PIC32MZDA | |
417 | select PINCTRL_PIC32 | |
418 | ||
b124c8bd AS |
419 | config PINCTRL_PISTACHIO |
420 | bool "IMG Pistachio SoC pinctrl driver" | |
421 | depends on OF && (MIPS || COMPILE_TEST) | |
422 | depends on GPIOLIB | |
8b242ca7 SKP |
423 | select PINMUX |
424 | select GENERIC_PINCONF | |
e72394e2 | 425 | select GPIOLIB_IRQCHIP |
b124c8bd AS |
426 | select OF_GPIO |
427 | help | |
428 | This support pinctrl and GPIO driver for IMG Pistachio SoC. | |
b5c23aa4 | 429 | |
ea479996 JC |
430 | config PINCTRL_RK805 |
431 | tristate "Pinctrl and GPIO driver for RK805 PMIC" | |
c20e8c5b | 432 | depends on MFD_RK8XX |
ea479996 JC |
433 | select GPIOLIB |
434 | select PINMUX | |
435 | select GENERIC_PINCONF | |
436 | help | |
437 | This selects the pinctrl driver for RK805. | |
438 | ||
d3e51161 | 439 | config PINCTRL_ROCKCHIP |
be786ac5 | 440 | tristate "Rockchip gpio and pinctrl driver" |
febb4ee2 | 441 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
0662e4a1 | 442 | depends on OF |
25fda51c | 443 | select GPIOLIB |
d3e51161 HS |
444 | select PINMUX |
445 | select GENERIC_PINCONF | |
446 | select GENERIC_IRQ_CHIP | |
751a99ab | 447 | select MFD_SYSCON |
0662e4a1 | 448 | select OF_GPIO |
25fda51c JX |
449 | default ARCH_ROCKCHIP |
450 | help | |
b124c8bd | 451 | This support pinctrl and GPIO driver for Rockchip SoCs. |
d3e51161 | 452 | |
eb524cb6 PF |
453 | config PINCTRL_SCMI |
454 | tristate "Pinctrl driver using SCMI protocol interface" | |
455 | depends on ARM_SCMI_PROTOCOL || COMPILE_TEST | |
456 | select PINMUX | |
457 | select GENERIC_PINCONF | |
458 | help | |
459 | This driver provides support for pinctrl which is controlled | |
460 | by firmware that implements the SCMI interface. | |
461 | It uses SCMI Message Protocol to interact with the | |
462 | firmware providing all the pinctrl controls. | |
463 | ||
8b8b091b TL |
464 | config PINCTRL_SINGLE |
465 | tristate "One-register-per-pin type device tree based pinctrl driver" | |
466 | depends on OF | |
fd35b202 | 467 | depends on HAS_IOMEM |
caeb774e | 468 | select GENERIC_PINCTRL_GROUPS |
571aec4d | 469 | select GENERIC_PINMUX_FUNCTIONS |
9dddb4df | 470 | select GENERIC_PINCONF |
8b8b091b TL |
471 | help |
472 | This selects the device tree based generic pinctrl driver. | |
473 | ||
701016c0 SK |
474 | config PINCTRL_ST |
475 | bool | |
476 | depends on OF | |
477 | select PINMUX | |
478 | select PINCONF | |
130cbe30 | 479 | select GPIOLIB_IRQCHIP |
701016c0 | 480 | |
1490d9f8 AD |
481 | config PINCTRL_STMFX |
482 | tristate "STMicroelectronics STMFX GPIO expander pinctrl driver" | |
9af2de76 | 483 | depends on I2C |
ec2e0f4f | 484 | depends on OF_GPIO |
1490d9f8 AD |
485 | select GENERIC_PINCONF |
486 | select GPIOLIB_IRQCHIP | |
487 | select MFD_STMFX | |
488 | help | |
489 | Driver for STMicroelectronics Multi-Function eXpander (STMFX) | |
490 | GPIO expander. | |
491 | This provides a GPIO interface supporting inputs and outputs, | |
492 | and configuring push-pull, open-drain, and can also be used as | |
493 | interrupt-controller. | |
494 | ||
b124c8bd AS |
495 | config PINCTRL_SX150X |
496 | bool "Semtech SX150x I2C GPIO expander pinctrl driver" | |
497 | depends on I2C=y | |
79f28b9f | 498 | select PINMUX |
b124c8bd | 499 | select PINCONF |
2df723d4 | 500 | select GENERIC_PINCONF |
d4c34d09 | 501 | select GPIOLIB |
b124c8bd AS |
502 | select GPIOLIB_IRQCHIP |
503 | select REGMAP | |
2df723d4 | 504 | help |
b124c8bd AS |
505 | Say Y here to provide support for Semtech SX150x-series I2C |
506 | GPIO expanders as pinctrl module. | |
507 | Compatible models include: | |
508 | - 8 bits: sx1508q, sx1502q | |
509 | - 16 bits: sx1509q, sx1506q | |
2df723d4 | 510 | |
b124c8bd AS |
511 | config PINCTRL_TB10X |
512 | bool | |
513 | depends on OF && ARC_PLAT_TB10X | |
514 | select GPIOLIB | |
0a8d3e24 | 515 | |
901b277e EB |
516 | config PINCTRL_TPS6594 |
517 | tristate "Pinctrl and GPIO driver for TI TPS6594 PMIC" | |
518 | depends on OF && MFD_TPS6594 | |
519 | default MFD_TPS6594 | |
520 | select PINMUX | |
521 | select GPIOLIB | |
522 | select REGMAP | |
523 | select GPIO_REGMAP | |
524 | select GENERIC_PINCONF | |
525 | help | |
526 | Say Y to select the pinmuxing and GPIOs driver for the TPS6594 | |
527 | PMICs chip family. | |
528 | ||
529 | This driver can also be built as a module | |
530 | called tps6594-pinctrl. | |
531 | ||
add958ce SB |
532 | config PINCTRL_ZYNQ |
533 | bool "Pinctrl driver for Xilinx Zynq" | |
534 | depends on ARCH_ZYNQ | |
535 | select PINMUX | |
536 | select GENERIC_PINCONF | |
537 | help | |
485dba27 | 538 | This selects the pinctrl driver for Xilinx Zynq. |
add958ce | 539 | |
8b242ca7 SKP |
540 | config PINCTRL_ZYNQMP |
541 | tristate "Pinctrl driver for Xilinx ZynqMP" | |
542 | depends on ZYNQMP_FIRMWARE | |
543 | select PINMUX | |
544 | select GENERIC_PINCONF | |
545 | default ZYNQMP_FIRMWARE | |
546 | help | |
547 | This selects the pinctrl driver for Xilinx ZynqMP platform. | |
548 | This driver will query the pin information from the firmware | |
549 | and allow configuring the pins. | |
550 | Configuration can include the mux function to select on those | |
551 | pin(s)/group(s), and various pin configuration parameters | |
552 | such as pull-up, slew rate, etc. | |
fa99e701 SKP |
553 | This driver can also be built as a module. If so, the module |
554 | will be called pinctrl-zynqmp. | |
8b242ca7 | 555 | |
d11f9328 AM |
556 | config PINCTRL_MLXBF3 |
557 | tristate "NVIDIA BlueField-3 SoC Pinctrl driver" | |
558 | depends on (MELLANOX_PLATFORM && ARM64) || COMPILE_TEST | |
559 | select PINMUX | |
560 | select GPIOLIB | |
561 | select GPIOLIB_IRQCHIP | |
d11f9328 AM |
562 | help |
563 | Say Y to select the pinctrl driver for BlueField-3 SoCs. | |
564 | This pin controller allows selecting the mux function for | |
565 | each pin. This driver can also be built as a module called | |
566 | pinctrl-mlxbf3. | |
567 | ||
2242ddfb | 568 | source "drivers/pinctrl/actions/Kconfig" |
4d3d0e42 | 569 | source "drivers/pinctrl/aspeed/Kconfig" |
b17f2f9b | 570 | source "drivers/pinctrl/bcm/Kconfig" |
3de68d33 | 571 | source "drivers/pinctrl/berlin/Kconfig" |
b124c8bd | 572 | source "drivers/pinctrl/cirrus/Kconfig" |
edad3b2a | 573 | source "drivers/pinctrl/freescale/Kconfig" |
5fae8b86 | 574 | source "drivers/pinctrl/intel/Kconfig" |
b124c8bd AS |
575 | source "drivers/pinctrl/mediatek/Kconfig" |
576 | source "drivers/pinctrl/meson/Kconfig" | |
06763c74 | 577 | source "drivers/pinctrl/mvebu/Kconfig" |
3a198059 | 578 | source "drivers/pinctrl/nomadik/Kconfig" |
3b588e43 | 579 | source "drivers/pinctrl/nuvoton/Kconfig" |
fd84aaa8 | 580 | source "drivers/pinctrl/nxp/Kconfig" |
4b15ec9d | 581 | source "drivers/pinctrl/pxa/Kconfig" |
69b78b8d | 582 | source "drivers/pinctrl/qcom/Kconfig" |
e99ce780 | 583 | source "drivers/pinctrl/realtek/Kconfig" |
077365a9 | 584 | source "drivers/pinctrl/renesas/Kconfig" |
ebe629a3 | 585 | source "drivers/pinctrl/samsung/Kconfig" |
deda8287 | 586 | source "drivers/pinctrl/spear/Kconfig" |
41d32cfc | 587 | source "drivers/pinctrl/sprd/Kconfig" |
ba7fdf88 | 588 | source "drivers/pinctrl/starfive/Kconfig" |
aceb16dc | 589 | source "drivers/pinctrl/stm32/Kconfig" |
aa74c44b | 590 | source "drivers/pinctrl/sunplus/Kconfig" |
5f910777 | 591 | source "drivers/pinctrl/sunxi/Kconfig" |
25cbac77 | 592 | source "drivers/pinctrl/tegra/Kconfig" |
003910eb | 593 | source "drivers/pinctrl/ti/Kconfig" |
6e908892 | 594 | source "drivers/pinctrl/uniphier/Kconfig" |
a68a7844 | 595 | source "drivers/pinctrl/visconti/Kconfig" |
b124c8bd | 596 | source "drivers/pinctrl/vt8500/Kconfig" |
1948d5c5 | 597 | |
d219b924 | 598 | endif |