Merge git://git.kernel.org/pub/scm/linux/kernel/git/netfilter/nf
[linux-block.git] / drivers / pinctrl / Kconfig
CommitLineData
ec8f24b7 1# SPDX-License-Identifier: GPL-2.0-only
2744e8af
LW
2#
3# PINCTRL infrastructure and drivers
4#
5
d219b924
PR
6menuconfig PINCTRL
7 bool "Pin controllers"
2744e8af 8
d219b924 9if PINCTRL
45f034ef 10
c033a718 11config GENERIC_PINCTRL_GROUPS
c7059c5a
TL
12 bool
13
2744e8af 14config PINMUX
244e95a7 15 bool "Support pin multiplexing controllers" if COMPILE_TEST
ae6b4d85 16
a76edc89
TL
17config GENERIC_PINMUX_FUNCTIONS
18 bool
19 select PINMUX
20
ae6b4d85 21config PINCONF
244e95a7 22 bool "Support pin configuration controllers" if COMPILE_TEST
2744e8af 23
394349f7
LW
24config GENERIC_PINCONF
25 bool
26 select PINCONF
27
2744e8af
LW
28config DEBUG_PINCTRL
29 bool "Debug PINCTRL calls"
30 depends on DEBUG_KERNEL
31 help
32 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
33
b124c8bd
AS
34config PINCTRL_AMD
35 tristate "AMD GPIO pin control"
36 depends on HAS_IOMEM
37 depends on ACPI || COMPILE_TEST
38 select GPIOLIB
39 select GPIOLIB_IRQCHIP
40 select PINMUX
41 select PINCONF
42 select GENERIC_PINCONF
43 help
44 The driver for memory mapped GPIO functionality on AMD platforms
45 (x86 or arm). Most of the pins are usually muxed to some other
46 functionality by firmware, so only a small amount is available
47 for GPIO use.
48
49 Requires ACPI/FDT device enumeration code to set up a platform
50 device.
51
a0f160ff
JG
52config PINCTRL_APPLE_GPIO
53 tristate "Apple SoC GPIO pin controller driver"
54 depends on ARCH_APPLE
55 select PINMUX
56 select GPIOLIB
57 select GPIOLIB_IRQCHIP
58 select GENERIC_PINCTRL_GROUPS
59 select GENERIC_PINMUX_FUNCTIONS
60 select OF_GPIO
61 help
62 This is the driver for the GPIO controller found on Apple ARM SoCs,
63 including M1.
64
65 This driver can also be built as a module. If so, the module
66 will be called pinctrl-apple-gpio.
67
00df0582 68config PINCTRL_ARTPEC6
2635adb4
KK
69 bool "Axis ARTPEC-6 pin controller driver"
70 depends on MACH_ARTPEC6
71 select PINMUX
72 select GENERIC_PINCONF
73 help
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
75 supports pin function multiplexing as well as pin bias and drive
76 strength configuration. Device tree integration instructions can be
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
00df0582 78
c8ce8782 79config PINCTRL_AS3722
9385f35d 80 tristate "Pinctrl and GPIO driver for ams AS3722 PMIC"
c8ce8782
LD
81 depends on MFD_AS3722 && GPIOLIB
82 select PINMUX
83 select GENERIC_PINCONF
84 help
85 AS3722 device supports the configuration of GPIO pins for different
86 functionality. This driver supports the pinmux, push-pull and
87 open drain configuration for the GPIO pins of AS3722 devices. It also
88 supports the GPIO functionality through gpiolib.
89
6732ae5c
JCPV
90config PINCTRL_AT91
91 bool "AT91 pinctrl driver"
92 depends on OF
93 depends on ARCH_AT91
94 select PINMUX
95 select PINCONF
80cc3732
AS
96 select GPIOLIB
97 select OF_GPIO
98 select GPIOLIB_IRQCHIP
6732ae5c
JCPV
99 help
100 Say Y here to enable the at91 pinctrl driver
101
77618084
LD
102config PINCTRL_AT91PIO4
103 bool "AT91 PIO4 pinctrl driver"
104 depends on OF
0a03658d 105 depends on HAS_IOMEM
e682fcc7 106 depends on ARCH_AT91 || COMPILE_TEST
77618084
LD
107 select PINMUX
108 select GENERIC_PINCONF
109 select GPIOLIB
110 select GPIOLIB_IRQCHIP
111 select OF_GPIO
112 help
113 Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
114 controller available on sama5d2 SoC.
115
b124c8bd
AS
116config PINCTRL_AXP209
117 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
118 depends on MFD_AXP20X
119 depends on OF
83b31c2a 120 select PINMUX
dbad75dd 121 select GENERIC_PINCONF
b124c8bd 122 select GPIOLIB
dbad75dd 123 help
b124c8bd
AS
124 AXP PMICs provides multiple GPIOs that can be muxed for different
125 functions. This driver bundles a pinctrl driver to select the function
126 muxing and a GPIO driver to handle the GPIO when the GPIO function is
127 selected.
128 Say Y to enable pinctrl and GPIO support for the AXP209 PMIC.
dbad75dd 129
8f3f0246
MS
130config PINCTRL_BM1880
131 bool "Bitmain BM1880 Pinctrl driver"
8293b3c6
MS
132 depends on OF && (ARCH_BITMAIN || COMPILE_TEST)
133 default ARCH_BITMAIN
8f3f0246
MS
134 select PINMUX
135 help
136 Pinctrl driver for Bitmain BM1880 SoC.
137
1ff91f0a 138config PINCTRL_DA850_PUPD
b124c8bd 139 tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups"
1ff91f0a
DL
140 depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST)
141 select PINCONF
142 select GENERIC_PINCONF
143 help
144 Driver for TI DA850/OMAP-L138/AM18XX pinconf. Used to control
b124c8bd 145 pull-up and pull-down pin groups.
1ff91f0a 146
56cc3af4
MF
147config PINCTRL_DA9062
148 tristate "Dialog Semiconductor DA9062 PMIC pinctrl and GPIO Support"
149 depends on MFD_DA9062
150 select GPIOLIB
151 help
152 The Dialog DA9062 PMIC provides multiple GPIOs that can be muxed for
153 different functions. This driver bundles a pinctrl driver to select the
154 function muxing and a GPIO driver to handle the GPIO when the GPIO
155 function is selected.
156
b124c8bd 157 Say Y to enable pinctrl and GPIO support for the DA9062 PMIC.
56cc3af4 158
38b0e507
BS
159config PINCTRL_DIGICOLOR
160 bool
161 depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
162 select PINMUX
163 select GENERIC_PINCONF
164
b124c8bd
AS
165config PINCTRL_EQUILIBRIUM
166 tristate "Generic pinctrl and GPIO driver for Intel Lightning Mountain SoC"
167 depends on OF && HAS_IOMEM
168 depends on X86 || COMPILE_TEST
169 select PINMUX
170 select PINCONF
171 select GPIOLIB
172 select GPIO_GENERIC
173 select GPIOLIB_IRQCHIP
174 select GENERIC_PINCONF
175 select GENERIC_PINCTRL_GROUPS
176 select GENERIC_PINMUX_FUNCTIONS
177 help
178 Equilibrium driver is a pinctrl and GPIO driver for Intel Lightning
179 Mountain network processor SoC that supports both the GPIO and pin
180 control frameworks. It provides interfaces to setup pin muxing, assign
181 desired pin functions, configure GPIO attributes for LGM SoC pins.
182 Pin muxing and pin config settings are retrieved from device tree.
183
184config PINCTRL_GEMINI
185 bool
186 depends on ARCH_GEMINI
187 default ARCH_GEMINI
188 select PINMUX
189 select GENERIC_PINCONF
190 select MFD_SYSCON
191
192config PINCTRL_INGENIC
193 bool "Pinctrl driver for the Ingenic JZ47xx SoCs"
194 default MACH_INGENIC
195 depends on OF
196 depends on MIPS || COMPILE_TEST
197 select GENERIC_PINCONF
198 select GENERIC_PINCTRL_GROUPS
199 select GENERIC_PINMUX_FUNCTIONS
200 select GPIOLIB
201 select GPIOLIB_IRQCHIP
202 select REGMAP_MMIO
203
204config PINCTRL_K210
205 bool "Pinctrl driver for the Canaan Kendryte K210 SoC"
206 depends on RISCV && SOC_CANAAN && OF
207 select GENERIC_PINMUX_FUNCTIONS
208 select GENERIC_PINCONF
209 select GPIOLIB
210 select OF_GPIO
211 select REGMAP_MMIO
212 default SOC_CANAAN
213 help
214 Add support for the Canaan Kendryte K210 RISC-V SOC Field
215 Programmable IO Array (FPIOA) controller.
216
217config PINCTRL_KEEMBAY
218 tristate "Pinctrl driver for Intel Keem Bay SoC"
219 depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST)
220 depends on HAS_IOMEM
221 select PINMUX
222 select PINCONF
223 select GENERIC_PINCONF
224 select GENERIC_PINCTRL_GROUPS
225 select GENERIC_PINMUX_FUNCTIONS
226 select GPIOLIB
227 select GPIOLIB_IRQCHIP
228 select GPIO_GENERIC
229 help
230 This selects pin control driver for the Intel Keem Bay SoC.
231 It provides pin config functions such as pull-up, pull-down,
232 interrupt, drive strength, sec lock, Schmitt trigger, slew
233 rate control and direction control. This module will be
234 called as pinctrl-keembay.
235
3f8c50c9
JC
236config PINCTRL_LANTIQ
237 bool
238 depends on LANTIQ
239 select PINMUX
240 select PINCONF
241
b124c8bd
AS
242config PINCTRL_FALCON
243 bool
244 depends on SOC_FALCON
245 depends on PINCTRL_LANTIQ
246
247config PINCTRL_XWAY
248 bool
249 depends on SOC_TYPE_XWAY
250 depends on PINCTRL_LANTIQ
251
2f77ac93
JE
252config PINCTRL_LPC18XX
253 bool "NXP LPC18XX/43XX SCU pinctrl driver"
254 depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
255 default ARCH_LPC18XX
256 select PINMUX
257 select GENERIC_PINCONF
258 help
259 Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
260
b124c8bd
AS
261config PINCTRL_MAX77620
262 tristate "MAX77620/MAX20024 Pincontrol support"
263 depends on MFD_MAX77620 && OF
06351d13 264 select PINMUX
1c5b7f3c 265 select GENERIC_PINCONF
b124c8bd
AS
266 help
267 Say Y here to enable Pin control support for Maxim MAX77620 PMIC.
268 This PMIC has 8 GPIO pins that work as GPIO as well as special
269 function in alternate mode. This driver also configure push-pull,
270 open drain, FPS slots etc.
06351d13 271
0f04a817
AS
272config PINCTRL_MCP23S08_I2C
273 tristate
274 select REGMAP_I2C
275
276config PINCTRL_MCP23S08_SPI
277 tristate
278 select REGMAP_SPI
279
64ac43e6
SR
280config PINCTRL_MCP23S08
281 tristate "Microchip MCP23xxx I/O expander"
64ac43e6 282 depends on SPI_MASTER || I2C
e2a021d4 283 select GPIOLIB
64ac43e6 284 select GPIOLIB_IRQCHIP
82039d24 285 select GENERIC_PINCONF
0f04a817
AS
286 select PINCTRL_MCP23S08_I2C if I2C
287 select PINCTRL_MCP23S08_SPI if SPI_MASTER
64ac43e6 288 help
6ff45566
JK
289 SPI/I2C driver for Microchip MCP23S08 / MCP23S17 / MCP23S18 /
290 MCP23008 / MCP23017 / MCP23018 I/O expanders.
291 This provides a GPIO interface supporting inputs and outputs and a
292 corresponding interrupt-controller.
64ac43e6 293
b124c8bd
AS
294config PINCTRL_MICROCHIP_SGPIO
295 bool "Pinctrl driver for Microsemi/Microchip Serial GPIO"
611dac1e 296 depends on OF
b124c8bd 297 depends on HAS_IOMEM
611dac1e 298 select GPIOLIB
611dac1e 299 select GPIOLIB_IRQCHIP
d3e51161 300 select GENERIC_PINCONF
b124c8bd
AS
301 select GENERIC_PINCTRL_GROUPS
302 select GENERIC_PINMUX_FUNCTIONS
0662e4a1 303 select OF_GPIO
25fda51c 304 help
b124c8bd
AS
305 Support for the serial GPIO interface used on Microsemi and
306 Microchip SoCs. By using a serial interface, the SIO
307 controller significantly extends the number of available
308 GPIOs with a minimum number of additional pins on the
309 device. The primary purpose of the SIO controller is to
310 connect control signals from SFP modules and to act as an
311 LED controller.
d3e51161 312
b124c8bd
AS
313config PINCTRL_OCELOT
314 bool "Pinctrl driver for the Microsemi Ocelot and Jaguar2 SoCs"
8b8b091b 315 depends on OF
fd35b202 316 depends on HAS_IOMEM
e2a021d4 317 select GPIOLIB
9e80f906 318 select GPIOLIB_IRQCHIP
cefc03e5 319 select GENERIC_PINCONF
b124c8bd
AS
320 select GENERIC_PINCTRL_GROUPS
321 select GENERIC_PINMUX_FUNCTIONS
cefc03e5 322 select OF_GPIO
b124c8bd 323 select REGMAP_MMIO
cefc03e5 324
611dac1e
NA
325config PINCTRL_OXNAS
326 bool
327 depends on OF
328 select PINMUX
329 select PINCONF
330 select GENERIC_PINCONF
331 select GPIOLIB
332 select OF_GPIO
333 select GPIOLIB_IRQCHIP
334 select MFD_SYSCON
335
0a8d3e24 336config PINCTRL_PALMAS
767b8ce3 337 tristate "Pinctrl driver for the PALMAS Series MFD devices"
0a8d3e24 338 depends on OF && MFD_PALMAS
63ca8db7 339 select PINMUX
0a8d3e24
LD
340 select GENERIC_PINCONF
341 help
342 Palmas device supports the configuration of pins for different
343 functionality. This driver supports the pinmux, push-pull and
344 open drain configuration for the Palmas series devices like
345 TPS65913, TPS80036 etc.
346
2ba384e6
JH
347config PINCTRL_PIC32
348 bool "Microchip PIC32 pin controller driver"
349 depends on OF
350 depends on MACH_PIC32
351 select PINMUX
352 select GENERIC_PINCONF
353 select GPIOLIB_IRQCHIP
354 select OF_GPIO
355 help
356 This is the pin controller and gpio driver for Microchip PIC32
357 microcontrollers. This option is selected automatically when specific
358 machine and arch are selected to build.
359
360config PINCTRL_PIC32MZDA
361 def_bool y if PIC32MZDA
362 select PINCTRL_PIC32
363
b124c8bd
AS
364config PINCTRL_PISTACHIO
365 bool "IMG Pistachio SoC pinctrl driver"
366 depends on OF && (MIPS || COMPILE_TEST)
367 depends on GPIOLIB
8b242ca7
SKP
368 select PINMUX
369 select GENERIC_PINCONF
e72394e2 370 select GPIOLIB_IRQCHIP
b124c8bd
AS
371 select OF_GPIO
372 help
373 This support pinctrl and GPIO driver for IMG Pistachio SoC.
b5c23aa4 374
ea479996
JC
375config PINCTRL_RK805
376 tristate "Pinctrl and GPIO driver for RK805 PMIC"
377 depends on MFD_RK808
378 select GPIOLIB
379 select PINMUX
380 select GENERIC_PINCONF
381 help
382 This selects the pinctrl driver for RK805.
383
d3e51161 384config PINCTRL_ROCKCHIP
be786ac5 385 tristate "Rockchip gpio and pinctrl driver"
febb4ee2 386 depends on ARCH_ROCKCHIP || COMPILE_TEST
0662e4a1 387 depends on OF
25fda51c 388 select GPIOLIB
d3e51161
HS
389 select PINMUX
390 select GENERIC_PINCONF
391 select GENERIC_IRQ_CHIP
751a99ab 392 select MFD_SYSCON
0662e4a1 393 select OF_GPIO
25fda51c
JX
394 default ARCH_ROCKCHIP
395 help
b124c8bd 396 This support pinctrl and GPIO driver for Rockchip SoCs.
d3e51161 397
8b8b091b
TL
398config PINCTRL_SINGLE
399 tristate "One-register-per-pin type device tree based pinctrl driver"
400 depends on OF
fd35b202 401 depends on HAS_IOMEM
caeb774e 402 select GENERIC_PINCTRL_GROUPS
571aec4d 403 select GENERIC_PINMUX_FUNCTIONS
9dddb4df 404 select GENERIC_PINCONF
8b8b091b
TL
405 help
406 This selects the device tree based generic pinctrl driver.
407
701016c0
SK
408config PINCTRL_ST
409 bool
410 depends on OF
411 select PINMUX
412 select PINCONF
130cbe30 413 select GPIOLIB_IRQCHIP
701016c0 414
ec648f6b
ERB
415config PINCTRL_STARFIVE
416 tristate "Pinctrl and GPIO driver for the StarFive JH7100 SoC"
417 depends on SOC_STARFIVE || COMPILE_TEST
418 depends on OF
419 default SOC_STARFIVE
420 select GENERIC_PINCTRL_GROUPS
421 select GENERIC_PINMUX_FUNCTIONS
422 select GENERIC_PINCONF
423 select GPIOLIB
424 select GPIOLIB_IRQCHIP
425 select OF_GPIO
426 help
427 Say yes here to support pin control on the StarFive JH7100 SoC.
428 This also provides an interface to the GPIO pins not used by other
429 peripherals supporting inputs, outputs, configuring pull-up/pull-down
430 and interrupts on input changes.
431
1490d9f8
AD
432config PINCTRL_STMFX
433 tristate "STMicroelectronics STMFX GPIO expander pinctrl driver"
9af2de76 434 depends on I2C
ec2e0f4f 435 depends on OF_GPIO
1490d9f8
AD
436 select GENERIC_PINCONF
437 select GPIOLIB_IRQCHIP
438 select MFD_STMFX
439 help
440 Driver for STMicroelectronics Multi-Function eXpander (STMFX)
441 GPIO expander.
442 This provides a GPIO interface supporting inputs and outputs,
443 and configuring push-pull, open-drain, and can also be used as
444 interrupt-controller.
445
b124c8bd
AS
446config PINCTRL_SX150X
447 bool "Semtech SX150x I2C GPIO expander pinctrl driver"
448 depends on I2C=y
79f28b9f 449 select PINMUX
b124c8bd 450 select PINCONF
2df723d4 451 select GENERIC_PINCONF
d4c34d09 452 select GPIOLIB
b124c8bd
AS
453 select GPIOLIB_IRQCHIP
454 select REGMAP
2df723d4 455 help
b124c8bd
AS
456 Say Y here to provide support for Semtech SX150x-series I2C
457 GPIO expanders as pinctrl module.
458 Compatible models include:
459 - 8 bits: sx1508q, sx1502q
460 - 16 bits: sx1509q, sx1506q
2df723d4 461
b124c8bd
AS
462config PINCTRL_TB10X
463 bool
464 depends on OF && ARC_PLAT_TB10X
465 select GPIOLIB
0a8d3e24 466
b124c8bd
AS
467config PINCTRL_THUNDERBAY
468 tristate "Generic pinctrl and GPIO driver for Intel Thunder Bay SoC"
469 depends on ARCH_THUNDERBAY || (ARM64 && COMPILE_TEST)
ffd4e739 470 depends on HAS_IOMEM
2ba384e6 471 select PINMUX
ffd4e739 472 select PINCONF
2ba384e6 473 select GENERIC_PINCONF
ffd4e739
LS
474 select GENERIC_PINCTRL_GROUPS
475 select GENERIC_PINMUX_FUNCTIONS
476 select GPIOLIB
2ba384e6 477 select GPIOLIB_IRQCHIP
ffd4e739 478 select GPIO_GENERIC
2ba384e6 479 help
b124c8bd
AS
480 This selects pin control driver for the Intel Thunder Bay SoC.
481 It provides pin config functions such as pull-up, pull-down,
482 interrupt, drive strength, sec lock, Schmitt trigger, slew
ffd4e739 483 rate control and direction control. This module will be
b124c8bd 484 called as pinctrl-thunderbay.
2ba384e6 485
add958ce
SB
486config PINCTRL_ZYNQ
487 bool "Pinctrl driver for Xilinx Zynq"
488 depends on ARCH_ZYNQ
489 select PINMUX
490 select GENERIC_PINCONF
491 help
485dba27 492 This selects the pinctrl driver for Xilinx Zynq.
add958ce 493
8b242ca7
SKP
494config PINCTRL_ZYNQMP
495 tristate "Pinctrl driver for Xilinx ZynqMP"
496 depends on ZYNQMP_FIRMWARE
497 select PINMUX
498 select GENERIC_PINCONF
499 default ZYNQMP_FIRMWARE
500 help
501 This selects the pinctrl driver for Xilinx ZynqMP platform.
502 This driver will query the pin information from the firmware
503 and allow configuring the pins.
504 Configuration can include the mux function to select on those
505 pin(s)/group(s), and various pin configuration parameters
506 such as pull-up, slew rate, etc.
fa99e701
SKP
507 This driver can also be built as a module. If so, the module
508 will be called pinctrl-zynqmp.
8b242ca7 509
2242ddfb 510source "drivers/pinctrl/actions/Kconfig"
4d3d0e42 511source "drivers/pinctrl/aspeed/Kconfig"
b17f2f9b 512source "drivers/pinctrl/bcm/Kconfig"
3de68d33 513source "drivers/pinctrl/berlin/Kconfig"
b124c8bd 514source "drivers/pinctrl/cirrus/Kconfig"
edad3b2a 515source "drivers/pinctrl/freescale/Kconfig"
5fae8b86 516source "drivers/pinctrl/intel/Kconfig"
b124c8bd
AS
517source "drivers/pinctrl/mediatek/Kconfig"
518source "drivers/pinctrl/meson/Kconfig"
06763c74 519source "drivers/pinctrl/mvebu/Kconfig"
3a198059 520source "drivers/pinctrl/nomadik/Kconfig"
3b588e43 521source "drivers/pinctrl/nuvoton/Kconfig"
4b15ec9d 522source "drivers/pinctrl/pxa/Kconfig"
69b78b8d 523source "drivers/pinctrl/qcom/Kconfig"
518b466a 524source "drivers/pinctrl/ralink/Kconfig"
077365a9 525source "drivers/pinctrl/renesas/Kconfig"
ebe629a3 526source "drivers/pinctrl/samsung/Kconfig"
deda8287 527source "drivers/pinctrl/spear/Kconfig"
41d32cfc 528source "drivers/pinctrl/sprd/Kconfig"
aceb16dc 529source "drivers/pinctrl/stm32/Kconfig"
aa74c44b 530source "drivers/pinctrl/sunplus/Kconfig"
5f910777 531source "drivers/pinctrl/sunxi/Kconfig"
25cbac77 532source "drivers/pinctrl/tegra/Kconfig"
003910eb 533source "drivers/pinctrl/ti/Kconfig"
6e908892 534source "drivers/pinctrl/uniphier/Kconfig"
a68a7844 535source "drivers/pinctrl/visconti/Kconfig"
b124c8bd 536source "drivers/pinctrl/vt8500/Kconfig"
1948d5c5 537
d219b924 538endif