[linux-2.6-block.git] / drivers / phy / renesas / phy-rcar-gen3-usb2.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Renesas R-Car Gen3 for USB2.0 PHY driver
 *
 * Copyright (C) 2015-2017 Renesas Electronics Corporation
 *
 * This is based on the phy-rcar-gen2 driver:
 * Copyright (C) 2014 Renesas Solutions Corp.
 * Copyright (C) 2014 Cogent Embedded, Inc.
 */

#include <linux/extcon-provider.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/usb/of.h>
#include <linux/workqueue.h>

/******* USB2.0 Host registers (original offset is +0x200) *******/
#define USB2_INT_ENABLE		0x000
#define USB2_USBCTR		0x00c
#define USB2_SPD_RSM_TIMSET	0x10c
#define USB2_OC_TIMSET		0x110
#define USB2_COMMCTRL		0x600
#define USB2_OBINTSTA		0x604
#define USB2_OBINTEN		0x608
#define USB2_VBCTRL		0x60c
#define USB2_LINECTRL1		0x610
#define USB2_ADPCTRL		0x630

/* INT_ENABLE */
#define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
#define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)
#define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)
#define USB2_INT_ENABLE_INIT		(USB2_INT_ENABLE_UCOM_INTEN | \
					 USB2_INT_ENABLE_USBH_INTB_EN | \
					 USB2_INT_ENABLE_USBH_INTA_EN)

/* USBCTR */
#define USB2_USBCTR_DIRPD	BIT(2)
#define USB2_USBCTR_PLL_RST	BIT(1)

/* SPD_RSM_TIMSET */
#define USB2_SPD_RSM_TIMSET_INIT	0x014e029b

/* OC_TIMSET */
#define USB2_OC_TIMSET_INIT		0x000209ab

/* COMMCTRL */
#define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */

/* OBINTSTA and OBINTEN */
#define USB2_OBINT_SESSVLDCHG		BIT(12)
#define USB2_OBINT_IDDIGCHG		BIT(11)
#define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
					 USB2_OBINT_IDDIGCHG)

/* VBCTRL */
#define USB2_VBCTRL_DRVVBUSSEL		BIT(8)

/* LINECTRL1 */
#define USB2_LINECTRL1_DPRPD_EN		BIT(19)
#define USB2_LINECTRL1_DP_RPD		BIT(18)
#define USB2_LINECTRL1_DMRPD_EN		BIT(17)
#define USB2_LINECTRL1_DM_RPD		BIT(16)
#define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)

/* ADPCTRL */
#define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
#define USB2_ADPCTRL_IDDIG		BIT(19)
#define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
#define USB2_ADPCTRL_DRVVBUS		BIT(4)

struct rcar_gen3_chan {
	void __iomem *base;
	struct device *dev;	/* platform_device's device */
	struct extcon_dev *extcon;
	struct phy *phy;
	struct regulator *vbus;
	struct work_struct work;
	enum usb_dr_mode dr_mode;
	bool extcon_host;
	bool is_otg_channel;
	bool uses_otg_pins;
};

/*
 * Combination about is_otg_channel and uses_otg_pins:
 *
 * Parameters				|| Behaviors
 * is_otg_channel	| uses_otg_pins	|| irqs		| role sysfs
 * ---------------------+---------------++--------------+------------
 * true			| true		|| enabled	| enabled
 * true                 | false		|| disabled	| enabled
 * false                | any		|| disabled	| disabled
 */

static void rcar_gen3_phy_usb2_work(struct work_struct *work)
{
	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
						 work);

	if (ch->extcon_host) {
		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
	} else {
		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
	}
}

static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_COMMCTRL);

	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
	if (host)
		val &= ~USB2_COMMCTRL_OTG_PERI;
	else
		val |= USB2_COMMCTRL_OTG_PERI;
	writel(val, usb2_base + USB2_COMMCTRL);
}

static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_LINECTRL1);

	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
	if (dp)
		val |= USB2_LINECTRL1_DP_RPD;
	if (dm)
		val |= USB2_LINECTRL1_DM_RPD;
	writel(val, usb2_base + USB2_LINECTRL1);
}

static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_ADPCTRL);

	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
	if (vbus)
		val |= USB2_ADPCTRL_DRVVBUS;
	else
		val &= ~USB2_ADPCTRL_DRVVBUS;
	writel(val, usb2_base + USB2_ADPCTRL);
}

static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_OBINTEN);

	if (ch->uses_otg_pins && enable)
		val |= USB2_OBINT_BITS;
	else
		val &= ~USB2_OBINT_BITS;
	writel(val, usb2_base + USB2_OBINTEN);
}

static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 1, 1);
	rcar_gen3_set_host_mode(ch, 1);
	rcar_gen3_enable_vbus_ctrl(ch, 1);

	ch->extcon_host = true;
	schedule_work(&ch->work);
}

static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 0, 1);
	rcar_gen3_set_host_mode(ch, 0);
	rcar_gen3_enable_vbus_ctrl(ch, 0);

	ch->extcon_host = false;
	schedule_work(&ch->work);
}

static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
{
	void __iomem *usb2_base = ch->base;
	u32 val;

	val = readl(usb2_base + USB2_LINECTRL1);
	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);

	rcar_gen3_set_linectrl(ch, 1, 1);
	rcar_gen3_set_host_mode(ch, 1);
	rcar_gen3_enable_vbus_ctrl(ch, 0);

	val = readl(usb2_base + USB2_LINECTRL1);
	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
}

static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 0, 1);
	rcar_gen3_set_host_mode(ch, 0);
	rcar_gen3_enable_vbus_ctrl(ch, 1);
}

static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
{
	rcar_gen3_control_otg_irq(ch, 0);

	rcar_gen3_enable_vbus_ctrl(ch, 1);
	rcar_gen3_init_for_host(ch);

	rcar_gen3_control_otg_irq(ch, 1);
}

static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
{
	if (!ch->uses_otg_pins)
		return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;

	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
}

static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
{
	if (!rcar_gen3_check_id(ch))
		rcar_gen3_init_for_host(ch);
	else
		rcar_gen3_init_for_peri(ch);
}

static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
{
	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
}

static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
{
	if (rcar_gen3_is_host(ch))
		return PHY_MODE_USB_HOST;

	return PHY_MODE_USB_DEVICE;
}

static ssize_t role_store(struct device *dev, struct device_attribute *attr,
			  const char *buf, size_t count)
{
	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
	bool is_b_device;
	enum phy_mode cur_mode, new_mode;

	if (!ch->is_otg_channel || !ch->phy->init_count)
		return -EIO;

	if (!strncmp(buf, "host", strlen("host")))
		new_mode = PHY_MODE_USB_HOST;
	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
		new_mode = PHY_MODE_USB_DEVICE;
	else
		return -EINVAL;

	/* is_b_device: true is B-Device. false is A-Device. */
	is_b_device = rcar_gen3_check_id(ch);
	cur_mode = rcar_gen3_get_phy_mode(ch);

	/* If current and new mode is the same, this returns the error */
	if (cur_mode == new_mode)
		return -EINVAL;

	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
		if (!is_b_device)	/* A-Peripheral */
			rcar_gen3_init_from_a_peri_to_a_host(ch);
		else			/* B-Peripheral */
			rcar_gen3_init_for_b_host(ch);
	} else {			/* And is_host must be true */
		if (!is_b_device)	/* A-Host */
			rcar_gen3_init_for_a_peri(ch);
		else			/* B-Host */
			rcar_gen3_init_for_peri(ch);
	}

	return count;
}

static ssize_t role_show(struct device *dev, struct device_attribute *attr,
			 char *buf)
{
	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);

	if (!ch->is_otg_channel || !ch->phy->init_count)
		return -EIO;

	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
							    "peripheral");
}
static DEVICE_ATTR_RW(role);

static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
{
	void __iomem *usb2_base = ch->base;
	u32 val;

	/* Should not use functions of read-modify-write a register */
	val = readl(usb2_base + USB2_LINECTRL1);
	val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
	      USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
	writel(val, usb2_base + USB2_LINECTRL1);

	val = readl(usb2_base + USB2_VBCTRL);
	writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
	val = readl(usb2_base + USB2_ADPCTRL);
	writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);

	msleep(20);

	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);

	rcar_gen3_device_recognition(ch);
}

static int rcar_gen3_phy_usb2_init(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	void __iomem *usb2_base = channel->base;

	/* Initialize USB2 part */
	writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);

	/* Initialize otg part */
	if (channel->is_otg_channel)
		rcar_gen3_init_otg(channel);

	return 0;
}

static int rcar_gen3_phy_usb2_exit(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);

	writel(0, channel->base + USB2_INT_ENABLE);

	return 0;
}

static int rcar_gen3_phy_usb2_power_on(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	void __iomem *usb2_base = channel->base;
	u32 val;
	int ret;

	if (channel->vbus) {
		ret = regulator_enable(channel->vbus);
		if (ret)
			return ret;
	}

	val = readl(usb2_base + USB2_USBCTR);
	val |= USB2_USBCTR_PLL_RST;
	writel(val, usb2_base + USB2_USBCTR);
	val &= ~USB2_USBCTR_PLL_RST;
	writel(val, usb2_base + USB2_USBCTR);

	return 0;
}

static int rcar_gen3_phy_usb2_power_off(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	int ret = 0;

	if (channel->vbus)
		ret = regulator_disable(channel->vbus);

	return ret;
}

static const struct phy_ops rcar_gen3_phy_usb2_ops = {
	.init		= rcar_gen3_phy_usb2_init,
	.exit		= rcar_gen3_phy_usb2_exit,
	.power_on	= rcar_gen3_phy_usb2_power_on,
	.power_off	= rcar_gen3_phy_usb2_power_off,
	.owner		= THIS_MODULE,
};

static const struct phy_ops rz_g1c_phy_usb2_ops = {
	.init		= rcar_gen3_phy_usb2_init,
	.exit		= rcar_gen3_phy_usb2_exit,
	.owner		= THIS_MODULE,
};

static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
{
	struct rcar_gen3_chan *ch = _ch;
	void __iomem *usb2_base = ch->base;
	u32 status = readl(usb2_base + USB2_OBINTSTA);
	irqreturn_t ret = IRQ_NONE;

	if (status & USB2_OBINT_BITS) {
		dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
		writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
		rcar_gen3_device_recognition(ch);
		ret = IRQ_HANDLED;
	}

	return ret;
}

static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
	{
		.compatible = "renesas,usb2-phy-r8a77470",
		.data = &rz_g1c_phy_usb2_ops,
	},
	{
		.compatible = "renesas,usb2-phy-r8a7795",
		.data = &rcar_gen3_phy_usb2_ops,
	},
	{
		.compatible = "renesas,usb2-phy-r8a7796",
		.data = &rcar_gen3_phy_usb2_ops,
	},
	{
		.compatible = "renesas,usb2-phy-r8a77965",
		.data = &rcar_gen3_phy_usb2_ops,
	},
	{
		.compatible = "renesas,rcar-gen3-usb2-phy",
		.data = &rcar_gen3_phy_usb2_ops,
	},
	{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);

static const unsigned int rcar_gen3_phy_cable[] = {
	EXTCON_USB,
	EXTCON_USB_HOST,
	EXTCON_NONE,
};

static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rcar_gen3_chan *channel;
	struct phy_provider *provider;
	struct resource *res;
	const struct phy_ops *phy_usb2_ops;
	int irq, ret = 0;

	if (!dev->of_node) {
		dev_err(dev, "This driver needs device tree\n");
		return -EINVAL;
	}

	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
	if (!channel)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	channel->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(channel->base))
		return PTR_ERR(channel->base);

	/* call request_irq for OTG */
	irq = platform_get_irq(pdev, 0);
	if (irq >= 0) {
		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
		irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
				       IRQF_SHARED, dev_name(dev), channel);
		if (irq < 0)
			dev_err(dev, "No irq handler (%d)\n", irq);
	}

	channel->dr_mode = of_usb_get_dr_mode_by_phy(dev->of_node, 0);
	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
		int ret;

		channel->is_otg_channel = true;
		channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
							"renesas,no-otg-pins");
		channel->extcon = devm_extcon_dev_allocate(dev,
							rcar_gen3_phy_cable);
		if (IS_ERR(channel->extcon))
			return PTR_ERR(channel->extcon);

		ret = devm_extcon_dev_register(dev, channel->extcon);
		if (ret < 0) {
			dev_err(dev, "Failed to register extcon\n");
			return ret;
		}
	}

	/*
	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
	 * And then, phy-core will manage runtime pm for this device.
	 */
	pm_runtime_enable(dev);
	phy_usb2_ops = of_device_get_match_data(dev);
	if (!phy_usb2_ops)
		return -EINVAL;

	channel->phy = devm_phy_create(dev, NULL, phy_usb2_ops);
	if (IS_ERR(channel->phy)) {
		dev_err(dev, "Failed to create USB2 PHY\n");
		ret = PTR_ERR(channel->phy);
		goto error;
	}

	channel->vbus = devm_regulator_get_optional(dev, "vbus");
	if (IS_ERR(channel->vbus)) {
		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
			ret = PTR_ERR(channel->vbus);
			goto error;
		}
		channel->vbus = NULL;
	}

	platform_set_drvdata(pdev, channel);
	phy_set_drvdata(channel->phy, channel);
	channel->dev = dev;

	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	if (IS_ERR(provider)) {
		dev_err(dev, "Failed to register PHY provider\n");
		ret = PTR_ERR(provider);
		goto error;
	} else if (channel->is_otg_channel) {
		int ret;

		ret = device_create_file(dev, &dev_attr_role);
		if (ret < 0)
			goto error;
	}

	return 0;

error:
	pm_runtime_disable(dev);

	return ret;
}

static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
{
	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);

	if (channel->is_otg_channel)
		device_remove_file(&pdev->dev, &dev_attr_role);

	pm_runtime_disable(&pdev->dev);

	return 0;
};

static struct platform_driver rcar_gen3_phy_usb2_driver = {
	.driver = {
		.name		= "phy_rcar_gen3_usb2",
		.of_match_table	= rcar_gen3_phy_usb2_match_table,
	},
	.probe	= rcar_gen3_phy_usb2_probe,
	.remove = rcar_gen3_phy_usb2_remove,
};
module_platform_driver(rcar_gen3_phy_usb2_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
Commit	Line	Data
eee0e5da	1	// SPDX-License-Identifier: GPL-2.0
f3b5a8d9 YS	2	/*
	3	* Renesas R-Car Gen3 for USB2.0 PHY driver
	4	*
7e0540f4	5	* Copyright (C) 2015-2017 Renesas Electronics Corporation
f3b5a8d9 YS	6	*
	7	* This is based on the phy-rcar-gen2 driver:
	8	* Copyright (C) 2014 Renesas Solutions Corp.
	9	* Copyright (C) 2014 Cogent Embedded, Inc.
f3b5a8d9 YS	10	*/
f3b5a8d9 YS	11
176aa360	12	#include <linux/extcon-provider.h>
9f391c57	13	#include <linux/interrupt.h>
f3b5a8d9 YS	14	#include <linux/io.h>
	15	#include <linux/module.h>
	16	#include <linux/of.h>
	17	#include <linux/of_address.h>
9adaaa9e	18	#include <linux/of_device.h>
f3b5a8d9 YS	19	#include <linux/phy/phy.h>
f3b5a8d9 YS	20	#include <linux/platform_device.h>
441a681b	21	#include <linux/pm_runtime.h>
6dcfd7c3	22	#include <linux/regulator/consumer.h>
7e0540f4	23	#include <linux/usb/of.h>
c14f8a40	24	#include <linux/workqueue.h>
f3b5a8d9 YS	25
	26	/***** USB2.0 Host registers (original offset is +0x200) *****/
	27	#define USB2_INT_ENABLE 0x000
	28	#define USB2_USBCTR 0x00c
	29	#define USB2_SPD_RSM_TIMSET 0x10c
	30	#define USB2_OC_TIMSET 0x110
1114e2d3	31	#define USB2_COMMCTRL 0x600
9f391c57 YS	32	#define USB2_OBINTSTA 0x604
9f391c57 YS	33	#define USB2_OBINTEN 0x608
1114e2d3 YS	34	#define USB2_VBCTRL 0x60c
	35	#define USB2_LINECTRL1 0x610
	36	#define USB2_ADPCTRL 0x630
f3b5a8d9 YS	37
f3b5a8d9 YS	38	/* INT_ENABLE */
9f391c57	39	#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
f3b5a8d9 YS	40	#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
f3b5a8d9 YS	41	#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
9f391c57 YS	42	#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN \| \
9f391c57 YS	43	USB2_INT_ENABLE_USBH_INTB_EN \| \
f3b5a8d9 YS	44	USB2_INT_ENABLE_USBH_INTA_EN)
	45
	46	/* USBCTR */
	47	#define USB2_USBCTR_DIRPD BIT(2)
	48	#define USB2_USBCTR_PLL_RST BIT(1)
	49
	50	/* SPD_RSM_TIMSET */
	51	#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
	52
	53	/* OC_TIMSET */
	54	#define USB2_OC_TIMSET_INIT 0x000209ab
	55
1114e2d3 YS	56	/* COMMCTRL */
	57	#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
	58
9f391c57 YS	59	/* OBINTSTA and OBINTEN */
	60	#define USB2_OBINT_SESSVLDCHG BIT(12)
	61	#define USB2_OBINT_IDDIGCHG BIT(11)
	62	#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG \| \
	63	USB2_OBINT_IDDIGCHG)
	64
1114e2d3 YS	65	/* VBCTRL */
	66	#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
	67
	68	/* LINECTRL1 */
	69	#define USB2_LINECTRL1_DPRPD_EN BIT(19)
	70	#define USB2_LINECTRL1_DP_RPD BIT(18)
	71	#define USB2_LINECTRL1_DMRPD_EN BIT(17)
	72	#define USB2_LINECTRL1_DM_RPD BIT(16)
9bb86777	73	#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
1114e2d3 YS	74
	75	/* ADPCTRL */
	76	#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
	77	#define USB2_ADPCTRL_IDDIG BIT(19)
	78	#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
	79	#define USB2_ADPCTRL_DRVVBUS BIT(4)
	80
f3b5a8d9	81	struct rcar_gen3_chan {
801a69c7	82	void __iomem *base;
92fec1c2	83	struct device dev; / platform_device's device */
2b38543c	84	struct extcon_dev *extcon;
f3b5a8d9	85	struct phy *phy;
6dcfd7c3	86	struct regulator *vbus;
c14f8a40	87	struct work_struct work;
73801b90	88	enum usb_dr_mode dr_mode;
c14f8a40	89	bool extcon_host;
979b519c	90	bool is_otg_channel;
cfdc6634	91	bool uses_otg_pins;
f3b5a8d9 YS	92	};
f3b5a8d9 YS	93
979b519c YS	94	/*
	95	* Combination about is_otg_channel and uses_otg_pins:
	96	*
	97	* Parameters \|\| Behaviors
	98	* is_otg_channel \| uses_otg_pins \|\| irqs \| role sysfs
	99	* ---------------------+---------------++--------------+------------
	100	* true \| true \|\| enabled \| enabled
	101	* true \| false \|\| disabled \| enabled
	102	* false \| any \|\| disabled \| disabled
	103	*/
	104
c14f8a40 YS	105	static void rcar_gen3_phy_usb2_work(struct work_struct *work)
	106	{
	107	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
	108	work);
	109
	110	if (ch->extcon_host) {
c6f30a5b CC	111	extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
c6f30a5b CC	112	extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
c14f8a40	113	} else {
c6f30a5b CC	114	extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
c6f30a5b CC	115	extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
c14f8a40 YS	116	}
	117	}
	118
1114e2d3 YS	119	static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
1114e2d3 YS	120	{
801a69c7	121	void __iomem *usb2_base = ch->base;
1114e2d3 YS	122	u32 val = readl(usb2_base + USB2_COMMCTRL);
1114e2d3 YS	123
92fec1c2	124	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
1114e2d3 YS	125	if (host)
	126	val &= ~USB2_COMMCTRL_OTG_PERI;
	127	else
	128	val \|= USB2_COMMCTRL_OTG_PERI;
	129	writel(val, usb2_base + USB2_COMMCTRL);
	130	}
	131
	132	static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
	133	{
801a69c7	134	void __iomem *usb2_base = ch->base;
1114e2d3 YS	135	u32 val = readl(usb2_base + USB2_LINECTRL1);
1114e2d3 YS	136
92fec1c2	137	dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
1114e2d3 YS	138	val &= ~(USB2_LINECTRL1_DP_RPD \| USB2_LINECTRL1_DM_RPD);
	139	if (dp)
	140	val \|= USB2_LINECTRL1_DP_RPD;
	141	if (dm)
	142	val \|= USB2_LINECTRL1_DM_RPD;
	143	writel(val, usb2_base + USB2_LINECTRL1);
	144	}
	145
	146	static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
	147	{
801a69c7	148	void __iomem *usb2_base = ch->base;
1114e2d3 YS	149	u32 val = readl(usb2_base + USB2_ADPCTRL);
1114e2d3 YS	150
92fec1c2	151	dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
1114e2d3 YS	152	if (vbus)
	153	val \|= USB2_ADPCTRL_DRVVBUS;
	154	else
	155	val &= ~USB2_ADPCTRL_DRVVBUS;
	156	writel(val, usb2_base + USB2_ADPCTRL);
	157	}
	158
7ab0305d YS	159	static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
	160	{
	161	void __iomem *usb2_base = ch->base;
	162	u32 val = readl(usb2_base + USB2_OBINTEN);
	163
a602152c	164	if (ch->uses_otg_pins && enable)
7ab0305d YS	165	val \|= USB2_OBINT_BITS;
	166	else
	167	val &= ~USB2_OBINT_BITS;
	168	writel(val, usb2_base + USB2_OBINTEN);
	169	}
	170
1114e2d3 YS	171	static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
	172	{
	173	rcar_gen3_set_linectrl(ch, 1, 1);
	174	rcar_gen3_set_host_mode(ch, 1);
	175	rcar_gen3_enable_vbus_ctrl(ch, 1);
2b38543c	176
c14f8a40 YS	177	ch->extcon_host = true;
c14f8a40 YS	178	schedule_work(&ch->work);
1114e2d3 YS	179	}
	180
	181	static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
	182	{
	183	rcar_gen3_set_linectrl(ch, 0, 1);
	184	rcar_gen3_set_host_mode(ch, 0);
	185	rcar_gen3_enable_vbus_ctrl(ch, 0);
2b38543c	186
c14f8a40 YS	187	ch->extcon_host = false;
c14f8a40 YS	188	schedule_work(&ch->work);
1114e2d3 YS	189	}
1114e2d3 YS	190
9bb86777 YS	191	static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
	192	{
	193	void __iomem *usb2_base = ch->base;
	194	u32 val;
	195
	196	val = readl(usb2_base + USB2_LINECTRL1);
	197	writel(val \| USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
	198
	199	rcar_gen3_set_linectrl(ch, 1, 1);
	200	rcar_gen3_set_host_mode(ch, 1);
	201	rcar_gen3_enable_vbus_ctrl(ch, 0);
	202
	203	val = readl(usb2_base + USB2_LINECTRL1);
	204	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
	205	}
	206
	207	static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
	208	{
	209	rcar_gen3_set_linectrl(ch, 0, 1);
	210	rcar_gen3_set_host_mode(ch, 0);
	211	rcar_gen3_enable_vbus_ctrl(ch, 1);
	212	}
	213
	214	static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
	215	{
7ab0305d	216	rcar_gen3_control_otg_irq(ch, 0);
9bb86777	217
09938ea9	218	rcar_gen3_enable_vbus_ctrl(ch, 1);
9bb86777 YS	219	rcar_gen3_init_for_host(ch);
9bb86777 YS	220
7ab0305d	221	rcar_gen3_control_otg_irq(ch, 1);
9bb86777 YS	222	}
9bb86777 YS	223
1114e2d3 YS	224	static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
1114e2d3 YS	225	{
a602152c YS	226	if (!ch->uses_otg_pins)
	227	return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
	228
801a69c7	229	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
1114e2d3 YS	230	}
	231
	232	static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
	233	{
6762925d	234	if (!rcar_gen3_check_id(ch))
1114e2d3 YS	235	rcar_gen3_init_for_host(ch);
	236	else
	237	rcar_gen3_init_for_peri(ch);
	238	}
	239
9bb86777 YS	240	static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
	241	{
	242	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
	243	}
	244
b56acc82 YS	245	static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
	246	{
	247	if (rcar_gen3_is_host(ch))
	248	return PHY_MODE_USB_HOST;
	249
	250	return PHY_MODE_USB_DEVICE;
	251	}
	252
9bb86777 YS	253	static ssize_t role_store(struct device dev, struct device_attribute attr,
	254	const char *buf, size_t count)
	255	{
	256	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
b56acc82 YS	257	bool is_b_device;
b56acc82 YS	258	enum phy_mode cur_mode, new_mode;
9bb86777	259
979b519c	260	if (!ch->is_otg_channel \|\| !ch->phy->init_count)
9bb86777 YS	261	return -EIO;
9bb86777 YS	262
9bb86777	263	if (!strncmp(buf, "host", strlen("host")))
b56acc82	264	new_mode = PHY_MODE_USB_HOST;
9bb86777	265	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
b56acc82	266	new_mode = PHY_MODE_USB_DEVICE;
9bb86777 YS	267	else
	268	return -EINVAL;
	269
b56acc82 YS	270	/* is_b_device: true is B-Device. false is A-Device. */
	271	is_b_device = rcar_gen3_check_id(ch);
	272	cur_mode = rcar_gen3_get_phy_mode(ch);
	273
9bb86777	274	/* If current and new mode is the same, this returns the error */
b56acc82	275	if (cur_mode == new_mode)
9bb86777 YS	276	return -EINVAL;
9bb86777 YS	277
b56acc82	278	if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
9bb86777 YS	279	if (!is_b_device) /* A-Peripheral */
	280	rcar_gen3_init_from_a_peri_to_a_host(ch);
	281	else /* B-Peripheral */
	282	rcar_gen3_init_for_b_host(ch);
	283	} else { /* And is_host must be true */
	284	if (!is_b_device) /* A-Host */
	285	rcar_gen3_init_for_a_peri(ch);
	286	else /* B-Host */
	287	rcar_gen3_init_for_peri(ch);
	288	}
	289
	290	return count;
	291	}
	292
	293	static ssize_t role_show(struct device dev, struct device_attribute attr,
	294	char *buf)
	295	{
	296	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
	297
979b519c	298	if (!ch->is_otg_channel \|\| !ch->phy->init_count)
9bb86777 YS	299	return -EIO;
	300
	301	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
	302	"peripheral");
	303	}
	304	static DEVICE_ATTR_RW(role);
	305
1114e2d3 YS	306	static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
1114e2d3 YS	307	{
801a69c7	308	void __iomem *usb2_base = ch->base;
1114e2d3 YS	309	u32 val;
1114e2d3 YS	310
72c0339c YS	311	/* Should not use functions of read-modify-write a register */
	312	val = readl(usb2_base + USB2_LINECTRL1);
	313	val = (val & ~USB2_LINECTRL1_DP_RPD) \| USB2_LINECTRL1_DPRPD_EN \|
	314	USB2_LINECTRL1_DMRPD_EN \| USB2_LINECTRL1_DM_RPD;
	315	writel(val, usb2_base + USB2_LINECTRL1);
	316
1114e2d3 YS	317	val = readl(usb2_base + USB2_VBCTRL);
	318	writel(val \| USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
	319	val = readl(usb2_base + USB2_ADPCTRL);
	320	writel(val \| USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
72c0339c YS	321
	322	msleep(20);
	323
	324	writel(0xffffffff, usb2_base + USB2_OBINTSTA);
	325	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
1114e2d3 YS	326
	327	rcar_gen3_device_recognition(ch);
	328	}
	329
f3b5a8d9 YS	330	static int rcar_gen3_phy_usb2_init(struct phy *p)
	331	{
	332	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
801a69c7	333	void __iomem *usb2_base = channel->base;
f3b5a8d9 YS	334
	335	/* Initialize USB2 part */
	336	writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
	337	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
	338	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
	339
b9564016	340	/* Initialize otg part */
979b519c	341	if (channel->is_otg_channel)
1114e2d3	342	rcar_gen3_init_otg(channel);
f3b5a8d9 YS	343
	344	return 0;
	345	}
	346
	347	static int rcar_gen3_phy_usb2_exit(struct phy *p)
	348	{
	349	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	350
801a69c7	351	writel(0, channel->base + USB2_INT_ENABLE);
f3b5a8d9 YS	352
	353	return 0;
	354	}
	355
	356	static int rcar_gen3_phy_usb2_power_on(struct phy *p)
	357	{
	358	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
801a69c7	359	void __iomem *usb2_base = channel->base;
f3b5a8d9	360	u32 val;
6dcfd7c3 YS	361	int ret;
	362
	363	if (channel->vbus) {
	364	ret = regulator_enable(channel->vbus);
	365	if (ret)
	366	return ret;
	367	}
f3b5a8d9 YS	368
	369	val = readl(usb2_base + USB2_USBCTR);
	370	val \|= USB2_USBCTR_PLL_RST;
	371	writel(val, usb2_base + USB2_USBCTR);
	372	val &= ~USB2_USBCTR_PLL_RST;
	373	writel(val, usb2_base + USB2_USBCTR);
	374
f3b5a8d9 YS	375	return 0;
	376	}
	377
6dcfd7c3 YS	378	static int rcar_gen3_phy_usb2_power_off(struct phy *p)
	379	{
	380	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	381	int ret = 0;
	382
	383	if (channel->vbus)
	384	ret = regulator_disable(channel->vbus);
	385
	386	return ret;
	387	}
	388
a8df2768	389	static const struct phy_ops rcar_gen3_phy_usb2_ops = {
f3b5a8d9 YS	390	.init = rcar_gen3_phy_usb2_init,
	391	.exit = rcar_gen3_phy_usb2_exit,
	392	.power_on = rcar_gen3_phy_usb2_power_on,
6dcfd7c3	393	.power_off = rcar_gen3_phy_usb2_power_off,
f3b5a8d9 YS	394	.owner = THIS_MODULE,
	395	};
	396
5d8042e9 BD	397	static const struct phy_ops rz_g1c_phy_usb2_ops = {
	398	.init = rcar_gen3_phy_usb2_init,
	399	.exit = rcar_gen3_phy_usb2_exit,
	400	.owner = THIS_MODULE,
	401	};
	402
9f391c57 YS	403	static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
	404	{
	405	struct rcar_gen3_chan *ch = _ch;
801a69c7	406	void __iomem *usb2_base = ch->base;
9f391c57 YS	407	u32 status = readl(usb2_base + USB2_OBINTSTA);
	408	irqreturn_t ret = IRQ_NONE;
	409
	410	if (status & USB2_OBINT_BITS) {
92fec1c2	411	dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
9f391c57 YS	412	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
	413	rcar_gen3_device_recognition(ch);
	414	ret = IRQ_HANDLED;
	415	}
	416
	417	return ret;
	418	}
	419
f3b5a8d9	420	static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
5d8042e9 BD	421	{
	422	.compatible = "renesas,usb2-phy-r8a77470",
	423	.data = &rz_g1c_phy_usb2_ops,
	424	},
	425	{
	426	.compatible = "renesas,usb2-phy-r8a7795",
	427	.data = &rcar_gen3_phy_usb2_ops,
	428	},
	429	{
	430	.compatible = "renesas,usb2-phy-r8a7796",
	431	.data = &rcar_gen3_phy_usb2_ops,
	432	},
	433	{
	434	.compatible = "renesas,usb2-phy-r8a77965",
	435	.data = &rcar_gen3_phy_usb2_ops,
	436	},
	437	{
	438	.compatible = "renesas,rcar-gen3-usb2-phy",
	439	.data = &rcar_gen3_phy_usb2_ops,
	440	},
	441	{ /* sentinel */ },
f3b5a8d9 YS	442	};
	443	MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
	444
2b38543c YS	445	static const unsigned int rcar_gen3_phy_cable[] = {
	446	EXTCON_USB,
	447	EXTCON_USB_HOST,
	448	EXTCON_NONE,
	449	};
	450
f3b5a8d9 YS	451	static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
	452	{
	453	struct device *dev = &pdev->dev;
	454	struct rcar_gen3_chan *channel;
	455	struct phy_provider *provider;
	456	struct resource *res;
5d8042e9	457	const struct phy_ops *phy_usb2_ops;
441a681b	458	int irq, ret = 0;
f3b5a8d9 YS	459
	460	if (!dev->of_node) {
	461	dev_err(dev, "This driver needs device tree\n");
	462	return -EINVAL;
	463	}
	464
	465	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
	466	if (!channel)
	467	return -ENOMEM;
	468
b9564016	469	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
801a69c7 YS	470	channel->base = devm_ioremap_resource(dev, res);
	471	if (IS_ERR(channel->base))
	472	return PTR_ERR(channel->base);
f3b5a8d9	473
b9564016 YS	474	/* call request_irq for OTG */
	475	irq = platform_get_irq(pdev, 0);
	476	if (irq >= 0) {
c14f8a40	477	INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
b9564016 YS	478	irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
b9564016 YS	479	IRQF_SHARED, dev_name(dev), channel);
9f391c57 YS	480	if (irq < 0)
9f391c57 YS	481	dev_err(dev, "No irq handler (%d)\n", irq);
7e0540f4 YS	482	}
7e0540f4 YS	483
73801b90 YS	484	channel->dr_mode = of_usb_get_dr_mode_by_phy(dev->of_node, 0);
73801b90 YS	485	if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
7e0540f4 YS	486	int ret;
7e0540f4 YS	487
979b519c	488	channel->is_otg_channel = true;
8dde0008 YS	489	channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
8dde0008 YS	490	"renesas,no-otg-pins");
2b38543c YS	491	channel->extcon = devm_extcon_dev_allocate(dev,
	492	rcar_gen3_phy_cable);
	493	if (IS_ERR(channel->extcon))
	494	return PTR_ERR(channel->extcon);
	495
	496	ret = devm_extcon_dev_register(dev, channel->extcon);
	497	if (ret < 0) {
	498	dev_err(dev, "Failed to register extcon\n");
	499	return ret;
	500	}
f3b5a8d9 YS	501	}
f3b5a8d9 YS	502
441a681b YS	503	/*
	504	* devm_phy_create() will call pm_runtime_enable(&phy->dev);
	505	* And then, phy-core will manage runtime pm for this device.
	506	*/
	507	pm_runtime_enable(dev);
5d8042e9 BD	508	phy_usb2_ops = of_device_get_match_data(dev);
	509	if (!phy_usb2_ops)
	510	return -EINVAL;
	511
	512	channel->phy = devm_phy_create(dev, NULL, phy_usb2_ops);
f3b5a8d9 YS	513	if (IS_ERR(channel->phy)) {
f3b5a8d9 YS	514	dev_err(dev, "Failed to create USB2 PHY\n");
441a681b YS	515	ret = PTR_ERR(channel->phy);
441a681b YS	516	goto error;
f3b5a8d9 YS	517	}
f3b5a8d9 YS	518
6dcfd7c3 YS	519	channel->vbus = devm_regulator_get_optional(dev, "vbus");
6dcfd7c3 YS	520	if (IS_ERR(channel->vbus)) {
441a681b YS	521	if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
	522	ret = PTR_ERR(channel->vbus);
	523	goto error;
	524	}
6dcfd7c3 YS	525	channel->vbus = NULL;
	526	}
	527
9bb86777	528	platform_set_drvdata(pdev, channel);
f3b5a8d9	529	phy_set_drvdata(channel->phy, channel);
92fec1c2	530	channel->dev = dev;
f3b5a8d9 YS	531
f3b5a8d9 YS	532	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
9bb86777	533	if (IS_ERR(provider)) {
f3b5a8d9	534	dev_err(dev, "Failed to register PHY provider\n");
441a681b YS	535	ret = PTR_ERR(provider);
441a681b YS	536	goto error;
979b519c	537	} else if (channel->is_otg_channel) {
9bb86777 YS	538	int ret;
	539
	540	ret = device_create_file(dev, &dev_attr_role);
	541	if (ret < 0)
441a681b	542	goto error;
9bb86777	543	}
f3b5a8d9	544
441a681b YS	545	return 0;
	546
	547	error:
	548	pm_runtime_disable(dev);
	549
	550	return ret;
f3b5a8d9 YS	551	}
f3b5a8d9 YS	552
9bb86777 YS	553	static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
	554	{
	555	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
	556
979b519c	557	if (channel->is_otg_channel)
9bb86777 YS	558	device_remove_file(&pdev->dev, &dev_attr_role);
9bb86777 YS	559
441a681b YS	560	pm_runtime_disable(&pdev->dev);
441a681b YS	561
9bb86777 YS	562	return 0;
	563	};
	564
f3b5a8d9 YS	565	static struct platform_driver rcar_gen3_phy_usb2_driver = {
	566	.driver = {
	567	.name = "phy_rcar_gen3_usb2",
	568	.of_match_table = rcar_gen3_phy_usb2_match_table,
	569	},
	570	.probe = rcar_gen3_phy_usb2_probe,
9bb86777	571	.remove = rcar_gen3_phy_usb2_remove,
f3b5a8d9 YS	572	};
	573	module_platform_driver(rcar_gen3_phy_usb2_driver);
	574
	575	MODULE_LICENSE("GPL v2");
	576	MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
	577	MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");