[linux-2.6-block.git] / drivers / phy / renesas / phy-rcar-gen3-usb2.c

/*
 * Renesas R-Car Gen3 for USB2.0 PHY driver
 *
 * Copyright (C) 2015 Renesas Electronics Corporation
 *
 * This is based on the phy-rcar-gen2 driver:
 * Copyright (C) 2014 Renesas Solutions Corp.
 * Copyright (C) 2014 Cogent Embedded, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/extcon-provider.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/workqueue.h>

/******* USB2.0 Host registers (original offset is +0x200) *******/
#define USB2_INT_ENABLE		0x000
#define USB2_USBCTR		0x00c
#define USB2_SPD_RSM_TIMSET	0x10c
#define USB2_OC_TIMSET		0x110
#define USB2_COMMCTRL		0x600
#define USB2_OBINTSTA		0x604
#define USB2_OBINTEN		0x608
#define USB2_VBCTRL		0x60c
#define USB2_LINECTRL1		0x610
#define USB2_ADPCTRL		0x630

/* INT_ENABLE */
#define USB2_INT_ENABLE_UCOM_INTEN	BIT(3)
#define USB2_INT_ENABLE_USBH_INTB_EN	BIT(2)
#define USB2_INT_ENABLE_USBH_INTA_EN	BIT(1)
#define USB2_INT_ENABLE_INIT		(USB2_INT_ENABLE_UCOM_INTEN | \
					 USB2_INT_ENABLE_USBH_INTB_EN | \
					 USB2_INT_ENABLE_USBH_INTA_EN)

/* USBCTR */
#define USB2_USBCTR_DIRPD	BIT(2)
#define USB2_USBCTR_PLL_RST	BIT(1)

/* SPD_RSM_TIMSET */
#define USB2_SPD_RSM_TIMSET_INIT	0x014e029b

/* OC_TIMSET */
#define USB2_OC_TIMSET_INIT		0x000209ab

/* COMMCTRL */
#define USB2_COMMCTRL_OTG_PERI		BIT(31)	/* 1 = Peripheral mode */

/* OBINTSTA and OBINTEN */
#define USB2_OBINT_SESSVLDCHG		BIT(12)
#define USB2_OBINT_IDDIGCHG		BIT(11)
#define USB2_OBINT_BITS			(USB2_OBINT_SESSVLDCHG | \
					 USB2_OBINT_IDDIGCHG)

/* VBCTRL */
#define USB2_VBCTRL_DRVVBUSSEL		BIT(8)

/* LINECTRL1 */
#define USB2_LINECTRL1_DPRPD_EN		BIT(19)
#define USB2_LINECTRL1_DP_RPD		BIT(18)
#define USB2_LINECTRL1_DMRPD_EN		BIT(17)
#define USB2_LINECTRL1_DM_RPD		BIT(16)
#define USB2_LINECTRL1_OPMODE_NODRV	BIT(6)

/* ADPCTRL */
#define USB2_ADPCTRL_OTGSESSVLD		BIT(20)
#define USB2_ADPCTRL_IDDIG		BIT(19)
#define USB2_ADPCTRL_IDPULLUP		BIT(5)	/* 1 = ID sampling is enabled */
#define USB2_ADPCTRL_DRVVBUS		BIT(4)

struct rcar_gen3_chan {
	void __iomem *base;
	struct extcon_dev *extcon;
	struct phy *phy;
	struct regulator *vbus;
	struct work_struct work;
	bool extcon_host;
	bool has_otg;
};

static void rcar_gen3_phy_usb2_work(struct work_struct *work)
{
	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
						 work);

	if (ch->extcon_host) {
		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
		extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
	} else {
		extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
		extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
	}
}

static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_COMMCTRL);

	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
	if (host)
		val &= ~USB2_COMMCTRL_OTG_PERI;
	else
		val |= USB2_COMMCTRL_OTG_PERI;
	writel(val, usb2_base + USB2_COMMCTRL);
}

static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_LINECTRL1);

	dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
	val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
	if (dp)
		val |= USB2_LINECTRL1_DP_RPD;
	if (dm)
		val |= USB2_LINECTRL1_DM_RPD;
	writel(val, usb2_base + USB2_LINECTRL1);
}

static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
{
	void __iomem *usb2_base = ch->base;
	u32 val = readl(usb2_base + USB2_ADPCTRL);

	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
	if (vbus)
		val |= USB2_ADPCTRL_DRVVBUS;
	else
		val &= ~USB2_ADPCTRL_DRVVBUS;
	writel(val, usb2_base + USB2_ADPCTRL);
}

static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 1, 1);
	rcar_gen3_set_host_mode(ch, 1);
	rcar_gen3_enable_vbus_ctrl(ch, 1);

	ch->extcon_host = true;
	schedule_work(&ch->work);
}

static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 0, 1);
	rcar_gen3_set_host_mode(ch, 0);
	rcar_gen3_enable_vbus_ctrl(ch, 0);

	ch->extcon_host = false;
	schedule_work(&ch->work);
}

static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
{
	void __iomem *usb2_base = ch->base;
	u32 val;

	val = readl(usb2_base + USB2_LINECTRL1);
	writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);

	rcar_gen3_set_linectrl(ch, 1, 1);
	rcar_gen3_set_host_mode(ch, 1);
	rcar_gen3_enable_vbus_ctrl(ch, 0);

	val = readl(usb2_base + USB2_LINECTRL1);
	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
}

static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
{
	rcar_gen3_set_linectrl(ch, 0, 1);
	rcar_gen3_set_host_mode(ch, 0);
	rcar_gen3_enable_vbus_ctrl(ch, 1);
}

static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
{
	void __iomem *usb2_base = ch->base;
	u32 val;

	val = readl(usb2_base + USB2_OBINTEN);
	writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);

	rcar_gen3_enable_vbus_ctrl(ch, 0);
	rcar_gen3_init_for_host(ch);

	writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
}

static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
{
	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
}

static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
{
	if (!rcar_gen3_check_id(ch))
		rcar_gen3_init_for_host(ch);
	else
		rcar_gen3_init_for_peri(ch);
}

static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
{
	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
}

static ssize_t role_store(struct device *dev, struct device_attribute *attr,
			  const char *buf, size_t count)
{
	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
	bool is_b_device, is_host, new_mode_is_host;

	if (!ch->has_otg || !ch->phy->init_count)
		return -EIO;

	/*
	 * is_b_device: true is B-Device. false is A-Device.
	 * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
	 */
	is_b_device = rcar_gen3_check_id(ch);
	is_host = rcar_gen3_is_host(ch);
	if (!strncmp(buf, "host", strlen("host")))
		new_mode_is_host = true;
	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
		new_mode_is_host = false;
	else
		return -EINVAL;

	/* If current and new mode is the same, this returns the error */
	if (is_host == new_mode_is_host)
		return -EINVAL;

	if (new_mode_is_host) {		/* And is_host must be false */
		if (!is_b_device)	/* A-Peripheral */
			rcar_gen3_init_from_a_peri_to_a_host(ch);
		else			/* B-Peripheral */
			rcar_gen3_init_for_b_host(ch);
	} else {			/* And is_host must be true */
		if (!is_b_device)	/* A-Host */
			rcar_gen3_init_for_a_peri(ch);
		else			/* B-Host */
			rcar_gen3_init_for_peri(ch);
	}

	return count;
}

static ssize_t role_show(struct device *dev, struct device_attribute *attr,
			 char *buf)
{
	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);

	if (!ch->has_otg || !ch->phy->init_count)
		return -EIO;

	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
							    "peripheral");
}
static DEVICE_ATTR_RW(role);

static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
{
	void __iomem *usb2_base = ch->base;
	u32 val;

	val = readl(usb2_base + USB2_VBCTRL);
	writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
	val = readl(usb2_base + USB2_OBINTEN);
	writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
	val = readl(usb2_base + USB2_ADPCTRL);
	writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
	val = readl(usb2_base + USB2_LINECTRL1);
	rcar_gen3_set_linectrl(ch, 0, 0);
	writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
	       usb2_base + USB2_LINECTRL1);

	rcar_gen3_device_recognition(ch);
}

static int rcar_gen3_phy_usb2_init(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	void __iomem *usb2_base = channel->base;

	/* Initialize USB2 part */
	writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);

	/* Initialize otg part */
	if (channel->has_otg)
		rcar_gen3_init_otg(channel);

	return 0;
}

static int rcar_gen3_phy_usb2_exit(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);

	writel(0, channel->base + USB2_INT_ENABLE);

	return 0;
}

static int rcar_gen3_phy_usb2_power_on(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	void __iomem *usb2_base = channel->base;
	u32 val;
	int ret;

	if (channel->vbus) {
		ret = regulator_enable(channel->vbus);
		if (ret)
			return ret;
	}

	val = readl(usb2_base + USB2_USBCTR);
	val |= USB2_USBCTR_PLL_RST;
	writel(val, usb2_base + USB2_USBCTR);
	val &= ~USB2_USBCTR_PLL_RST;
	writel(val, usb2_base + USB2_USBCTR);

	return 0;
}

static int rcar_gen3_phy_usb2_power_off(struct phy *p)
{
	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	int ret = 0;

	if (channel->vbus)
		ret = regulator_disable(channel->vbus);

	return ret;
}

static const struct phy_ops rcar_gen3_phy_usb2_ops = {
	.init		= rcar_gen3_phy_usb2_init,
	.exit		= rcar_gen3_phy_usb2_exit,
	.power_on	= rcar_gen3_phy_usb2_power_on,
	.power_off	= rcar_gen3_phy_usb2_power_off,
	.owner		= THIS_MODULE,
};

static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
{
	struct rcar_gen3_chan *ch = _ch;
	void __iomem *usb2_base = ch->base;
	u32 status = readl(usb2_base + USB2_OBINTSTA);
	irqreturn_t ret = IRQ_NONE;

	if (status & USB2_OBINT_BITS) {
		dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
		writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
		rcar_gen3_device_recognition(ch);
		ret = IRQ_HANDLED;
	}

	return ret;
}

static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
	{ .compatible = "renesas,usb2-phy-r8a7795" },
	{ .compatible = "renesas,usb2-phy-r8a7796" },
	{ .compatible = "renesas,rcar-gen3-usb2-phy" },
	{ }
};
MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);

static const unsigned int rcar_gen3_phy_cable[] = {
	EXTCON_USB,
	EXTCON_USB_HOST,
	EXTCON_NONE,
};

static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct rcar_gen3_chan *channel;
	struct phy_provider *provider;
	struct resource *res;
	int irq, ret = 0;

	if (!dev->of_node) {
		dev_err(dev, "This driver needs device tree\n");
		return -EINVAL;
	}

	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
	if (!channel)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	channel->base = devm_ioremap_resource(dev, res);
	if (IS_ERR(channel->base))
		return PTR_ERR(channel->base);

	/* call request_irq for OTG */
	irq = platform_get_irq(pdev, 0);
	if (irq >= 0) {
		int ret;

		INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
		irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
				       IRQF_SHARED, dev_name(dev), channel);
		if (irq < 0)
			dev_err(dev, "No irq handler (%d)\n", irq);
		channel->has_otg = true;
		channel->extcon = devm_extcon_dev_allocate(dev,
							rcar_gen3_phy_cable);
		if (IS_ERR(channel->extcon))
			return PTR_ERR(channel->extcon);

		ret = devm_extcon_dev_register(dev, channel->extcon);
		if (ret < 0) {
			dev_err(dev, "Failed to register extcon\n");
			return ret;
		}
	}

	/*
	 * devm_phy_create() will call pm_runtime_enable(&phy->dev);
	 * And then, phy-core will manage runtime pm for this device.
	 */
	pm_runtime_enable(dev);
	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
	if (IS_ERR(channel->phy)) {
		dev_err(dev, "Failed to create USB2 PHY\n");
		ret = PTR_ERR(channel->phy);
		goto error;
	}

	channel->vbus = devm_regulator_get_optional(dev, "vbus");
	if (IS_ERR(channel->vbus)) {
		if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
			ret = PTR_ERR(channel->vbus);
			goto error;
		}
		channel->vbus = NULL;
	}

	platform_set_drvdata(pdev, channel);
	phy_set_drvdata(channel->phy, channel);

	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	if (IS_ERR(provider)) {
		dev_err(dev, "Failed to register PHY provider\n");
		ret = PTR_ERR(provider);
		goto error;
	} else if (channel->has_otg) {
		int ret;

		ret = device_create_file(dev, &dev_attr_role);
		if (ret < 0)
			goto error;
	}

	return 0;

error:
	pm_runtime_disable(dev);

	return ret;
}

static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
{
	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);

	if (channel->has_otg)
		device_remove_file(&pdev->dev, &dev_attr_role);

	pm_runtime_disable(&pdev->dev);

	return 0;
};

static struct platform_driver rcar_gen3_phy_usb2_driver = {
	.driver = {
		.name		= "phy_rcar_gen3_usb2",
		.of_match_table	= rcar_gen3_phy_usb2_match_table,
	},
	.probe	= rcar_gen3_phy_usb2_probe,
	.remove = rcar_gen3_phy_usb2_remove,
};
module_platform_driver(rcar_gen3_phy_usb2_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
Commit	Line	Data
f3b5a8d9 YS	1	/*
	2	* Renesas R-Car Gen3 for USB2.0 PHY driver
	3	*
	4	* Copyright (C) 2015 Renesas Electronics Corporation
	5	*
	6	* This is based on the phy-rcar-gen2 driver:
	7	* Copyright (C) 2014 Renesas Solutions Corp.
	8	* Copyright (C) 2014 Cogent Embedded, Inc.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
176aa360	15	#include <linux/extcon-provider.h>
9f391c57	16	#include <linux/interrupt.h>
f3b5a8d9 YS	17	#include <linux/io.h>
	18	#include <linux/module.h>
	19	#include <linux/of.h>
	20	#include <linux/of_address.h>
	21	#include <linux/phy/phy.h>
	22	#include <linux/platform_device.h>
441a681b	23	#include <linux/pm_runtime.h>
6dcfd7c3	24	#include <linux/regulator/consumer.h>
c14f8a40	25	#include <linux/workqueue.h>
f3b5a8d9 YS	26
	27	/***** USB2.0 Host registers (original offset is +0x200) *****/
	28	#define USB2_INT_ENABLE 0x000
	29	#define USB2_USBCTR 0x00c
	30	#define USB2_SPD_RSM_TIMSET 0x10c
	31	#define USB2_OC_TIMSET 0x110
1114e2d3	32	#define USB2_COMMCTRL 0x600
9f391c57 YS	33	#define USB2_OBINTSTA 0x604
9f391c57 YS	34	#define USB2_OBINTEN 0x608
1114e2d3 YS	35	#define USB2_VBCTRL 0x60c
	36	#define USB2_LINECTRL1 0x610
	37	#define USB2_ADPCTRL 0x630
f3b5a8d9 YS	38
f3b5a8d9 YS	39	/* INT_ENABLE */
9f391c57	40	#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
f3b5a8d9 YS	41	#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
f3b5a8d9 YS	42	#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
9f391c57 YS	43	#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN \| \
9f391c57 YS	44	USB2_INT_ENABLE_USBH_INTB_EN \| \
f3b5a8d9 YS	45	USB2_INT_ENABLE_USBH_INTA_EN)
	46
	47	/* USBCTR */
	48	#define USB2_USBCTR_DIRPD BIT(2)
	49	#define USB2_USBCTR_PLL_RST BIT(1)
	50
	51	/* SPD_RSM_TIMSET */
	52	#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
	53
	54	/* OC_TIMSET */
	55	#define USB2_OC_TIMSET_INIT 0x000209ab
	56
1114e2d3 YS	57	/* COMMCTRL */
	58	#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
	59
9f391c57 YS	60	/* OBINTSTA and OBINTEN */
	61	#define USB2_OBINT_SESSVLDCHG BIT(12)
	62	#define USB2_OBINT_IDDIGCHG BIT(11)
	63	#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG \| \
	64	USB2_OBINT_IDDIGCHG)
	65
1114e2d3 YS	66	/* VBCTRL */
	67	#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
	68
	69	/* LINECTRL1 */
	70	#define USB2_LINECTRL1_DPRPD_EN BIT(19)
	71	#define USB2_LINECTRL1_DP_RPD BIT(18)
	72	#define USB2_LINECTRL1_DMRPD_EN BIT(17)
	73	#define USB2_LINECTRL1_DM_RPD BIT(16)
9bb86777	74	#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
1114e2d3 YS	75
	76	/* ADPCTRL */
	77	#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
	78	#define USB2_ADPCTRL_IDDIG BIT(19)
	79	#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
	80	#define USB2_ADPCTRL_DRVVBUS BIT(4)
	81
f3b5a8d9	82	struct rcar_gen3_chan {
801a69c7	83	void __iomem *base;
2b38543c	84	struct extcon_dev *extcon;
f3b5a8d9	85	struct phy *phy;
6dcfd7c3	86	struct regulator *vbus;
c14f8a40 YS	87	struct work_struct work;
c14f8a40 YS	88	bool extcon_host;
b9564016	89	bool has_otg;
f3b5a8d9 YS	90	};
f3b5a8d9 YS	91
c14f8a40 YS	92	static void rcar_gen3_phy_usb2_work(struct work_struct *work)
	93	{
	94	struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
	95	work);
	96
	97	if (ch->extcon_host) {
c6f30a5b CC	98	extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
c6f30a5b CC	99	extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
c14f8a40	100	} else {
c6f30a5b CC	101	extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
c6f30a5b CC	102	extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
c14f8a40 YS	103	}
	104	}
	105
1114e2d3 YS	106	static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
1114e2d3 YS	107	{
801a69c7	108	void __iomem *usb2_base = ch->base;
1114e2d3 YS	109	u32 val = readl(usb2_base + USB2_COMMCTRL);
	110
	111	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
	112	if (host)
	113	val &= ~USB2_COMMCTRL_OTG_PERI;
	114	else
	115	val \|= USB2_COMMCTRL_OTG_PERI;
	116	writel(val, usb2_base + USB2_COMMCTRL);
	117	}
	118
	119	static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
	120	{
801a69c7	121	void __iomem *usb2_base = ch->base;
1114e2d3 YS	122	u32 val = readl(usb2_base + USB2_LINECTRL1);
	123
	124	dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
	125	val &= ~(USB2_LINECTRL1_DP_RPD \| USB2_LINECTRL1_DM_RPD);
	126	if (dp)
	127	val \|= USB2_LINECTRL1_DP_RPD;
	128	if (dm)
	129	val \|= USB2_LINECTRL1_DM_RPD;
	130	writel(val, usb2_base + USB2_LINECTRL1);
	131	}
	132
	133	static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
	134	{
801a69c7	135	void __iomem *usb2_base = ch->base;
1114e2d3 YS	136	u32 val = readl(usb2_base + USB2_ADPCTRL);
	137
	138	dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
	139	if (vbus)
	140	val \|= USB2_ADPCTRL_DRVVBUS;
	141	else
	142	val &= ~USB2_ADPCTRL_DRVVBUS;
	143	writel(val, usb2_base + USB2_ADPCTRL);
	144	}
	145
	146	static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
	147	{
	148	rcar_gen3_set_linectrl(ch, 1, 1);
	149	rcar_gen3_set_host_mode(ch, 1);
	150	rcar_gen3_enable_vbus_ctrl(ch, 1);
2b38543c	151
c14f8a40 YS	152	ch->extcon_host = true;
c14f8a40 YS	153	schedule_work(&ch->work);
1114e2d3 YS	154	}
	155
	156	static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
	157	{
	158	rcar_gen3_set_linectrl(ch, 0, 1);
	159	rcar_gen3_set_host_mode(ch, 0);
	160	rcar_gen3_enable_vbus_ctrl(ch, 0);
2b38543c	161
c14f8a40 YS	162	ch->extcon_host = false;
c14f8a40 YS	163	schedule_work(&ch->work);
1114e2d3 YS	164	}
1114e2d3 YS	165
9bb86777 YS	166	static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
	167	{
	168	void __iomem *usb2_base = ch->base;
	169	u32 val;
	170
	171	val = readl(usb2_base + USB2_LINECTRL1);
	172	writel(val \| USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
	173
	174	rcar_gen3_set_linectrl(ch, 1, 1);
	175	rcar_gen3_set_host_mode(ch, 1);
	176	rcar_gen3_enable_vbus_ctrl(ch, 0);
	177
	178	val = readl(usb2_base + USB2_LINECTRL1);
	179	writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
	180	}
	181
	182	static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
	183	{
	184	rcar_gen3_set_linectrl(ch, 0, 1);
	185	rcar_gen3_set_host_mode(ch, 0);
	186	rcar_gen3_enable_vbus_ctrl(ch, 1);
	187	}
	188
	189	static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
	190	{
	191	void __iomem *usb2_base = ch->base;
	192	u32 val;
	193
	194	val = readl(usb2_base + USB2_OBINTEN);
	195	writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
	196
	197	rcar_gen3_enable_vbus_ctrl(ch, 0);
	198	rcar_gen3_init_for_host(ch);
	199
	200	writel(val \| USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
	201	}
	202
1114e2d3 YS	203	static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
1114e2d3 YS	204	{
801a69c7	205	return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
1114e2d3 YS	206	}
	207
	208	static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
	209	{
6762925d	210	if (!rcar_gen3_check_id(ch))
1114e2d3 YS	211	rcar_gen3_init_for_host(ch);
	212	else
	213	rcar_gen3_init_for_peri(ch);
	214	}
	215
9bb86777 YS	216	static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
	217	{
	218	return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
	219	}
	220
	221	static ssize_t role_store(struct device dev, struct device_attribute attr,
	222	const char *buf, size_t count)
	223	{
	224	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
	225	bool is_b_device, is_host, new_mode_is_host;
	226
	227	if (!ch->has_otg \|\| !ch->phy->init_count)
	228	return -EIO;
	229
	230	/*
	231	* is_b_device: true is B-Device. false is A-Device.
	232	* If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
	233	*/
	234	is_b_device = rcar_gen3_check_id(ch);
	235	is_host = rcar_gen3_is_host(ch);
	236	if (!strncmp(buf, "host", strlen("host")))
	237	new_mode_is_host = true;
	238	else if (!strncmp(buf, "peripheral", strlen("peripheral")))
	239	new_mode_is_host = false;
	240	else
	241	return -EINVAL;
	242
	243	/* If current and new mode is the same, this returns the error */
	244	if (is_host == new_mode_is_host)
	245	return -EINVAL;
	246
	247	if (new_mode_is_host) { /* And is_host must be false */
	248	if (!is_b_device) /* A-Peripheral */
	249	rcar_gen3_init_from_a_peri_to_a_host(ch);
	250	else /* B-Peripheral */
	251	rcar_gen3_init_for_b_host(ch);
	252	} else { /* And is_host must be true */
	253	if (!is_b_device) /* A-Host */
	254	rcar_gen3_init_for_a_peri(ch);
	255	else /* B-Host */
	256	rcar_gen3_init_for_peri(ch);
	257	}
	258
	259	return count;
	260	}
	261
	262	static ssize_t role_show(struct device dev, struct device_attribute attr,
	263	char *buf)
	264	{
	265	struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
	266
	267	if (!ch->has_otg \|\| !ch->phy->init_count)
	268	return -EIO;
	269
	270	return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
	271	"peripheral");
	272	}
	273	static DEVICE_ATTR_RW(role);
	274
1114e2d3 YS	275	static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
1114e2d3 YS	276	{
801a69c7	277	void __iomem *usb2_base = ch->base;
1114e2d3 YS	278	u32 val;
	279
	280	val = readl(usb2_base + USB2_VBCTRL);
	281	writel(val \| USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
9f391c57 YS	282	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
	283	val = readl(usb2_base + USB2_OBINTEN);
	284	writel(val \| USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
1114e2d3 YS	285	val = readl(usb2_base + USB2_ADPCTRL);
	286	writel(val \| USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
	287	val = readl(usb2_base + USB2_LINECTRL1);
	288	rcar_gen3_set_linectrl(ch, 0, 0);
	289	writel(val \| USB2_LINECTRL1_DPRPD_EN \| USB2_LINECTRL1_DMRPD_EN,
	290	usb2_base + USB2_LINECTRL1);
	291
	292	rcar_gen3_device_recognition(ch);
	293	}
	294
f3b5a8d9 YS	295	static int rcar_gen3_phy_usb2_init(struct phy *p)
	296	{
	297	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
801a69c7	298	void __iomem *usb2_base = channel->base;
f3b5a8d9 YS	299
	300	/* Initialize USB2 part */
	301	writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
	302	writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
	303	writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
	304
b9564016 YS	305	/* Initialize otg part */
b9564016 YS	306	if (channel->has_otg)
1114e2d3	307	rcar_gen3_init_otg(channel);
f3b5a8d9 YS	308
	309	return 0;
	310	}
	311
	312	static int rcar_gen3_phy_usb2_exit(struct phy *p)
	313	{
	314	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	315
801a69c7	316	writel(0, channel->base + USB2_INT_ENABLE);
f3b5a8d9 YS	317
	318	return 0;
	319	}
	320
	321	static int rcar_gen3_phy_usb2_power_on(struct phy *p)
	322	{
	323	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
801a69c7	324	void __iomem *usb2_base = channel->base;
f3b5a8d9	325	u32 val;
6dcfd7c3 YS	326	int ret;
	327
	328	if (channel->vbus) {
	329	ret = regulator_enable(channel->vbus);
	330	if (ret)
	331	return ret;
	332	}
f3b5a8d9 YS	333
	334	val = readl(usb2_base + USB2_USBCTR);
	335	val \|= USB2_USBCTR_PLL_RST;
	336	writel(val, usb2_base + USB2_USBCTR);
	337	val &= ~USB2_USBCTR_PLL_RST;
	338	writel(val, usb2_base + USB2_USBCTR);
	339
f3b5a8d9 YS	340	return 0;
	341	}
	342
6dcfd7c3 YS	343	static int rcar_gen3_phy_usb2_power_off(struct phy *p)
	344	{
	345	struct rcar_gen3_chan *channel = phy_get_drvdata(p);
	346	int ret = 0;
	347
	348	if (channel->vbus)
	349	ret = regulator_disable(channel->vbus);
	350
	351	return ret;
	352	}
	353
a8df2768	354	static const struct phy_ops rcar_gen3_phy_usb2_ops = {
f3b5a8d9 YS	355	.init = rcar_gen3_phy_usb2_init,
	356	.exit = rcar_gen3_phy_usb2_exit,
	357	.power_on = rcar_gen3_phy_usb2_power_on,
6dcfd7c3	358	.power_off = rcar_gen3_phy_usb2_power_off,
f3b5a8d9 YS	359	.owner = THIS_MODULE,
	360	};
	361
9f391c57 YS	362	static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
	363	{
	364	struct rcar_gen3_chan *ch = _ch;
801a69c7	365	void __iomem *usb2_base = ch->base;
9f391c57 YS	366	u32 status = readl(usb2_base + USB2_OBINTSTA);
	367	irqreturn_t ret = IRQ_NONE;
	368
	369	if (status & USB2_OBINT_BITS) {
	370	dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
	371	writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
	372	rcar_gen3_device_recognition(ch);
	373	ret = IRQ_HANDLED;
	374	}
	375
	376	return ret;
	377	}
	378
f3b5a8d9 YS	379	static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
f3b5a8d9 YS	380	{ .compatible = "renesas,usb2-phy-r8a7795" },
800dcc30	381	{ .compatible = "renesas,usb2-phy-r8a7796" },
cde7bc36	382	{ .compatible = "renesas,rcar-gen3-usb2-phy" },
f3b5a8d9 YS	383	{ }
	384	};
	385	MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
	386
2b38543c YS	387	static const unsigned int rcar_gen3_phy_cable[] = {
	388	EXTCON_USB,
	389	EXTCON_USB_HOST,
	390	EXTCON_NONE,
	391	};
	392
f3b5a8d9 YS	393	static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
	394	{
	395	struct device *dev = &pdev->dev;
	396	struct rcar_gen3_chan *channel;
	397	struct phy_provider *provider;
	398	struct resource *res;
441a681b	399	int irq, ret = 0;
f3b5a8d9 YS	400
	401	if (!dev->of_node) {
	402	dev_err(dev, "This driver needs device tree\n");
	403	return -EINVAL;
	404	}
	405
	406	channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
	407	if (!channel)
	408	return -ENOMEM;
	409
b9564016	410	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
801a69c7 YS	411	channel->base = devm_ioremap_resource(dev, res);
	412	if (IS_ERR(channel->base))
	413	return PTR_ERR(channel->base);
f3b5a8d9	414
b9564016 YS	415	/* call request_irq for OTG */
	416	irq = platform_get_irq(pdev, 0);
	417	if (irq >= 0) {
2b38543c YS	418	int ret;
2b38543c YS	419
c14f8a40	420	INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
b9564016 YS	421	irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
b9564016 YS	422	IRQF_SHARED, dev_name(dev), channel);
9f391c57 YS	423	if (irq < 0)
9f391c57 YS	424	dev_err(dev, "No irq handler (%d)\n", irq);
b9564016	425	channel->has_otg = true;
2b38543c YS	426	channel->extcon = devm_extcon_dev_allocate(dev,
	427	rcar_gen3_phy_cable);
	428	if (IS_ERR(channel->extcon))
	429	return PTR_ERR(channel->extcon);
	430
	431	ret = devm_extcon_dev_register(dev, channel->extcon);
	432	if (ret < 0) {
	433	dev_err(dev, "Failed to register extcon\n");
	434	return ret;
	435	}
f3b5a8d9 YS	436	}
f3b5a8d9 YS	437
441a681b YS	438	/*
	439	* devm_phy_create() will call pm_runtime_enable(&phy->dev);
	440	* And then, phy-core will manage runtime pm for this device.
	441	*/
	442	pm_runtime_enable(dev);
f3b5a8d9 YS	443	channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
	444	if (IS_ERR(channel->phy)) {
	445	dev_err(dev, "Failed to create USB2 PHY\n");
441a681b YS	446	ret = PTR_ERR(channel->phy);
441a681b YS	447	goto error;
f3b5a8d9 YS	448	}
f3b5a8d9 YS	449
6dcfd7c3 YS	450	channel->vbus = devm_regulator_get_optional(dev, "vbus");
6dcfd7c3 YS	451	if (IS_ERR(channel->vbus)) {
441a681b YS	452	if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
	453	ret = PTR_ERR(channel->vbus);
	454	goto error;
	455	}
6dcfd7c3 YS	456	channel->vbus = NULL;
	457	}
	458
9bb86777	459	platform_set_drvdata(pdev, channel);
f3b5a8d9 YS	460	phy_set_drvdata(channel->phy, channel);
	461
	462	provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
9bb86777	463	if (IS_ERR(provider)) {
f3b5a8d9	464	dev_err(dev, "Failed to register PHY provider\n");
441a681b YS	465	ret = PTR_ERR(provider);
441a681b YS	466	goto error;
9bb86777 YS	467	} else if (channel->has_otg) {
	468	int ret;
	469
	470	ret = device_create_file(dev, &dev_attr_role);
	471	if (ret < 0)
441a681b	472	goto error;
9bb86777	473	}
f3b5a8d9	474
441a681b YS	475	return 0;
	476
	477	error:
	478	pm_runtime_disable(dev);
	479
	480	return ret;
f3b5a8d9 YS	481	}
f3b5a8d9 YS	482
9bb86777 YS	483	static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
	484	{
	485	struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
	486
	487	if (channel->has_otg)
	488	device_remove_file(&pdev->dev, &dev_attr_role);
	489
441a681b YS	490	pm_runtime_disable(&pdev->dev);
441a681b YS	491
9bb86777 YS	492	return 0;
	493	};
	494
f3b5a8d9 YS	495	static struct platform_driver rcar_gen3_phy_usb2_driver = {
	496	.driver = {
	497	.name = "phy_rcar_gen3_usb2",
	498	.of_match_table = rcar_gen3_phy_usb2_match_table,
	499	},
	500	.probe = rcar_gen3_phy_usb2_probe,
9bb86777	501	.remove = rcar_gen3_phy_usb2_remove,
f3b5a8d9 YS	502	};
	503	module_platform_driver(rcar_gen3_phy_usb2_driver);
	504
	505	MODULE_LICENSE("GPL v2");
	506	MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
	507	MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");