Commit | Line | Data |
---|---|---|
ec8f24b7 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
0b56e9a7 | 2 | # |
cd3bf368 | 3 | # Phy drivers for Qualcomm and Atheros platforms |
0b56e9a7 | 4 | # |
cd3bf368 AB |
5 | config PHY_ATH79_USB |
6 | tristate "Atheros AR71XX/9XXX USB PHY driver" | |
7 | depends on OF && (ATH79 || COMPILE_TEST) | |
8 | default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM | |
9 | select RESET_CONTROLLER | |
10 | select GENERIC_PHY | |
11 | help | |
12 | Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs. | |
13 | ||
0b56e9a7 VG |
14 | config PHY_QCOM_APQ8064_SATA |
15 | tristate "Qualcomm APQ8064 SATA SerDes/PHY driver" | |
16 | depends on ARCH_QCOM | |
17 | depends on HAS_IOMEM | |
18 | depends on OF | |
19 | select GENERIC_PHY | |
20 | ||
21 | config PHY_QCOM_IPQ806X_SATA | |
22 | tristate "Qualcomm IPQ806x SATA SerDes/PHY driver" | |
23 | depends on ARCH_QCOM | |
24 | depends on HAS_IOMEM | |
25 | depends on OF | |
26 | select GENERIC_PHY | |
27 | ||
6ef72bc0 BA |
28 | config PHY_QCOM_PCIE2 |
29 | tristate "Qualcomm PCIe Gen2 PHY Driver" | |
30 | depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) | |
31 | select GENERIC_PHY | |
32 | help | |
33 | Enable this to support the Qualcomm PCIe PHY, used with the Synopsys | |
34 | based PCIe controller. | |
35 | ||
0b56e9a7 VG |
36 | config PHY_QCOM_QMP |
37 | tristate "Qualcomm QMP PHY Driver" | |
38 | depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) | |
39 | select GENERIC_PHY | |
40 | help | |
41 | Enable this to support the QMP PHY transceiver that is used | |
42 | with controllers such as PCIe, UFS, and USB on Qualcomm chips. | |
43 | ||
44 | config PHY_QCOM_QUSB2 | |
45 | tristate "Qualcomm QUSB2 PHY Driver" | |
46 | depends on OF && (ARCH_QCOM || COMPILE_TEST) | |
47 | depends on NVMEM || !NVMEM | |
48 | select GENERIC_PHY | |
49 | help | |
50 | Enable this to support the HighSpeed QUSB2 PHY transceiver for USB | |
51 | controllers on Qualcomm chips. This driver supports the high-speed | |
52 | PHY which is usually paired with either the ChipIdea or Synopsys DWC3 | |
53 | USB IPs on MSM SOCs. | |
54 | ||
55 | config PHY_QCOM_UFS | |
56 | tristate "Qualcomm UFS PHY driver" | |
57 | depends on OF && ARCH_QCOM | |
58 | select GENERIC_PHY | |
59 | help | |
60 | Support for UFS PHY on QCOM chipsets. | |
61 | ||
82af0932 VG |
62 | if PHY_QCOM_UFS |
63 | ||
64 | config PHY_QCOM_UFS_14NM | |
65 | tristate | |
66 | default PHY_QCOM_UFS | |
67 | help | |
68 | Support for 14nm UFS QMP phy present on QCOM chipsets. | |
69 | ||
70 | config PHY_QCOM_UFS_20NM | |
71 | tristate | |
72 | default PHY_QCOM_UFS | |
73 | depends on BROKEN | |
74 | help | |
75 | Support for 20nm UFS QMP phy present on QCOM chipsets. | |
76 | ||
77 | endif | |
78 | ||
0b56e9a7 VG |
79 | config PHY_QCOM_USB_HS |
80 | tristate "Qualcomm USB HS PHY module" | |
81 | depends on USB_ULPI_BUS | |
82 | depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in | |
83 | select GENERIC_PHY | |
84 | help | |
85 | Support for the USB high-speed ULPI compliant phy on Qualcomm | |
86 | chipsets. | |
87 | ||
88 | config PHY_QCOM_USB_HSIC | |
89 | tristate "Qualcomm USB HSIC ULPI PHY module" | |
90 | depends on USB_ULPI_BUS | |
91 | select GENERIC_PHY | |
92 | help | |
93 | Support for the USB HSIC ULPI compliant PHY on QCOM chipsets. |