[linux-2.6-block.git] / drivers / perf / arm_pmu_platform.c

// SPDX-License-Identifier: GPL-2.0
/*
 * platform_device probing code for ARM performance counters.
 *
 * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
 * Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
 */
#define pr_fmt(fmt) "hw perfevents: " fmt

#include <linux/bug.h>
#include <linux/cpumask.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/irq.h>
#include <linux/irqdesc.h>
#include <linux/kconfig.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/percpu.h>
#include <linux/perf/arm_pmu.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/smp.h>

static int probe_current_pmu(struct arm_pmu *pmu,
			     const struct pmu_probe_info *info)
{
	int cpu = get_cpu();
	unsigned int cpuid = read_cpuid_id();
	int ret = -ENODEV;

	pr_info("probing PMU on CPU %d\n", cpu);

	for (; info->init != NULL; info++) {
		if ((cpuid & info->mask) != info->cpuid)
			continue;
		ret = info->init(pmu);
		break;
	}

	put_cpu();
	return ret;
}

static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
{
	int cpu, ret;
	struct pmu_hw_events __percpu *hw_events = pmu->hw_events;

	ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
	if (ret)
		return ret;

	for_each_cpu(cpu, &pmu->supported_cpus)
		per_cpu(hw_events->irq, cpu) = irq;

	return 0;
}

static bool pmu_has_irq_affinity(struct device_node *node)
{
	return !!of_find_property(node, "interrupt-affinity", NULL);
}

static int pmu_parse_irq_affinity(struct device_node *node, int i)
{
	struct device_node *dn;
	int cpu;

	/*
	 * If we don't have an interrupt-affinity property, we guess irq
	 * affinity matches our logical CPU order, as we used to assume.
	 * This is fragile, so we'll warn in pmu_parse_irqs().
	 */
	if (!pmu_has_irq_affinity(node))
		return i;

	dn = of_parse_phandle(node, "interrupt-affinity", i);
	if (!dn) {
		pr_warn("failed to parse interrupt-affinity[%d] for %pOFn\n",
			i, node);
		return -EINVAL;
	}

	cpu = of_cpu_node_to_id(dn);
	if (cpu < 0) {
		pr_warn("failed to find logical CPU for %pOFn\n", dn);
		cpu = nr_cpu_ids;
	}

	of_node_put(dn);

	return cpu;
}

static int pmu_parse_irqs(struct arm_pmu *pmu)
{
	int i = 0, num_irqs;
	struct platform_device *pdev = pmu->plat_device;
	struct pmu_hw_events __percpu *hw_events = pmu->hw_events;

	num_irqs = platform_irq_count(pdev);
	if (num_irqs < 0) {
		pr_err("unable to count PMU IRQs\n");
		return num_irqs;
	}

	/*
	 * In this case we have no idea which CPUs are covered by the PMU.
	 * To match our prior behaviour, we assume all CPUs in this case.
	 */
	if (num_irqs == 0) {
		pr_warn("no irqs for PMU, sampling events not supported\n");
		pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
		cpumask_setall(&pmu->supported_cpus);
		return 0;
	}

	if (num_irqs == 1) {
		int irq = platform_get_irq(pdev, 0);
		if (irq && irq_is_percpu_devid(irq))
			return pmu_parse_percpu_irq(pmu, irq);
	}

	if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) {
		pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
			pdev->dev.of_node);
	}

	for (i = 0; i < num_irqs; i++) {
		int cpu, irq;

		irq = platform_get_irq(pdev, i);
		if (WARN_ON(irq <= 0))
			continue;

		if (irq_is_percpu_devid(irq)) {
			pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
			return -EINVAL;
		}

		cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
		if (cpu < 0)
			return cpu;
		if (cpu >= nr_cpu_ids)
			continue;

		if (per_cpu(hw_events->irq, cpu)) {
			pr_warn("multiple PMU IRQs for the same CPU detected\n");
			return -EINVAL;
		}

		per_cpu(hw_events->irq, cpu) = irq;
		cpumask_set_cpu(cpu, &pmu->supported_cpus);
	}

	return 0;
}

static int armpmu_request_irqs(struct arm_pmu *armpmu)
{
	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
	int cpu, err = 0;

	for_each_cpu(cpu, &armpmu->supported_cpus) {
		int irq = per_cpu(hw_events->irq, cpu);
		if (!irq)
			continue;

		err = armpmu_request_irq(irq, cpu);
		if (err)
			break;
	}

	return err;
}

static void armpmu_free_irqs(struct arm_pmu *armpmu)
{
	int cpu;
	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;

	for_each_cpu(cpu, &armpmu->supported_cpus) {
		int irq = per_cpu(hw_events->irq, cpu);

		armpmu_free_irq(irq, cpu);
	}
}

int arm_pmu_device_probe(struct platform_device *pdev,
			 const struct of_device_id *of_table,
			 const struct pmu_probe_info *probe_table)
{
	const struct of_device_id *of_id;
	armpmu_init_fn init_fn;
	struct device_node *node = pdev->dev.of_node;
	struct arm_pmu *pmu;
	int ret = -ENODEV;

	pmu = armpmu_alloc();
	if (!pmu)
		return -ENOMEM;

	pmu->plat_device = pdev;

	ret = pmu_parse_irqs(pmu);
	if (ret)
		goto out_free;

	if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
		init_fn = of_id->data;

		pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
							   "secure-reg-access");

		/* arm64 systems boot only as non-secure */
		if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
			pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
			pmu->secure_access = false;
		}

		ret = init_fn(pmu);
	} else if (probe_table) {
		cpumask_setall(&pmu->supported_cpus);
		ret = probe_current_pmu(pmu, probe_table);
	}

	if (ret) {
		pr_info("%pOF: failed to probe PMU!\n", node);
		goto out_free;
	}

	ret = armpmu_request_irqs(pmu);
	if (ret)
		goto out_free_irqs;

	ret = armpmu_register(pmu);
	if (ret)
		goto out_free;

	return 0;

out_free_irqs:
	armpmu_free_irqs(pmu);
out_free:
	pr_info("%pOF: failed to register PMU devices!\n", node);
	armpmu_free(pmu);
	return ret;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
18bfcfe5 MR	2	/*
	3	* platform_device probing code for ARM performance counters.
	4	*
	5	* Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles
	6	* Copyright (C) 2010 ARM Ltd., Will Deacon <will.deacon@arm.com>
	7	*/
	8	#define pr_fmt(fmt) "hw perfevents: " fmt
	9
	10	#include <linux/bug.h>
	11	#include <linux/cpumask.h>
	12	#include <linux/device.h>
	13	#include <linux/errno.h>
	14	#include <linux/irq.h>
	15	#include <linux/irqdesc.h>
	16	#include <linux/kconfig.h>
	17	#include <linux/of.h>
	18	#include <linux/of_device.h>
	19	#include <linux/percpu.h>
	20	#include <linux/perf/arm_pmu.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/printk.h>
	23	#include <linux/smp.h>
	24
	25	static int probe_current_pmu(struct arm_pmu *pmu,
	26	const struct pmu_probe_info *info)
	27	{
	28	int cpu = get_cpu();
	29	unsigned int cpuid = read_cpuid_id();
	30	int ret = -ENODEV;
	31
	32	pr_info("probing PMU on CPU %d\n", cpu);
	33
	34	for (; info->init != NULL; info++) {
	35	if ((cpuid & info->mask) != info->cpuid)
	36	continue;
	37	ret = info->init(pmu);
	38	break;
	39	}
	40
	41	put_cpu();
	42	return ret;
	43	}
	44
	45	static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
	46	{
	47	int cpu, ret;
	48	struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
	49
	50	ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
	51	if (ret)
	52	return ret;
	53
	54	for_each_cpu(cpu, &pmu->supported_cpus)
	55	per_cpu(hw_events->irq, cpu) = irq;
	56
	57	return 0;
	58	}
	59
	60	static bool pmu_has_irq_affinity(struct device_node *node)
	61	{
	62	return !!of_find_property(node, "interrupt-affinity", NULL);
	63	}
	64
	65	static int pmu_parse_irq_affinity(struct device_node *node, int i)
66	{
67	struct device_node *dn;
68	int cpu;
69
70	/*
71	* If we don't have an interrupt-affinity property, we guess irq
72	* affinity matches our logical CPU order, as we used to assume.
73	* This is fragile, so we'll warn in pmu_parse_irqs().
74	*/
75	if (!pmu_has_irq_affinity(node))
76	return i;
77
78	dn = of_parse_phandle(node, "interrupt-affinity", i);
79	if (!dn) {
03630b3b RH	80	pr_warn("failed to parse interrupt-affinity[%d] for %pOFn\n",
03630b3b RH	81	i, node);
18bfcfe5 MR	82	return -EINVAL;
	83	}
	84
66582787 SP	85	cpu = of_cpu_node_to_id(dn);
66582787 SP	86	if (cpu < 0) {
03630b3b	87	pr_warn("failed to find logical CPU for %pOFn\n", dn);
66582787	88	cpu = nr_cpu_ids;
18bfcfe5 MR	89	}
	90
	91	of_node_put(dn);
	92
	93	return cpu;
	94	}
	95
	96	static int pmu_parse_irqs(struct arm_pmu *pmu)
	97	{
	98	int i = 0, num_irqs;
	99	struct platform_device *pdev = pmu->plat_device;
	100	struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
	101
	102	num_irqs = platform_irq_count(pdev);
	103	if (num_irqs < 0) {
	104	pr_err("unable to count PMU IRQs\n");
	105	return num_irqs;
	106	}
	107
	108	/*
	109	* In this case we have no idea which CPUs are covered by the PMU.
	110	* To match our prior behaviour, we assume all CPUs in this case.
	111	*/
	112	if (num_irqs == 0) {
	113	pr_warn("no irqs for PMU, sampling events not supported\n");
	114	pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;
	115	cpumask_setall(&pmu->supported_cpus);
	116	return 0;
	117	}
	118
	119	if (num_irqs == 1) {
	120	int irq = platform_get_irq(pdev, 0);
611479c7	121	if (irq && irq_is_percpu_devid(irq))
18bfcfe5 MR	122	return pmu_parse_percpu_irq(pmu, irq);
	123	}
	124
65bd053f	125	if (nr_cpu_ids != 1 && !pmu_has_irq_affinity(pdev->dev.of_node)) {
5f4216f4 RH	126	pr_warn("no interrupt-affinity property for %pOF, guessing.\n",
5f4216f4 RH	127	pdev->dev.of_node);
18bfcfe5 MR	128	}
18bfcfe5 MR	129
18bfcfe5 MR	130	for (i = 0; i < num_irqs; i++) {
	131	int cpu, irq;
	132
	133	irq = platform_get_irq(pdev, i);
	134	if (WARN_ON(irq <= 0))
	135	continue;
	136
611479c7	137	if (irq_is_percpu_devid(irq)) {
18bfcfe5 MR	138	pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
	139	return -EINVAL;
	140	}
	141
	142	cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
	143	if (cpu < 0)
	144	return cpu;
	145	if (cpu >= nr_cpu_ids)
	146	continue;
	147
	148	if (per_cpu(hw_events->irq, cpu)) {
	149	pr_warn("multiple PMU IRQs for the same CPU detected\n");
	150	return -EINVAL;
	151	}
	152
	153	per_cpu(hw_events->irq, cpu) = irq;
	154	cpumask_set_cpu(cpu, &pmu->supported_cpus);
	155	}
	156
	157	return 0;
	158	}
	159
d3d5aac2 MR	160	static int armpmu_request_irqs(struct arm_pmu *armpmu)
d3d5aac2 MR	161	{
167e6143	162	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
59b62e7a	163	int cpu, err = 0;
d3d5aac2 MR	164
d3d5aac2 MR	165	for_each_cpu(cpu, &armpmu->supported_cpus) {
167e6143 MR	166	int irq = per_cpu(hw_events->irq, cpu);
	167	if (!irq)
	168	continue;
	169
	170	err = armpmu_request_irq(irq, cpu);
d3d5aac2 MR	171	if (err)
	172	break;
	173	}
	174
	175	return err;
	176	}
	177
	178	static void armpmu_free_irqs(struct arm_pmu *armpmu)
	179	{
	180	int cpu;
167e6143	181	struct pmu_hw_events __percpu *hw_events = armpmu->hw_events;
d3d5aac2	182
167e6143 MR	183	for_each_cpu(cpu, &armpmu->supported_cpus) {
	184	int irq = per_cpu(hw_events->irq, cpu);
	185
	186	armpmu_free_irq(irq, cpu);
	187	}
d3d5aac2 MR	188	}
d3d5aac2 MR	189
18bfcfe5 MR	190	int arm_pmu_device_probe(struct platform_device *pdev,
	191	const struct of_device_id *of_table,
	192	const struct pmu_probe_info *probe_table)
	193	{
	194	const struct of_device_id *of_id;
	195	armpmu_init_fn init_fn;
	196	struct device_node *node = pdev->dev.of_node;
	197	struct arm_pmu *pmu;
	198	int ret = -ENODEV;
	199
	200	pmu = armpmu_alloc();
	201	if (!pmu)
	202	return -ENOMEM;
	203
	204	pmu->plat_device = pdev;
	205
	206	ret = pmu_parse_irqs(pmu);
	207	if (ret)
	208	goto out_free;
	209
	210	if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
	211	init_fn = of_id->data;
	212
	213	pmu->secure_access = of_property_read_bool(pdev->dev.of_node,
	214	"secure-reg-access");
	215
	216	/* arm64 systems boot only as non-secure */
	217	if (IS_ENABLED(CONFIG_ARM64) && pmu->secure_access) {
	218	pr_warn("ignoring \"secure-reg-access\" property for arm64\n");
	219	pmu->secure_access = false;
	220	}
	221
	222	ret = init_fn(pmu);
	223	} else if (probe_table) {
	224	cpumask_setall(&pmu->supported_cpus);
	225	ret = probe_current_pmu(pmu, probe_table);
	226	}
	227
	228	if (ret) {
5f4216f4	229	pr_info("%pOF: failed to probe PMU!\n", node);
18bfcfe5 MR	230	goto out_free;
	231	}
	232
	233	ret = armpmu_request_irqs(pmu);
	234	if (ret)
	235	goto out_free_irqs;
	236
	237	ret = armpmu_register(pmu);
	238	if (ret)
	239	goto out_free;
	240
	241	return 0;
	242
	243	out_free_irqs:
	244	armpmu_free_irqs(pmu);
	245	out_free:
5f4216f4	246	pr_info("%pOF: failed to register PMU devices!\n", node);
18bfcfe5 MR	247	armpmu_free(pmu);
	248	return ret;
	249	}