Commit | Line | Data |
---|---|---|
09c434b8 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * Regular cardbus driver ("yenta_socket") | |
4 | * | |
5 | * (C) Copyright 1999, 2000 Linus Torvalds | |
6 | * | |
7 | * Changelog: | |
8 | * Aug 2002: Manfred Spraul <manfred@colorfullife.com> | |
9 | * Dynamically adjust the size of the bridge resource | |
9fea84f4 | 10 | * |
1da177e4 LT |
11 | * May 2003: Dominik Brodowski <linux@brodo.de> |
12 | * Merge pci_socket.c and yenta.c into one file | |
13 | */ | |
14 | #include <linux/init.h> | |
15 | #include <linux/pci.h> | |
1da177e4 LT |
16 | #include <linux/workqueue.h> |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/module.h> | |
9fea84f4 | 20 | #include <linux/io.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1da177e4 | 22 | |
1da177e4 | 23 | #include <pcmcia/ss.h> |
1da177e4 | 24 | |
1da177e4 LT |
25 | #include "yenta_socket.h" |
26 | #include "i82365.h" | |
27 | ||
90ab5ee9 | 28 | static bool disable_clkrun; |
1da177e4 | 29 | module_param(disable_clkrun, bool, 0444); |
95691e3e MS |
30 | MODULE_PARM_DESC(disable_clkrun, |
31 | "If PC card doesn't function properly, please try this option (TI and Ricoh bridges only)"); | |
1da177e4 | 32 | |
90ab5ee9 | 33 | static bool isa_probe = 1; |
fa912bcb DR |
34 | module_param(isa_probe, bool, 0444); |
35 | MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); | |
36 | ||
90ab5ee9 | 37 | static bool pwr_irqs_off; |
fa912bcb DR |
38 | module_param(pwr_irqs_off, bool, 0644); |
39 | MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); | |
40 | ||
35169529 WS |
41 | static char o2_speedup[] = "default"; |
42 | module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444); | |
43 | MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' " | |
44 | "or 'default' (uses recommended behaviour for the detected bridge)"); | |
45 | ||
0d3a940d JK |
46 | /* |
47 | * Only probe "regular" interrupts, don't | |
48 | * touch dangerous spots like the mouse irq, | |
49 | * because there are mice that apparently | |
50 | * get really confused if they get fondled | |
51 | * too intimately. | |
52 | * | |
53 | * Default to 11, 10, 9, 7, 6, 5, 4, 3. | |
54 | */ | |
55 | static u32 isa_interrupts = 0x0ef8; | |
56 | ||
57 | ||
dd797d81 | 58 | #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) |
1da177e4 LT |
59 | |
60 | /* Don't ask.. */ | |
61 | #define to_cycles(ns) ((ns)/120) | |
62 | #define to_ns(cycles) ((cycles)*120) | |
63 | ||
78187865 | 64 | /* |
63e7ebd0 DR |
65 | * yenta PCI irq probing. |
66 | * currently only used in the TI/EnE initialization code | |
67 | */ | |
68 | #ifdef CONFIG_YENTA_TI | |
1da177e4 | 69 | static int yenta_probe_cb_irq(struct yenta_socket *socket); |
0d3a940d JK |
70 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, |
71 | u32 isa_irq_mask); | |
63e7ebd0 | 72 | #endif |
1da177e4 LT |
73 | |
74 | ||
75 | static unsigned int override_bios; | |
76 | module_param(override_bios, uint, 0000); | |
9fea84f4 | 77 | MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation"); |
1da177e4 LT |
78 | |
79 | /* | |
80 | * Generate easy-to-use ways of reading a cardbus sockets | |
81 | * regular memory space ("cb_xxx"), configuration space | |
82 | * ("config_xxx") and compatibility space ("exca_xxxx") | |
83 | */ | |
84 | static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) | |
85 | { | |
86 | u32 val = readl(socket->base + reg); | |
dd797d81 | 87 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 LT |
88 | return val; |
89 | } | |
90 | ||
91 | static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) | |
92 | { | |
dd797d81 | 93 | debug("%04x %08x\n", socket, reg, val); |
1da177e4 | 94 | writel(val, socket->base + reg); |
c8751e4c | 95 | readl(socket->base + reg); /* avoid problems with PCI write posting */ |
1da177e4 LT |
96 | } |
97 | ||
98 | static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) | |
99 | { | |
100 | u8 val; | |
101 | pci_read_config_byte(socket->dev, offset, &val); | |
dd797d81 | 102 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
103 | return val; |
104 | } | |
105 | ||
106 | static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) | |
107 | { | |
108 | u16 val; | |
109 | pci_read_config_word(socket->dev, offset, &val); | |
dd797d81 | 110 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
111 | return val; |
112 | } | |
113 | ||
114 | static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) | |
115 | { | |
116 | u32 val; | |
117 | pci_read_config_dword(socket->dev, offset, &val); | |
dd797d81 | 118 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
119 | return val; |
120 | } | |
121 | ||
122 | static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) | |
123 | { | |
dd797d81 | 124 | debug("%04x %02x\n", socket, offset, val); |
1da177e4 LT |
125 | pci_write_config_byte(socket->dev, offset, val); |
126 | } | |
127 | ||
128 | static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) | |
129 | { | |
dd797d81 | 130 | debug("%04x %04x\n", socket, offset, val); |
1da177e4 LT |
131 | pci_write_config_word(socket->dev, offset, val); |
132 | } | |
133 | ||
134 | static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) | |
135 | { | |
dd797d81 | 136 | debug("%04x %08x\n", socket, offset, val); |
1da177e4 LT |
137 | pci_write_config_dword(socket->dev, offset, val); |
138 | } | |
139 | ||
140 | static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) | |
141 | { | |
142 | u8 val = readb(socket->base + 0x800 + reg); | |
dd797d81 | 143 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 LT |
144 | return val; |
145 | } | |
146 | ||
147 | static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) | |
148 | { | |
149 | u16 val; | |
150 | val = readb(socket->base + 0x800 + reg); | |
151 | val |= readb(socket->base + 0x800 + reg + 1) << 8; | |
dd797d81 | 152 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
153 | return val; |
154 | } | |
155 | ||
156 | static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) | |
157 | { | |
dd797d81 | 158 | debug("%04x %02x\n", socket, reg, val); |
1da177e4 | 159 | writeb(val, socket->base + 0x800 + reg); |
c8751e4c | 160 | readb(socket->base + 0x800 + reg); /* PCI write posting... */ |
1da177e4 LT |
161 | } |
162 | ||
163 | static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) | |
164 | { | |
dd797d81 | 165 | debug("%04x %04x\n", socket, reg, val); |
1da177e4 LT |
166 | writeb(val, socket->base + 0x800 + reg); |
167 | writeb(val >> 8, socket->base + 0x800 + reg + 1); | |
c8751e4c DR |
168 | |
169 | /* PCI write posting... */ | |
170 | readb(socket->base + 0x800 + reg); | |
171 | readb(socket->base + 0x800 + reg + 1); | |
1da177e4 LT |
172 | } |
173 | ||
030ee39c LT |
174 | static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) |
175 | { | |
e2c05675 | 176 | struct yenta_socket *socket = dev_get_drvdata(yentadev); |
030ee39c LT |
177 | int offset = 0, i; |
178 | ||
179 | offset = snprintf(buf, PAGE_SIZE, "CB registers:"); | |
180 | for (i = 0; i < 0x24; i += 4) { | |
181 | unsigned val; | |
182 | if (!(i & 15)) | |
183 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
184 | val = cb_readl(socket, i); | |
185 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); | |
186 | } | |
187 | ||
188 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); | |
189 | for (i = 0; i < 0x45; i++) { | |
190 | unsigned char val; | |
191 | if (!(i & 7)) { | |
192 | if (i & 8) { | |
193 | memcpy(buf + offset, " -", 2); | |
194 | offset += 2; | |
195 | } else | |
196 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); | |
197 | } | |
198 | val = exca_readb(socket, i); | |
199 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); | |
200 | } | |
201 | buf[offset++] = '\n'; | |
202 | return offset; | |
203 | } | |
204 | ||
205 | static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); | |
206 | ||
1da177e4 LT |
207 | /* |
208 | * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend | |
209 | * on what kind of card is inserted.. | |
210 | */ | |
211 | static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) | |
212 | { | |
213 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
214 | unsigned int val; | |
215 | u32 state = cb_readl(socket, CB_SOCKET_STATE); | |
216 | ||
217 | val = (state & CB_3VCARD) ? SS_3VCARD : 0; | |
218 | val |= (state & CB_XVCARD) ? SS_XVCARD : 0; | |
fa912bcb DR |
219 | val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; |
220 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; | |
221 | ||
1da177e4 LT |
222 | |
223 | if (state & CB_CBCARD) { | |
dd797d81 | 224 | val |= SS_CARDBUS; |
1da177e4 LT |
225 | val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; |
226 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; | |
227 | val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; | |
fa912bcb | 228 | } else if (state & CB_16BITCARD) { |
1da177e4 LT |
229 | u8 status = exca_readb(socket, I365_STATUS); |
230 | val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; | |
231 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
232 | val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; | |
233 | } else { | |
234 | val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; | |
235 | val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; | |
236 | } | |
237 | val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; | |
238 | val |= (status & I365_CS_READY) ? SS_READY : 0; | |
239 | val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; | |
240 | } | |
241 | ||
242 | *value = val; | |
243 | return 0; | |
244 | } | |
245 | ||
1da177e4 LT |
246 | static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) |
247 | { | |
ea2f1590 DR |
248 | /* some birdges require to use the ExCA registers to power 16bit cards */ |
249 | if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && | |
250 | (socket->flags & YENTA_16BIT_POWER_EXCA)) { | |
251 | u8 reg, old; | |
252 | reg = old = exca_readb(socket, I365_POWER); | |
253 | reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); | |
254 | ||
255 | /* i82365SL-DF style */ | |
256 | if (socket->flags & YENTA_16BIT_POWER_DF) { | |
257 | switch (state->Vcc) { | |
9fea84f4 DB |
258 | case 33: |
259 | reg |= I365_VCC_3V; | |
260 | break; | |
261 | case 50: | |
262 | reg |= I365_VCC_5V; | |
263 | break; | |
264 | default: | |
265 | reg = 0; | |
266 | break; | |
ea2f1590 DR |
267 | } |
268 | switch (state->Vpp) { | |
269 | case 33: | |
9fea84f4 DB |
270 | case 50: |
271 | reg |= I365_VPP1_5V; | |
272 | break; | |
273 | case 120: | |
274 | reg |= I365_VPP1_12V; | |
275 | break; | |
ea2f1590 DR |
276 | } |
277 | } else { | |
278 | /* i82365SL-B style */ | |
279 | switch (state->Vcc) { | |
9fea84f4 DB |
280 | case 50: |
281 | reg |= I365_VCC_5V; | |
282 | break; | |
283 | default: | |
284 | reg = 0; | |
285 | break; | |
ea2f1590 DR |
286 | } |
287 | switch (state->Vpp) { | |
9fea84f4 DB |
288 | case 50: |
289 | reg |= I365_VPP1_5V | I365_VPP2_5V; | |
290 | break; | |
291 | case 120: | |
292 | reg |= I365_VPP1_12V | I365_VPP2_12V; | |
293 | break; | |
ea2f1590 DR |
294 | } |
295 | } | |
296 | ||
297 | if (reg != old) | |
298 | exca_writeb(socket, I365_POWER, reg); | |
299 | } else { | |
300 | u32 reg = 0; /* CB_SC_STPCLK? */ | |
301 | switch (state->Vcc) { | |
9fea84f4 DB |
302 | case 33: |
303 | reg = CB_SC_VCC_3V; | |
304 | break; | |
305 | case 50: | |
306 | reg = CB_SC_VCC_5V; | |
307 | break; | |
308 | default: | |
309 | reg = 0; | |
310 | break; | |
ea2f1590 DR |
311 | } |
312 | switch (state->Vpp) { | |
9fea84f4 DB |
313 | case 33: |
314 | reg |= CB_SC_VPP_3V; | |
315 | break; | |
316 | case 50: | |
317 | reg |= CB_SC_VPP_5V; | |
318 | break; | |
319 | case 120: | |
320 | reg |= CB_SC_VPP_12V; | |
321 | break; | |
ea2f1590 DR |
322 | } |
323 | if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) | |
324 | cb_writel(socket, CB_SOCKET_CONTROL, reg); | |
1da177e4 | 325 | } |
1da177e4 LT |
326 | } |
327 | ||
328 | static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) | |
329 | { | |
330 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
331 | u16 bridge; | |
332 | ||
d250a481 DR |
333 | /* if powering down: do it immediately */ |
334 | if (state->Vcc == 0) | |
335 | yenta_set_power(socket, state); | |
336 | ||
1da177e4 LT |
337 | socket->io_irq = state->io_irq; |
338 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); | |
339 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { | |
340 | u8 intr; | |
341 | bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; | |
342 | ||
343 | /* ISA interrupt control? */ | |
344 | intr = exca_readb(socket, I365_INTCTL); | |
345 | intr = (intr & ~0xf); | |
ba8819e9 JK |
346 | if (!socket->dev->irq) { |
347 | intr |= socket->cb_irq ? socket->cb_irq : state->io_irq; | |
1da177e4 LT |
348 | bridge |= CB_BRIDGE_INTR; |
349 | } | |
350 | exca_writeb(socket, I365_INTCTL, intr); | |
351 | } else { | |
352 | u8 reg; | |
353 | ||
354 | reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); | |
355 | reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; | |
356 | reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; | |
ba8819e9 | 357 | if (state->io_irq != socket->dev->irq) { |
1da177e4 LT |
358 | reg |= state->io_irq; |
359 | bridge |= CB_BRIDGE_INTR; | |
360 | } | |
361 | exca_writeb(socket, I365_INTCTL, reg); | |
362 | ||
363 | reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); | |
364 | reg |= I365_PWR_NORESET; | |
9fea84f4 DB |
365 | if (state->flags & SS_PWR_AUTO) |
366 | reg |= I365_PWR_AUTO; | |
367 | if (state->flags & SS_OUTPUT_ENA) | |
368 | reg |= I365_PWR_OUT; | |
1da177e4 LT |
369 | if (exca_readb(socket, I365_POWER) != reg) |
370 | exca_writeb(socket, I365_POWER, reg); | |
371 | ||
372 | /* CSC interrupt: no ISA irq for CSC */ | |
28ca8dd7 JK |
373 | reg = exca_readb(socket, I365_CSCINT); |
374 | reg &= I365_CSC_IRQ_MASK; | |
375 | reg |= I365_CSC_DETECT; | |
1da177e4 | 376 | if (state->flags & SS_IOCARD) { |
9fea84f4 DB |
377 | if (state->csc_mask & SS_STSCHG) |
378 | reg |= I365_CSC_STSCHG; | |
1da177e4 | 379 | } else { |
9fea84f4 DB |
380 | if (state->csc_mask & SS_BATDEAD) |
381 | reg |= I365_CSC_BVD1; | |
382 | if (state->csc_mask & SS_BATWARN) | |
383 | reg |= I365_CSC_BVD2; | |
384 | if (state->csc_mask & SS_READY) | |
385 | reg |= I365_CSC_READY; | |
1da177e4 LT |
386 | } |
387 | exca_writeb(socket, I365_CSCINT, reg); | |
388 | exca_readb(socket, I365_CSC); | |
9fea84f4 | 389 | if (sock->zoom_video) |
1da177e4 LT |
390 | sock->zoom_video(sock, state->flags & SS_ZVCARD); |
391 | } | |
392 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); | |
393 | /* Socket event mask: get card insert/remove events.. */ | |
394 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
395 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
d250a481 DR |
396 | |
397 | /* if powering up: do it as the last step when the socket is configured */ | |
398 | if (state->Vcc != 0) | |
399 | yenta_set_power(socket, state); | |
1da177e4 LT |
400 | return 0; |
401 | } | |
402 | ||
403 | static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |
404 | { | |
405 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
406 | int map; | |
407 | unsigned char ioctl, addr, enable; | |
408 | ||
409 | map = io->map; | |
410 | ||
411 | if (map > 1) | |
412 | return -EINVAL; | |
413 | ||
414 | enable = I365_ENA_IO(map); | |
415 | addr = exca_readb(socket, I365_ADDRWIN); | |
416 | ||
417 | /* Disable the window before changing it.. */ | |
418 | if (addr & enable) { | |
419 | addr &= ~enable; | |
420 | exca_writeb(socket, I365_ADDRWIN, addr); | |
421 | } | |
422 | ||
423 | exca_writew(socket, I365_IO(map)+I365_W_START, io->start); | |
424 | exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
425 | ||
426 | ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
9fea84f4 DB |
427 | if (io->flags & MAP_0WS) |
428 | ioctl |= I365_IOCTL_0WS(map); | |
429 | if (io->flags & MAP_16BIT) | |
430 | ioctl |= I365_IOCTL_16BIT(map); | |
431 | if (io->flags & MAP_AUTOSZ) | |
432 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
433 | exca_writeb(socket, I365_IOCTL, ioctl); |
434 | ||
435 | if (io->flags & MAP_ACTIVE) | |
436 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
437 | return 0; | |
438 | } | |
439 | ||
440 | static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) | |
441 | { | |
442 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
443 | struct pci_bus_region region; | |
444 | int map; | |
445 | unsigned char addr, enable; | |
446 | unsigned int start, stop, card_start; | |
447 | unsigned short word; | |
448 | ||
fc279850 | 449 | pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res); |
1da177e4 LT |
450 | |
451 | map = mem->map; | |
452 | start = region.start; | |
453 | stop = region.end; | |
454 | card_start = mem->card_start; | |
455 | ||
456 | if (map > 4 || start > stop || ((start ^ stop) >> 24) || | |
457 | (card_start >> 26) || mem->speed > 1000) | |
458 | return -EINVAL; | |
459 | ||
460 | enable = I365_ENA_MEM(map); | |
461 | addr = exca_readb(socket, I365_ADDRWIN); | |
462 | if (addr & enable) { | |
463 | addr &= ~enable; | |
464 | exca_writeb(socket, I365_ADDRWIN, addr); | |
465 | } | |
466 | ||
467 | exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); | |
468 | ||
469 | word = (start >> 12) & 0x0fff; | |
470 | if (mem->flags & MAP_16BIT) | |
471 | word |= I365_MEM_16BIT; | |
472 | if (mem->flags & MAP_0WS) | |
473 | word |= I365_MEM_0WS; | |
474 | exca_writew(socket, I365_MEM(map) + I365_W_START, word); | |
475 | ||
476 | word = (stop >> 12) & 0x0fff; | |
477 | switch (to_cycles(mem->speed)) { | |
9fea84f4 DB |
478 | case 0: |
479 | break; | |
480 | case 1: | |
481 | word |= I365_MEM_WS0; | |
482 | break; | |
483 | case 2: | |
484 | word |= I365_MEM_WS1; | |
485 | break; | |
486 | default: | |
487 | word |= I365_MEM_WS1 | I365_MEM_WS0; | |
488 | break; | |
1da177e4 LT |
489 | } |
490 | exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); | |
491 | ||
492 | word = ((card_start - start) >> 12) & 0x3fff; | |
493 | if (mem->flags & MAP_WRPROT) | |
494 | word |= I365_MEM_WRPROT; | |
495 | if (mem->flags & MAP_ATTRIB) | |
496 | word |= I365_MEM_REG; | |
497 | exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); | |
498 | ||
499 | if (mem->flags & MAP_ACTIVE) | |
500 | exca_writeb(socket, I365_ADDRWIN, addr | enable); | |
501 | return 0; | |
502 | } | |
503 | ||
504 | ||
fa912bcb | 505 | |
7d12e780 | 506 | static irqreturn_t yenta_interrupt(int irq, void *dev_id) |
1da177e4 | 507 | { |
fa912bcb DR |
508 | unsigned int events; |
509 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
1da177e4 LT |
510 | u8 csc; |
511 | u32 cb_event; | |
1da177e4 LT |
512 | |
513 | /* Clear interrupt status for the event */ | |
514 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
515 | cb_writel(socket, CB_SOCKET_EVENT, cb_event); | |
516 | ||
517 | csc = exca_readb(socket, I365_CSC); | |
518 | ||
e4115805 DR |
519 | if (!(cb_event || csc)) |
520 | return IRQ_NONE; | |
521 | ||
1da177e4 LT |
522 | events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; |
523 | events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; | |
524 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
525 | events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; | |
526 | } else { | |
527 | events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; | |
528 | events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; | |
529 | events |= (csc & I365_CSC_READY) ? SS_READY : 0; | |
530 | } | |
1da177e4 | 531 | |
fa912bcb | 532 | if (events) |
1da177e4 | 533 | pcmcia_parse_events(&socket->socket, events); |
fa912bcb | 534 | |
e4115805 | 535 | return IRQ_HANDLED; |
1da177e4 LT |
536 | } |
537 | ||
41760d0e | 538 | static void yenta_interrupt_wrapper(struct timer_list *t) |
1da177e4 | 539 | { |
41760d0e | 540 | struct yenta_socket *socket = from_timer(socket, t, poll_timer); |
1da177e4 | 541 | |
7d12e780 | 542 | yenta_interrupt(0, (void *)socket); |
1da177e4 LT |
543 | socket->poll_timer.expires = jiffies + HZ; |
544 | add_timer(&socket->poll_timer); | |
545 | } | |
546 | ||
547 | static void yenta_clear_maps(struct yenta_socket *socket) | |
548 | { | |
549 | int i; | |
550 | struct resource res = { .start = 0, .end = 0x0fff }; | |
551 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
552 | pccard_mem_map mem = { .res = &res, }; | |
553 | ||
554 | yenta_set_socket(&socket->socket, &dead_socket); | |
555 | for (i = 0; i < 2; i++) { | |
556 | io.map = i; | |
557 | yenta_set_io_map(&socket->socket, &io); | |
558 | } | |
559 | for (i = 0; i < 5; i++) { | |
560 | mem.map = i; | |
561 | yenta_set_mem_map(&socket->socket, &mem); | |
562 | } | |
563 | } | |
564 | ||
fa912bcb DR |
565 | /* redoes voltage interrogation if required */ |
566 | static void yenta_interrogate(struct yenta_socket *socket) | |
567 | { | |
568 | u32 state; | |
569 | ||
570 | state = cb_readl(socket, CB_SOCKET_STATE); | |
571 | if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || | |
572 | (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || | |
573 | ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) | |
574 | cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); | |
575 | } | |
576 | ||
1da177e4 LT |
577 | /* Called at resume and initialization events */ |
578 | static int yenta_sock_init(struct pcmcia_socket *sock) | |
579 | { | |
580 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
1da177e4 LT |
581 | |
582 | exca_writeb(socket, I365_GBLCTL, 0x00); | |
583 | exca_writeb(socket, I365_GENCTL, 0x00); | |
584 | ||
585 | /* Redo card voltage interrogation */ | |
fa912bcb | 586 | yenta_interrogate(socket); |
1da177e4 LT |
587 | |
588 | yenta_clear_maps(socket); | |
589 | ||
590 | if (socket->type && socket->type->sock_init) | |
591 | socket->type->sock_init(socket); | |
592 | ||
593 | /* Re-enable CSC interrupts */ | |
594 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); | |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
599 | static int yenta_sock_suspend(struct pcmcia_socket *sock) | |
600 | { | |
601 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); | |
602 | ||
603 | /* Disable CSC interrupts */ | |
604 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | /* | |
610 | * Use an adaptive allocation for the memory resource, | |
611 | * sometimes the memory behind pci bridges is limited: | |
612 | * 1/8 of the size of the io window of the parent. | |
eb0a90b4 DB |
613 | * max 4 MB, min 16 kB. We try very hard to not get below |
614 | * the "ACC" values, though. | |
1da177e4 | 615 | */ |
9fea84f4 DB |
616 | #define BRIDGE_MEM_MAX (4*1024*1024) |
617 | #define BRIDGE_MEM_ACC (128*1024) | |
618 | #define BRIDGE_MEM_MIN (16*1024) | |
1da177e4 | 619 | |
eb0a90b4 DB |
620 | #define BRIDGE_IO_MAX 512 |
621 | #define BRIDGE_IO_ACC 256 | |
1da177e4 LT |
622 | #define BRIDGE_IO_MIN 32 |
623 | ||
624 | #ifndef PCIBIOS_MIN_CARDBUS_IO | |
625 | #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO | |
626 | #endif | |
627 | ||
eb0a90b4 DB |
628 | static int yenta_search_one_res(struct resource *root, struct resource *res, |
629 | u32 min) | |
630 | { | |
631 | u32 align, size, start, end; | |
632 | ||
633 | if (res->flags & IORESOURCE_IO) { | |
634 | align = 1024; | |
635 | size = BRIDGE_IO_MAX; | |
636 | start = PCIBIOS_MIN_CARDBUS_IO; | |
637 | end = ~0U; | |
638 | } else { | |
639 | unsigned long avail = root->end - root->start; | |
640 | int i; | |
641 | size = BRIDGE_MEM_MAX; | |
642 | if (size > avail/8) { | |
9fea84f4 | 643 | size = (avail+1)/8; |
eb0a90b4 DB |
644 | /* round size down to next power of 2 */ |
645 | i = 0; | |
646 | while ((size /= 2) != 0) | |
647 | i++; | |
648 | size = 1 << i; | |
649 | } | |
650 | if (size < min) | |
651 | size = min; | |
652 | align = size; | |
653 | start = PCIBIOS_MIN_MEM; | |
654 | end = ~0U; | |
655 | } | |
656 | ||
657 | do { | |
658 | if (allocate_resource(root, res, size, start, end, align, | |
9fea84f4 | 659 | NULL, NULL) == 0) { |
eb0a90b4 DB |
660 | return 1; |
661 | } | |
662 | size = size/2; | |
663 | align = size; | |
664 | } while (size >= min); | |
665 | ||
666 | return 0; | |
667 | } | |
668 | ||
669 | ||
670 | static int yenta_search_res(struct yenta_socket *socket, struct resource *res, | |
671 | u32 min) | |
672 | { | |
89a74ecc | 673 | struct resource *root; |
eb0a90b4 | 674 | int i; |
89a74ecc BH |
675 | |
676 | pci_bus_for_each_resource(socket->dev->bus, root, i) { | |
eb0a90b4 DB |
677 | if (!root) |
678 | continue; | |
679 | ||
680 | if ((res->flags ^ root->flags) & | |
681 | (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) | |
682 | continue; /* Wrong type */ | |
683 | ||
684 | if (yenta_search_one_res(root, res, min)) | |
685 | return 1; | |
686 | } | |
687 | return 0; | |
688 | } | |
689 | ||
b3743fa4 | 690 | static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) |
1da177e4 | 691 | { |
852710d9 MW |
692 | struct pci_dev *dev = socket->dev; |
693 | struct resource *res; | |
43c34735 | 694 | struct pci_bus_region region; |
1da177e4 LT |
695 | unsigned mask; |
696 | ||
852710d9 | 697 | res = dev->resource + PCI_BRIDGE_RESOURCES + nr; |
7925407a IK |
698 | /* Already allocated? */ |
699 | if (res->parent) | |
b3743fa4 | 700 | return 0; |
7925407a | 701 | |
1da177e4 LT |
702 | /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ |
703 | mask = ~0xfff; | |
704 | if (type & IORESOURCE_IO) | |
705 | mask = ~3; | |
706 | ||
852710d9 | 707 | res->name = dev->subordinate->name; |
1da177e4 | 708 | res->flags = type; |
1da177e4 | 709 | |
43c34735 DB |
710 | region.start = config_readl(socket, addr_start) & mask; |
711 | region.end = config_readl(socket, addr_end) | ~mask; | |
712 | if (region.start && region.end > region.start && !override_bios) { | |
fc279850 | 713 | pcibios_bus_to_resource(dev->bus, res, ®ion); |
852710d9 | 714 | if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0) |
b3743fa4 | 715 | return 0; |
f2e6cf76 JP |
716 | dev_info(&dev->dev, |
717 | "Preassigned resource %d busy or not available, reconfiguring...\n", | |
718 | nr); | |
1da177e4 LT |
719 | } |
720 | ||
721 | if (type & IORESOURCE_IO) { | |
eb0a90b4 DB |
722 | if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || |
723 | (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || | |
b3743fa4 DB |
724 | (yenta_search_res(socket, res, BRIDGE_IO_MIN))) |
725 | return 1; | |
1da177e4 | 726 | } else { |
eb0a90b4 DB |
727 | if (type & IORESOURCE_PREFETCH) { |
728 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || | |
729 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
730 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
731 | return 1; | |
eb0a90b4 DB |
732 | /* Approximating prefetchable by non-prefetchable */ |
733 | res->flags = IORESOURCE_MEM; | |
1da177e4 | 734 | } |
eb0a90b4 DB |
735 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || |
736 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || | |
b3743fa4 DB |
737 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
738 | return 1; | |
eb0a90b4 DB |
739 | } |
740 | ||
f2e6cf76 JP |
741 | dev_info(&dev->dev, |
742 | "no resource of type %x available, trying to continue...\n", | |
743 | type); | |
eb0a90b4 | 744 | res->start = res->end = res->flags = 0; |
b3743fa4 | 745 | return 0; |
1da177e4 LT |
746 | } |
747 | ||
748 | /* | |
749 | * Allocate the bridge mappings for the device.. | |
750 | */ | |
751 | static void yenta_allocate_resources(struct yenta_socket *socket) | |
752 | { | |
b3743fa4 DB |
753 | int program = 0; |
754 | program += yenta_allocate_res(socket, 0, IORESOURCE_IO, | |
27879835 | 755 | PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); |
b3743fa4 | 756 | program += yenta_allocate_res(socket, 1, IORESOURCE_IO, |
27879835 | 757 | PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); |
b3743fa4 | 758 | program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, |
27879835 | 759 | PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); |
b3743fa4 | 760 | program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, |
27879835 | 761 | PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); |
b3743fa4 DB |
762 | if (program) |
763 | pci_setup_cardbus(socket->dev->subordinate); | |
1da177e4 LT |
764 | } |
765 | ||
766 | ||
767 | /* | |
768 | * Free the bridge mappings for the device.. | |
769 | */ | |
770 | static void yenta_free_resources(struct yenta_socket *socket) | |
771 | { | |
772 | int i; | |
9fea84f4 | 773 | for (i = 0; i < 4; i++) { |
1da177e4 LT |
774 | struct resource *res; |
775 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; | |
776 | if (res->start != 0 && res->end != 0) | |
777 | release_resource(res); | |
b3743fa4 | 778 | res->start = res->end = res->flags = 0; |
1da177e4 LT |
779 | } |
780 | } | |
781 | ||
782 | ||
783 | /* | |
784 | * Close it down - release our resources and go home.. | |
785 | */ | |
e765a02c | 786 | static void yenta_close(struct pci_dev *dev) |
1da177e4 LT |
787 | { |
788 | struct yenta_socket *sock = pci_get_drvdata(dev); | |
789 | ||
030ee39c LT |
790 | /* Remove the register attributes */ |
791 | device_remove_file(&dev->dev, &dev_attr_yenta_registers); | |
792 | ||
1da177e4 LT |
793 | /* we don't want a dying socket registered */ |
794 | pcmcia_unregister_socket(&sock->socket); | |
9fea84f4 | 795 | |
1da177e4 LT |
796 | /* Disable all events so we don't die in an IRQ storm */ |
797 | cb_writel(sock, CB_SOCKET_MASK, 0x0); | |
798 | exca_writeb(sock, I365_CSCINT, 0); | |
799 | ||
800 | if (sock->cb_irq) | |
801 | free_irq(sock->cb_irq, sock); | |
802 | else | |
803 | del_timer_sync(&sock->poll_timer); | |
804 | ||
d19319af | 805 | iounmap(sock->base); |
1da177e4 LT |
806 | yenta_free_resources(sock); |
807 | ||
808 | pci_release_regions(dev); | |
809 | pci_disable_device(dev); | |
810 | pci_set_drvdata(dev, NULL); | |
d19319af | 811 | kfree(sock); |
1da177e4 LT |
812 | } |
813 | ||
814 | ||
815 | static struct pccard_operations yenta_socket_operations = { | |
816 | .init = yenta_sock_init, | |
817 | .suspend = yenta_sock_suspend, | |
818 | .get_status = yenta_get_status, | |
1da177e4 LT |
819 | .set_socket = yenta_set_socket, |
820 | .set_io_map = yenta_set_io_map, | |
821 | .set_mem_map = yenta_set_mem_map, | |
822 | }; | |
823 | ||
824 | ||
63e7ebd0 | 825 | #ifdef CONFIG_YENTA_TI |
1da177e4 | 826 | #include "ti113x.h" |
63e7ebd0 DR |
827 | #endif |
828 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 | 829 | #include "ricoh.h" |
63e7ebd0 DR |
830 | #endif |
831 | #ifdef CONFIG_YENTA_TOSHIBA | |
1da177e4 | 832 | #include "topic.h" |
63e7ebd0 DR |
833 | #endif |
834 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 | 835 | #include "o2micro.h" |
63e7ebd0 | 836 | #endif |
1da177e4 LT |
837 | |
838 | enum { | |
839 | CARDBUS_TYPE_DEFAULT = -1, | |
840 | CARDBUS_TYPE_TI, | |
841 | CARDBUS_TYPE_TI113X, | |
842 | CARDBUS_TYPE_TI12XX, | |
843 | CARDBUS_TYPE_TI1250, | |
844 | CARDBUS_TYPE_RICOH, | |
ea2f1590 | 845 | CARDBUS_TYPE_TOPIC95, |
1da177e4 LT |
846 | CARDBUS_TYPE_TOPIC97, |
847 | CARDBUS_TYPE_O2MICRO, | |
8c3520d4 | 848 | CARDBUS_TYPE_ENE, |
1da177e4 LT |
849 | }; |
850 | ||
851 | /* | |
852 | * Different cardbus controllers have slightly different | |
853 | * initialization sequences etc details. List them here.. | |
854 | */ | |
855 | static struct cardbus_type cardbus_type[] = { | |
63e7ebd0 | 856 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
857 | [CARDBUS_TYPE_TI] = { |
858 | .override = ti_override, | |
859 | .save_state = ti_save_state, | |
860 | .restore_state = ti_restore_state, | |
861 | .sock_init = ti_init, | |
862 | }, | |
863 | [CARDBUS_TYPE_TI113X] = { | |
864 | .override = ti113x_override, | |
865 | .save_state = ti_save_state, | |
866 | .restore_state = ti_restore_state, | |
867 | .sock_init = ti_init, | |
868 | }, | |
869 | [CARDBUS_TYPE_TI12XX] = { | |
870 | .override = ti12xx_override, | |
871 | .save_state = ti_save_state, | |
872 | .restore_state = ti_restore_state, | |
873 | .sock_init = ti_init, | |
874 | }, | |
875 | [CARDBUS_TYPE_TI1250] = { | |
876 | .override = ti1250_override, | |
877 | .save_state = ti_save_state, | |
878 | .restore_state = ti_restore_state, | |
879 | .sock_init = ti_init, | |
880 | }, | |
4f2d364b JM |
881 | [CARDBUS_TYPE_ENE] = { |
882 | .override = ene_override, | |
883 | .save_state = ti_save_state, | |
884 | .restore_state = ti_restore_state, | |
885 | .sock_init = ti_init, | |
886 | }, | |
63e7ebd0 DR |
887 | #endif |
888 | #ifdef CONFIG_YENTA_RICOH | |
1da177e4 LT |
889 | [CARDBUS_TYPE_RICOH] = { |
890 | .override = ricoh_override, | |
891 | .save_state = ricoh_save_state, | |
892 | .restore_state = ricoh_restore_state, | |
893 | }, | |
63e7ebd0 DR |
894 | #endif |
895 | #ifdef CONFIG_YENTA_TOSHIBA | |
ea2f1590 DR |
896 | [CARDBUS_TYPE_TOPIC95] = { |
897 | .override = topic95_override, | |
898 | }, | |
1da177e4 LT |
899 | [CARDBUS_TYPE_TOPIC97] = { |
900 | .override = topic97_override, | |
901 | }, | |
63e7ebd0 DR |
902 | #endif |
903 | #ifdef CONFIG_YENTA_O2 | |
1da177e4 LT |
904 | [CARDBUS_TYPE_O2MICRO] = { |
905 | .override = o2micro_override, | |
906 | .restore_state = o2micro_restore_state, | |
907 | }, | |
63e7ebd0 | 908 | #endif |
1da177e4 LT |
909 | }; |
910 | ||
911 | ||
1da177e4 LT |
912 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) |
913 | { | |
914 | int i; | |
915 | unsigned long val; | |
1da177e4 | 916 | u32 mask; |
28ca8dd7 | 917 | u8 reg; |
1da177e4 | 918 | |
1da177e4 LT |
919 | /* |
920 | * Probe for usable interrupts using the force | |
921 | * register to generate bogus card status events. | |
922 | */ | |
923 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
924 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
28ca8dd7 | 925 | reg = exca_readb(socket, I365_CSCINT); |
1da177e4 LT |
926 | exca_writeb(socket, I365_CSCINT, 0); |
927 | val = probe_irq_on() & isa_irq_mask; | |
928 | for (i = 1; i < 16; i++) { | |
929 | if (!((val >> i) & 1)) | |
930 | continue; | |
931 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); | |
932 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
933 | udelay(100); | |
934 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
935 | } | |
936 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
28ca8dd7 | 937 | exca_writeb(socket, I365_CSCINT, reg); |
1da177e4 LT |
938 | |
939 | mask = probe_irq_mask(val) & 0xffff; | |
940 | ||
1da177e4 LT |
941 | return mask; |
942 | } | |
943 | ||
944 | ||
78187865 | 945 | /* |
63e7ebd0 DR |
946 | * yenta PCI irq probing. |
947 | * currently only used in the TI/EnE initialization code | |
948 | */ | |
949 | #ifdef CONFIG_YENTA_TI | |
950 | ||
1da177e4 | 951 | /* interrupt handler, only used during probing */ |
7d12e780 | 952 | static irqreturn_t yenta_probe_handler(int irq, void *dev_id) |
1da177e4 LT |
953 | { |
954 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; | |
955 | u8 csc; | |
9fea84f4 | 956 | u32 cb_event; |
1da177e4 LT |
957 | |
958 | /* Clear interrupt status for the event */ | |
959 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); | |
960 | cb_writel(socket, CB_SOCKET_EVENT, -1); | |
961 | csc = exca_readb(socket, I365_CSC); | |
962 | ||
963 | if (cb_event || csc) { | |
964 | socket->probe_status = 1; | |
965 | return IRQ_HANDLED; | |
966 | } | |
967 | ||
968 | return IRQ_NONE; | |
969 | } | |
970 | ||
971 | /* probes the PCI interrupt, use only on override functions */ | |
972 | static int yenta_probe_cb_irq(struct yenta_socket *socket) | |
973 | { | |
02caa56e | 974 | u8 reg = 0; |
28ca8dd7 | 975 | |
1da177e4 LT |
976 | if (!socket->cb_irq) |
977 | return -1; | |
978 | ||
979 | socket->probe_status = 0; | |
980 | ||
dace1453 | 981 | if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) { |
f2e6cf76 JP |
982 | dev_warn(&socket->dev->dev, |
983 | "request_irq() in yenta_probe_cb_irq() failed!\n"); | |
1da177e4 LT |
984 | return -1; |
985 | } | |
986 | ||
987 | /* generate interrupt, wait */ | |
02caa56e DB |
988 | if (!socket->dev->irq) |
989 | reg = exca_readb(socket, I365_CSCINT); | |
28ca8dd7 | 990 | exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG); |
1da177e4 LT |
991 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
992 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); | |
993 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); | |
a413c090 | 994 | |
1da177e4 LT |
995 | msleep(100); |
996 | ||
997 | /* disable interrupts */ | |
998 | cb_writel(socket, CB_SOCKET_MASK, 0); | |
28ca8dd7 | 999 | exca_writeb(socket, I365_CSCINT, reg); |
1da177e4 LT |
1000 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
1001 | exca_readb(socket, I365_CSC); | |
1002 | ||
1003 | free_irq(socket->cb_irq, socket); | |
1004 | ||
1005 | return (int) socket->probe_status; | |
1006 | } | |
1007 | ||
63e7ebd0 | 1008 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 LT |
1009 | |
1010 | ||
1011 | /* | |
1012 | * Set static data that doesn't need re-initializing.. | |
1013 | */ | |
1014 | static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) | |
1015 | { | |
1da177e4 | 1016 | socket->socket.pci_irq = socket->cb_irq; |
fa912bcb DR |
1017 | if (isa_probe) |
1018 | socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); | |
1019 | else | |
1020 | socket->socket.irq_mask = 0; | |
1da177e4 | 1021 | |
f2e6cf76 JP |
1022 | dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n", |
1023 | socket->socket.irq_mask, socket->cb_irq); | |
1da177e4 LT |
1024 | } |
1025 | ||
1026 | /* | |
1027 | * Initialize the standard cardbus registers | |
1028 | */ | |
1029 | static void yenta_config_init(struct yenta_socket *socket) | |
1030 | { | |
1031 | u16 bridge; | |
1032 | struct pci_dev *dev = socket->dev; | |
8e5d17eb | 1033 | struct pci_bus_region region; |
1da177e4 | 1034 | |
fc279850 | 1035 | pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]); |
1da177e4 LT |
1036 | |
1037 | config_writel(socket, CB_LEGACY_MODE_BASE, 0); | |
8e5d17eb | 1038 | config_writel(socket, PCI_BASE_ADDRESS_0, region.start); |
1da177e4 LT |
1039 | config_writew(socket, PCI_COMMAND, |
1040 | PCI_COMMAND_IO | | |
1041 | PCI_COMMAND_MEMORY | | |
1042 | PCI_COMMAND_MASTER | | |
1043 | PCI_COMMAND_WAIT); | |
1044 | ||
1045 | /* MAGIC NUMBERS! Fixme */ | |
1046 | config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); | |
1047 | config_writeb(socket, PCI_LATENCY_TIMER, 168); | |
1048 | config_writel(socket, PCI_PRIMARY_BUS, | |
1049 | (176 << 24) | /* sec. latency timer */ | |
b918c62e YL |
1050 | ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */ |
1051 | ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */ | |
1da177e4 LT |
1052 | dev->subordinate->primary); /* primary bus */ |
1053 | ||
1054 | /* | |
1055 | * Set up the bridging state: | |
1056 | * - enable write posting. | |
1057 | * - memory window 0 prefetchable, window 1 non-prefetchable | |
1058 | * - PCI interrupts enabled if a PCI interrupt exists.. | |
1059 | */ | |
1060 | bridge = config_readw(socket, CB_BRIDGE_CONTROL); | |
a413c090 DR |
1061 | bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); |
1062 | bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; | |
1da177e4 LT |
1063 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); |
1064 | } | |
1065 | ||
b435261b | 1066 | /** |
66005216 | 1067 | * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge |
b435261b BK |
1068 | * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to |
1069 | * | |
1070 | * Checks if devices on the bus which the CardBus bridge bridges to would be | |
1071 | * invisible during PCI scans because of a misconfigured subordinate number | |
1072 | * of the parent brige - some BIOSes seem to be too lazy to set it right. | |
1073 | * Does the fixup carefully by checking how far it can go without conflicts. | |
631dd1a8 | 1074 | * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information. |
b435261b BK |
1075 | */ |
1076 | static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) | |
1077 | { | |
560698e9 | 1078 | struct pci_bus *sibling; |
b435261b | 1079 | unsigned char upper_limit; |
9fea84f4 | 1080 | /* |
b435261b BK |
1081 | * We only check and fix the parent bridge: All systems which need |
1082 | * this fixup that have been reviewed are laptops and the only bridge | |
1083 | * which needed fixing was the parent bridge of the CardBus bridge: | |
1084 | */ | |
1085 | struct pci_bus *bridge_to_fix = cardbus_bridge->parent; | |
1086 | ||
1087 | /* Check bus numbers are already set up correctly: */ | |
b918c62e | 1088 | if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end) |
b435261b BK |
1089 | return; /* The subordinate number is ok, nothing to do */ |
1090 | ||
1091 | if (!bridge_to_fix->parent) | |
1092 | return; /* Root bridges are ok */ | |
1093 | ||
1094 | /* stay within the limits of the bus range of the parent: */ | |
b918c62e | 1095 | upper_limit = bridge_to_fix->parent->busn_res.end; |
b435261b | 1096 | |
560698e9 YW |
1097 | /* check the bus ranges of all sibling bridges to prevent overlap */ |
1098 | list_for_each_entry(sibling, &bridge_to_fix->parent->children, | |
1099 | node) { | |
b435261b | 1100 | /* |
560698e9 | 1101 | * If the sibling has a higher secondary bus number |
b435261b BK |
1102 | * and it's secondary is equal or smaller than our |
1103 | * current upper limit, set the new upper limit to | |
560698e9 | 1104 | * the bus number below the sibling's range: |
b435261b | 1105 | */ |
560698e9 YW |
1106 | if (sibling->busn_res.start > bridge_to_fix->busn_res.end |
1107 | && sibling->busn_res.start <= upper_limit) | |
1108 | upper_limit = sibling->busn_res.start - 1; | |
b435261b BK |
1109 | } |
1110 | ||
1111 | /* Show that the wanted subordinate number is not possible: */ | |
b918c62e | 1112 | if (cardbus_bridge->busn_res.end > upper_limit) |
f2e6cf76 JP |
1113 | dev_warn(&cardbus_bridge->dev, |
1114 | "Upper limit for fixing this bridge's parent bridge: #%02x\n", | |
1115 | upper_limit); | |
b435261b BK |
1116 | |
1117 | /* If we have room to increase the bridge's subordinate number, */ | |
b918c62e | 1118 | if (bridge_to_fix->busn_res.end < upper_limit) { |
b435261b BK |
1119 | |
1120 | /* use the highest number of the hidden bus, within limits */ | |
1121 | unsigned char subordinate_to_assign = | |
b918c62e | 1122 | min_t(int, cardbus_bridge->busn_res.end, upper_limit); |
b435261b | 1123 | |
f2e6cf76 JP |
1124 | dev_info(&bridge_to_fix->dev, |
1125 | "Raising subordinate bus# of parent bus (#%02x) from #%02x to #%02x\n", | |
1126 | bridge_to_fix->number, | |
1127 | (int)bridge_to_fix->busn_res.end, | |
1128 | subordinate_to_assign); | |
b435261b BK |
1129 | |
1130 | /* Save the new subordinate in the bus struct of the bridge */ | |
b918c62e | 1131 | bridge_to_fix->busn_res.end = subordinate_to_assign; |
b435261b BK |
1132 | |
1133 | /* and update the PCI config space with the new subordinate */ | |
1134 | pci_write_config_byte(bridge_to_fix->self, | |
b918c62e | 1135 | PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end); |
b435261b BK |
1136 | } |
1137 | } | |
1138 | ||
1da177e4 LT |
1139 | /* |
1140 | * Initialize a cardbus controller. Make sure we have a usable | |
1141 | * interrupt, and that we can map the cardbus area. Fill in the | |
1142 | * socket information structure.. | |
1143 | */ | |
34cdf25a | 1144 | static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
1145 | { |
1146 | struct yenta_socket *socket; | |
1147 | int ret; | |
c7fb0b35 IK |
1148 | |
1149 | /* | |
1150 | * If we failed to assign proper bus numbers for this cardbus | |
1151 | * controller during PCI probe, its subordinate pci_bus is NULL. | |
1152 | * Bail out if so. | |
1153 | */ | |
1154 | if (!dev->subordinate) { | |
f2e6cf76 | 1155 | dev_err(&dev->dev, "no bus associated! (try 'pci=assign-busses')\n"); |
c7fb0b35 IK |
1156 | return -ENODEV; |
1157 | } | |
1158 | ||
8084b372 | 1159 | socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL); |
1da177e4 LT |
1160 | if (!socket) |
1161 | return -ENOMEM; | |
1da177e4 LT |
1162 | |
1163 | /* prepare pcmcia_socket */ | |
1164 | socket->socket.ops = ¥ta_socket_operations; | |
1165 | socket->socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 1166 | socket->socket.dev.parent = &dev->dev; |
1da177e4 LT |
1167 | socket->socket.driver_data = socket; |
1168 | socket->socket.owner = THIS_MODULE; | |
5bc6b68a RK |
1169 | socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1170 | socket->socket.map_size = 0x1000; | |
1171 | socket->socket.cb_dev = dev; | |
1da177e4 LT |
1172 | |
1173 | /* prepare struct yenta_socket */ | |
1174 | socket->dev = dev; | |
1175 | pci_set_drvdata(dev, socket); | |
1176 | ||
1177 | /* | |
1178 | * Do some basic sanity checking.. | |
1179 | */ | |
1180 | if (pci_enable_device(dev)) { | |
1181 | ret = -EBUSY; | |
1182 | goto free; | |
1183 | } | |
1184 | ||
1185 | ret = pci_request_regions(dev, "yenta_socket"); | |
1186 | if (ret) | |
1187 | goto disable; | |
1188 | ||
1189 | if (!pci_resource_start(dev, 0)) { | |
f2e6cf76 | 1190 | dev_err(&dev->dev, "No cardbus resource!\n"); |
1da177e4 LT |
1191 | ret = -ENODEV; |
1192 | goto release; | |
1193 | } | |
1194 | ||
1195 | /* | |
1196 | * Ok, start setup.. Map the cardbus registers, | |
1197 | * and request the IRQ. | |
1198 | */ | |
1199 | socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); | |
1200 | if (!socket->base) { | |
1201 | ret = -ENOMEM; | |
1202 | goto release; | |
1203 | } | |
1204 | ||
1205 | /* | |
1206 | * report the subsystem vendor and device for help debugging | |
1207 | * the irq stuff... | |
1208 | */ | |
f2e6cf76 JP |
1209 | dev_info(&dev->dev, "CardBus bridge found [%04x:%04x]\n", |
1210 | dev->subsystem_vendor, dev->subsystem_device); | |
1da177e4 LT |
1211 | |
1212 | yenta_config_init(socket); | |
1213 | ||
1214 | /* Disable all events */ | |
1215 | cb_writel(socket, CB_SOCKET_MASK, 0x0); | |
1216 | ||
1217 | /* Set up the bridge regions.. */ | |
1218 | yenta_allocate_resources(socket); | |
1219 | ||
1220 | socket->cb_irq = dev->irq; | |
1221 | ||
1222 | /* Do we have special options for the device? */ | |
1223 | if (id->driver_data != CARDBUS_TYPE_DEFAULT && | |
1224 | id->driver_data < ARRAY_SIZE(cardbus_type)) { | |
1225 | socket->type = &cardbus_type[id->driver_data]; | |
1226 | ||
1227 | ret = socket->type->override(socket); | |
1228 | if (ret < 0) | |
1229 | goto unmap; | |
1230 | } | |
1231 | ||
1232 | /* We must finish initialization here */ | |
1233 | ||
dace1453 | 1234 | if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) { |
1da177e4 LT |
1235 | /* No IRQ or request_irq failed. Poll */ |
1236 | socket->cb_irq = 0; /* But zero is a valid IRQ number. */ | |
41760d0e | 1237 | timer_setup(&socket->poll_timer, yenta_interrupt_wrapper, 0); |
03b225b1 | 1238 | mod_timer(&socket->poll_timer, jiffies + HZ); |
f2e6cf76 JP |
1239 | dev_info(&dev->dev, |
1240 | "no PCI IRQ, CardBus support disabled for this socket.\n"); | |
1241 | dev_info(&dev->dev, | |
1242 | "check your BIOS CardBus, BIOS IRQ or ACPI settings.\n"); | |
5bc6b68a RK |
1243 | } else { |
1244 | socket->socket.features |= SS_CAP_CARDBUS; | |
1da177e4 LT |
1245 | } |
1246 | ||
1247 | /* Figure out what the dang thing can do for the PCMCIA layer... */ | |
fa912bcb | 1248 | yenta_interrogate(socket); |
1da177e4 | 1249 | yenta_get_socket_capabilities(socket, isa_interrupts); |
f2e6cf76 JP |
1250 | dev_info(&dev->dev, "Socket status: %08x\n", |
1251 | cb_readl(socket, CB_SOCKET_STATE)); | |
1da177e4 | 1252 | |
b435261b BK |
1253 | yenta_fixup_parent_bridge(dev->subordinate); |
1254 | ||
1da177e4 LT |
1255 | /* Register it with the pcmcia layer.. */ |
1256 | ret = pcmcia_register_socket(&socket->socket); | |
d19319af TY |
1257 | if (ret) |
1258 | goto free_irq; | |
1259 | ||
1260 | /* Add the yenta register attributes */ | |
1261 | ret = device_create_file(&dev->dev, &dev_attr_yenta_registers); | |
1262 | if (ret) | |
1263 | goto unregister_socket; | |
1da177e4 | 1264 | |
d19319af TY |
1265 | return ret; |
1266 | ||
1267 | /* error path... */ | |
1268 | unregister_socket: | |
1269 | pcmcia_unregister_socket(&socket->socket); | |
1270 | free_irq: | |
1271 | if (socket->cb_irq) | |
1272 | free_irq(socket->cb_irq, socket); | |
1273 | else | |
1274 | del_timer_sync(&socket->poll_timer); | |
1da177e4 LT |
1275 | unmap: |
1276 | iounmap(socket->base); | |
d19319af | 1277 | yenta_free_resources(socket); |
1da177e4 LT |
1278 | release: |
1279 | pci_release_regions(dev); | |
1280 | disable: | |
1281 | pci_disable_device(dev); | |
1282 | free: | |
d19319af | 1283 | pci_set_drvdata(dev, NULL); |
1da177e4 | 1284 | kfree(socket); |
1da177e4 LT |
1285 | return ret; |
1286 | } | |
1287 | ||
f237de58 | 1288 | #ifdef CONFIG_PM |
0c570cde | 1289 | static int yenta_dev_suspend_noirq(struct device *dev) |
1da177e4 | 1290 | { |
0c570cde RW |
1291 | struct pci_dev *pdev = to_pci_dev(dev); |
1292 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1da177e4 | 1293 | |
0c570cde | 1294 | if (!socket) |
d7646f76 | 1295 | return 0; |
1da177e4 | 1296 | |
0c570cde RW |
1297 | if (socket->type && socket->type->save_state) |
1298 | socket->type->save_state(socket); | |
1da177e4 | 1299 | |
0c570cde RW |
1300 | pci_save_state(pdev); |
1301 | pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); | |
1302 | pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); | |
1303 | pci_disable_device(pdev); | |
1304 | ||
d7646f76 | 1305 | return 0; |
1da177e4 LT |
1306 | } |
1307 | ||
0c570cde | 1308 | static int yenta_dev_resume_noirq(struct device *dev) |
1da177e4 | 1309 | { |
0c570cde RW |
1310 | struct pci_dev *pdev = to_pci_dev(dev); |
1311 | struct yenta_socket *socket = pci_get_drvdata(pdev); | |
1312 | int ret; | |
1da177e4 | 1313 | |
0c570cde RW |
1314 | if (!socket) |
1315 | return 0; | |
4deb7c1e | 1316 | |
0c570cde RW |
1317 | pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); |
1318 | pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); | |
4deb7c1e | 1319 | |
0c570cde RW |
1320 | ret = pci_enable_device(pdev); |
1321 | if (ret) | |
1322 | return ret; | |
4deb7c1e | 1323 | |
0c570cde | 1324 | pci_set_master(pdev); |
1da177e4 | 1325 | |
0c570cde RW |
1326 | if (socket->type && socket->type->restore_state) |
1327 | socket->type->restore_state(socket); | |
1da177e4 | 1328 | |
9905d1b4 | 1329 | return 0; |
1da177e4 | 1330 | } |
0c570cde | 1331 | |
47145210 | 1332 | static const struct dev_pm_ops yenta_pm_ops = { |
0c570cde RW |
1333 | .suspend_noirq = yenta_dev_suspend_noirq, |
1334 | .resume_noirq = yenta_dev_resume_noirq, | |
1335 | .freeze_noirq = yenta_dev_suspend_noirq, | |
1336 | .thaw_noirq = yenta_dev_resume_noirq, | |
1337 | .poweroff_noirq = yenta_dev_suspend_noirq, | |
1338 | .restore_noirq = yenta_dev_resume_noirq, | |
1339 | }; | |
1340 | ||
1341 | #define YENTA_PM_OPS (¥ta_pm_ops) | |
1342 | #else | |
1343 | #define YENTA_PM_OPS NULL | |
f237de58 | 1344 | #endif |
1da177e4 | 1345 | |
9fea84f4 | 1346 | #define CB_ID(vend, dev, type) \ |
1da177e4 LT |
1347 | { \ |
1348 | .vendor = vend, \ | |
1349 | .device = dev, \ | |
1350 | .subvendor = PCI_ANY_ID, \ | |
1351 | .subdevice = PCI_ANY_ID, \ | |
1352 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ | |
1353 | .class_mask = ~0, \ | |
1354 | .driver_data = CARDBUS_TYPE_##type, \ | |
1355 | } | |
1356 | ||
0178a7a5 | 1357 | static const struct pci_device_id yenta_table[] = { |
1da177e4 LT |
1358 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), |
1359 | ||
1360 | /* | |
1361 | * TBD: Check if these TI variants can use more | |
1362 | * advanced overrides instead. (I can't get the | |
1363 | * data sheets for these devices. --rmk) | |
1364 | */ | |
63e7ebd0 | 1365 | #ifdef CONFIG_YENTA_TI |
1da177e4 LT |
1366 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), |
1367 | ||
1368 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), | |
1369 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), | |
1370 | ||
1371 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), | |
1372 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), | |
1373 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), | |
1374 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), | |
1375 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), | |
1376 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), | |
1377 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), | |
1378 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), | |
1379 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), | |
1380 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), | |
1381 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), | |
1382 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), | |
1383 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), | |
1384 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), | |
1385 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), | |
1386 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), | |
1387 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), | |
1388 | ||
1389 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), | |
1390 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), | |
1391 | ||
6c1a10db DR |
1392 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), |
1393 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), | |
59e35ba1 | 1394 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX), |
6c1a10db DR |
1395 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), |
1396 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), | |
1397 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), | |
1398 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), | |
1399 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), | |
1400 | ||
f3d4ae43 MP |
1401 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE), |
1402 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE), | |
1403 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE), | |
1404 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE), | |
8c3520d4 DR |
1405 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), |
1406 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), | |
1407 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), | |
1408 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), | |
63e7ebd0 | 1409 | #endif /* CONFIG_YENTA_TI */ |
1da177e4 | 1410 | |
63e7ebd0 | 1411 | #ifdef CONFIG_YENTA_RICOH |
1da177e4 LT |
1412 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), |
1413 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), | |
1414 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), | |
1415 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), | |
1416 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), | |
63e7ebd0 | 1417 | #endif |
1da177e4 | 1418 | |
63e7ebd0 | 1419 | #ifdef CONFIG_YENTA_TOSHIBA |
ea2f1590 | 1420 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), |
1da177e4 LT |
1421 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), |
1422 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), | |
63e7ebd0 | 1423 | #endif |
1da177e4 | 1424 | |
63e7ebd0 | 1425 | #ifdef CONFIG_YENTA_O2 |
1da177e4 | 1426 | CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), |
63e7ebd0 | 1427 | #endif |
1da177e4 LT |
1428 | |
1429 | /* match any cardbus bridge */ | |
1430 | CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), | |
1431 | { /* all zeroes */ } | |
1432 | }; | |
1433 | MODULE_DEVICE_TABLE(pci, yenta_table); | |
1434 | ||
1435 | ||
1436 | static struct pci_driver yenta_cardbus_driver = { | |
1437 | .name = "yenta_cardbus", | |
1438 | .id_table = yenta_table, | |
1439 | .probe = yenta_probe, | |
96364e3a | 1440 | .remove = yenta_close, |
0c570cde | 1441 | .driver.pm = YENTA_PM_OPS, |
1da177e4 LT |
1442 | }; |
1443 | ||
7d19143f | 1444 | module_pci_driver(yenta_cardbus_driver); |
1da177e4 LT |
1445 | |
1446 | MODULE_LICENSE("GPL"); |