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1da177e4 LT |
1 | /* |
2 | * linux/drivers/pcmcia/soc_common.h | |
3 | * | |
4 | * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu> | |
5 | * | |
6 | * This file contains definitions for the PCMCIA support code common to | |
7 | * integrated SOCs like the SA-11x0 and PXA2xx microprocessors. | |
8 | */ | |
9 | #ifndef _ASM_ARCH_PCMCIA | |
10 | #define _ASM_ARCH_PCMCIA | |
11 | ||
12 | /* include the world */ | |
2a125dd5 | 13 | #include <linux/clk.h> |
1da177e4 | 14 | #include <linux/cpufreq.h> |
1da177e4 | 15 | #include <pcmcia/ss.h> |
1da177e4 | 16 | #include <pcmcia/cistpl.h> |
1da177e4 LT |
17 | |
18 | ||
19 | struct device; | |
45ca7536 | 20 | struct gpio_desc; |
1da177e4 LT |
21 | struct pcmcia_low_level; |
22 | ||
23 | /* | |
24 | * This structure encapsulates per-socket state which we might need to | |
25 | * use when responding to a Card Services query of some kind. | |
26 | */ | |
27 | struct soc_pcmcia_socket { | |
28 | struct pcmcia_socket socket; | |
29 | ||
30 | /* | |
31 | * Info from low level handler | |
32 | */ | |
1da177e4 | 33 | unsigned int nr; |
2a125dd5 | 34 | struct clk *clk; |
1da177e4 LT |
35 | |
36 | /* | |
37 | * Core PCMCIA state | |
38 | */ | |
b62d99b5 | 39 | const struct pcmcia_low_level *ops; |
1da177e4 LT |
40 | |
41 | unsigned int status; | |
42 | socket_state_t cs_state; | |
43 | ||
44 | unsigned short spd_io[MAX_IO_WIN]; | |
45 | unsigned short spd_mem[MAX_WIN]; | |
46 | unsigned short spd_attr[MAX_WIN]; | |
47 | ||
48 | struct resource res_skt; | |
49 | struct resource res_io; | |
50 | struct resource res_mem; | |
51 | struct resource res_attr; | |
52 | void __iomem *virt_io; | |
53 | ||
d9dc8787 RK |
54 | struct { |
55 | int gpio; | |
45ca7536 | 56 | struct gpio_desc *desc; |
d9dc8787 RK |
57 | unsigned int irq; |
58 | const char *name; | |
59 | } stat[4]; | |
60 | #define SOC_STAT_CD 0 /* Card detect */ | |
61 | #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */ | |
62 | #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */ | |
63 | #define SOC_STAT_RDY 3 /* Ready / Interrupt */ | |
64 | ||
535e0abc RK |
65 | struct gpio_desc *gpio_reset; |
66 | struct gpio_desc *gpio_bus_enable; | |
67 | ||
1da177e4 LT |
68 | unsigned int irq_state; |
69 | ||
70 | struct timer_list poll_timer; | |
71 | struct list_head node; | |
72 | }; | |
73 | ||
b393c696 EM |
74 | struct skt_dev_info { |
75 | int nskt; | |
76 | struct soc_pcmcia_socket skt[0]; | |
77 | }; | |
78 | ||
1da177e4 LT |
79 | struct pcmcia_state { |
80 | unsigned detect: 1, | |
81 | ready: 1, | |
82 | bvd1: 1, | |
83 | bvd2: 1, | |
84 | wrprot: 1, | |
85 | vs_3v: 1, | |
86 | vs_Xv: 1; | |
87 | }; | |
88 | ||
89 | struct pcmcia_low_level { | |
90 | struct module *owner; | |
91 | ||
92 | /* first socket in system */ | |
93 | int first; | |
94 | /* nr of sockets */ | |
95 | int nr; | |
96 | ||
97 | int (*hw_init)(struct soc_pcmcia_socket *); | |
98 | void (*hw_shutdown)(struct soc_pcmcia_socket *); | |
99 | ||
100 | void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); | |
101 | int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); | |
102 | ||
103 | /* | |
104 | * Enable card status IRQs on (re-)initialisation. This can | |
105 | * be called at initialisation, power management event, or | |
106 | * pcmcia event. | |
107 | */ | |
108 | void (*socket_init)(struct soc_pcmcia_socket *); | |
109 | ||
110 | /* | |
111 | * Disable card status IRQs and PCMCIA bus on suspend. | |
112 | */ | |
113 | void (*socket_suspend)(struct soc_pcmcia_socket *); | |
114 | ||
115 | /* | |
116 | * Hardware specific timing routines. | |
117 | * If provided, the get_timing routine overrides the SOC default. | |
118 | */ | |
119 | unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); | |
120 | int (*set_timing)(struct soc_pcmcia_socket *); | |
121 | int (*show_timing)(struct soc_pcmcia_socket *, char *); | |
122 | ||
123 | #ifdef CONFIG_CPU_FREQ | |
124 | /* | |
125 | * CPUFREQ support. | |
126 | */ | |
127 | int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); | |
128 | #endif | |
129 | }; | |
130 | ||
131 | ||
1da177e4 LT |
132 | struct soc_pcmcia_timing { |
133 | unsigned short io; | |
134 | unsigned short mem; | |
135 | unsigned short attr; | |
136 | }; | |
137 | ||
1da177e4 LT |
138 | extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *); |
139 | ||
e0d21178 RK |
140 | void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt, |
141 | struct pcmcia_low_level *ops, struct device *dev); | |
097e296d RKAL |
142 | void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt); |
143 | int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt); | |
45ca7536 | 144 | int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt); |
1da177e4 | 145 | |
1da177e4 | 146 | |
7d16b658 | 147 | #ifdef CONFIG_PCMCIA_DEBUG |
1da177e4 LT |
148 | |
149 | extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func, | |
150 | int lvl, const char *fmt, ...); | |
151 | ||
152 | #define debug(skt, lvl, fmt, arg...) \ | |
153 | soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg) | |
154 | ||
155 | #else | |
156 | #define debug(skt, lvl, fmt, arg...) do { } while (0) | |
157 | #endif | |
158 | ||
159 | ||
160 | /* | |
161 | * The PC Card Standard, Release 7, section 4.13.4, says that twIORD | |
162 | * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has | |
163 | * a minimum value of 165ns, as well. Section 4.7.2 (describing | |
164 | * common and attribute memory write timing) says that twWE has a | |
165 | * minimum value of 150ns for a 250ns cycle time (for 5V operation; | |
166 | * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V | |
167 | * operation, also section 4.7.4). Section 4.7.3 says that taOE | |
168 | * has a maximum value of 150ns for a 300ns cycle time (for 5V | |
169 | * operation), or 300ns for a 600ns cycle time (for 3.3V operation). | |
170 | * | |
171 | * When configuring memory maps, Card Services appears to adopt the policy | |
172 | * that a memory access time of "0" means "use the default." The default | |
173 | * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute | |
174 | * and memory command width time is 150ns; the PCMCIA 3.3V attribute and | |
175 | * memory command width time is 300ns. | |
176 | */ | |
177 | #define SOC_PCMCIA_IO_ACCESS (165) | |
178 | #define SOC_PCMCIA_5V_MEM_ACCESS (150) | |
179 | #define SOC_PCMCIA_3V_MEM_ACCESS (300) | |
180 | #define SOC_PCMCIA_ATTR_MEM_ACCESS (300) | |
181 | ||
182 | /* | |
183 | * The socket driver actually works nicely in interrupt-driven form, | |
184 | * so the (relatively infrequent) polling is "just to be sure." | |
185 | */ | |
186 | #define SOC_PCMCIA_POLL_PERIOD (2*HZ) | |
187 | ||
188 | ||
189 | /* I/O pins replacing memory pins | |
190 | * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75) | |
191 | * | |
192 | * These signals change meaning when going from memory-only to | |
193 | * memory-or-I/O interface: | |
194 | */ | |
195 | #define iostschg bvd1 | |
196 | #define iospkr bvd2 | |
197 | ||
198 | #endif |