[linux-block.git] / drivers / pcmcia / pxa2xx_base.c

/*======================================================================

  Device driver for the PCMCIA control functionality of PXA2xx
  microprocessors.

    The contents of this file may be used under the
    terms of the GNU Public License version 2 (the "GPL")

    (c) Ian Molton (spyro@f2s.com) 2003
    (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4

    derived from sa11xx_base.c

     Portions created by John G. Dorsey are
     Copyright (C) 1999 John G. Dorsey.

  ======================================================================*/

#include <linux/module.h>
#include <linux/init.h>
#include <linux/cpufreq.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-regs.h>

#include <pcmcia/cs_types.h>
#include <pcmcia/ss.h>
#include <pcmcia/bulkmem.h>
#include <pcmcia/cistpl.h>

#include "cs_internal.h"
#include "soc_common.h"
#include "pxa2xx_base.h"


#define MCXX_SETUP_MASK     (0x7f)
#define MCXX_ASST_MASK      (0x1f)
#define MCXX_HOLD_MASK      (0x3f)
#define MCXX_SETUP_SHIFT    (0)
#define MCXX_ASST_SHIFT     (7)
#define MCXX_HOLD_SHIFT     (14)

static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
				     u_int mem_clk_10khz)
{
	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
	return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
}

static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
				     u_int mem_clk_10khz)
{
	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
	return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
}

static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
				      u_int mem_clk_10khz)
{
	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
	return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
}

/* This function returns the (approximate) command assertion period, in
 * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
 */
static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
					   u_int pcmcia_mcxx_asst)
{
	return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
}

static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
{
	MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
		& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
		| ((pxa2xx_mcxx_asst(speed, clock)
		& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
		| ((pxa2xx_mcxx_hold(speed, clock)
		& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);

	return 0;
}

static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
{
	MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
		& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
		| ((pxa2xx_mcxx_asst(speed, clock)
		& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
		| ((pxa2xx_mcxx_hold(speed, clock)
		& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);

	return 0;
}

static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
{
	MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
		& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
		| ((pxa2xx_mcxx_asst(speed, clock)
		& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
		| ((pxa2xx_mcxx_hold(speed, clock)
		& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);

	return 0;
}

static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
{
	struct soc_pcmcia_timing timing;
	int sock = skt->nr;

	soc_common_pcmcia_get_timing(skt, &timing);

	pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
	pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
	pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);

	return 0;
}

static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
{
	unsigned int clk = get_memclk_frequency_10khz();
	return pxa2xx_pcmcia_set_mcxx(skt, clk);
}

#ifdef CONFIG_CPU_FREQ

static int
pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
			       unsigned long val,
			       struct cpufreq_freqs *freqs)
{
#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
	switch (val) {
	case CPUFREQ_PRECHANGE:
		if (freqs->new > freqs->old) {
			debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
			       "pre-updating\n",
			       freqs->new / 1000, (freqs->new / 100) % 10,
			       freqs->old / 1000, (freqs->old / 100) % 10);
			pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
		}
		break;

	case CPUFREQ_POSTCHANGE:
		if (freqs->new < freqs->old) {
			debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
			       "post-updating\n",
			       freqs->new / 1000, (freqs->new / 100) % 10,
			       freqs->old / 1000, (freqs->old / 100) % 10);
			pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
		}
		break;
	}
	return 0;
}
#endif

int __pxa2xx_drv_pcmcia_probe(struct device *dev)
{
	int ret;
	struct pcmcia_low_level *ops;
	int first, nr;

	if (!dev || !dev->platform_data)
		return -ENODEV;

	ops = (struct pcmcia_low_level *)dev->platform_data;
	first = ops->first;
	nr = ops->nr;

	/* Provide our PXA2xx specific timing routines. */
	ops->set_timing  = pxa2xx_pcmcia_set_timing;
#ifdef CONFIG_CPU_FREQ
	ops->frequency_change = pxa2xx_pcmcia_frequency_change;
#endif

	ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);

	if (ret == 0) {
		/*
		 * We have at least one socket, so set MECR:CIT
		 * (Card Is There)
		 */
		MECR |= MECR_CIT;

		/* Set MECR:NOS (Number Of Sockets) */
		if (nr > 1)
			MECR |= MECR_NOS;
		else
			MECR &= ~MECR_NOS;
	}

	return ret;
}
EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);


static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
{
	return __pxa2xx_drv_pcmcia_probe(&dev->dev);
}

static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
{
	return soc_common_drv_pcmcia_remove(&dev->dev);
}

static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state)
{
	return pcmcia_socket_dev_suspend(&dev->dev, state);
}

static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev)
{
	struct pcmcia_low_level *ops = dev->dev.platform_data;
	int nr = ops ? ops->nr : 0;

	MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);

	return pcmcia_socket_dev_resume(&dev->dev);
}

static struct platform_driver pxa2xx_pcmcia_driver = {
	.probe		= pxa2xx_drv_pcmcia_probe,
	.remove		= pxa2xx_drv_pcmcia_remove,
	.suspend 	= pxa2xx_drv_pcmcia_suspend,
	.resume 	= pxa2xx_drv_pcmcia_resume,
	.driver		= {
		.name	= "pxa2xx-pcmcia",
		.owner	= THIS_MODULE,
	},
};

static int __init pxa2xx_pcmcia_init(void)
{
	return platform_driver_register(&pxa2xx_pcmcia_driver);
}

static void __exit pxa2xx_pcmcia_exit(void)
{
	platform_driver_unregister(&pxa2xx_pcmcia_driver);
}

fs_initcall(pxa2xx_pcmcia_init);
module_exit(pxa2xx_pcmcia_exit);

MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:pxa2xx-pcmcia");
Commit	Line	Data
1da177e4 LT	1	/*======================================================================
	2
	3	Device driver for the PCMCIA control functionality of PXA2xx
	4	microprocessors.
	5
	6	The contents of this file may be used under the
	7	terms of the GNU Public License version 2 (the "GPL")
	8
	9	(c) Ian Molton (spyro@f2s.com) 2003
	10	(c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
	11
	12	derived from sa11xx_base.c
	13
	14	Portions created by John G. Dorsey are
	15	Copyright (C) 1999 John G. Dorsey.
	16
	17	======================================================================*/
	18
	19	#include <linux/module.h>
	20	#include <linux/init.h>
1da177e4 LT	21	#include <linux/cpufreq.h>
	22	#include <linux/ioport.h>
	23	#include <linux/kernel.h>
	24	#include <linux/spinlock.h>
d052d1be	25	#include <linux/platform_device.h>
1da177e4 LT	26
	27	#include <asm/hardware.h>
	28	#include <asm/io.h>
	29	#include <asm/irq.h>
	30	#include <asm/system.h>
	31	#include <asm/arch/pxa-regs.h>
8785a8fb	32	#include <asm/arch/pxa2xx-regs.h>
1da177e4 LT	33
	34	#include <pcmcia/cs_types.h>
	35	#include <pcmcia/ss.h>
	36	#include <pcmcia/bulkmem.h>
	37	#include <pcmcia/cistpl.h>
	38
	39	#include "cs_internal.h"
	40	#include "soc_common.h"
	41	#include "pxa2xx_base.h"
	42
	43
	44	#define MCXX_SETUP_MASK (0x7f)
	45	#define MCXX_ASST_MASK (0x1f)
	46	#define MCXX_HOLD_MASK (0x3f)
	47	#define MCXX_SETUP_SHIFT (0)
	48	#define MCXX_ASST_SHIFT (7)
	49	#define MCXX_HOLD_SHIFT (14)
	50
	51	static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
	52	u_int mem_clk_10khz)
	53	{
	54	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
	55	return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
	56	}
	57
	58	static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
	59	u_int mem_clk_10khz)
	60	{
	61	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
24d6572b	62	return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
1da177e4 LT	63	}
	64
	65	static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
	66	u_int mem_clk_10khz)
	67	{
	68	u_int code = pcmcia_cycle_ns * mem_clk_10khz;
	69	return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
	70	}
	71
	72	/* This function returns the (approximate) command assertion period, in
	73	* nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
	74	*/
	75	static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
	76	u_int pcmcia_mcxx_asst)
	77	{
	78	return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
	79	}
	80
	81	static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
	82	{
	83	MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
	84	& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
	85	\| ((pxa2xx_mcxx_asst(speed, clock)
	86	& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
	87	\| ((pxa2xx_mcxx_hold(speed, clock)
	88	& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
	89
	90	return 0;
	91	}
	92
	93	static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
	94	{
	95	MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
	96	& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
	97	\| ((pxa2xx_mcxx_asst(speed, clock)
	98	& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
	99	\| ((pxa2xx_mcxx_hold(speed, clock)
	100	& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
	101
	102	return 0;
	103	}
	104
	105	static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
	106	{
	107	MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
	108	& MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
	109	\| ((pxa2xx_mcxx_asst(speed, clock)
	110	& MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
	111	\| ((pxa2xx_mcxx_hold(speed, clock)
	112	& MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
	113
	114	return 0;
	115	}
	116
	117	static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
	118	{
	119	struct soc_pcmcia_timing timing;
	120	int sock = skt->nr;
	121
	122	soc_common_pcmcia_get_timing(skt, &timing);
	123
	124	pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
	125	pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
	126	pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
127
128	return 0;
129	}
130
131	static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
132	{
133	unsigned int clk = get_memclk_frequency_10khz();
134	return pxa2xx_pcmcia_set_mcxx(skt, clk);
135	}
136
137	#ifdef CONFIG_CPU_FREQ
138
139	static int
140	pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
141	unsigned long val,
142	struct cpufreq_freqs *freqs)
143	{
144	#warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
145	switch (val) {
146	case CPUFREQ_PRECHANGE:
147	if (freqs->new > freqs->old) {
148	debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
149	"pre-updating\n",
150	freqs->new / 1000, (freqs->new / 100) % 10,
151	freqs->old / 1000, (freqs->old / 100) % 10);
152	pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
153	}
154	break;
155
156	case CPUFREQ_POSTCHANGE:
157	if (freqs->new < freqs->old) {
158	debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
159	"post-updating\n",
160	freqs->new / 1000, (freqs->new / 100) % 10,
161	freqs->old / 1000, (freqs->old / 100) % 10);
162	pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
163	}
164	break;
165	}
166	return 0;
167	}
168	#endif
169
9468613b	170	int __pxa2xx_drv_pcmcia_probe(struct device *dev)
1da177e4 LT	171	{
	172	int ret;
	173	struct pcmcia_low_level *ops;
	174	int first, nr;
	175
	176	if (!dev \|\| !dev->platform_data)
	177	return -ENODEV;
	178
	179	ops = (struct pcmcia_low_level *)dev->platform_data;
	180	first = ops->first;
	181	nr = ops->nr;
	182
	183	/* Provide our PXA2xx specific timing routines. */
	184	ops->set_timing = pxa2xx_pcmcia_set_timing;
	185	#ifdef CONFIG_CPU_FREQ
	186	ops->frequency_change = pxa2xx_pcmcia_frequency_change;
	187	#endif
	188
	189	ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
	190
	191	if (ret == 0) {
	192	/*
	193	* We have at least one socket, so set MECR:CIT
	194	* (Card Is There)
	195	*/
	196	MECR \|= MECR_CIT;
	197
	198	/* Set MECR:NOS (Number Of Sockets) */
	199	if (nr > 1)
	200	MECR \|= MECR_NOS;
	201	else
	202	MECR &= ~MECR_NOS;
	203	}
	204
	205	return ret;
	206	}
9468613b	207	EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);
1da177e4	208
9468613b RK	209
	210	static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
	211	{
	212	return __pxa2xx_drv_pcmcia_probe(&dev->dev);
	213	}
	214
	215	static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
	216	{
	217	return soc_common_drv_pcmcia_remove(&dev->dev);
	218	}
	219
	220	static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state)
	221	{
	222	return pcmcia_socket_dev_suspend(&dev->dev, state);
	223	}
	224
	225	static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev)
1da177e4	226	{
9468613b	227	struct pcmcia_low_level *ops = dev->dev.platform_data;
9480e307	228	int nr = ops ? ops->nr : 0;
1da177e4	229
9480e307 RK	230	MECR = nr > 1 ? MECR_CIT \| MECR_NOS : (nr > 0 ? MECR_CIT : 0);
9480e307 RK	231
9468613b	232	return pcmcia_socket_dev_resume(&dev->dev);
1da177e4 LT	233	}
1da177e4 LT	234
9468613b	235	static struct platform_driver pxa2xx_pcmcia_driver = {
1da177e4	236	.probe = pxa2xx_drv_pcmcia_probe,
9468613b RK	237	.remove = pxa2xx_drv_pcmcia_remove,
9468613b RK	238	.suspend = pxa2xx_drv_pcmcia_suspend,
1da177e4	239	.resume = pxa2xx_drv_pcmcia_resume,
9468613b RK	240	.driver = {
9468613b RK	241	.name = "pxa2xx-pcmcia",
12c2c019	242	.owner = THIS_MODULE,
9468613b	243	},
1da177e4 LT	244	};
	245
	246	static int __init pxa2xx_pcmcia_init(void)
	247	{
9468613b	248	return platform_driver_register(&pxa2xx_pcmcia_driver);
1da177e4 LT	249	}
	250
	251	static void __exit pxa2xx_pcmcia_exit(void)
	252	{
9468613b	253	platform_driver_unregister(&pxa2xx_pcmcia_driver);
1da177e4 LT	254	}
1da177e4 LT	255
f36598ae	256	fs_initcall(pxa2xx_pcmcia_init);
1da177e4 LT	257	module_exit(pxa2xx_pcmcia_exit);
	258
	259	MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
	260	MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
	261	MODULE_LICENSE("GPL");
12c2c019	262	MODULE_ALIAS("platform:pxa2xx-pcmcia");