Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. | |
3 | * | |
4 | * Based on the i82092.c driver. | |
5 | * | |
6 | * This software may be used and distributed according to the terms of | |
7 | * the GNU General Public License, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
1da177e4 | 11 | #include <linux/module.h> |
5a0e3ad6 | 12 | #include <linux/slab.h> |
1da177e4 LT |
13 | #include <linux/pci.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/workqueue.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/device.h> | |
5cbb2b94 | 18 | #include <linux/io.h> |
1da177e4 | 19 | |
1da177e4 LT |
20 | #include <pcmcia/ss.h> |
21 | #include <pcmcia/cs.h> | |
22 | ||
23 | #include <asm/system.h> | |
1da177e4 LT |
24 | |
25 | #include "pd6729.h" | |
26 | #include "i82365.h" | |
27 | #include "cirrus.h" | |
28 | ||
29 | MODULE_LICENSE("GPL"); | |
30 | MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); | |
31 | MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); | |
32 | ||
33 | #define MAX_SOCKETS 2 | |
34 | ||
35 | /* | |
36 | * simple helper functions | |
37 | * External clock time, in nanoseconds. 120 ns = 8.33 MHz | |
38 | */ | |
39 | #define to_cycles(ns) ((ns)/120) | |
40 | ||
41 | #ifndef NO_IRQ | |
42 | #define NO_IRQ ((unsigned int)(0)) | |
43 | #endif | |
44 | ||
45 | /* | |
46 | * PARAMETERS | |
47 | * irq_mode=n | |
48 | * Specifies the interrupt delivery mode. The default (1) is to use PCI | |
49 | * interrupts; a value of 0 selects ISA interrupts. This must be set for | |
50 | * correct operation of PCI card readers. | |
1da177e4 LT |
51 | */ |
52 | ||
53 | static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ | |
1da177e4 LT |
54 | |
55 | module_param(irq_mode, int, 0444); | |
1da177e4 LT |
56 | MODULE_PARM_DESC(irq_mode, |
57 | "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); | |
1da177e4 LT |
58 | |
59 | static DEFINE_SPINLOCK(port_lock); | |
60 | ||
61 | /* basic value read/write functions */ | |
62 | ||
63 | static unsigned char indirect_read(struct pd6729_socket *socket, | |
64 | unsigned short reg) | |
65 | { | |
66 | unsigned long port; | |
67 | unsigned char val; | |
68 | unsigned long flags; | |
69 | ||
70 | spin_lock_irqsave(&port_lock, flags); | |
71 | reg += socket->number * 0x40; | |
72 | port = socket->io_base; | |
73 | outb(reg, port); | |
74 | val = inb(port + 1); | |
75 | spin_unlock_irqrestore(&port_lock, flags); | |
76 | ||
77 | return val; | |
78 | } | |
79 | ||
80 | static unsigned short indirect_read16(struct pd6729_socket *socket, | |
81 | unsigned short reg) | |
82 | { | |
83 | unsigned long port; | |
84 | unsigned short tmp; | |
85 | unsigned long flags; | |
86 | ||
87 | spin_lock_irqsave(&port_lock, flags); | |
88 | reg = reg + socket->number * 0x40; | |
89 | port = socket->io_base; | |
90 | outb(reg, port); | |
91 | tmp = inb(port + 1); | |
92 | reg++; | |
93 | outb(reg, port); | |
94 | tmp = tmp | (inb(port + 1) << 8); | |
95 | spin_unlock_irqrestore(&port_lock, flags); | |
96 | ||
97 | return tmp; | |
98 | } | |
99 | ||
100 | static void indirect_write(struct pd6729_socket *socket, unsigned short reg, | |
101 | unsigned char value) | |
102 | { | |
103 | unsigned long port; | |
104 | unsigned long flags; | |
105 | ||
106 | spin_lock_irqsave(&port_lock, flags); | |
107 | reg = reg + socket->number * 0x40; | |
108 | port = socket->io_base; | |
109 | outb(reg, port); | |
110 | outb(value, port + 1); | |
111 | spin_unlock_irqrestore(&port_lock, flags); | |
112 | } | |
113 | ||
114 | static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg, | |
115 | unsigned char mask) | |
116 | { | |
117 | unsigned long port; | |
118 | unsigned char val; | |
119 | unsigned long flags; | |
120 | ||
121 | spin_lock_irqsave(&port_lock, flags); | |
122 | reg = reg + socket->number * 0x40; | |
123 | port = socket->io_base; | |
124 | outb(reg, port); | |
125 | val = inb(port + 1); | |
126 | val |= mask; | |
127 | outb(reg, port); | |
128 | outb(val, port + 1); | |
129 | spin_unlock_irqrestore(&port_lock, flags); | |
130 | } | |
131 | ||
132 | static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg, | |
133 | unsigned char mask) | |
134 | { | |
135 | unsigned long port; | |
136 | unsigned char val; | |
137 | unsigned long flags; | |
138 | ||
139 | spin_lock_irqsave(&port_lock, flags); | |
140 | reg = reg + socket->number * 0x40; | |
141 | port = socket->io_base; | |
142 | outb(reg, port); | |
143 | val = inb(port + 1); | |
144 | val &= ~mask; | |
145 | outb(reg, port); | |
146 | outb(val, port + 1); | |
147 | spin_unlock_irqrestore(&port_lock, flags); | |
148 | } | |
149 | ||
150 | static void indirect_write16(struct pd6729_socket *socket, unsigned short reg, | |
151 | unsigned short value) | |
152 | { | |
153 | unsigned long port; | |
154 | unsigned char val; | |
155 | unsigned long flags; | |
156 | ||
157 | spin_lock_irqsave(&port_lock, flags); | |
158 | reg = reg + socket->number * 0x40; | |
159 | port = socket->io_base; | |
160 | ||
161 | outb(reg, port); | |
162 | val = value & 255; | |
163 | outb(val, port + 1); | |
164 | ||
165 | reg++; | |
166 | ||
167 | outb(reg, port); | |
168 | val = value >> 8; | |
169 | outb(val, port + 1); | |
170 | spin_unlock_irqrestore(&port_lock, flags); | |
171 | } | |
172 | ||
173 | /* Interrupt handler functionality */ | |
174 | ||
7d12e780 | 175 | static irqreturn_t pd6729_interrupt(int irq, void *dev) |
1da177e4 LT |
176 | { |
177 | struct pd6729_socket *socket = (struct pd6729_socket *)dev; | |
178 | int i; | |
179 | int loopcount = 0; | |
180 | int handled = 0; | |
181 | unsigned int events, active = 0; | |
182 | ||
183 | while (1) { | |
184 | loopcount++; | |
185 | if (loopcount > 20) { | |
186 | printk(KERN_ERR "pd6729: infinite eventloop " | |
187 | "in interrupt\n"); | |
188 | break; | |
189 | } | |
190 | ||
191 | active = 0; | |
192 | ||
193 | for (i = 0; i < MAX_SOCKETS; i++) { | |
194 | unsigned int csc; | |
195 | ||
196 | /* card status change register */ | |
197 | csc = indirect_read(&socket[i], I365_CSC); | |
198 | if (csc == 0) /* no events on this socket */ | |
199 | continue; | |
200 | ||
201 | handled = 1; | |
202 | events = 0; | |
203 | ||
204 | if (csc & I365_CSC_DETECT) { | |
205 | events |= SS_DETECT; | |
a7149f9a DB |
206 | dev_vdbg(&socket[i].socket.dev, |
207 | "Card detected in socket %i!\n", i); | |
1da177e4 LT |
208 | } |
209 | ||
210 | if (indirect_read(&socket[i], I365_INTCTL) | |
211 | & I365_PC_IOCARD) { | |
212 | /* For IO/CARDS, bit 0 means "read the card" */ | |
213 | events |= (csc & I365_CSC_STSCHG) | |
214 | ? SS_STSCHG : 0; | |
215 | } else { | |
216 | /* Check for battery/ready events */ | |
217 | events |= (csc & I365_CSC_BVD1) | |
218 | ? SS_BATDEAD : 0; | |
219 | events |= (csc & I365_CSC_BVD2) | |
220 | ? SS_BATWARN : 0; | |
221 | events |= (csc & I365_CSC_READY) | |
222 | ? SS_READY : 0; | |
223 | } | |
224 | ||
5cbb2b94 | 225 | if (events) |
1da177e4 | 226 | pcmcia_parse_events(&socket[i].socket, events); |
5cbb2b94 | 227 | |
1da177e4 LT |
228 | active |= events; |
229 | } | |
230 | ||
231 | if (active == 0) /* no more events to handle */ | |
232 | break; | |
233 | } | |
234 | return IRQ_RETVAL(handled); | |
235 | } | |
236 | ||
237 | /* socket functions */ | |
238 | ||
239 | static void pd6729_interrupt_wrapper(unsigned long data) | |
240 | { | |
241 | struct pd6729_socket *socket = (struct pd6729_socket *) data; | |
242 | ||
7d12e780 | 243 | pd6729_interrupt(0, (void *)socket); |
1da177e4 LT |
244 | mod_timer(&socket->poll_timer, jiffies + HZ); |
245 | } | |
246 | ||
247 | static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value) | |
248 | { | |
249 | struct pd6729_socket *socket | |
250 | = container_of(sock, struct pd6729_socket, socket); | |
251 | unsigned int status; | |
252 | unsigned int data; | |
253 | struct pd6729_socket *t; | |
254 | ||
255 | /* Interface Status Register */ | |
256 | status = indirect_read(socket, I365_STATUS); | |
257 | *value = 0; | |
258 | ||
5cbb2b94 | 259 | if ((status & I365_CS_DETECT) == I365_CS_DETECT) |
1da177e4 | 260 | *value |= SS_DETECT; |
1da177e4 LT |
261 | |
262 | /* | |
263 | * IO cards have a different meaning of bits 0,1 | |
264 | * Also notice the inverse-logic on the bits | |
265 | */ | |
266 | if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { | |
267 | /* IO card */ | |
268 | if (!(status & I365_CS_STSCHG)) | |
269 | *value |= SS_STSCHG; | |
270 | } else { | |
271 | /* non I/O card */ | |
272 | if (!(status & I365_CS_BVD1)) | |
273 | *value |= SS_BATDEAD; | |
274 | if (!(status & I365_CS_BVD2)) | |
275 | *value |= SS_BATWARN; | |
276 | } | |
277 | ||
278 | if (status & I365_CS_WRPROT) | |
279 | *value |= SS_WRPROT; /* card is write protected */ | |
280 | ||
281 | if (status & I365_CS_READY) | |
282 | *value |= SS_READY; /* card is not busy */ | |
283 | ||
284 | if (status & I365_CS_POWERON) | |
285 | *value |= SS_POWERON; /* power is applied to the card */ | |
286 | ||
287 | t = (socket->number) ? socket : socket + 1; | |
288 | indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA); | |
289 | data = indirect_read16(t, PD67_EXT_DATA); | |
290 | *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD; | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
295 | ||
1da177e4 LT |
296 | static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state) |
297 | { | |
298 | struct pd6729_socket *socket | |
299 | = container_of(sock, struct pd6729_socket, socket); | |
300 | unsigned char reg, data; | |
301 | ||
302 | /* First, set the global controller options */ | |
303 | indirect_write(socket, I365_GBLCTL, 0x00); | |
304 | indirect_write(socket, I365_GENCTL, 0x00); | |
305 | ||
306 | /* Values for the IGENC register */ | |
307 | socket->card_irq = state->io_irq; | |
308 | ||
309 | reg = 0; | |
5cbb2b94 | 310 | /* The reset bit has "inverse" logic */ |
1da177e4 LT |
311 | if (!(state->flags & SS_RESET)) |
312 | reg |= I365_PC_RESET; | |
313 | if (state->flags & SS_IOCARD) | |
314 | reg |= I365_PC_IOCARD; | |
315 | ||
316 | /* IGENC, Interrupt and General Control Register */ | |
317 | indirect_write(socket, I365_INTCTL, reg); | |
318 | ||
319 | /* Power registers */ | |
320 | ||
321 | reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ | |
322 | ||
323 | if (state->flags & SS_PWR_AUTO) { | |
a7149f9a | 324 | dev_dbg(&sock->dev, "Auto power\n"); |
1da177e4 LT |
325 | reg |= I365_PWR_AUTO; /* automatic power mngmnt */ |
326 | } | |
327 | if (state->flags & SS_OUTPUT_ENA) { | |
a7149f9a | 328 | dev_dbg(&sock->dev, "Power Enabled\n"); |
1da177e4 LT |
329 | reg |= I365_PWR_OUT; /* enable power */ |
330 | } | |
331 | ||
332 | switch (state->Vcc) { | |
333 | case 0: | |
334 | break; | |
335 | case 33: | |
a7149f9a DB |
336 | dev_dbg(&sock->dev, |
337 | "setting voltage to Vcc to 3.3V on socket %i\n", | |
1da177e4 LT |
338 | socket->number); |
339 | reg |= I365_VCC_5V; | |
340 | indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
341 | break; | |
342 | case 50: | |
a7149f9a DB |
343 | dev_dbg(&sock->dev, |
344 | "setting voltage to Vcc to 5V on socket %i\n", | |
1da177e4 LT |
345 | socket->number); |
346 | reg |= I365_VCC_5V; | |
347 | indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); | |
348 | break; | |
349 | default: | |
a7149f9a DB |
350 | dev_dbg(&sock->dev, |
351 | "pd6729_set_socket called with invalid VCC power " | |
352 | "value: %i\n", state->Vcc); | |
1da177e4 LT |
353 | return -EINVAL; |
354 | } | |
355 | ||
356 | switch (state->Vpp) { | |
357 | case 0: | |
a7149f9a DB |
358 | dev_dbg(&sock->dev, "not setting Vpp on socket %i\n", |
359 | socket->number); | |
1da177e4 LT |
360 | break; |
361 | case 33: | |
362 | case 50: | |
a7149f9a DB |
363 | dev_dbg(&sock->dev, "setting Vpp to Vcc for socket %i\n", |
364 | socket->number); | |
1da177e4 LT |
365 | reg |= I365_VPP1_5V; |
366 | break; | |
367 | case 120: | |
a7149f9a | 368 | dev_dbg(&sock->dev, "setting Vpp to 12.0\n"); |
1da177e4 LT |
369 | reg |= I365_VPP1_12V; |
370 | break; | |
371 | default: | |
a7149f9a DB |
372 | dev_dbg(&sock->dev, "pd6729: pd6729_set_socket called with " |
373 | "invalid VPP power value: %i\n", state->Vpp); | |
1da177e4 LT |
374 | return -EINVAL; |
375 | } | |
376 | ||
377 | /* only write if changed */ | |
378 | if (reg != indirect_read(socket, I365_POWER)) | |
379 | indirect_write(socket, I365_POWER, reg); | |
380 | ||
381 | if (irq_mode == 1) { | |
5cbb2b94 | 382 | /* all interrupts are to be done as PCI interrupts */ |
1da177e4 LT |
383 | data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ; |
384 | } else | |
385 | data = 0; | |
386 | ||
387 | indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1); | |
388 | indirect_write(socket, PD67_EXT_DATA, data); | |
389 | ||
390 | /* Enable specific interrupt events */ | |
391 | ||
392 | reg = 0x00; | |
5cbb2b94 | 393 | if (state->csc_mask & SS_DETECT) |
1da177e4 | 394 | reg |= I365_CSC_DETECT; |
5cbb2b94 | 395 | |
1da177e4 LT |
396 | if (state->flags & SS_IOCARD) { |
397 | if (state->csc_mask & SS_STSCHG) | |
398 | reg |= I365_CSC_STSCHG; | |
399 | } else { | |
400 | if (state->csc_mask & SS_BATDEAD) | |
401 | reg |= I365_CSC_BVD1; | |
402 | if (state->csc_mask & SS_BATWARN) | |
403 | reg |= I365_CSC_BVD2; | |
404 | if (state->csc_mask & SS_READY) | |
405 | reg |= I365_CSC_READY; | |
406 | } | |
407 | if (irq_mode == 1) | |
408 | reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */ | |
409 | indirect_write(socket, I365_CSCINT, reg); | |
410 | ||
411 | reg = indirect_read(socket, I365_INTCTL); | |
412 | if (irq_mode == 1) | |
413 | reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */ | |
414 | else | |
415 | reg |= socket->card_irq; | |
416 | indirect_write(socket, I365_INTCTL, reg); | |
417 | ||
418 | /* now clear the (probably bogus) pending stuff by doing a dummy read */ | |
419 | (void)indirect_read(socket, I365_CSC); | |
420 | ||
421 | return 0; | |
422 | } | |
423 | ||
424 | static int pd6729_set_io_map(struct pcmcia_socket *sock, | |
425 | struct pccard_io_map *io) | |
426 | { | |
427 | struct pd6729_socket *socket | |
428 | = container_of(sock, struct pd6729_socket, socket); | |
429 | unsigned char map, ioctl; | |
430 | ||
431 | map = io->map; | |
432 | ||
433 | /* Check error conditions */ | |
434 | if (map > 1) { | |
a7149f9a | 435 | dev_dbg(&sock->dev, "pd6729_set_io_map with invalid map\n"); |
1da177e4 LT |
436 | return -EINVAL; |
437 | } | |
438 | ||
439 | /* Turn off the window before changing anything */ | |
440 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map)) | |
441 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
442 | ||
a7149f9a | 443 | /* dev_dbg(&sock->dev, "set_io_map: Setting range to %x - %x\n", |
1da177e4 LT |
444 | io->start, io->stop);*/ |
445 | ||
446 | /* write the new values */ | |
447 | indirect_write16(socket, I365_IO(map)+I365_W_START, io->start); | |
448 | indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop); | |
449 | ||
450 | ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); | |
451 | ||
5cbb2b94 K |
452 | if (io->flags & MAP_0WS) |
453 | ioctl |= I365_IOCTL_0WS(map); | |
454 | if (io->flags & MAP_16BIT) | |
455 | ioctl |= I365_IOCTL_16BIT(map); | |
456 | if (io->flags & MAP_AUTOSZ) | |
457 | ioctl |= I365_IOCTL_IOCS16(map); | |
1da177e4 LT |
458 | |
459 | indirect_write(socket, I365_IOCTL, ioctl); | |
460 | ||
461 | /* Turn the window back on if needed */ | |
462 | if (io->flags & MAP_ACTIVE) | |
463 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); | |
464 | ||
465 | return 0; | |
466 | } | |
467 | ||
468 | static int pd6729_set_mem_map(struct pcmcia_socket *sock, | |
469 | struct pccard_mem_map *mem) | |
470 | { | |
471 | struct pd6729_socket *socket | |
472 | = container_of(sock, struct pd6729_socket, socket); | |
473 | unsigned short base, i; | |
474 | unsigned char map; | |
475 | ||
476 | map = mem->map; | |
477 | if (map > 4) { | |
a7149f9a | 478 | dev_warn(&sock->dev, "invalid map requested\n"); |
1da177e4 LT |
479 | return -EINVAL; |
480 | } | |
481 | ||
482 | if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) { | |
a7149f9a | 483 | dev_warn(&sock->dev, "invalid invalid address / speed\n"); |
1da177e4 LT |
484 | return -EINVAL; |
485 | } | |
486 | ||
487 | /* Turn off the window before changing anything */ | |
488 | if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map)) | |
489 | indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
490 | ||
491 | /* write the start address */ | |
492 | base = I365_MEM(map); | |
493 | i = (mem->res->start >> 12) & 0x0fff; | |
494 | if (mem->flags & MAP_16BIT) | |
495 | i |= I365_MEM_16BIT; | |
496 | if (mem->flags & MAP_0WS) | |
497 | i |= I365_MEM_0WS; | |
498 | indirect_write16(socket, base + I365_W_START, i); | |
499 | ||
500 | /* write the stop address */ | |
501 | ||
5cbb2b94 | 502 | i = (mem->res->end >> 12) & 0x0fff; |
1da177e4 LT |
503 | switch (to_cycles(mem->speed)) { |
504 | case 0: | |
505 | break; | |
506 | case 1: | |
507 | i |= I365_MEM_WS0; | |
508 | break; | |
509 | case 2: | |
510 | i |= I365_MEM_WS1; | |
511 | break; | |
512 | default: | |
513 | i |= I365_MEM_WS1 | I365_MEM_WS0; | |
514 | break; | |
515 | } | |
516 | ||
517 | indirect_write16(socket, base + I365_W_STOP, i); | |
518 | ||
519 | /* Take care of high byte */ | |
520 | indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map)); | |
521 | indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24); | |
522 | ||
523 | /* card start */ | |
524 | ||
525 | i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; | |
526 | if (mem->flags & MAP_WRPROT) | |
527 | i |= I365_MEM_WRPROT; | |
528 | if (mem->flags & MAP_ATTRIB) { | |
a7149f9a DB |
529 | /* dev_dbg(&sock->dev, "requesting attribute memory for " |
530 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
531 | i |= I365_MEM_REG; |
532 | } else { | |
a7149f9a DB |
533 | /* dev_dbg(&sock->dev, "requesting normal memory for " |
534 | "socket %i\n", socket->number);*/ | |
1da177e4 LT |
535 | } |
536 | indirect_write16(socket, base + I365_W_OFF, i); | |
537 | ||
538 | /* Enable the window if necessary */ | |
539 | if (mem->flags & MAP_ACTIVE) | |
540 | indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); | |
541 | ||
542 | return 0; | |
543 | } | |
544 | ||
545 | static int pd6729_init(struct pcmcia_socket *sock) | |
546 | { | |
547 | int i; | |
548 | struct resource res = { .end = 0x0fff }; | |
549 | pccard_io_map io = { 0, 0, 0, 0, 1 }; | |
550 | pccard_mem_map mem = { .res = &res, }; | |
551 | ||
552 | pd6729_set_socket(sock, &dead_socket); | |
553 | for (i = 0; i < 2; i++) { | |
554 | io.map = i; | |
555 | pd6729_set_io_map(sock, &io); | |
556 | } | |
557 | for (i = 0; i < 5; i++) { | |
558 | mem.map = i; | |
559 | pd6729_set_mem_map(sock, &mem); | |
560 | } | |
561 | ||
562 | return 0; | |
563 | } | |
564 | ||
565 | ||
566 | /* the pccard structure and its functions */ | |
567 | static struct pccard_operations pd6729_operations = { | |
5cbb2b94 | 568 | .init = pd6729_init, |
1da177e4 | 569 | .get_status = pd6729_get_status, |
1da177e4 LT |
570 | .set_socket = pd6729_set_socket, |
571 | .set_io_map = pd6729_set_io_map, | |
572 | .set_mem_map = pd6729_set_mem_map, | |
573 | }; | |
574 | ||
7d12e780 | 575 | static irqreturn_t pd6729_test(int irq, void *dev) |
1da177e4 | 576 | { |
a7149f9a | 577 | pr_devel("-> hit on irq %d\n", irq); |
1da177e4 LT |
578 | return IRQ_HANDLED; |
579 | } | |
580 | ||
3e022d0c | 581 | static int pd6729_check_irq(int irq) |
1da177e4 | 582 | { |
5cbb2b94 K |
583 | int ret; |
584 | ||
585 | ret = request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", | |
586 | pd6729_test); | |
587 | if (ret) | |
588 | return -1; | |
589 | ||
1da177e4 LT |
590 | free_irq(irq, pd6729_test); |
591 | return 0; | |
592 | } | |
593 | ||
9781b8b0 | 594 | static u_int __devinit pd6729_isa_scan(void) |
1da177e4 LT |
595 | { |
596 | u_int mask0, mask = 0; | |
597 | int i; | |
598 | ||
599 | if (irq_mode == 1) { | |
600 | printk(KERN_INFO "pd6729: PCI card interrupts, " | |
5cbb2b94 | 601 | "PCI status changes\n"); |
1da177e4 LT |
602 | return 0; |
603 | } | |
604 | ||
f9097dce | 605 | mask0 = PD67_MASK; |
1da177e4 LT |
606 | |
607 | /* just find interrupts that aren't in use */ | |
608 | for (i = 0; i < 16; i++) | |
3e022d0c | 609 | if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0)) |
1da177e4 LT |
610 | mask |= (1 << i); |
611 | ||
612 | printk(KERN_INFO "pd6729: ISA irqs = "); | |
613 | for (i = 0; i < 16; i++) | |
614 | if (mask & (1<<i)) | |
615 | printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i); | |
616 | ||
5cbb2b94 K |
617 | if (mask == 0) |
618 | printk("none!"); | |
619 | else | |
620 | printk(" polling status changes.\n"); | |
1da177e4 LT |
621 | |
622 | return mask; | |
623 | } | |
624 | ||
625 | static int __devinit pd6729_pci_probe(struct pci_dev *dev, | |
626 | const struct pci_device_id *id) | |
627 | { | |
628 | int i, j, ret; | |
629 | u_int mask; | |
630 | char configbyte; | |
631 | struct pd6729_socket *socket; | |
632 | ||
8084b372 | 633 | socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS, |
1da177e4 | 634 | GFP_KERNEL); |
5cbb2b94 K |
635 | if (!socket) { |
636 | dev_warn(&dev->dev, "failed to kzalloc socket.\n"); | |
1da177e4 | 637 | return -ENOMEM; |
5cbb2b94 | 638 | } |
1da177e4 | 639 | |
5cbb2b94 K |
640 | ret = pci_enable_device(dev); |
641 | if (ret) { | |
642 | dev_warn(&dev->dev, "failed to enable pci_device.\n"); | |
1da177e4 | 643 | goto err_out_free_mem; |
5cbb2b94 | 644 | } |
1da177e4 | 645 | |
94efb723 | 646 | if (!pci_resource_start(dev, 0)) { |
a7149f9a DB |
647 | dev_warn(&dev->dev, "refusing to load the driver as the " |
648 | "io_base is NULL.\n"); | |
94efb723 K |
649 | goto err_out_free_mem; |
650 | } | |
651 | ||
a7149f9a DB |
652 | dev_info(&dev->dev, "Cirrus PD6729 PCI to PCMCIA Bridge at 0x%llx " |
653 | "on irq %d\n", | |
490ab72a | 654 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); |
5cbb2b94 | 655 | /* |
1da177e4 LT |
656 | * Since we have no memory BARs some firmware may not |
657 | * have had PCI_COMMAND_MEMORY enabled, yet the device needs it. | |
658 | */ | |
659 | pci_read_config_byte(dev, PCI_COMMAND, &configbyte); | |
660 | if (!(configbyte & PCI_COMMAND_MEMORY)) { | |
a7149f9a | 661 | dev_dbg(&dev->dev, "pd6729: Enabling PCI_COMMAND_MEMORY.\n"); |
1da177e4 LT |
662 | configbyte |= PCI_COMMAND_MEMORY; |
663 | pci_write_config_byte(dev, PCI_COMMAND, configbyte); | |
664 | } | |
665 | ||
666 | ret = pci_request_regions(dev, "pd6729"); | |
667 | if (ret) { | |
a7149f9a | 668 | dev_warn(&dev->dev, "pci request region failed.\n"); |
1da177e4 LT |
669 | goto err_out_disable; |
670 | } | |
671 | ||
672 | if (dev->irq == NO_IRQ) | |
673 | irq_mode = 0; /* fall back to ISA interrupt mode */ | |
674 | ||
675 | mask = pd6729_isa_scan(); | |
676 | if (irq_mode == 0 && mask == 0) { | |
a7149f9a | 677 | dev_warn(&dev->dev, "no ISA interrupt is available.\n"); |
1da177e4 LT |
678 | goto err_out_free_res; |
679 | } | |
680 | ||
681 | for (i = 0; i < MAX_SOCKETS; i++) { | |
682 | socket[i].io_base = pci_resource_start(dev, 0); | |
c35e66a4 | 683 | socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1da177e4 LT |
684 | socket[i].socket.map_size = 0x1000; |
685 | socket[i].socket.irq_mask = mask; | |
686 | socket[i].socket.pci_irq = dev->irq; | |
7a96e87d | 687 | socket[i].socket.cb_dev = dev; |
1da177e4 LT |
688 | socket[i].socket.owner = THIS_MODULE; |
689 | ||
690 | socket[i].number = i; | |
691 | ||
692 | socket[i].socket.ops = &pd6729_operations; | |
693 | socket[i].socket.resource_ops = &pccard_nonstatic_ops; | |
87373318 | 694 | socket[i].socket.dev.parent = &dev->dev; |
1da177e4 LT |
695 | socket[i].socket.driver_data = &socket[i]; |
696 | } | |
697 | ||
698 | pci_set_drvdata(dev, socket); | |
699 | if (irq_mode == 1) { | |
700 | /* Register the interrupt handler */ | |
5cbb2b94 K |
701 | ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, |
702 | "pd6729", socket); | |
703 | if (ret) { | |
a7149f9a DB |
704 | dev_err(&dev->dev, "Failed to register irq %d\n", |
705 | dev->irq); | |
1da177e4 LT |
706 | goto err_out_free_res; |
707 | } | |
708 | } else { | |
709 | /* poll Card status change */ | |
710 | init_timer(&socket->poll_timer); | |
711 | socket->poll_timer.function = pd6729_interrupt_wrapper; | |
712 | socket->poll_timer.data = (unsigned long)socket; | |
713 | socket->poll_timer.expires = jiffies + HZ; | |
714 | add_timer(&socket->poll_timer); | |
715 | } | |
716 | ||
717 | for (i = 0; i < MAX_SOCKETS; i++) { | |
718 | ret = pcmcia_register_socket(&socket[i].socket); | |
719 | if (ret) { | |
a7149f9a | 720 | dev_warn(&dev->dev, "pcmcia_register_socket failed.\n"); |
1da177e4 LT |
721 | for (j = 0; j < i ; j++) |
722 | pcmcia_unregister_socket(&socket[j].socket); | |
723 | goto err_out_free_res2; | |
724 | } | |
725 | } | |
726 | ||
727 | return 0; | |
728 | ||
729 | err_out_free_res2: | |
730 | if (irq_mode == 1) | |
731 | free_irq(dev->irq, socket); | |
732 | else | |
733 | del_timer_sync(&socket->poll_timer); | |
734 | err_out_free_res: | |
735 | pci_release_regions(dev); | |
736 | err_out_disable: | |
737 | pci_disable_device(dev); | |
738 | ||
739 | err_out_free_mem: | |
740 | kfree(socket); | |
741 | return ret; | |
742 | } | |
743 | ||
744 | static void __devexit pd6729_pci_remove(struct pci_dev *dev) | |
745 | { | |
746 | int i; | |
747 | struct pd6729_socket *socket = pci_get_drvdata(dev); | |
748 | ||
749 | for (i = 0; i < MAX_SOCKETS; i++) { | |
750 | /* Turn off all interrupt sources */ | |
751 | indirect_write(&socket[i], I365_CSCINT, 0); | |
752 | indirect_write(&socket[i], I365_INTCTL, 0); | |
753 | ||
754 | pcmcia_unregister_socket(&socket[i].socket); | |
755 | } | |
756 | ||
757 | if (irq_mode == 1) | |
758 | free_irq(dev->irq, socket); | |
759 | else | |
760 | del_timer_sync(&socket->poll_timer); | |
761 | pci_release_regions(dev); | |
762 | pci_disable_device(dev); | |
763 | ||
764 | kfree(socket); | |
765 | } | |
766 | ||
1da177e4 LT |
767 | static struct pci_device_id pd6729_pci_ids[] = { |
768 | { | |
769 | .vendor = PCI_VENDOR_ID_CIRRUS, | |
770 | .device = PCI_DEVICE_ID_CIRRUS_6729, | |
771 | .subvendor = PCI_ANY_ID, | |
772 | .subdevice = PCI_ANY_ID, | |
773 | }, | |
774 | { } | |
775 | }; | |
776 | MODULE_DEVICE_TABLE(pci, pd6729_pci_ids); | |
777 | ||
ba66ddfa | 778 | static struct pci_driver pd6729_pci_driver = { |
1da177e4 LT |
779 | .name = "pd6729", |
780 | .id_table = pd6729_pci_ids, | |
781 | .probe = pd6729_pci_probe, | |
782 | .remove = __devexit_p(pd6729_pci_remove), | |
1da177e4 LT |
783 | }; |
784 | ||
785 | static int pd6729_module_init(void) | |
786 | { | |
ba66ddfa | 787 | return pci_register_driver(&pd6729_pci_driver); |
1da177e4 LT |
788 | } |
789 | ||
790 | static void pd6729_module_exit(void) | |
791 | { | |
ba66ddfa | 792 | pci_unregister_driver(&pd6729_pci_driver); |
1da177e4 LT |
793 | } |
794 | ||
795 | module_init(pd6729_module_init); | |
796 | module_exit(pd6729_module_exit); |