[linux-block.git] / drivers / pcmcia / omap_cf.c

/*
 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
 *
 * Copyright (c) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>

#include <pcmcia/ss.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <plat/mux.h>
#include <plat/tc.h>


/* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
 * hard-wired timings to support Compact Flash memory cards; they won't work
 * with various other devices (like WLAN adapters) without some external
 * logic to help out.
 *
 * NOTE:  CF controller docs disagree with address space docs as to where
 * CF_BASE really lives; this is a doc erratum.
 */
#define	CF_BASE	0xfffe2800

/* status; read after IRQ */
#define CF_STATUS			(CF_BASE + 0x00)
#	define	CF_STATUS_BAD_READ	(1 << 2)
#	define	CF_STATUS_BAD_WRITE	(1 << 1)
#	define	CF_STATUS_CARD_DETECT	(1 << 0)

/* which chipselect (CS0..CS3) is used for CF (active low) */
#define CF_CFG				(CF_BASE + 0x02)

/* card reset */
#define CF_CONTROL			(CF_BASE + 0x04)
#	define	CF_CONTROL_RESET	(1 << 0)

#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "omap_cf";

struct omap_cf_socket {
	struct pcmcia_socket	socket;

	struct timer_list	timer;
	unsigned		present:1;
	unsigned		active:1;

	struct platform_device	*pdev;
	unsigned long		phys_cf;
	u_int			irq;
	struct resource		iomem;
};

#define	POLL_INTERVAL		(2 * HZ)

/*--------------------------------------------------------------------------*/

static int omap_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

/* the timer is primarily to kick this socket's pccardd */
static void omap_cf_timer(unsigned long _cf)
{
	struct omap_cf_socket	*cf = (void *) _cf;
	unsigned		present = omap_cf_present();

	if (present != cf->present) {
		cf->present = present;
		pr_debug("%s: card %s\n", driver_name,
			present ? "present" : "gone");
		pcmcia_parse_events(&cf->socket, SS_DETECT);
	}

	if (cf->active)
		mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
}

/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
 * claim the card's IRQ.  It may also detect some card insertions, but
 * not removals; it can't always eliminate timer irqs.
 */
static irqreturn_t omap_cf_irq(int irq, void *_cf)
{
	omap_cf_timer((unsigned long)_cf);
	return IRQ_HANDLED;
}

static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	if (!sp)
		return -EINVAL;

	/* NOTE CF is always 3VCARD */
	if (omap_cf_present()) {
		struct omap_cf_socket	*cf;

		*sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
		cf = container_of(s, struct omap_cf_socket, socket);
		s->irq.AssignedIRQ = 0;
		s->pci_irq = cf->irq;
	} else
		*sp = 0;
	return 0;
}

static int
omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	u16		control;

	/* REVISIT some non-OSK boards may support power switching */
	switch (s->Vcc) {
	case 0:
	case 33:
		break;
	default:
		return -EINVAL;
	}

	control = omap_readw(CF_CONTROL);
	if (s->flags & SS_RESET)
		omap_writew(CF_CONTROL_RESET, CF_CONTROL);
	else
		omap_writew(0, CF_CONTROL);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int omap_cf_ss_suspend(struct pcmcia_socket *s)
{
	pr_debug("%s: %s\n", driver_name, __func__);
	return omap_cf_set_socket(s, &dead_socket);
}

/* regions are 2K each:  mem, attrib, io (and reserved-for-ide) */

static int
omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct omap_cf_socket	*cf;

	cf = container_of(s, struct omap_cf_socket, socket);
	io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	io->start = cf->phys_cf + SZ_4K;
	io->stop = io->start + SZ_2K - 1;
	return 0;
}

static int
omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct omap_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;
	cf = container_of(s, struct omap_cf_socket, socket);
	map->static_start = cf->phys_cf;
	map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	if (map->flags & MAP_ATTRIB)
		map->static_start += SZ_2K;
	return 0;
}

static struct pccard_operations omap_cf_ops = {
	.init			= omap_cf_ss_init,
	.suspend		= omap_cf_ss_suspend,
	.get_status		= omap_cf_get_status,
	.set_socket		= omap_cf_set_socket,
	.set_io_map		= omap_cf_set_io_map,
	.set_mem_map		= omap_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

/*
 * NOTE:  right now the only board-specific platform_data is
 * "what chipselect is used".  Boards could want more.
 */

static int __init omap_cf_probe(struct platform_device *pdev)
{
	unsigned		seg;
	struct omap_cf_socket	*cf;
	int			irq;
	int			status;

	seg = (int) pdev->dev.platform_data;
	if (seg == 0 || seg > 3)
		return -ENODEV;

	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -EINVAL;

	cf = kzalloc(sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;
	init_timer(&cf->timer);
	cf->timer.function = omap_cf_timer;
	cf->timer.data = (unsigned long) cf;

	cf->pdev = pdev;
	platform_set_drvdata(pdev, cf);

	/* this primarily just shuts up irq handling noise */
	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
			driver_name, cf);
	if (status < 0)
		goto fail0;
	cf->irq = irq;
	cf->socket.pci_irq = irq;

	switch (seg) {
	/* NOTE: CS0 could be configured too ... */
	case 1:
		cf->phys_cf = OMAP_CS1_PHYS;
		break;
	case 2:
		cf->phys_cf = OMAP_CS2_PHYS;
		break;
	case 3:
		cf->phys_cf = omap_cs3_phys();
		break;
	default:
		goto  fail1;
	}
	cf->iomem.start = cf->phys_cf;
	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	cf->iomem.flags = IORESOURCE_MEM;

	/* pcmcia layer only remaps "real" memory */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	if (!cf->socket.io_offset)
		goto fail1;

	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
		goto fail1;

	/* NOTE:  CF conflicts with MMC1 */
	omap_cfg_reg(W11_1610_CF_CD1);
	omap_cfg_reg(P11_1610_CF_CD2);
	omap_cfg_reg(R11_1610_CF_IOIS16);
	omap_cfg_reg(V10_1610_CF_IREQ);
	omap_cfg_reg(W10_1610_CF_RESET);

	omap_writew(~(1 << seg), CF_CFG);

	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);

	/* NOTE:  better EMIFS setup might support more cards; but the
	 * TRM only shows how to affect regular flash signals, not their
	 * CF/PCMCIA variants...
	 */
	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
		seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	omap_writel(0x0004a1b3, EMIFS_CCS(seg));	/* synch mode 4 etc */
	omap_writel(0x00000000, EMIFS_ACS(seg));	/* OE hold/setup */

	/* CF uses armxor_ck, which is "always" available */

	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
		omap_readw(CF_STATUS), omap_readw(CF_CFG),
		omap_readw(CF_CONTROL),
		omap_cf_present() ? "present" : "(not present)");

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &omap_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = &cf->iomem;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	cf->active = 1;
	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	return 0;

fail2:
	release_mem_region(cf->phys_cf, SZ_8K);
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	free_irq(irq, cf);
fail0:
	kfree(cf);
	return status;
}

static int __exit omap_cf_remove(struct platform_device *pdev)
{
	struct omap_cf_socket *cf = platform_get_drvdata(pdev);

	cf->active = 0;
	pcmcia_unregister_socket(&cf->socket);
	del_timer_sync(&cf->timer);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(cf->phys_cf, SZ_8K);
	free_irq(cf->irq, cf);
	kfree(cf);
	return 0;
}

static struct platform_driver omap_cf_driver = {
	.driver = {
		.name	= (char *) driver_name,
		.owner	= THIS_MODULE,
	},
	.remove		= __exit_p(omap_cf_remove),
};

static int __init omap_cf_init(void)
{
	if (cpu_is_omap16xx())
		return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
	return -ENODEV;
}

static void __exit omap_cf_exit(void)
{
	if (cpu_is_omap16xx())
		platform_driver_unregister(&omap_cf_driver);
}

module_init(omap_cf_init);
module_exit(omap_cf_exit);

MODULE_DESCRIPTION("OMAP CF Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:omap_cf");
Commit	Line	Data
f74e48a5 DB	1	/*
	2	* omap_cf.c -- OMAP 16xx CompactFlash controller driver
	3	*
	4	* Copyright (c) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
d052d1be	14	#include <linux/platform_device.h>
f74e48a5 DB	15	#include <linux/errno.h>
	16	#include <linux/init.h>
	17	#include <linux/delay.h>
	18	#include <linux/interrupt.h>
	19
	20	#include <pcmcia/ss.h>
	21
a09e64fb	22	#include <mach/hardware.h>
f74e48a5	23	#include <asm/io.h>
f74e48a5 DB	24	#include <asm/sizes.h>
f74e48a5 DB	25
ce491cf8 TL	26	#include <plat/mux.h>
ce491cf8 TL	27	#include <plat/tc.h>
f74e48a5 DB	28
	29
	30	/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
	31	* hard-wired timings to support Compact Flash memory cards; they won't work
	32	* with various other devices (like WLAN adapters) without some external
	33	* logic to help out.
	34	*
	35	* NOTE: CF controller docs disagree with address space docs as to where
	36	* CF_BASE really lives; this is a doc erratum.
	37	*/
	38	#define CF_BASE 0xfffe2800
	39
	40	/* status; read after IRQ */
030b1545	41	#define CF_STATUS (CF_BASE + 0x00)
f74e48a5 DB	42	# define CF_STATUS_BAD_READ (1 << 2)
	43	# define CF_STATUS_BAD_WRITE (1 << 1)
	44	# define CF_STATUS_CARD_DETECT (1 << 0)
	45
	46	/* which chipselect (CS0..CS3) is used for CF (active low) */
030b1545	47	#define CF_CFG (CF_BASE + 0x02)
f74e48a5 DB	48
f74e48a5 DB	49	/* card reset */
030b1545	50	#define CF_CONTROL (CF_BASE + 0x04)
f74e48a5 DB	51	# define CF_CONTROL_RESET (1 << 0)
f74e48a5 DB	52
030b1545	53	#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
f74e48a5 DB	54
	55	/--------------------------------------------------------------------------/
	56
	57	static const char driver_name[] = "omap_cf";
	58
	59	struct omap_cf_socket {
	60	struct pcmcia_socket socket;
	61
	62	struct timer_list timer;
	63	unsigned present:1;
	64	unsigned active:1;
	65
	66	struct platform_device *pdev;
	67	unsigned long phys_cf;
	68	u_int irq;
dcb9c392	69	struct resource iomem;
f74e48a5 DB	70	};
	71
	72	#define POLL_INTERVAL (2 * HZ)
	73
f74e48a5 DB	74	/--------------------------------------------------------------------------/
	75
	76	static int omap_cf_ss_init(struct pcmcia_socket *s)
	77	{
	78	return 0;
	79	}
	80
	81	/* the timer is primarily to kick this socket's pccardd */
	82	static void omap_cf_timer(unsigned long _cf)
	83	{
	84	struct omap_cf_socket cf = (void ) _cf;
	85	unsigned present = omap_cf_present();
	86
	87	if (present != cf->present) {
	88	cf->present = present;
	89	pr_debug("%s: card %s\n", driver_name,
	90	present ? "present" : "gone");
	91	pcmcia_parse_events(&cf->socket, SS_DETECT);
	92	}
	93
	94	if (cf->active)
	95	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	96	}
	97
	98	/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
	99	* claim the card's IRQ. It may also detect some card insertions, but
	100	* not removals; it can't always eliminate timer irqs.
	101	*/
7d12e780	102	static irqreturn_t omap_cf_irq(int irq, void *_cf)
f74e48a5 DB	103	{
	104	omap_cf_timer((unsigned long)_cf);
	105	return IRQ_HANDLED;
	106	}
	107
	108	static int omap_cf_get_status(struct pcmcia_socket s, u_int sp)
	109	{
	110	if (!sp)
	111	return -EINVAL;
	112
dcb9c392	113	/* NOTE CF is always 3VCARD */
f74e48a5 DB	114	if (omap_cf_present()) {
	115	struct omap_cf_socket *cf;
	116
	117	*sp = SS_READY \| SS_DETECT \| SS_POWERON \| SS_3VCARD;
	118	cf = container_of(s, struct omap_cf_socket, socket);
dcb9c392 DB	119	s->irq.AssignedIRQ = 0;
dcb9c392 DB	120	s->pci_irq = cf->irq;
f74e48a5 DB	121	} else
	122	*sp = 0;
	123	return 0;
	124	}
	125
	126	static int
	127	omap_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
	128	{
	129	u16 control;
	130
dcb9c392	131	/* REVISIT some non-OSK boards may support power switching */
f74e48a5 DB	132	switch (s->Vcc) {
	133	case 0:
	134	case 33:
	135	break;
	136	default:
	137	return -EINVAL;
	138	}
	139
030b1545	140	control = omap_readw(CF_CONTROL);
f74e48a5	141	if (s->flags & SS_RESET)
030b1545	142	omap_writew(CF_CONTROL_RESET, CF_CONTROL);
f74e48a5	143	else
030b1545	144	omap_writew(0, CF_CONTROL);
f74e48a5 DB	145
	146	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	147	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	148
	149	return 0;
	150	}
	151
	152	static int omap_cf_ss_suspend(struct pcmcia_socket *s)
	153	{
2e11cb4c	154	pr_debug("%s: %s\n", driver_name, __func__);
f74e48a5 DB	155	return omap_cf_set_socket(s, &dead_socket);
	156	}
	157
	158	/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
	159
	160	static int
	161	omap_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	162	{
	163	struct omap_cf_socket *cf;
	164
	165	cf = container_of(s, struct omap_cf_socket, socket);
	166	io->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	167	io->start = cf->phys_cf + SZ_4K;
	168	io->stop = io->start + SZ_2K - 1;
	169	return 0;
	170	}
	171
	172	static int
	173	omap_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
	174	{
	175	struct omap_cf_socket *cf;
	176
	177	if (map->card_start)
	178	return -EINVAL;
	179	cf = container_of(s, struct omap_cf_socket, socket);
	180	map->static_start = cf->phys_cf;
	181	map->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	182	if (map->flags & MAP_ATTRIB)
	183	map->static_start += SZ_2K;
	184	return 0;
	185	}
	186
	187	static struct pccard_operations omap_cf_ops = {
	188	.init = omap_cf_ss_init,
	189	.suspend = omap_cf_ss_suspend,
	190	.get_status = omap_cf_get_status,
	191	.set_socket = omap_cf_set_socket,
	192	.set_io_map = omap_cf_set_io_map,
	193	.set_mem_map = omap_cf_set_mem_map,
	194	};
	195
	196	/--------------------------------------------------------------------------/
	197
	198	/*
	199	* NOTE: right now the only board-specific platform_data is
	200	* "what chipselect is used". Boards could want more.
	201	*/
	202
b6d2cccb	203	static int __init omap_cf_probe(struct platform_device *pdev)
f74e48a5 DB	204	{
	205	unsigned seg;
	206	struct omap_cf_socket *cf;
f74e48a5 DB	207	int irq;
	208	int status;
	209
b6d2cccb	210	seg = (int) pdev->dev.platform_data;
f74e48a5 DB	211	if (seg == 0 \|\| seg > 3)
	212	return -ENODEV;
	213
	214	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	215	irq = platform_get_irq(pdev, 0);
48944738	216	if (irq < 0)
f74e48a5 DB	217	return -EINVAL;
f74e48a5 DB	218
cd861280	219	cf = kzalloc(sizeof *cf, GFP_KERNEL);
f74e48a5 DB	220	if (!cf)
	221	return -ENOMEM;
	222	init_timer(&cf->timer);
	223	cf->timer.function = omap_cf_timer;
	224	cf->timer.data = (unsigned long) cf;
	225
	226	cf->pdev = pdev;
b6d2cccb	227	platform_set_drvdata(pdev, cf);
f74e48a5 DB	228
f74e48a5 DB	229	/* this primarily just shuts up irq handling noise */
dace1453	230	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
f74e48a5 DB	231	driver_name, cf);
	232	if (status < 0)
	233	goto fail0;
	234	cf->irq = irq;
	235	cf->socket.pci_irq = irq;
	236
	237	switch (seg) {
	238	/* NOTE: CS0 could be configured too ... */
	239	case 1:
	240	cf->phys_cf = OMAP_CS1_PHYS;
	241	break;
	242	case 2:
	243	cf->phys_cf = OMAP_CS2_PHYS;
	244	break;
	245	case 3:
	246	cf->phys_cf = omap_cs3_phys();
	247	break;
	248	default:
	249	goto fail1;
	250	}
dcb9c392 DB	251	cf->iomem.start = cf->phys_cf;
	252	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	253	cf->iomem.flags = IORESOURCE_MEM;
f74e48a5 DB	254
	255	/* pcmcia layer only remaps "real" memory */
	256	cf->socket.io_offset = (unsigned long)
	257	ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	258	if (!cf->socket.io_offset)
	259	goto fail1;
	260
	261	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name))
	262	goto fail1;
	263
	264	/* NOTE: CF conflicts with MMC1 */
	265	omap_cfg_reg(W11_1610_CF_CD1);
	266	omap_cfg_reg(P11_1610_CF_CD2);
	267	omap_cfg_reg(R11_1610_CF_IOIS16);
	268	omap_cfg_reg(V10_1610_CF_IREQ);
	269	omap_cfg_reg(W10_1610_CF_RESET);
	270
030b1545	271	omap_writew(~(1 << seg), CF_CFG);
f74e48a5 DB	272
	273	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
	274
	275	/* NOTE: better EMIFS setup might support more cards; but the
	276	* TRM only shows how to affect regular flash signals, not their
	277	* CF/PCMCIA variants...
	278	*/
	279	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
030b1545 TL	280	seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	281	omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
	282	omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
f74e48a5 DB	283
	284	/* CF uses armxor_ck, which is "always" available */
	285
	286	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
030b1545 TL	287	omap_readw(CF_STATUS), omap_readw(CF_CFG),
030b1545 TL	288	omap_readw(CF_CONTROL),
f74e48a5 DB	289	omap_cf_present() ? "present" : "(not present)");
	290
	291	cf->socket.owner = THIS_MODULE;
b6d2cccb	292	cf->socket.dev.parent = &pdev->dev;
f74e48a5 DB	293	cf->socket.ops = &omap_cf_ops;
	294	cf->socket.resource_ops = &pccard_static_ops;
	295	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	296	\| SS_CAP_MEM_ALIGN;
	297	cf->socket.map_size = SZ_2K;
dcb9c392	298	cf->socket.io[0].res = &cf->iomem;
f74e48a5 DB	299
	300	status = pcmcia_register_socket(&cf->socket);
	301	if (status < 0)
	302	goto fail2;
	303
	304	cf->active = 1;
	305	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	306	return 0;
	307
	308	fail2:
f74e48a5 DB	309	release_mem_region(cf->phys_cf, SZ_8K);
f74e48a5 DB	310	fail1:
3efa9970 AL	311	if (cf->socket.io_offset)
3efa9970 AL	312	iounmap((void __iomem *) cf->socket.io_offset);
f74e48a5 DB	313	free_irq(irq, cf);
	314	fail0:
	315	kfree(cf);
	316	return status;
	317	}
	318
b6d2cccb	319	static int __exit omap_cf_remove(struct platform_device *pdev)
f74e48a5	320	{
b6d2cccb	321	struct omap_cf_socket *cf = platform_get_drvdata(pdev);
f74e48a5 DB	322
	323	cf->active = 0;
	324	pcmcia_unregister_socket(&cf->socket);
	325	del_timer_sync(&cf->timer);
	326	iounmap((void __iomem *) cf->socket.io_offset);
	327	release_mem_region(cf->phys_cf, SZ_8K);
	328	free_irq(cf->irq, cf);
	329	kfree(cf);
	330	return 0;
	331	}
	332
b6d2cccb DB	333	static struct platform_driver omap_cf_driver = {
	334	.driver = {
	335	.name = (char *) driver_name,
12c2c019	336	.owner = THIS_MODULE,
b6d2cccb DB	337	},
b6d2cccb DB	338	.remove = __exit_p(omap_cf_remove),
f74e48a5 DB	339	};
	340
	341	static int __init omap_cf_init(void)
	342	{
	343	if (cpu_is_omap16xx())
b6d2cccb	344	return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
dcb9c392	345	return -ENODEV;
f74e48a5 DB	346	}
	347
	348	static void __exit omap_cf_exit(void)
	349	{
	350	if (cpu_is_omap16xx())
b6d2cccb	351	platform_driver_unregister(&omap_cf_driver);
f74e48a5 DB	352	}
	353
	354	module_init(omap_cf_init);
	355	module_exit(omap_cf_exit);
	356
	357	MODULE_DESCRIPTION("OMAP CF Driver");
	358	MODULE_LICENSE("GPL");
12c2c019	359	MODULE_ALIAS("platform:omap_cf");