[linux-block.git] / drivers / pcmcia / omap_cf.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * omap_cf.c -- OMAP 16xx CompactFlash controller driver
 *
 * Copyright (c) 2005 David Brownell
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/slab.h>

#include <pcmcia/ss.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <linux/sizes.h>

#include <mach/mux.h>
#include <mach/tc.h>


/* NOTE:  don't expect this to support many I/O cards.  The 16xx chips have
 * hard-wired timings to support Compact Flash memory cards; they won't work
 * with various other devices (like WLAN adapters) without some external
 * logic to help out.
 *
 * NOTE:  CF controller docs disagree with address space docs as to where
 * CF_BASE really lives; this is a doc erratum.
 */
#define	CF_BASE	0xfffe2800

/* status; read after IRQ */
#define CF_STATUS			(CF_BASE + 0x00)
#	define	CF_STATUS_BAD_READ	(1 << 2)
#	define	CF_STATUS_BAD_WRITE	(1 << 1)
#	define	CF_STATUS_CARD_DETECT	(1 << 0)

/* which chipselect (CS0..CS3) is used for CF (active low) */
#define CF_CFG				(CF_BASE + 0x02)

/* card reset */
#define CF_CONTROL			(CF_BASE + 0x04)
#	define	CF_CONTROL_RESET	(1 << 0)

#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "omap_cf";

struct omap_cf_socket {
	struct pcmcia_socket	socket;

	struct timer_list	timer;
	unsigned		present:1;
	unsigned		active:1;

	struct platform_device	*pdev;
	unsigned long		phys_cf;
	u_int			irq;
	struct resource		iomem;
};

#define	POLL_INTERVAL		(2 * HZ)

/*--------------------------------------------------------------------------*/

static int omap_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

/* the timer is primarily to kick this socket's pccardd */
static void omap_cf_timer(struct timer_list *t)
{
	struct omap_cf_socket	*cf = from_timer(cf, t, timer);
	unsigned		present = omap_cf_present();

	if (present != cf->present) {
		cf->present = present;
		pr_debug("%s: card %s\n", driver_name,
			present ? "present" : "gone");
		pcmcia_parse_events(&cf->socket, SS_DETECT);
	}

	if (cf->active)
		mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
}

/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
 * claim the card's IRQ.  It may also detect some card insertions, but
 * not removals; it can't always eliminate timer irqs.
 */
static irqreturn_t omap_cf_irq(int irq, void *_cf)
{
	struct omap_cf_socket *cf = (struct omap_cf_socket *)_cf;

	omap_cf_timer(&cf->timer);
	return IRQ_HANDLED;
}

static int omap_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	if (!sp)
		return -EINVAL;

	/* NOTE CF is always 3VCARD */
	if (omap_cf_present()) {
		struct omap_cf_socket	*cf;

		*sp = SS_READY | SS_DETECT | SS_POWERON | SS_3VCARD;
		cf = container_of(s, struct omap_cf_socket, socket);
		s->pcmcia_irq = 0;
		s->pci_irq = cf->irq;
	} else
		*sp = 0;
	return 0;
}

static int
omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	u16		control;

	/* REVISIT some non-OSK boards may support power switching */
	switch (s->Vcc) {
	case 0:
	case 33:
		break;
	default:
		return -EINVAL;
	}

	control = omap_readw(CF_CONTROL);
	if (s->flags & SS_RESET)
		omap_writew(CF_CONTROL_RESET, CF_CONTROL);
	else
		omap_writew(0, CF_CONTROL);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int omap_cf_ss_suspend(struct pcmcia_socket *s)
{
	pr_debug("%s: %s\n", driver_name, __func__);
	return omap_cf_set_socket(s, &dead_socket);
}

/* regions are 2K each:  mem, attrib, io (and reserved-for-ide) */

static int
omap_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct omap_cf_socket	*cf;

	cf = container_of(s, struct omap_cf_socket, socket);
	io->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	io->start = cf->phys_cf + SZ_4K;
	io->stop = io->start + SZ_2K - 1;
	return 0;
}

static int
omap_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct omap_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;
	cf = container_of(s, struct omap_cf_socket, socket);
	map->static_start = cf->phys_cf;
	map->flags &= MAP_ACTIVE|MAP_ATTRIB|MAP_16BIT;
	if (map->flags & MAP_ATTRIB)
		map->static_start += SZ_2K;
	return 0;
}

static struct pccard_operations omap_cf_ops = {
	.init			= omap_cf_ss_init,
	.suspend		= omap_cf_ss_suspend,
	.get_status		= omap_cf_get_status,
	.set_socket		= omap_cf_set_socket,
	.set_io_map		= omap_cf_set_io_map,
	.set_mem_map		= omap_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

/*
 * NOTE:  right now the only board-specific platform_data is
 * "what chipselect is used".  Boards could want more.
 */

static int __init omap_cf_probe(struct platform_device *pdev)
{
	unsigned		seg;
	struct omap_cf_socket	*cf;
	int			irq;
	int			status;

	seg = (int) pdev->dev.platform_data;
	if (seg == 0 || seg > 3)
		return -ENODEV;

	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -EINVAL;

	cf = kzalloc(sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;
	timer_setup(&cf->timer, omap_cf_timer, 0);

	cf->pdev = pdev;
	platform_set_drvdata(pdev, cf);

	/* this primarily just shuts up irq handling noise */
	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
			driver_name, cf);
	if (status < 0)
		goto fail0;
	cf->irq = irq;
	cf->socket.pci_irq = irq;

	switch (seg) {
	/* NOTE: CS0 could be configured too ... */
	case 1:
		cf->phys_cf = OMAP_CS1_PHYS;
		break;
	case 2:
		cf->phys_cf = OMAP_CS2_PHYS;
		break;
	case 3:
		cf->phys_cf = omap_cs3_phys();
		break;
	default:
		goto  fail1;
	}
	cf->iomem.start = cf->phys_cf;
	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	cf->iomem.flags = IORESOURCE_MEM;

	/* pcmcia layer only remaps "real" memory */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_cf + SZ_4K, SZ_2K);
	if (!cf->socket.io_offset) {
		status = -ENOMEM;
		goto fail1;
	}

	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) {
		status = -ENXIO;
		goto fail1;
	}

	/* NOTE:  CF conflicts with MMC1 */
	omap_cfg_reg(W11_1610_CF_CD1);
	omap_cfg_reg(P11_1610_CF_CD2);
	omap_cfg_reg(R11_1610_CF_IOIS16);
	omap_cfg_reg(V10_1610_CF_IREQ);
	omap_cfg_reg(W10_1610_CF_RESET);

	omap_writew(~(1 << seg), CF_CFG);

	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);

	/* NOTE:  better EMIFS setup might support more cards; but the
	 * TRM only shows how to affect regular flash signals, not their
	 * CF/PCMCIA variants...
	 */
	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
		seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	omap_writel(0x0004a1b3, EMIFS_CCS(seg));	/* synch mode 4 etc */
	omap_writel(0x00000000, EMIFS_ACS(seg));	/* OE hold/setup */

	/* CF uses armxor_ck, which is "always" available */

	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
		omap_readw(CF_STATUS), omap_readw(CF_CFG),
		omap_readw(CF_CONTROL),
		omap_cf_present() ? "present" : "(not present)");

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &omap_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = &cf->iomem;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	cf->active = 1;
	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	return 0;

fail2:
	release_mem_region(cf->phys_cf, SZ_8K);
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	free_irq(irq, cf);
fail0:
	kfree(cf);
	return status;
}

static int __exit omap_cf_remove(struct platform_device *pdev)
{
	struct omap_cf_socket *cf = platform_get_drvdata(pdev);

	cf->active = 0;
	pcmcia_unregister_socket(&cf->socket);
	del_timer_sync(&cf->timer);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(cf->phys_cf, SZ_8K);
	free_irq(cf->irq, cf);
	kfree(cf);
	return 0;
}

static struct platform_driver omap_cf_driver = {
	.driver = {
		.name	= driver_name,
	},
	.remove		= __exit_p(omap_cf_remove),
};

static int __init omap_cf_init(void)
{
	if (cpu_is_omap16xx())
		return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
	return -ENODEV;
}

static void __exit omap_cf_exit(void)
{
	if (cpu_is_omap16xx())
		platform_driver_unregister(&omap_cf_driver);
}

module_init(omap_cf_init);
module_exit(omap_cf_exit);

MODULE_DESCRIPTION("OMAP CF Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:omap_cf");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
f74e48a5 DB	2	/*
	3	* omap_cf.c -- OMAP 16xx CompactFlash controller driver
	4	*
	5	* Copyright (c) 2005 David Brownell
f74e48a5 DB	6	*/
	7
	8	#include <linux/module.h>
	9	#include <linux/kernel.h>
d052d1be	10	#include <linux/platform_device.h>
f74e48a5 DB	11	#include <linux/errno.h>
	12	#include <linux/init.h>
	13	#include <linux/delay.h>
	14	#include <linux/interrupt.h>
5a0e3ad6	15	#include <linux/slab.h>
f74e48a5 DB	16
	17	#include <pcmcia/ss.h>
	18
a09e64fb	19	#include <mach/hardware.h>
f74e48a5	20	#include <asm/io.h>
87dfb311	21	#include <linux/sizes.h>
f74e48a5	22
70c494c3	23	#include <mach/mux.h>
54b693d4	24	#include <mach/tc.h>
f74e48a5 DB	25
	26
	27	/* NOTE: don't expect this to support many I/O cards. The 16xx chips have
	28	* hard-wired timings to support Compact Flash memory cards; they won't work
	29	* with various other devices (like WLAN adapters) without some external
	30	* logic to help out.
	31	*
	32	* NOTE: CF controller docs disagree with address space docs as to where
	33	* CF_BASE really lives; this is a doc erratum.
	34	*/
	35	#define CF_BASE 0xfffe2800
	36
	37	/* status; read after IRQ */
030b1545	38	#define CF_STATUS (CF_BASE + 0x00)
f74e48a5 DB	39	# define CF_STATUS_BAD_READ (1 << 2)
	40	# define CF_STATUS_BAD_WRITE (1 << 1)
	41	# define CF_STATUS_CARD_DETECT (1 << 0)
	42
	43	/* which chipselect (CS0..CS3) is used for CF (active low) */
030b1545	44	#define CF_CFG (CF_BASE + 0x02)
f74e48a5 DB	45
f74e48a5 DB	46	/* card reset */
030b1545	47	#define CF_CONTROL (CF_BASE + 0x04)
f74e48a5 DB	48	# define CF_CONTROL_RESET (1 << 0)
f74e48a5 DB	49
030b1545	50	#define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT))
f74e48a5 DB	51
	52	/--------------------------------------------------------------------------/
	53
	54	static const char driver_name[] = "omap_cf";
	55
	56	struct omap_cf_socket {
	57	struct pcmcia_socket socket;
	58
	59	struct timer_list timer;
	60	unsigned present:1;
	61	unsigned active:1;
	62
	63	struct platform_device *pdev;
	64	unsigned long phys_cf;
	65	u_int irq;
dcb9c392	66	struct resource iomem;
f74e48a5 DB	67	};
	68
	69	#define POLL_INTERVAL (2 * HZ)
	70
f74e48a5 DB	71	/--------------------------------------------------------------------------/
	72
	73	static int omap_cf_ss_init(struct pcmcia_socket *s)
	74	{
	75	return 0;
	76	}
	77
	78	/* the timer is primarily to kick this socket's pccardd */
41760d0e	79	static void omap_cf_timer(struct timer_list *t)
f74e48a5	80	{
41760d0e	81	struct omap_cf_socket *cf = from_timer(cf, t, timer);
f74e48a5 DB	82	unsigned present = omap_cf_present();
	83
	84	if (present != cf->present) {
	85	cf->present = present;
	86	pr_debug("%s: card %s\n", driver_name,
	87	present ? "present" : "gone");
	88	pcmcia_parse_events(&cf->socket, SS_DETECT);
	89	}
	90
	91	if (cf->active)
	92	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	93	}
	94
	95	/* This irq handler prevents "irqNNN: nobody cared" messages as drivers
	96	* claim the card's IRQ. It may also detect some card insertions, but
	97	* not removals; it can't always eliminate timer irqs.
	98	*/
7d12e780	99	static irqreturn_t omap_cf_irq(int irq, void *_cf)
f74e48a5	100	{
439dc05f KC	101	struct omap_cf_socket cf = (struct omap_cf_socket )_cf;
	102
	103	omap_cf_timer(&cf->timer);
f74e48a5 DB	104	return IRQ_HANDLED;
	105	}
	106
	107	static int omap_cf_get_status(struct pcmcia_socket s, u_int sp)
	108	{
	109	if (!sp)
	110	return -EINVAL;
	111
dcb9c392	112	/* NOTE CF is always 3VCARD */
f74e48a5 DB	113	if (omap_cf_present()) {
	114	struct omap_cf_socket *cf;
	115
	116	*sp = SS_READY \| SS_DETECT \| SS_POWERON \| SS_3VCARD;
	117	cf = container_of(s, struct omap_cf_socket, socket);
6f840afb	118	s->pcmcia_irq = 0;
dcb9c392	119	s->pci_irq = cf->irq;
f74e48a5 DB	120	} else
	121	*sp = 0;
	122	return 0;
	123	}
	124
	125	static int
	126	omap_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
	127	{
	128	u16 control;
	129
dcb9c392	130	/* REVISIT some non-OSK boards may support power switching */
f74e48a5 DB	131	switch (s->Vcc) {
	132	case 0:
	133	case 33:
	134	break;
	135	default:
	136	return -EINVAL;
	137	}
	138
030b1545	139	control = omap_readw(CF_CONTROL);
f74e48a5	140	if (s->flags & SS_RESET)
030b1545	141	omap_writew(CF_CONTROL_RESET, CF_CONTROL);
f74e48a5	142	else
030b1545	143	omap_writew(0, CF_CONTROL);
f74e48a5 DB	144
	145	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	146	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	147
	148	return 0;
	149	}
	150
	151	static int omap_cf_ss_suspend(struct pcmcia_socket *s)
	152	{
2e11cb4c	153	pr_debug("%s: %s\n", driver_name, __func__);
f74e48a5 DB	154	return omap_cf_set_socket(s, &dead_socket);
	155	}
	156
	157	/* regions are 2K each: mem, attrib, io (and reserved-for-ide) */
	158
	159	static int
	160	omap_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	161	{
	162	struct omap_cf_socket *cf;
	163
	164	cf = container_of(s, struct omap_cf_socket, socket);
	165	io->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	166	io->start = cf->phys_cf + SZ_4K;
	167	io->stop = io->start + SZ_2K - 1;
	168	return 0;
	169	}
	170
	171	static int
	172	omap_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
	173	{
	174	struct omap_cf_socket *cf;
	175
	176	if (map->card_start)
	177	return -EINVAL;
	178	cf = container_of(s, struct omap_cf_socket, socket);
	179	map->static_start = cf->phys_cf;
	180	map->flags &= MAP_ACTIVE\|MAP_ATTRIB\|MAP_16BIT;
	181	if (map->flags & MAP_ATTRIB)
	182	map->static_start += SZ_2K;
	183	return 0;
	184	}
	185
	186	static struct pccard_operations omap_cf_ops = {
	187	.init = omap_cf_ss_init,
	188	.suspend = omap_cf_ss_suspend,
	189	.get_status = omap_cf_get_status,
	190	.set_socket = omap_cf_set_socket,
	191	.set_io_map = omap_cf_set_io_map,
	192	.set_mem_map = omap_cf_set_mem_map,
	193	};
	194
	195	/--------------------------------------------------------------------------/
	196
	197	/*
	198	* NOTE: right now the only board-specific platform_data is
	199	* "what chipselect is used". Boards could want more.
	200	*/
	201
b6d2cccb	202	static int __init omap_cf_probe(struct platform_device *pdev)
f74e48a5 DB	203	{
	204	unsigned seg;
	205	struct omap_cf_socket *cf;
f74e48a5 DB	206	int irq;
	207	int status;
	208
b6d2cccb	209	seg = (int) pdev->dev.platform_data;
f74e48a5 DB	210	if (seg == 0 \|\| seg > 3)
	211	return -ENODEV;
	212
	213	/* either CFLASH.IREQ (INT_1610_CF) or some GPIO */
	214	irq = platform_get_irq(pdev, 0);
48944738	215	if (irq < 0)
f74e48a5 DB	216	return -EINVAL;
f74e48a5 DB	217
cd861280	218	cf = kzalloc(sizeof *cf, GFP_KERNEL);
f74e48a5 DB	219	if (!cf)
f74e48a5 DB	220	return -ENOMEM;
41760d0e	221	timer_setup(&cf->timer, omap_cf_timer, 0);
f74e48a5 DB	222
f74e48a5 DB	223	cf->pdev = pdev;
b6d2cccb	224	platform_set_drvdata(pdev, cf);
f74e48a5 DB	225
f74e48a5 DB	226	/* this primarily just shuts up irq handling noise */
dace1453	227	status = request_irq(irq, omap_cf_irq, IRQF_SHARED,
f74e48a5 DB	228	driver_name, cf);
	229	if (status < 0)
	230	goto fail0;
	231	cf->irq = irq;
	232	cf->socket.pci_irq = irq;
	233
	234	switch (seg) {
	235	/* NOTE: CS0 could be configured too ... */
	236	case 1:
	237	cf->phys_cf = OMAP_CS1_PHYS;
	238	break;
	239	case 2:
	240	cf->phys_cf = OMAP_CS2_PHYS;
	241	break;
	242	case 3:
	243	cf->phys_cf = omap_cs3_phys();
	244	break;
	245	default:
	246	goto fail1;
	247	}
dcb9c392 DB	248	cf->iomem.start = cf->phys_cf;
	249	cf->iomem.end = cf->iomem.end + SZ_8K - 1;
	250	cf->iomem.flags = IORESOURCE_MEM;
f74e48a5 DB	251
	252	/* pcmcia layer only remaps "real" memory */
	253	cf->socket.io_offset = (unsigned long)
	254	ioremap(cf->phys_cf + SZ_4K, SZ_2K);
70d3a462 WS	255	if (!cf->socket.io_offset) {
70d3a462 WS	256	status = -ENOMEM;
f74e48a5	257	goto fail1;
70d3a462	258	}
f74e48a5	259
70d3a462 WS	260	if (!request_mem_region(cf->phys_cf, SZ_8K, driver_name)) {
70d3a462 WS	261	status = -ENXIO;
f74e48a5	262	goto fail1;
70d3a462	263	}
f74e48a5 DB	264
	265	/* NOTE: CF conflicts with MMC1 */
	266	omap_cfg_reg(W11_1610_CF_CD1);
	267	omap_cfg_reg(P11_1610_CF_CD2);
	268	omap_cfg_reg(R11_1610_CF_IOIS16);
	269	omap_cfg_reg(V10_1610_CF_IREQ);
	270	omap_cfg_reg(W10_1610_CF_RESET);
	271
030b1545	272	omap_writew(~(1 << seg), CF_CFG);
f74e48a5 DB	273
	274	pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq);
	275
	276	/* NOTE: better EMIFS setup might support more cards; but the
	277	* TRM only shows how to affect regular flash signals, not their
	278	* CF/PCMCIA variants...
	279	*/
	280	pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name,
030b1545 TL	281	seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg)));
	282	omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */
	283	omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */
f74e48a5 DB	284
	285	/* CF uses armxor_ck, which is "always" available */
	286
	287	pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name,
030b1545 TL	288	omap_readw(CF_STATUS), omap_readw(CF_CFG),
030b1545 TL	289	omap_readw(CF_CONTROL),
f74e48a5 DB	290	omap_cf_present() ? "present" : "(not present)");
	291
	292	cf->socket.owner = THIS_MODULE;
b6d2cccb	293	cf->socket.dev.parent = &pdev->dev;
f74e48a5 DB	294	cf->socket.ops = &omap_cf_ops;
	295	cf->socket.resource_ops = &pccard_static_ops;
	296	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	297	\| SS_CAP_MEM_ALIGN;
	298	cf->socket.map_size = SZ_2K;
dcb9c392	299	cf->socket.io[0].res = &cf->iomem;
f74e48a5 DB	300
	301	status = pcmcia_register_socket(&cf->socket);
	302	if (status < 0)
	303	goto fail2;
	304
	305	cf->active = 1;
	306	mod_timer(&cf->timer, jiffies + POLL_INTERVAL);
	307	return 0;
	308
	309	fail2:
f74e48a5 DB	310	release_mem_region(cf->phys_cf, SZ_8K);
f74e48a5 DB	311	fail1:
3efa9970 AL	312	if (cf->socket.io_offset)
3efa9970 AL	313	iounmap((void __iomem *) cf->socket.io_offset);
f74e48a5 DB	314	free_irq(irq, cf);
	315	fail0:
	316	kfree(cf);
	317	return status;
	318	}
	319
b6d2cccb	320	static int __exit omap_cf_remove(struct platform_device *pdev)
f74e48a5	321	{
b6d2cccb	322	struct omap_cf_socket *cf = platform_get_drvdata(pdev);
f74e48a5 DB	323
	324	cf->active = 0;
	325	pcmcia_unregister_socket(&cf->socket);
	326	del_timer_sync(&cf->timer);
	327	iounmap((void __iomem *) cf->socket.io_offset);
	328	release_mem_region(cf->phys_cf, SZ_8K);
	329	free_irq(cf->irq, cf);
	330	kfree(cf);
	331	return 0;
	332	}
	333
b6d2cccb DB	334	static struct platform_driver omap_cf_driver = {
b6d2cccb DB	335	.driver = {
7c8c5673	336	.name = driver_name,
b6d2cccb DB	337	},
b6d2cccb DB	338	.remove = __exit_p(omap_cf_remove),
f74e48a5 DB	339	};
	340
	341	static int __init omap_cf_init(void)
	342	{
	343	if (cpu_is_omap16xx())
b6d2cccb	344	return platform_driver_probe(&omap_cf_driver, omap_cf_probe);
dcb9c392	345	return -ENODEV;
f74e48a5 DB	346	}
	347
	348	static void __exit omap_cf_exit(void)
	349	{
	350	if (cpu_is_omap16xx())
b6d2cccb	351	platform_driver_unregister(&omap_cf_driver);
f74e48a5 DB	352	}
	353
	354	module_init(omap_cf_init);
	355	module_exit(omap_cf_exit);
	356
	357	MODULE_DESCRIPTION("OMAP CF Driver");
	358	MODULE_LICENSE("GPL");
12c2c019	359	MODULE_ALIAS("platform:omap_cf");