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Merge git://git.kernel.org/pub/scm/linux/kernel/git/brodo/pcmcia-2.6
[linux-2.6-block.git] / drivers / pcmcia / hd64465_ss.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * Device driver for the PCMCIA controller module of the
3 * Hitachi HD64465 handheld companion chip.
4 *
5 * Note that the HD64465 provides a very thin PCMCIA host bridge
6 * layer, requiring a lot of the work of supporting cards to be
7 * performed by the processor. For example: mapping of card
8 * interrupts to processor IRQs is done by IRQ demuxing software;
9 * IO and memory mappings are fixed; setting voltages according
10 * to card Voltage Select pins etc is done in software.
11 *
12 * Note also that this driver uses only the simple, fixed,
13 * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
14 * HD64465. Larger mappings, smaller mappings, or mappings of
15 * different width to the same socket, are all possible only by
16 * involving the SH7750's MMU, which is considered unnecessary here.
17 * The downside is that it may be possible for some drivers to
18 * break because they need or expect 8-bit mappings.
19 *
20 * This driver currently supports only the following configuration:
21 * SH7750 CPU, HD64465, TPS2206 voltage control chip.
22 *
23 * by Greg Banks <gbanks@pocketpenguins.com>
24 * (c) 2000 PocketPenguins Inc
25 */
26
27#include <linux/types.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/string.h>
31#include <linux/kernel.h>
32#include <linux/ioport.h>
33#include <linux/mm.h>
34#include <linux/vmalloc.h>
35#include <asm/errno.h>
36#include <linux/irq.h>
37#include <linux/interrupt.h>
d052d1be 38#include <linux/platform_device.h>
1da177e4
LT		 39
40#include <asm/io.h>
41#include <asm/hd64465/hd64465.h>
42#include <asm/hd64465/io.h>
43
1da177e4
LT		 44#include <pcmcia/cs_types.h>
45#include <pcmcia/cs.h>
46#include <pcmcia/cistpl.h>
47#include <pcmcia/ds.h>
48#include <pcmcia/ss.h>
1da177e4
LT		 49
50#define MODNAME "hd64465_ss"
51
52/* #define HD64465_DEBUG 1 */
53
54#if HD64465_DEBUG
55#define DPRINTK(args...) printk(MODNAME ": " args)
56#else
57#define DPRINTK(args...)
58#endif
59
60extern int hd64465_io_debug;
61extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
62extern void p3_iounmap(void *addr);
63
64/*============================================================*/
65
66#define HS_IO_MAP_SIZE (64*1024)
67
68typedef struct hs_socket_t
69{
70 unsigned int number;
71 u_int irq;
72 u_long mem_base;
73 void *io_base;
74 u_long mem_length;
75 u_int ctrl_base;
76 socket_state_t state;
77 pccard_io_map io_maps[MAX_IO_WIN];
78 pccard_mem_map mem_maps[MAX_WIN];
79 struct pcmcia_socket socket;
80} hs_socket_t;
81
82
83
84#define HS_MAX_SOCKETS 2
85static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
86
87#define hs_in(sp, r) inb((sp)->ctrl_base + (r))
88#define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
89
90
91/* translate a boolean value to a bit in a register */
92#define bool_to_regbit(sp, r, bi, bo) \
93 do { \
94 unsigned short v = hs_in(sp, r); \
95 if (bo) \
96 v |= (bi); \
97 else \
98 v &= ~(bi); \
99 hs_out(sp, v, r); \
100 } while(0)
101
102/* register offsets from HD64465_REG_PCC[01]ISR */
103#define ISR 0x0
104#define GCR 0x2
105#define CSCR 0x4
106#define CSCIER 0x6
107#define SCR 0x8
108
109
110/* Mask and values for CSCIER register */
111#define IER_MASK 0x80
112#define IER_ON 0x3f /* interrupts on */
113#define IER_OFF 0x00 /* interrupts off */
114
115/*============================================================*/
116
117#if HD64465_DEBUG > 10
118
119static void cis_hex_dump(const unsigned char *x, int len)
120{
121 int i;
122
123 for (i=0 ; i<len ; i++)
124 {
125 if (!(i & 0xf))
126 printk("\n%08x", (unsigned)(x + i));
127 printk(" %02x", *(volatile unsigned short*)x);
128 x += 2;
129 }
130 printk("\n");
131}
132
133#endif
134/*============================================================*/
135
136/*
137 * This code helps create the illusion that the IREQ line from
138 * the PC card is mapped to one of the CPU's IRQ lines by the
139 * host bridge hardware (which is how every host bridge *except*
140 * the HD64465 works). In particular, it supports enabling
141 * and disabling the IREQ line by code which knows nothing
142 * about the host bridge (e.g. device drivers, IDE code) using
143 * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
144 * functions. Also, it supports sharing the mapped IRQ with
145 * real hardware IRQs from the -IRL0-3 lines.
146 */
147
148#define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
149static struct
150{
151 /* index is mapped irq number */
152 hs_socket_t *sock;
153 hw_irq_controller *old_handler;
154} hs_mapped_irq[HS_NUM_MAPPED_IRQS];
155
156static void hs_socket_enable_ireq(hs_socket_t *sp)
157{
158 unsigned short cscier;
159
160 DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
161
162 cscier = hs_in(sp, CSCIER);
163 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
164 cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
165 hs_out(sp, cscier, CSCIER);
166}
167
168static void hs_socket_disable_ireq(hs_socket_t *sp)
169{
170 unsigned short cscier;
171
172 DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
173
174 cscier = hs_in(sp, CSCIER);
175 cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
176 hs_out(sp, cscier, CSCIER);
177}
178
179static unsigned int hs_startup_irq(unsigned int irq)
180{
181 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
182 hs_mapped_irq[irq].old_handler->startup(irq);
183 return 0;
184}
185
186static void hs_shutdown_irq(unsigned int irq)
187{
188 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
189 hs_mapped_irq[irq].old_handler->shutdown(irq);
190}
191
192static void hs_enable_irq(unsigned int irq)
193{
194 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
195 hs_mapped_irq[irq].old_handler->enable(irq);
196}
197
198static void hs_disable_irq(unsigned int irq)
199{
200 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
201 hs_mapped_irq[irq].old_handler->disable(irq);
202}
203
204extern struct hw_interrupt_type no_irq_type;
205
206static void hs_mask_and_ack_irq(unsigned int irq)
207{
208 hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
209 /* ack_none() spuriously complains about an unexpected IRQ */
210 if (hs_mapped_irq[irq].old_handler != &no_irq_type)
211 hs_mapped_irq[irq].old_handler->ack(irq);
212}
213
214static void hs_end_irq(unsigned int irq)
215{
216 hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
217 hs_mapped_irq[irq].old_handler->end(irq);
218}
219
220
221static struct hw_interrupt_type hd64465_ss_irq_type = {
222 .typename = "PCMCIA-IRQ",
223 .startup = hs_startup_irq,
224 .shutdown = hs_shutdown_irq,
225 .enable = hs_enable_irq,
226 .disable = hs_disable_irq,
227 .ack = hs_mask_and_ack_irq,
228 .end = hs_end_irq
229};
230
231/*
232 * This function should only ever be called with interrupts disabled.
233 */
234static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
235{
236 DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
237
238 if (irq >= HS_NUM_MAPPED_IRQS)
239 return;
240
241 hs_mapped_irq[irq].sock = sp;
242 /* insert ourselves as the irq controller */
d1bef4ed
IM		 243 hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
244 irq_desc[irq].chip = &hd64465_ss_irq_type;
1da177e4
LT		 245}
246
247
248/*
249 * This function should only ever be called with interrupts disabled.
250 */
251static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
252{
253 DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
254
255 if (irq >= HS_NUM_MAPPED_IRQS)
256 return;
257
258 /* restore the original irq controller */
d1bef4ed 259 irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
1da177e4
LT		 260}
261
262/*============================================================*/
263
264
265/*
266 * Set Vpp and Vcc (in tenths of a Volt). Does not
267 * support the hi-Z state.
268 *
269 * Note, this assumes the board uses a TPS2206 chip to control
270 * the Vcc and Vpp voltages to the hs_sockets. If your board
271 * uses the MIC2563 (also supported by the HD64465) then you
272 * will have to modify this function.
273 */
274 /* 0V 3.3V 5.5V */
275static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
276static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
277
278static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
279{
280 u_int psr;
281 u_int vcci = 0;
282 u_int sock = sp->number;
283
284 DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
285
286 switch (Vcc)
287 {
288 case 0: vcci = 0; break;
289 case 33: vcci = 1; break;
290 case 50: vcci = 2; break;
291 default: return 0;
292 }
293
294 /* Note: Vpp = 120 not supported -- Greg Banks */
295 if (Vpp != 0 && Vpp != Vcc)
296 return 0;
297
298 /* The PSR register holds 8 of the 9 bits which control
299 * the TPS2206 via its serial interface.
300 */
301 psr = inw(HD64465_REG_PCCPSR);
302 switch (sock)
303 {
304 case 0:
305 psr &= 0x0f;
306 psr |= hs_tps2206_avcc[vcci];
307 psr |= (Vpp == 0 ? 0x00 : 0x02);
308 break;
309 case 1:
310 psr &= 0xf0;
311 psr |= hs_tps2206_bvcc[vcci];
312 psr |= (Vpp == 0 ? 0x00 : 0x20);
313 break;
314 };
315 outw(psr, HD64465_REG_PCCPSR);
316
317 return 1;
318}
319
320
321/*============================================================*/
322
323/*
324 * Drive the RESET line to the card.
325 */
326static void hs_reset_socket(hs_socket_t *sp, int on)
327{
328 unsigned short v;
329
330 v = hs_in(sp, GCR);
331 if (on)
332 v |= HD64465_PCCGCR_PCCR;
333 else
334 v &= ~HD64465_PCCGCR_PCCR;
335 hs_out(sp, v, GCR);
336}
337
338/*============================================================*/
339
340static int hs_init(struct pcmcia_socket *s)
341{
342 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
343
344 DPRINTK("hs_init(%d)\n", sp->number);
345
346 return 0;
347}
348
349/*============================================================*/
350
351
352static int hs_get_status(struct pcmcia_socket *s, u_int *value)
353{
354 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
355 unsigned int isr;
356 u_int status = 0;
357
358
359 isr = hs_in(sp, ISR);
360
361 /* Card is seated and powered when *both* CD pins are low */
362 if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
363 {
364 status |= SS_DETECT; /* card present */
365
366 switch (isr & HD64465_PCCISR_PBVD_MASK)
367 {
368 case HD64465_PCCISR_PBVD_BATGOOD:
369 break;
370 case HD64465_PCCISR_PBVD_BATWARN:
371 status |= SS_BATWARN;
372 break;
373 default:
374 status |= SS_BATDEAD;
375 break;
376 }
377
378 if (isr & HD64465_PCCISR_PREADY)
379 status |= SS_READY;
380
381 if (isr & HD64465_PCCISR_PMWP)
382 status |= SS_WRPROT;
383
384 /* Voltage Select pins interpreted as per Table 4-5 of the std.
385 * Assuming we have the TPS2206, the socket is a "Low Voltage
386 * key, 3.3V and 5V available, no X.XV available".
387 */
388 switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
389 {
390 case HD64465_PCCISR_PVS1:
391 printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
392 status = 0;
393 break;
394 case 0:
395 case HD64465_PCCISR_PVS2:
396 /* 3.3V */
397 status |= SS_3VCARD;
398 break;
399 case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
400 /* 5V */
401 break;
402 }
403
404 /* TODO: SS_POWERON */
405 /* TODO: SS_STSCHG */
406 }
407
408 DPRINTK("hs_get_status(%d) = %x\n", sock, status);
409
410 *value = status;
411 return 0;
412}
413
414/*============================================================*/
415
1da177e4
LT		 416static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
417{
418 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
419 u_long flags;
420 u_int changed;
421 unsigned short cscier;
422
423 DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
424 sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
425
426 local_irq_save(flags); /* Don't want interrupts happening here */
427
428 if (state->Vpp != sp->state.Vpp ||
429 state->Vcc != sp->state.Vcc) {
430 if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
431 local_irq_restore(flags);
432 return -EINVAL;
433 }
434 }
435
436/* hd64465_io_debug = 1; */
437 /*
438 * Handle changes in the Card Status Change mask,
439 * by propagating to the CSCR register
440 */
441 changed = sp->state.csc_mask ^ state->csc_mask;
442 cscier = hs_in(sp, CSCIER);
443
444 if (changed & SS_DETECT) {
445 if (state->csc_mask & SS_DETECT)
446 cscier |= HD64465_PCCCSCIER_PCDE;
447 else
448 cscier &= ~HD64465_PCCCSCIER_PCDE;
449 }
450
451 if (changed & SS_READY) {
452 if (state->csc_mask & SS_READY)
453 cscier |= HD64465_PCCCSCIER_PRE;
454 else
455 cscier &= ~HD64465_PCCCSCIER_PRE;
456 }
457
458 if (changed & SS_BATDEAD) {
459 if (state->csc_mask & SS_BATDEAD)
460 cscier |= HD64465_PCCCSCIER_PBDE;
461 else
462 cscier &= ~HD64465_PCCCSCIER_PBDE;
463 }
464
465 if (changed & SS_BATWARN) {
466 if (state->csc_mask & SS_BATWARN)
467 cscier |= HD64465_PCCCSCIER_PBWE;
468 else
469 cscier &= ~HD64465_PCCCSCIER_PBWE;
470 }
471
472 if (changed & SS_STSCHG) {
473 if (state->csc_mask & SS_STSCHG)
474 cscier |= HD64465_PCCCSCIER_PSCE;
475 else
476 cscier &= ~HD64465_PCCCSCIER_PSCE;
477 }
478
479 hs_out(sp, cscier, CSCIER);
480
481 if (sp->state.io_irq && !state->io_irq)
482 hs_unmap_irq(sp, sp->state.io_irq);
483 else if (!sp->state.io_irq && state->io_irq)
484 hs_map_irq(sp, state->io_irq);
485
486
487 /*
488 * Handle changes in the flags field,
489 * by propagating to config registers.
490 */
491 changed = sp->state.flags ^ state->flags;
492
493 if (changed & SS_IOCARD) {
494 DPRINTK("card type: %s\n",
495 (state->flags & SS_IOCARD ? "i/o" : "memory" ));
496 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
497 state->flags & SS_IOCARD);
498 }
499
500 if (changed & SS_RESET) {
501 DPRINTK("%s reset card\n",
502 (state->flags & SS_RESET ? "start" : "stop"));
503 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
504 state->flags & SS_RESET);
505 }
506
507 if (changed & SS_OUTPUT_ENA) {
508 DPRINTK("%sabling card output\n",
509 (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
510 bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
511 state->flags & SS_OUTPUT_ENA);
512 }
513
514 /* TODO: SS_SPKR_ENA */
515
516/* hd64465_io_debug = 0; */
517 sp->state = *state;
518
519 local_irq_restore(flags);
520
521#if HD64465_DEBUG > 10
522 if (state->flags & SS_OUTPUT_ENA)
523 cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
524#endif
525 return 0;
526}
527
528/*============================================================*/
529
530static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
531{
532 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
533 int map = io->map;
534 int sock = sp->number;
535 struct pccard_io_map *sio;
536 pgprot_t prot;
537
538 DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
539 sock, map, io->flags, io->speed, io->start, io->stop);
540 if (map >= MAX_IO_WIN)
541 return -EINVAL;
542 sio = &sp->io_maps[map];
543
544 /* check for null changes */
545 if (io->flags == sio->flags &&
546 io->start == sio->start &&
547 io->stop == sio->stop)
548 return 0;
549
550 if (io->flags & MAP_AUTOSZ)
551 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
552 else if (io->flags & MAP_16BIT)
553 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
554 else
555 prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
556
557 /* TODO: handle MAP_USE_WAIT */
558 if (io->flags & MAP_USE_WAIT)
559 printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
560 /* TODO: handle MAP_PREFETCH */
561 if (io->flags & MAP_PREFETCH)
562 printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
563 /* TODO: handle MAP_WRPROT */
564 if (io->flags & MAP_WRPROT)
565 printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
566 /* TODO: handle MAP_0WS */
567 if (io->flags & MAP_0WS)
568 printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
569
570 if (io->flags & MAP_ACTIVE) {
571 unsigned long pstart, psize, paddrbase;
572
573 paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
574 pstart = io->start & PAGE_MASK;
575 psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
576
577 /*
578 * Change PTEs in only that portion of the mapping requested
579 * by the caller. This means that most of the time, most of
580 * the PTEs in the io_vma will be unmapped and only the bottom
581 * page will be mapped. But the code allows for weird cards
582 * that might want IO ports > 4K.
583 */
584 sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
585
586 /*
587 * Change the mapping used by inb() outb() etc
588 */
589 hd64465_port_map(io->start,
590 io->stop - io->start + 1,
591 (unsigned long)sp->io_base + io->start, 0);
592 } else {
593 hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
594 p3_iounmap(sp->io_base);
595 }
596
597 *sio = *io;
598 return 0;
599}
600
601/*============================================================*/
602
603static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
604{
605 hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
606 struct pccard_mem_map *smem;
607 int map = mem->map;
608 unsigned long paddr;
609
610#if 0
611 DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
612 sock, map, mem->flags, mem->card_start);
613#endif
614
615 if (map >= MAX_WIN)
616 return -EINVAL;
617 smem = &sp->mem_maps[map];
618
619 paddr = sp->mem_base; /* base of Attribute mapping */
620 if (!(mem->flags & MAP_ATTRIB))
621 paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
622 paddr += mem->card_start;
623
624 /* Because we specified SS_CAP_STATIC_MAP, we are obliged
625 * at this time to report the system address corresponding
626 * to the card address requested. This is how Socket Services
627 * queries our fixed mapping. I wish this fact had been
628 * documented - Greg Banks.
629 */
630 mem->static_start = paddr;
631
632 *smem = *mem;
633
634 return 0;
635}
636
637/* TODO: do we need to use the MMU to access Common memory ??? */
638
639/*============================================================*/
640
641/*
642 * This function is registered with the HD64465 glue code to do a
643 * secondary demux step on the PCMCIA interrupts. It handles
644 * mapping the IREQ request from the card to a standard Linux
645 * IRQ, as requested by SocketServices.
646 */
647static int hs_irq_demux(int irq, void *dev)
648{
c7bec5ab 649 hs_socket_t *sp = dev;
1da177e4
LT		 650 u_int cscr;
651
652 DPRINTK("hs_irq_demux(irq=%d)\n", irq);
653
654 if (sp->state.io_irq &&
655 (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
656 cscr &= ~HD64465_PCCCSCR_PIREQ;
657 hs_out(sp, cscr, CSCR);
658 return sp->state.io_irq;
659 }
660
661 return irq;
662}
663
664/*============================================================*/
665
666/*
667 * Interrupt handling routine.
668 */
669
7d12e780 670static irqreturn_t hs_interrupt(int irq, void *dev)
1da177e4 671{
c7bec5ab 672 hs_socket_t *sp = dev;
1da177e4
LT		 673 u_int events = 0;
674 u_int cscr;
c7bec5ab 675
1da177e4
LT		 676 cscr = hs_in(sp, CSCR);
677
678 DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
679
680 /* check for bus-related changes to be reported to Socket Services */
681 if (cscr & HD64465_PCCCSCR_PCDC) {
682 /* double-check for a 16-bit card, as we don't support CardBus */
683 if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
684 printk(KERN_NOTICE MODNAME
685 ": socket %d, card not a supported card type or not inserted correctly\n",
686 sp->number);
687 /* Don't do the rest unless a card is present */
688 cscr &= ~(HD64465_PCCCSCR_PCDC|
689 HD64465_PCCCSCR_PRC|
690 HD64465_PCCCSCR_PBW|
691 HD64465_PCCCSCR_PBD|
692 HD64465_PCCCSCR_PSC);
693 } else {
694 cscr &= ~HD64465_PCCCSCR_PCDC;
695 events |= SS_DETECT; /* card insertion or removal */
696 }
697 }
698 if (cscr & HD64465_PCCCSCR_PRC) {
699 cscr &= ~HD64465_PCCCSCR_PRC;
700 events |= SS_READY; /* ready signal changed */
701 }
702 if (cscr & HD64465_PCCCSCR_PBW) {
703 cscr &= ~HD64465_PCCCSCR_PSC;
704 events |= SS_BATWARN; /* battery warning */
705 }
706 if (cscr & HD64465_PCCCSCR_PBD) {
707 cscr &= ~HD64465_PCCCSCR_PSC;
708 events |= SS_BATDEAD; /* battery dead */
709 }
710 if (cscr & HD64465_PCCCSCR_PSC) {
711 cscr &= ~HD64465_PCCCSCR_PSC;
712 events |= SS_STSCHG; /* STSCHG (status changed) signal */
713 }
714
715 if (cscr & HD64465_PCCCSCR_PIREQ) {
716 cscr &= ~HD64465_PCCCSCR_PIREQ;
717
718 /* This should have been dealt with during irq demux */
719 printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
720 }
721
722 hs_out(sp, cscr, CSCR);
723
724 if (events)
725 pcmcia_parse_events(&sp->socket, events);
726
727 return IRQ_HANDLED;
728}
729
730/*============================================================*/
731
732static struct pccard_operations hs_operations = {
733 .init = hs_init,
734 .get_status = hs_get_status,
1da177e4
LT		 735 .set_socket = hs_set_socket,
736 .set_io_map = hs_set_io_map,
737 .set_mem_map = hs_set_mem_map,
738};
739
740static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
741 unsigned int ctrl_base)
742{
743 unsigned short v;
744 int i, err;
745
746 memset(sp, 0, sizeof(*sp));
747 sp->irq = irq;
748 sp->mem_base = mem_base;
749 sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
750 sp->ctrl_base = ctrl_base;
751
752 for (i=0 ; i<MAX_IO_WIN ; i++)
753 sp->io_maps[i].map = i;
754 for (i=0 ; i<MAX_WIN ; i++)
755 sp->mem_maps[i].map = i;
756
757 hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
758
dace1453 759 if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
1da177e4
LT		 760 return err;
761 if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
762 sp->mem_base = 0;
763 return -ENOMEM;
764 }
765
766
767 /* According to section 3.2 of the PCMCIA standard, low-voltage
768 * capable cards must implement cold insertion, i.e. Vpp and
769 * Vcc set to 0 before card is inserted.
770 */
771 /*hs_set_voltages(sp, 0, 0);*/
772
773 /* hi-Z the outputs to the card and set 16MB map mode */
774 v = hs_in(sp, GCR);
775 v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
776 hs_out(sp, v, GCR);
777
778 v = hs_in(sp, GCR);
779 v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
780 hs_out(sp, v, GCR);
781
782 v = hs_in(sp, GCR);
783 v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
784 hs_out(sp, v, GCR);
785
786 v = hs_in(sp, GCR);
787 /* lowest 16MB of Common */
788 v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
789 hs_out(sp, v, GCR);
790
791 hs_reset_socket(sp, 1);
792
793 printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
794 i, sp->mem_base, sp->irq);
795
796 return 0;
797}
798
799static void hs_exit_socket(hs_socket_t *sp)
800{
801 unsigned short cscier, gcr;
802 unsigned long flags;
803
804 local_irq_save(flags);
805
806 /* turn off interrupts in hardware */
807 cscier = hs_in(sp, CSCIER);
808 cscier = (cscier & IER_MASK) | IER_OFF;
809 hs_out(sp, cscier, CSCIER);
810
811 /* hi-Z the outputs to the card */
812 gcr = hs_in(sp, GCR);
813 gcr &= HD64465_PCCGCR_PDRV;
814 hs_out(sp, gcr, GCR);
815
816 /* power the card down */
817 hs_set_voltages(sp, 0, 0);
818
819 if (sp->mem_base != 0)
820 release_mem_region(sp->mem_base, sp->mem_length);
821 if (sp->irq != 0) {
822 free_irq(sp->irq, hs_interrupt);
823 hd64465_unregister_irq_demux(sp->irq);
824 }
825
826 local_irq_restore(flags);
827}
828
1da177e4
LT		 829static struct device_driver hd64465_driver = {
830 .name = "hd64465-pcmcia",
831 .bus = &platform_bus_type,
9480e307
RK		 832 .suspend = pcmcia_socket_dev_suspend,
833 .resume = pcmcia_socket_dev_resume,
1da177e4
LT		 834};
835
836static struct platform_device hd64465_device = {
837 .name = "hd64465-pcmcia",
838 .id = 0,
839};
840
841static int __init init_hs(void)
842{
843 int i;
844 unsigned short v;
845
846/* hd64465_io_debug = 1; */
847 if (driver_register(&hd64465_driver))
848 return -EINVAL;
849
850 /* Wake both sockets out of STANDBY mode */
851 /* TODO: wait 15ms */
852 v = inw(HD64465_REG_SMSCR);
853 v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
854 outw(v, HD64465_REG_SMSCR);
855
856 /* keep power controller out of shutdown mode */
857 v = inb(HD64465_REG_PCC0SCR);
858 v |= HD64465_PCCSCR_SHDN;
859 outb(v, HD64465_REG_PCC0SCR);
860
861 /* use serial (TPS2206) power controller */
862 v = inb(HD64465_REG_PCC0CSCR);
863 v |= HD64465_PCCCSCR_PSWSEL;
864 outb(v, HD64465_REG_PCC0CSCR);
865
866 /*
867 * Setup hs_sockets[] structures and request system resources.
868 * TODO: on memory allocation failure, power down the socket
869 * before quitting.
870 */
871 for (i=0; i<HS_MAX_SOCKETS; i++) {
872 hs_set_voltages(&hs_sockets[i], 0, 0);
873
874 hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
875 hs_sockets[i].socket.resource_ops = &pccard_static_ops;
876 hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
877 hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
878
879 hs_sockets[i].socket.owner = THIS_MODULE;
880 hs_sockets[i].socket.ss_entry = &hs_operations;
881 }
882
883 i = hs_init_socket(&hs_sockets[0],
884 HD64465_IRQ_PCMCIA0,
885 HD64465_PCC0_BASE,
886 HD64465_REG_PCC0ISR);
887 if (i < 0) {
888 unregister_driver(&hd64465_driver);
889 return i;
890 }
891 i = hs_init_socket(&hs_sockets[1],
892 HD64465_IRQ_PCMCIA1,
893 HD64465_PCC1_BASE,
894 HD64465_REG_PCC1ISR);
895 if (i < 0) {
896 unregister_driver(&hd64465_driver);
897 return i;
898 }
899
900/* hd64465_io_debug = 0; */
901
902 platform_device_register(&hd64465_device);
903
904 for (i=0; i<HS_MAX_SOCKETS; i++) {
905 unsigned int ret;
dfe461ae 906 hs_sockets[i].socket.dev.parent = &hd64465_device.dev;
1da177e4
LT		 907 hs_sockets[i].number = i;
908 ret = pcmcia_register_socket(&hs_sockets[i].socket);
909 if (ret && i)
910 pcmcia_unregister_socket(&hs_sockets[0].socket);
911 }
912
913 return 0;
914}
915
916static void __exit exit_hs(void)
917{
918 int i;
919
920 for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
921 pcmcia_unregister_socket(&hs_sockets[i].socket);
922 hs_exit_socket(&hs_sockets[i]);
923 }
924
925 platform_device_unregister(&hd64465_device);
926 unregister_driver(&hd64465_driver);
927}
928
929module_init(init_hs);
930module_exit(exit_hs);
931
932/*============================================================*/
933/*END*/
Linux 6.x block layer and io_uring tree(s)