[linux-2.6-block.git] / drivers / pcmcia / cardbus.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * cardbus.c -- 16-bit PCMCIA core support
 *
 * The initial developer of the original code is David A. Hinds
 * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
 *
 * (C) 1999		David A. Hinds
 */

/*
 * Cardbus handling has been re-written to be more of a PCI bridge thing,
 * and the PCI code basically does all the resource handling.
 *
 *		Linus, Jan 2000
 */


#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>

#include <pcmcia/ss.h>


static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq)
{
	struct pci_dev *dev;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		u8 irq_pin;

		/*
		 * Since there is only one interrupt available to
		 * CardBus devices, all devices downstream of this
		 * device must be using this IRQ.
		 */
		pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
		if (irq_pin) {
			dev->irq = irq;
			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
		}

		/*
		 * Some controllers transfer very slowly with 0 CLS.
		 * Configure it.  This may fail as CLS configuration
		 * is mandatory only for MWI.
		 */
		pci_set_cacheline_size(dev);

		if (dev->subordinate)
			cardbus_config_irq_and_cls(dev->subordinate, irq);
	}
}

/**
 * cb_alloc() - add CardBus device
 * @s:		the pcmcia_socket where the CardBus device is located
 *
 * cb_alloc() allocates the kernel data structures for a Cardbus device
 * and handles the lowest level PCI device setup issues.
 */
int __ref cb_alloc(struct pcmcia_socket *s)
{
	struct pci_bus *bus = s->cb_dev->subordinate;
	struct pci_dev *dev;
	unsigned int max, pass;

	pci_lock_rescan_remove();

	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
	pci_fixup_cardbus(bus);

	max = bus->busn_res.start;
	for (pass = 0; pass < 2; pass++)
		for_each_pci_bridge(dev, bus)
			max = pci_scan_bridge(bus, dev, max, pass);

	/*
	 * Size all resources below the CardBus controller.
	 */
	pci_bus_size_bridges(bus);
	pci_bus_assign_resources(bus);
	cardbus_config_irq_and_cls(bus, s->pci_irq);

	/* socket specific tune function */
	if (s->tune_bridge)
		s->tune_bridge(s, bus);

	pci_bus_add_devices(bus);

	pci_unlock_rescan_remove();
	return 0;
}

/**
 * cb_free() - remove CardBus device
 * @s:		the pcmcia_socket where the CardBus device was located
 *
 * cb_free() handles the lowest level PCI device cleanup.
 */
void cb_free(struct pcmcia_socket *s)
{
	struct pci_dev *bridge, *dev, *tmp;
	struct pci_bus *bus;

	bridge = s->cb_dev;
	if (!bridge)
		return;

	bus = bridge->subordinate;
	if (!bus)
		return;

	pci_lock_rescan_remove();

	list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list)
		pci_stop_and_remove_bus_device(dev);

	pci_unlock_rescan_remove();
}
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* cardbus.c -- 16-bit PCMCIA core support
	4	*
1da177e4 LT	5	* The initial developer of the original code is David A. Hinds
	6	* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
	7	* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
	8	*
	9	* (C) 1999 David A. Hinds
	10	*/
	11
	12	/*
	13	* Cardbus handling has been re-written to be more of a PCI bridge thing,
	14	* and the PCI code basically does all the resource handling.
	15	*
	16	* Linus, Jan 2000
	17	*/
	18
	19
1da177e4	20	#include <linux/kernel.h>
57197b9b	21	#include <linux/module.h>
1da177e4	22	#include <linux/pci.h>
1da177e4	23
1da177e4	24	#include <pcmcia/ss.h>
1da177e4	25
1da177e4	26
15ea76d4	27	static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq)
1da177e4 LT	28	{
	29	struct pci_dev *dev;
	30
	31	list_for_each_entry(dev, &bus->devices, bus_list) {
	32	u8 irq_pin;
	33
15ea76d4 TH	34	/*
	35	* Since there is only one interrupt available to
	36	* CardBus devices, all devices downstream of this
	37	* device must be using this IRQ.
	38	*/
1da177e4 LT	39	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
	40	if (irq_pin) {
	41	dev->irq = irq;
	42	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
	43	}
	44
15ea76d4 TH	45	/*
	46	* Some controllers transfer very slowly with 0 CLS.
	47	* Configure it. This may fail as CLS configuration
	48	* is mandatory only for MWI.
	49	*/
	50	pci_set_cacheline_size(dev);
	51
1da177e4	52	if (dev->subordinate)
15ea76d4	53	cardbus_config_irq_and_cls(dev->subordinate, irq);
1da177e4 LT	54	}
	55	}
	56
57197b9b DB	57	/**
	58	* cb_alloc() - add CardBus device
	59	* @s: the pcmcia_socket where the CardBus device is located
	60	*
	61	* cb_alloc() allocates the kernel data structures for a Cardbus device
	62	* and handles the lowest level PCI device setup issues.
	63	*/
9fea84f4	64	int __ref cb_alloc(struct pcmcia_socket *s)
1da177e4 LT	65	{
	66	struct pci_bus *bus = s->cb_dev->subordinate;
	67	struct pci_dev *dev;
	68	unsigned int max, pass;
	69
5ef68e88 RW	70	pci_lock_rescan_remove();
5ef68e88 RW	71
1da177e4	72	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
6e83ee07	73	pci_fixup_cardbus(bus);
1da177e4	74
b918c62e	75	max = bus->busn_res.start;
1da177e4	76	for (pass = 0; pass < 2; pass++)
24a0c654 AS	77	for_each_pci_bridge(dev, bus)
24a0c654 AS	78	max = pci_scan_bridge(bus, dev, max, pass);
1da177e4 LT	79
	80	/*
	81	* Size all resources below the CardBus controller.
	82	*/
	83	pci_bus_size_bridges(bus);
	84	pci_bus_assign_resources(bus);
15ea76d4	85	cardbus_config_irq_and_cls(bus, s->pci_irq);
8c3520d4 DR	86
	87	/* socket specific tune function */
	88	if (s->tune_bridge)
	89	s->tune_bridge(s, bus);
	90
1da177e4 LT	91	pci_bus_add_devices(bus);
1da177e4 LT	92
5ef68e88	93	pci_unlock_rescan_remove();
4c89e88b	94	return 0;
1da177e4 LT	95	}
1da177e4 LT	96
57197b9b DB	97	/**
	98	* cb_free() - remove CardBus device
	99	* @s: the pcmcia_socket where the CardBus device was located
	100	*
	101	* cb_free() handles the lowest level PCI device cleanup.
	102	*/
9fea84f4	103	void cb_free(struct pcmcia_socket *s)
1da177e4	104	{
0a140577 BH	105	struct pci_dev bridge, dev, *tmp;
0a140577 BH	106	struct pci_bus *bus;
1da177e4	107
0a140577 BH	108	bridge = s->cb_dev;
	109	if (!bridge)
	110	return;
	111
	112	bus = bridge->subordinate;
	113	if (!bus)
	114	return;
	115
5ef68e88 RW	116	pci_lock_rescan_remove();
5ef68e88 RW	117
0a140577 BH	118	list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list)
0a140577 BH	119	pci_stop_and_remove_bus_device(dev);
5ef68e88 RW	120
5ef68e88 RW	121	pci_unlock_rescan_remove();
1da177e4	122	}