[linux-2.6-block.git] / drivers / pci / rom.c

/*
 * drivers/pci/rom.c
 *
 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
 *
 * PCI ROM access routines
 */
#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/pci.h>
#include <linux/slab.h>

#include "pci.h"

/**
 * pci_enable_rom - enable ROM decoding for a PCI device
 * @pdev: PCI device to enable
 *
 * Enable ROM decoding on @dev.  This involves simply turning on the last
 * bit of the PCI ROM BAR.  Note that some cards may share address decoders
 * between the ROM and other resources, so enabling it may disable access
 * to MMIO registers or other card memory.
 */
int pci_enable_rom(struct pci_dev *pdev)
{
	struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
	struct pci_bus_region region;
	u32 rom_addr;

	if (!res->flags)
		return -1;

	pcibios_resource_to_bus(pdev->bus, &region, res);
	pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
	rom_addr &= ~PCI_ROM_ADDRESS_MASK;
	rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
	pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
	return 0;
}
EXPORT_SYMBOL_GPL(pci_enable_rom);

/**
 * pci_disable_rom - disable ROM decoding for a PCI device
 * @pdev: PCI device to disable
 *
 * Disable ROM decoding on a PCI device by turning off the last bit in the
 * ROM BAR.
 */
void pci_disable_rom(struct pci_dev *pdev)
{
	u32 rom_addr;
	pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
	rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
	pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
}
EXPORT_SYMBOL_GPL(pci_disable_rom);

/**
 * pci_get_rom_size - obtain the actual size of the ROM image
 * @pdev: target PCI device
 * @rom: kernel virtual pointer to image of ROM
 * @size: size of PCI window
 *  return: size of actual ROM image
 *
 * Determine the actual length of the ROM image.
 * The PCI window size could be much larger than the
 * actual image size.
 */
size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
{
	void __iomem *image;
	int last_image;

	image = rom;
	do {
		void __iomem *pds;
		/* Standard PCI ROMs start out with these bytes 55 AA */
		if (readb(image) != 0x55) {
			dev_err(&pdev->dev, "Invalid ROM contents\n");
			break;
		}
		if (readb(image + 1) != 0xAA)
			break;
		/* get the PCI data structure and check its signature */
		pds = image + readw(image + 24);
		if (readb(pds) != 'P')
			break;
		if (readb(pds + 1) != 'C')
			break;
		if (readb(pds + 2) != 'I')
			break;
		if (readb(pds + 3) != 'R')
			break;
		last_image = readb(pds + 21) & 0x80;
		/* this length is reliable */
		image += readw(pds + 16) * 512;
	} while (!last_image);

	/* never return a size larger than the PCI resource window */
	/* there are known ROMs that get the size wrong */
	return min((size_t)(image - rom), size);
}

/**
 * pci_map_rom - map a PCI ROM to kernel space
 * @pdev: pointer to pci device struct
 * @size: pointer to receive size of pci window over ROM
 *
 * Return: kernel virtual pointer to image of ROM
 *
 * Map a PCI ROM into kernel space. If ROM is boot video ROM,
 * the shadow BIOS copy will be returned instead of the
 * actual ROM.
 */
void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
{
	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
	loff_t start;
	void __iomem *rom;

	/*
	 * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
	 * memory map if the VGA enable bit of the Bridge Control register is
	 * set for embedded VGA.
	 */
	if (res->flags & IORESOURCE_ROM_SHADOW) {
		/* primary video rom always starts here */
		start = (loff_t)0xC0000;
		*size = 0x20000; /* cover C000:0 through E000:0 */
	} else {
		if (res->flags &
			(IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
			*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
			return (void __iomem *)(unsigned long)
				pci_resource_start(pdev, PCI_ROM_RESOURCE);
		} else {
			/* assign the ROM an address if it doesn't have one */
			if (res->parent == NULL &&
			    pci_assign_resource(pdev, PCI_ROM_RESOURCE))
				return NULL;
			start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
			*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
			if (*size == 0)
				return NULL;

			/* Enable ROM space decodes */
			if (pci_enable_rom(pdev))
				return NULL;
		}
	}

	rom = ioremap(start, *size);
	if (!rom) {
		/* restore enable if ioremap fails */
		if (!(res->flags & (IORESOURCE_ROM_ENABLE |
				    IORESOURCE_ROM_SHADOW |
				    IORESOURCE_ROM_COPY)))
			pci_disable_rom(pdev);
		return NULL;
	}

	/*
	 * Try to find the true size of the ROM since sometimes the PCI window
	 * size is much larger than the actual size of the ROM.
	 * True size is important if the ROM is going to be copied.
	 */
	*size = pci_get_rom_size(pdev, rom, *size);
	return rom;
}
EXPORT_SYMBOL(pci_map_rom);

/**
 * pci_unmap_rom - unmap the ROM from kernel space
 * @pdev: pointer to pci device struct
 * @rom: virtual address of the previous mapping
 *
 * Remove a mapping of a previously mapped ROM
 */
void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
{
	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];

	if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
		return;

	iounmap(rom);

	/* Disable again before continuing, leave enabled if pci=rom */
	if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW)))
		pci_disable_rom(pdev);
}
EXPORT_SYMBOL(pci_unmap_rom);

/**
 * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
 * @pdev: pointer to pci device struct
 *
 * Free the copied ROM if we allocated one.
 */
void pci_cleanup_rom(struct pci_dev *pdev)
{
	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];

	if (res->flags & IORESOURCE_ROM_COPY) {
		kfree((void *)(unsigned long)res->start);
		res->flags |= IORESOURCE_UNSET;
		res->flags &= ~IORESOURCE_ROM_COPY;
		res->start = 0;
		res->end = 0;
	}
}

/**
 * pci_platform_rom - provides a pointer to any ROM image provided by the
 * platform
 * @pdev: pointer to pci device struct
 * @size: pointer to receive size of pci window over ROM
 */
void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
{
	if (pdev->rom && pdev->romlen) {
		*size = pdev->romlen;
		return phys_to_virt((phys_addr_t)pdev->rom);
	}

	return NULL;
}
EXPORT_SYMBOL(pci_platform_rom);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* drivers/pci/rom.c
	3	*
	4	* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
	5	* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
	6	*
	7	* PCI ROM access routines
	8	*/
1da177e4	9	#include <linux/kernel.h>
363c75db	10	#include <linux/export.h>
1da177e4	11	#include <linux/pci.h>
4e57b681	12	#include <linux/slab.h>
1da177e4 LT	13
	14	#include "pci.h"
	15
	16	/**
	17	* pci_enable_rom - enable ROM decoding for a PCI device
67be2dd1	18	* @pdev: PCI device to enable
1da177e4 LT	19	*
	20	* Enable ROM decoding on @dev. This involves simply turning on the last
	21	* bit of the PCI ROM BAR. Note that some cards may share address decoders
	22	* between the ROM and other resources, so enabling it may disable access
	23	* to MMIO registers or other card memory.
	24	*/
e416de5e	25	int pci_enable_rom(struct pci_dev *pdev)
1da177e4	26	{
8085ce08 BH	27	struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
8085ce08 BH	28	struct pci_bus_region region;
1da177e4 LT	29	u32 rom_addr;
1da177e4 LT	30
8085ce08 BH	31	if (!res->flags)
	32	return -1;
	33
fc279850	34	pcibios_resource_to_bus(pdev->bus, &region, res);
1da177e4	35	pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
8085ce08 BH	36	rom_addr &= ~PCI_ROM_ADDRESS_MASK;
8085ce08 BH	37	rom_addr \|= region.start \| PCI_ROM_ADDRESS_ENABLE;
1da177e4	38	pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
8085ce08	39	return 0;
1da177e4	40	}
b7fe9434	41	EXPORT_SYMBOL_GPL(pci_enable_rom);
1da177e4 LT	42
	43	/**
	44	* pci_disable_rom - disable ROM decoding for a PCI device
67be2dd1	45	* @pdev: PCI device to disable
1da177e4 LT	46	*
	47	* Disable ROM decoding on a PCI device by turning off the last bit in the
	48	* ROM BAR.
	49	*/
e416de5e	50	void pci_disable_rom(struct pci_dev *pdev)
1da177e4 LT	51	{
	52	u32 rom_addr;
	53	pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
	54	rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
	55	pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
	56	}
b7fe9434	57	EXPORT_SYMBOL_GPL(pci_disable_rom);
1da177e4	58
d7ad2254 JK	59	/**
d7ad2254 JK	60	* pci_get_rom_size - obtain the actual size of the ROM image
4cc59c72	61	* @pdev: target PCI device
d7ad2254 JK	62	* @rom: kernel virtual pointer to image of ROM
	63	* @size: size of PCI window
	64	* return: size of actual ROM image
	65	*
	66	* Determine the actual length of the ROM image.
	67	* The PCI window size could be much larger than the
	68	* actual image size.
	69	*/
97c44836	70	size_t pci_get_rom_size(struct pci_dev pdev, void __iomem rom, size_t size)
d7ad2254 JK	71	{
	72	void __iomem *image;
	73	int last_image;
	74
	75	image = rom;
	76	do {
	77	void __iomem *pds;
	78	/* Standard PCI ROMs start out with these bytes 55 AA */
97c44836 TN	79	if (readb(image) != 0x55) {
97c44836 TN	80	dev_err(&pdev->dev, "Invalid ROM contents\n");
d7ad2254	81	break;
97c44836	82	}
d7ad2254 JK	83	if (readb(image + 1) != 0xAA)
	84	break;
	85	/* get the PCI data structure and check its signature */
	86	pds = image + readw(image + 24);
	87	if (readb(pds) != 'P')
	88	break;
	89	if (readb(pds + 1) != 'C')
	90	break;
	91	if (readb(pds + 2) != 'I')
	92	break;
	93	if (readb(pds + 3) != 'R')
	94	break;
	95	last_image = readb(pds + 21) & 0x80;
	96	/* this length is reliable */
	97	image += readw(pds + 16) * 512;
	98	} while (!last_image);
	99
	100	/* never return a size larger than the PCI resource window */
	101	/* there are known ROMs that get the size wrong */
	102	return min((size_t)(image - rom), size);
	103	}
	104
1da177e4 LT	105	/**
1da177e4 LT	106	* pci_map_rom - map a PCI ROM to kernel space
67be2dd1	107	* @pdev: pointer to pci device struct
1da177e4	108	* @size: pointer to receive size of pci window over ROM
f5dafca5 RD	109	*
f5dafca5 RD	110	* Return: kernel virtual pointer to image of ROM
1da177e4 LT	111	*
	112	* Map a PCI ROM into kernel space. If ROM is boot video ROM,
	113	* the shadow BIOS copy will be returned instead of the
	114	* actual ROM.
	115	*/
	116	void __iomem pci_map_rom(struct pci_dev pdev, size_t *size)
	117	{
	118	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
fffe01f7	119	loff_t start;
1da177e4	120	void __iomem *rom;
1da177e4	121
b5e4efe7	122	/*
6b5c76b8 EO	123	* IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
	124	* memory map if the VGA enable bit of the Bridge Control register is
	125	* set for embedded VGA.
b5e4efe7	126	*/
547b5246	127	if (res->flags & IORESOURCE_ROM_SHADOW) {
1da177e4 LT	128	/* primary video rom always starts here */
	129	start = (loff_t)0xC0000;
	130	size = 0x20000; / cover C000:0 through E000:0 */
	131	} else {
a2302c68 JK	132	if (res->flags &
a2302c68 JK	133	(IORESOURCE_ROM_COPY \| IORESOURCE_ROM_BIOS_COPY)) {
1da177e4	134	*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
e31dd6e4 GKH	135	return (void __iomem *)(unsigned long)
e31dd6e4 GKH	136	pci_resource_start(pdev, PCI_ROM_RESOURCE);
1da177e4	137	} else {
fffe01f7 MG	138	/* assign the ROM an address if it doesn't have one */
fffe01f7 MG	139	if (res->parent == NULL &&
3c78bc61	140	pci_assign_resource(pdev, PCI_ROM_RESOURCE))
fffe01f7 MG	141	return NULL;
	142	start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
	143	*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
	144	if (*size == 0)
	145	return NULL;
1da177e4	146
fffe01f7 MG	147	/* Enable ROM space decodes */
	148	if (pci_enable_rom(pdev))
	149	return NULL;
	150	}
547b5246 MG	151	}
547b5246 MG	152
1da177e4 LT	153	rom = ioremap(start, *size);
	154	if (!rom) {
	155	/* restore enable if ioremap fails */
	156	if (!(res->flags & (IORESOURCE_ROM_ENABLE \|
	157	IORESOURCE_ROM_SHADOW \|
	158	IORESOURCE_ROM_COPY)))
	159	pci_disable_rom(pdev);
	160	return NULL;
	161	}
	162
	163	/*
	164	* Try to find the true size of the ROM since sometimes the PCI window
	165	* size is much larger than the actual size of the ROM.
	166	* True size is important if the ROM is going to be copied.
	167	*/
97c44836	168	size = pci_get_rom_size(pdev, rom, size);
1da177e4 LT	169	return rom;
1da177e4 LT	170	}
b7fe9434	171	EXPORT_SYMBOL(pci_map_rom);
1da177e4	172
1da177e4 LT	173	/**
1da177e4 LT	174	* pci_unmap_rom - unmap the ROM from kernel space
67be2dd1	175	* @pdev: pointer to pci device struct
1da177e4 LT	176	* @rom: virtual address of the previous mapping
	177	*
	178	* Remove a mapping of a previously mapped ROM
	179	*/
	180	void pci_unmap_rom(struct pci_dev pdev, void __iomem rom)
	181	{
	182	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
	183
a2302c68	184	if (res->flags & (IORESOURCE_ROM_COPY \| IORESOURCE_ROM_BIOS_COPY))
1da177e4 LT	185	return;
1da177e4 LT	186
fffe01f7	187	iounmap(rom);
1da177e4 LT	188
	189	/* Disable again before continuing, leave enabled if pci=rom */
	190	if (!(res->flags & (IORESOURCE_ROM_ENABLE \| IORESOURCE_ROM_SHADOW)))
	191	pci_disable_rom(pdev);
	192	}
b7fe9434	193	EXPORT_SYMBOL(pci_unmap_rom);
1da177e4	194
1da177e4	195	/**
0643245f	196	* pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
67be2dd1	197	* @pdev: pointer to pci device struct
1da177e4 LT	198	*
	199	* Free the copied ROM if we allocated one.
	200	*/
	201	void pci_cleanup_rom(struct pci_dev *pdev)
	202	{
	203	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
bd064f0a	204
1da177e4	205	if (res->flags & IORESOURCE_ROM_COPY) {
3c78bc61	206	kfree((void *)(unsigned long)res->start);
bd064f0a	207	res->flags \|= IORESOURCE_UNSET;
1da177e4 LT	208	res->flags &= ~IORESOURCE_ROM_COPY;
	209	res->start = 0;
	210	res->end = 0;
	211	}
	212	}
	213
fffe01f7 MG	214	/**
	215	* pci_platform_rom - provides a pointer to any ROM image provided by the
	216	* platform
	217	* @pdev: pointer to pci device struct
	218	* @size: pointer to receive size of pci window over ROM
	219	*/
	220	void __iomem pci_platform_rom(struct pci_dev pdev, size_t *size)
	221	{
	222	if (pdev->rom && pdev->romlen) {
	223	*size = pdev->romlen;
	224	return phys_to_virt((phys_addr_t)pdev->rom);
	225	}
	226
	227	return NULL;
	228	}
fffe01f7	229	EXPORT_SYMBOL(pci_platform_rom);