[linux-2.6-block.git] / drivers / pci / pcie / portdrv_pci.c

/*
 * File:	portdrv_pci.c
 * Purpose:	PCI Express Port Bus Driver
 *
 * Copyright (C) 2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/init.h>
#include <linux/pcieport_if.h>
#include <linux/aer.h>
#include <linux/dmi.h>
#include <linux/pci-aspm.h>

#include "portdrv.h"
#include "aer/aerdrv.h"

/*
 * Version Information
 */
#define DRIVER_VERSION "v1.0"
#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
#define DRIVER_DESC "PCIe Port Bus Driver"
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

/* If this switch is set, PCIe port native services should not be enabled. */
bool pcie_ports_disabled;

/*
 * If this switch is set, ACPI _OSC will be used to determine whether or not to
 * enable PCIe port native services.
 */
bool pcie_ports_auto = true;

static int __init pcie_port_setup(char *str)
{
	if (!strncmp(str, "compat", 6)) {
		pcie_ports_disabled = true;
	} else if (!strncmp(str, "native", 6)) {
		pcie_ports_disabled = false;
		pcie_ports_auto = false;
	} else if (!strncmp(str, "auto", 4)) {
		pcie_ports_disabled = false;
		pcie_ports_auto = true;
	}

	return 1;
}
__setup("pcie_ports=", pcie_port_setup);

/* global data */

/**
 * pcie_clear_root_pme_status - Clear root port PME interrupt status.
 * @dev: PCIe root port or event collector.
 */
void pcie_clear_root_pme_status(struct pci_dev *dev)
{
	pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
}

static int pcie_portdrv_restore_config(struct pci_dev *dev)
{
	int retval;

	retval = pci_enable_device(dev);
	if (retval)
		return retval;
	pci_set_master(dev);
	return 0;
}

#ifdef CONFIG_PM
static int pcie_port_resume_noirq(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);

	/*
	 * Some BIOSes forget to clear Root PME Status bits after system wakeup
	 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
	 * bits now just in case (shouldn't hurt).
	 */
	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
		pcie_clear_root_pme_status(pdev);
	return 0;
}

#ifdef CONFIG_PM_RUNTIME
struct d3cold_info {
	bool no_d3cold;
	unsigned int d3cold_delay;
};

static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
{
	struct d3cold_info *info = data;

	info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
				   info->d3cold_delay);
	if (pdev->no_d3cold)
		info->no_d3cold = true;
	return 0;
}

static int pcie_port_runtime_suspend(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct d3cold_info d3cold_info = {
		.no_d3cold	= false,
		.d3cold_delay	= PCI_PM_D3_WAIT,
	};

	/*
	 * If any subordinate device disable D3cold, we should not put
	 * the port into D3cold.  The D3cold delay of port should be
	 * the max of that of all subordinate devices.
	 */
	pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
	pdev->no_d3cold = d3cold_info.no_d3cold;
	pdev->d3cold_delay = d3cold_info.d3cold_delay;
	return 0;
}

static int pcie_port_runtime_resume(struct device *dev)
{
	return 0;
}

static int pcie_port_runtime_idle(struct device *dev)
{
	/* Delay for a short while to prevent too frequent suspend/resume */
	pm_schedule_suspend(dev, 10);
	return -EBUSY;
}
#else
#define pcie_port_runtime_suspend	NULL
#define pcie_port_runtime_resume	NULL
#define pcie_port_runtime_idle		NULL
#endif

static const struct dev_pm_ops pcie_portdrv_pm_ops = {
	.suspend	= pcie_port_device_suspend,
	.resume		= pcie_port_device_resume,
	.freeze		= pcie_port_device_suspend,
	.thaw		= pcie_port_device_resume,
	.poweroff	= pcie_port_device_suspend,
	.restore	= pcie_port_device_resume,
	.resume_noirq	= pcie_port_resume_noirq,
	.runtime_suspend = pcie_port_runtime_suspend,
	.runtime_resume = pcie_port_runtime_resume,
	.runtime_idle	= pcie_port_runtime_idle,
};

#define PCIE_PORTDRV_PM_OPS	(&pcie_portdrv_pm_ops)

#else /* !PM */

#define PCIE_PORTDRV_PM_OPS	NULL
#endif /* !PM */

/*
 * PCIe port runtime suspend is broken for some chipsets, so use a
 * black list to disable runtime PM for these chipsets.
 */
static const struct pci_device_id port_runtime_pm_black_list[] = {
	{ /* end: all zeroes */ }
};

/*
 * pcie_portdrv_probe - Probe PCI-Express port devices
 * @dev: PCI-Express port device being probed
 *
 * If detected invokes the pcie_port_device_register() method for
 * this port device.
 *
 */
static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
					const struct pci_device_id *id)
{
	int status;

	if (!pci_is_pcie(dev) ||
	    ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
	     (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
	     (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
		return -ENODEV;

	if (!dev->irq && dev->pin) {
		dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
			 "check vendor BIOS\n", dev->vendor, dev->device);
	}
	status = pcie_port_device_register(dev);
	if (status)
		return status;

	pci_save_state(dev);
	/*
	 * D3cold may not work properly on some PCIe port, so disable
	 * it by default.
	 */
	dev->d3cold_allowed = false;
	if (!pci_match_id(port_runtime_pm_black_list, dev))
		pm_runtime_put_noidle(&dev->dev);

	return 0;
}

static void pcie_portdrv_remove(struct pci_dev *dev)
{
	if (!pci_match_id(port_runtime_pm_black_list, dev))
		pm_runtime_get_noresume(&dev->dev);
	pcie_port_device_remove(dev);
	pci_disable_device(dev);
}

static int error_detected_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	struct aer_broadcast_data *result_data;
	pci_ers_result_t status;

	result_data = (struct aer_broadcast_data *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (!driver ||
			!driver->err_handler ||
			!driver->err_handler->error_detected)
			return 0;

		pcie_device = to_pcie_device(device);

		/* Forward error detected message to service drivers */
		status = driver->err_handler->error_detected(
			pcie_device->port,
			result_data->state);
		result_data->result =
			merge_result(result_data->result, status);
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
					enum pci_channel_state error)
{
	struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
	int ret;

	/* can not fail */
	ret = device_for_each_child(&dev->dev, &data, error_detected_iter);

	return data.result;
}

static int mmio_enabled_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	pci_ers_result_t status, *result;

	result = (pci_ers_result_t *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->mmio_enabled) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			status = driver->err_handler->mmio_enabled(
					pcie_device->port);
			*result = merge_result(*result, status);
		}
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
{
	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
	int retval;

	/* get true return value from &status */
	retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
	return status;
}

static int slot_reset_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	pci_ers_result_t status, *result;

	result = (pci_ers_result_t *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->slot_reset) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			status = driver->err_handler->slot_reset(
					pcie_device->port);
			*result = merge_result(*result, status);
		}
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
{
	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
	int retval;

	/* If fatal, restore cfg space for possible link reset at upstream */
	if (dev->error_state == pci_channel_io_frozen) {
		dev->state_saved = true;
		pci_restore_state(dev);
		pcie_portdrv_restore_config(dev);
		pci_enable_pcie_error_reporting(dev);
	}

	/* get true return value from &status */
	retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);

	return status;
}

static int resume_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->resume) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			driver->err_handler->resume(pcie_device->port);
		}
	}

	return 0;
}

static void pcie_portdrv_err_resume(struct pci_dev *dev)
{
	int retval;
	/* nothing to do with error value, if it ever happens */
	retval = device_for_each_child(&dev->dev, NULL, resume_iter);
}

/*
 * LINUX Device Driver Model
 */
static const struct pci_device_id port_pci_ids[] = { {
	/* handle any PCI-Express port */
	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
	}, { /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE(pci, port_pci_ids);

static const struct pci_error_handlers pcie_portdrv_err_handler = {
	.error_detected = pcie_portdrv_error_detected,
	.mmio_enabled = pcie_portdrv_mmio_enabled,
	.slot_reset = pcie_portdrv_slot_reset,
	.resume = pcie_portdrv_err_resume,
};

static struct pci_driver pcie_portdriver = {
	.name		= "pcieport",
	.id_table	= &port_pci_ids[0],

	.probe		= pcie_portdrv_probe,
	.remove		= pcie_portdrv_remove,

	.err_handler 	= &pcie_portdrv_err_handler,

	.driver.pm 	= PCIE_PORTDRV_PM_OPS,
};

static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
{
	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
			d->ident);
	pcie_pme_disable_msi();
	return 0;
}

static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
	/*
	 * Boxes that should not use MSI for PCIe PME signaling.
	 */
	{
	 .callback = dmi_pcie_pme_disable_msi,
	 .ident = "MSI Wind U-100",
	 .matches = {
		     DMI_MATCH(DMI_SYS_VENDOR,
		     		"MICRO-STAR INTERNATIONAL CO., LTD"),
		     DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
		     },
	 },
	 {}
};

static int __init pcie_portdrv_init(void)
{
	int retval;

	if (pcie_ports_disabled)
		return pci_register_driver(&pcie_portdriver);

	dmi_check_system(pcie_portdrv_dmi_table);

	retval = pcie_port_bus_register();
	if (retval) {
		printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
		goto out;
	}
	retval = pci_register_driver(&pcie_portdriver);
	if (retval)
		pcie_port_bus_unregister();
 out:
	return retval;
}

module_init(pcie_portdrv_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* File: portdrv_pci.c
	3	* Purpose: PCI Express Port Bus Driver
	4	*
	5	* Copyright (C) 2004 Intel
	6	* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/pci.h>
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/pm.h>
71a83bd7	14	#include <linux/pm_runtime.h>
1da177e4 LT	15	#include <linux/init.h>
1da177e4 LT	16	#include <linux/pcieport_if.h>
4bf3392e	17	#include <linux/aer.h>
c39fae14	18	#include <linux/dmi.h>
28eb5f27	19	#include <linux/pci-aspm.h>
1da177e4 LT	20
1da177e4 LT	21	#include "portdrv.h"
4bf3392e	22	#include "aer/aerdrv.h"
1da177e4 LT	23
	24	/*
	25	* Version Information
	26	*/
	27	#define DRIVER_VERSION "v1.0"
	28	#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
7e8af37a	29	#define DRIVER_DESC "PCIe Port Bus Driver"
1da177e4 LT	30	MODULE_AUTHOR(DRIVER_AUTHOR);
	31	MODULE_DESCRIPTION(DRIVER_DESC);
	32	MODULE_LICENSE("GPL");
	33
79dd9182 RW	34	/* If this switch is set, PCIe port native services should not be enabled. */
	35	bool pcie_ports_disabled;
	36
28eb5f27 RW	37	/*
	38	* If this switch is set, ACPI _OSC will be used to determine whether or not to
	39	* enable PCIe port native services.
	40	*/
	41	bool pcie_ports_auto = true;
	42
79dd9182 RW	43	static int __init pcie_port_setup(char *str)
79dd9182 RW	44	{
28eb5f27	45	if (!strncmp(str, "compat", 6)) {
79dd9182	46	pcie_ports_disabled = true;
28eb5f27 RW	47	} else if (!strncmp(str, "native", 6)) {
	48	pcie_ports_disabled = false;
	49	pcie_ports_auto = false;
	50	} else if (!strncmp(str, "auto", 4)) {
	51	pcie_ports_disabled = false;
	52	pcie_ports_auto = true;
	53	}
79dd9182 RW	54
	55	return 1;
	56	}
	57	__setup("pcie_ports=", pcie_port_setup);
	58
1da177e4	59	/* global data */
1da177e4	60
fe31e697 RW	61	/**
	62	* pcie_clear_root_pme_status - Clear root port PME interrupt status.
	63	* @dev: PCIe root port or event collector.
	64	*/
	65	void pcie_clear_root_pme_status(struct pci_dev *dev)
	66	{
2dcfaf85	67	pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
fe31e697 RW	68	}
fe31e697 RW	69
4bf3392e ZY	70	static int pcie_portdrv_restore_config(struct pci_dev *dev)
	71	{
	72	int retval;
	73
4bf3392e ZY	74	retval = pci_enable_device(dev);
	75	if (retval)
	76	return retval;
	77	pci_set_master(dev);
	78	return 0;
	79	}
	80
0bed208e	81	#ifdef CONFIG_PM
fe31e697 RW	82	static int pcie_port_resume_noirq(struct device *dev)
	83	{
	84	struct pci_dev *pdev = to_pci_dev(dev);
	85
	86	/*
	87	* Some BIOSes forget to clear Root PME Status bits after system wakeup
	88	* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
	89	* bits now just in case (shouldn't hurt).
	90	*/
62f87c0e	91	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
fe31e697 RW	92	pcie_clear_root_pme_status(pdev);
	93	return 0;
	94	}
	95
71a83bd7	96	#ifdef CONFIG_PM_RUNTIME
448bd857 HY	97	struct d3cold_info {
	98	bool no_d3cold;
	99	unsigned int d3cold_delay;
	100	};
	101
	102	static int pci_dev_d3cold_info(struct pci_dev pdev, void data)
	103	{
	104	struct d3cold_info *info = data;
	105
	106	info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
	107	info->d3cold_delay);
	108	if (pdev->no_d3cold)
	109	info->no_d3cold = true;
	110	return 0;
	111	}
	112
	113	static int pcie_port_runtime_suspend(struct device *dev)
	114	{
	115	struct pci_dev *pdev = to_pci_dev(dev);
	116	struct d3cold_info d3cold_info = {
	117	.no_d3cold = false,
	118	.d3cold_delay = PCI_PM_D3_WAIT,
	119	};
	120
	121	/*
	122	* If any subordinate device disable D3cold, we should not put
	123	* the port into D3cold. The D3cold delay of port should be
	124	* the max of that of all subordinate devices.
	125	*/
	126	pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
	127	pdev->no_d3cold = d3cold_info.no_d3cold;
	128	pdev->d3cold_delay = d3cold_info.d3cold_delay;
	129	return 0;
	130	}
	131
	132	static int pcie_port_runtime_resume(struct device *dev)
71a83bd7 ZY	133	{
	134	return 0;
	135	}
3d8387ef HY	136
	137	static int pcie_port_runtime_idle(struct device *dev)
	138	{
	139	/* Delay for a short while to prevent too frequent suspend/resume */
	140	pm_schedule_suspend(dev, 10);
	141	return -EBUSY;
	142	}
71a83bd7	143	#else
448bd857 HY	144	#define pcie_port_runtime_suspend NULL
448bd857 HY	145	#define pcie_port_runtime_resume NULL
3d8387ef	146	#define pcie_port_runtime_idle NULL
71a83bd7 ZY	147	#endif
71a83bd7 ZY	148
47145210	149	static const struct dev_pm_ops pcie_portdrv_pm_ops = {
3a3c244c RW	150	.suspend = pcie_port_device_suspend,
	151	.resume = pcie_port_device_resume,
	152	.freeze = pcie_port_device_suspend,
	153	.thaw = pcie_port_device_resume,
	154	.poweroff = pcie_port_device_suspend,
	155	.restore = pcie_port_device_resume,
fe31e697	156	.resume_noirq = pcie_port_resume_noirq,
448bd857 HY	157	.runtime_suspend = pcie_port_runtime_suspend,
448bd857 HY	158	.runtime_resume = pcie_port_runtime_resume,
3d8387ef	159	.runtime_idle = pcie_port_runtime_idle,
3a3c244c	160	};
4bf3392e	161
3a3c244c	162	#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
a79d682f	163
3a3c244c RW	164	#else /* !PM */
	165
	166	#define PCIE_PORTDRV_PM_OPS NULL
	167	#endif /* !PM */
4bf3392e	168
71a83bd7 ZY	169	/*
	170	* PCIe port runtime suspend is broken for some chipsets, so use a
	171	* black list to disable runtime PM for these chipsets.
	172	*/
	173	static const struct pci_device_id port_runtime_pm_black_list[] = {
	174	{ /* end: all zeroes */ }
	175	};
	176
1da177e4 LT	177	/*
	178	* pcie_portdrv_probe - Probe PCI-Express port devices
	179	* @dev: PCI-Express port device being probed
	180	*
40da4186	181	* If detected invokes the pcie_port_device_register() method for
1da177e4 LT	182	* this port device.
	183	*
	184	*/
898294c9 KK	185	static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
898294c9 KK	186	const struct pci_device_id *id)
1da177e4	187	{
898294c9	188	int status;
1da177e4	189
898294c9	190	if (!pci_is_pcie(dev) \|\|
62f87c0e YW	191	((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
	192	(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
	193	(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
898294c9	194	return -ENODEV;
1da177e4	195
40da4186	196	if (!dev->irq && dev->pin) {
34a2e15e	197	dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
34438ba6	198	"check vendor BIOS\n", dev->vendor, dev->device);
1da177e4	199	}
f118c0c3 RW	200	status = pcie_port_device_register(dev);
	201	if (status)
	202	return status;
1da177e4	203
87d2e2ec	204	pci_save_state(dev);
4f9c1397 HY	205	/*
	206	* D3cold may not work properly on some PCIe port, so disable
	207	* it by default.
	208	*/
	209	dev->d3cold_allowed = false;
71a83bd7 ZY	210	if (!pci_match_id(port_runtime_pm_black_list, dev))
71a83bd7 ZY	211	pm_runtime_put_noidle(&dev->dev);
4bf3392e	212
1da177e4 LT	213	return 0;
	214	}
	215
40da4186	216	static void pcie_portdrv_remove(struct pci_dev *dev)
1da177e4	217	{
71a83bd7 ZY	218	if (!pci_match_id(port_runtime_pm_black_list, dev))
71a83bd7 ZY	219	pm_runtime_get_noresume(&dev->dev);
1da177e4	220	pcie_port_device_remove(dev);
d8998719	221	pci_disable_device(dev);
1da177e4 LT	222	}
1da177e4 LT	223
4bf3392e	224	static int error_detected_iter(struct device device, void data)
60854838	225	{
4bf3392e ZY	226	struct pcie_device *pcie_device;
	227	struct pcie_port_service_driver *driver;
	228	struct aer_broadcast_data *result_data;
	229	pci_ers_result_t status;
	230
	231	result_data = (struct aer_broadcast_data *) data;
	232
	233	if (device->bus == &pcie_port_bus_type && device->driver) {
	234	driver = to_service_driver(device->driver);
	235	if (!driver \|\|
	236	!driver->err_handler \|\|
	237	!driver->err_handler->error_detected)
	238	return 0;
	239
	240	pcie_device = to_pcie_device(device);
	241
	242	/* Forward error detected message to service drivers */
	243	status = driver->err_handler->error_detected(
	244	pcie_device->port,
	245	result_data->state);
	246	result_data->result =
	247	merge_result(result_data->result, status);
	248	}
	249
	250	return 0;
60854838 HK	251	}
60854838 HK	252
4bf3392e ZY	253	static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
4bf3392e ZY	254	enum pci_channel_state error)
60854838	255	{
40da4186 HS	256	struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
40da4186 HS	257	int ret;
4bf3392e	258
b19441af	259	/* can not fail */
40da4186	260	ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
4bf3392e	261
40da4186	262	return data.result;
4bf3392e ZY	263	}
	264
	265	static int mmio_enabled_iter(struct device device, void data)
	266	{
	267	struct pcie_device *pcie_device;
	268	struct pcie_port_service_driver *driver;
	269	pci_ers_result_t status, *result;
	270
	271	result = (pci_ers_result_t *) data;
	272
	273	if (device->bus == &pcie_port_bus_type && device->driver) {
	274	driver = to_service_driver(device->driver);
	275	if (driver &&
	276	driver->err_handler &&
	277	driver->err_handler->mmio_enabled) {
	278	pcie_device = to_pcie_device(device);
	279
	280	/* Forward error message to service drivers */
	281	status = driver->err_handler->mmio_enabled(
	282	pcie_device->port);
	283	result = merge_result(result, status);
	284	}
	285	}
60854838	286
60854838 HK	287	return 0;
	288	}
	289
4bf3392e	290	static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
1da177e4	291	{
4bf3392e	292	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
b19441af	293	int retval;
5823d100	294
b19441af GKH	295	/* get true return value from &status */
b19441af GKH	296	retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
4bf3392e	297	return status;
1da177e4 LT	298	}
1da177e4 LT	299
4bf3392e	300	static int slot_reset_iter(struct device device, void data)
1da177e4	301	{
4bf3392e ZY	302	struct pcie_device *pcie_device;
	303	struct pcie_port_service_driver *driver;
	304	pci_ers_result_t status, *result;
	305
	306	result = (pci_ers_result_t *) data;
	307
	308	if (device->bus == &pcie_port_bus_type && device->driver) {
	309	driver = to_service_driver(device->driver);
	310	if (driver &&
	311	driver->err_handler &&
	312	driver->err_handler->slot_reset) {
	313	pcie_device = to_pcie_device(device);
	314
	315	/* Forward error message to service drivers */
	316	status = driver->err_handler->slot_reset(
	317	pcie_device->port);
	318	result = merge_result(result, status);
	319	}
	320	}
	321
	322	return 0;
	323	}
	324
	325	static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
	326	{
029091df	327	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
b19441af	328	int retval;
4bf3392e ZY	329
	330	/* If fatal, restore cfg space for possible link reset at upstream */
	331	if (dev->error_state == pci_channel_io_frozen) {
e9d82888	332	dev->state_saved = true;
a79d682f	333	pci_restore_state(dev);
4bf3392e ZY	334	pcie_portdrv_restore_config(dev);
	335	pci_enable_pcie_error_reporting(dev);
	336	}
	337
b19441af GKH	338	/* get true return value from &status */
b19441af GKH	339	retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
4bf3392e ZY	340
	341	return status;
	342	}
	343
	344	static int resume_iter(struct device device, void data)
	345	{
	346	struct pcie_device *pcie_device;
	347	struct pcie_port_service_driver *driver;
	348
	349	if (device->bus == &pcie_port_bus_type && device->driver) {
	350	driver = to_service_driver(device->driver);
	351	if (driver &&
	352	driver->err_handler &&
	353	driver->err_handler->resume) {
	354	pcie_device = to_pcie_device(device);
	355
	356	/* Forward error message to service drivers */
	357	driver->err_handler->resume(pcie_device->port);
	358	}
	359	}
	360
	361	return 0;
	362	}
	363
	364	static void pcie_portdrv_err_resume(struct pci_dev *dev)
	365	{
b19441af GKH	366	int retval;
	367	/* nothing to do with error value, if it ever happens */
	368	retval = device_for_each_child(&dev->dev, NULL, resume_iter);
1da177e4	369	}
1da177e4 LT	370
	371	/*
	372	* LINUX Device Driver Model
	373	*/
	374	static const struct pci_device_id port_pci_ids[] = { {
	375	/* handle any PCI-Express port */
	376	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) \| 0x00), ~0),
	377	}, { /* end: all zeroes */ }
	378	};
	379	MODULE_DEVICE_TABLE(pci, port_pci_ids);
	380
49453028 SH	381	static const struct pci_error_handlers pcie_portdrv_err_handler = {
	382	.error_detected = pcie_portdrv_error_detected,
	383	.mmio_enabled = pcie_portdrv_mmio_enabled,
	384	.slot_reset = pcie_portdrv_slot_reset,
	385	.resume = pcie_portdrv_err_resume,
4bf3392e ZY	386	};
4bf3392e ZY	387
3603a6a3	388	static struct pci_driver pcie_portdriver = {
e3fb20f9	389	.name = "pcieport",
1da177e4 LT	390	.id_table = &port_pci_ids[0],
	391
	392	.probe = pcie_portdrv_probe,
	393	.remove = pcie_portdrv_remove,
	394
4bf3392e	395	.err_handler = &pcie_portdrv_err_handler,
3a3c244c RW	396
3a3c244c RW	397	.driver.pm = PCIE_PORTDRV_PM_OPS,
1da177e4 LT	398	};
1da177e4 LT	399
c39fae14 RW	400	static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
	401	{
	402	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
	403	d->ident);
	404	pcie_pme_disable_msi();
	405	return 0;
	406	}
	407
	408	static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
	409	/*
	410	* Boxes that should not use MSI for PCIe PME signaling.
	411	*/
	412	{
	413	.callback = dmi_pcie_pme_disable_msi,
	414	.ident = "MSI Wind U-100",
	415	.matches = {
	416	DMI_MATCH(DMI_SYS_VENDOR,
	417	"MICRO-STAR INTERNATIONAL CO., LTD"),
	418	DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
	419	},
	420	},
	421	{}
	422	};
	423
1da177e4 LT	424	static int __init pcie_portdrv_init(void)
1da177e4 LT	425	{
20d51660	426	int retval;
1da177e4	427
fe31e697 RW	428	if (pcie_ports_disabled)
fe31e697 RW	429	return pci_register_driver(&pcie_portdriver);
79dd9182	430
c39fae14 RW	431	dmi_check_system(pcie_portdrv_dmi_table);
c39fae14 RW	432
20d51660 RD	433	retval = pcie_port_bus_register();
	434	if (retval) {
	435	printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
	436	goto out;
	437	}
3603a6a3	438	retval = pci_register_driver(&pcie_portdriver);
1da177e4 LT	439	if (retval)
1da177e4 LT	440	pcie_port_bus_unregister();
20d51660	441	out:
1da177e4 LT	442	return retval;
	443	}
	444
1da177e4	445	module_init(pcie_portdrv_init);