[linux-2.6-block.git] / drivers / pci / pcie / pcie-dpc.c

/*
 * PCI Express Downstream Port Containment services driver
 * Author: Keith Busch <keith.busch@intel.com>
 *
 * Copyright (C) 2016 Intel Corp.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pcieport_if.h>

struct dpc_dev {
	struct pcie_device	*dev;
	struct work_struct	work;
	int			cap_pos;
	bool			rp;
};

static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
{
	unsigned long timeout = jiffies + HZ;
	struct pci_dev *pdev = dpc->dev->port;
	u16 status;

	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	while (status & PCI_EXP_DPC_RP_BUSY &&
					!time_after(jiffies, timeout)) {
		msleep(10);
		pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	}
	if (status & PCI_EXP_DPC_RP_BUSY) {
		dev_warn(&pdev->dev, "DPC root port still busy\n");
		return -EBUSY;
	}
	return 0;
}

static void dpc_wait_link_inactive(struct pci_dev *pdev)
{
	unsigned long timeout = jiffies + HZ;
	u16 lnk_status;

	pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
	while (lnk_status & PCI_EXP_LNKSTA_DLLLA &&
					!time_after(jiffies, timeout)) {
		msleep(10);
		pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
	}
	if (lnk_status & PCI_EXP_LNKSTA_DLLLA)
		dev_warn(&pdev->dev, "Link state not disabled for DPC event\n");
}

static void interrupt_event_handler(struct work_struct *work)
{
	struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
	struct pci_dev *dev, *temp, *pdev = dpc->dev->port;
	struct pci_bus *parent = pdev->subordinate;

	pci_lock_rescan_remove();
	list_for_each_entry_safe_reverse(dev, temp, &parent->devices,
					 bus_list) {
		pci_dev_get(dev);
		pci_stop_and_remove_bus_device(dev);
		pci_dev_put(dev);
	}
	pci_unlock_rescan_remove();

	dpc_wait_link_inactive(pdev);
	if (dpc->rp && dpc_wait_rp_inactive(dpc))
		return;
	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
		PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT);
}

static irqreturn_t dpc_irq(int irq, void *context)
{
	struct dpc_dev *dpc = (struct dpc_dev *)context;
	struct pci_dev *pdev = dpc->dev->port;
	u16 status, source;

	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID,
			     &source);
	if (!status)
		return IRQ_NONE;

	dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n",
		status, source);

	if (status & PCI_EXP_DPC_STATUS_TRIGGER) {
		u16 reason = (status >> 1) & 0x3;
		u16 ext_reason = (status >> 5) & 0x3;

		dev_warn(&dpc->dev->device, "DPC %s detected, remove downstream devices\n",
			 (reason == 0) ? "unmasked uncorrectable error" :
			 (reason == 1) ? "ERR_NONFATAL" :
			 (reason == 2) ? "ERR_FATAL" :
			 (ext_reason == 0) ? "RP PIO error" :
			 (ext_reason == 1) ? "software trigger" :
					     "reserved error");
		schedule_work(&dpc->work);
	}
	return IRQ_HANDLED;
}

#define FLAG(x, y) (((x) & (y)) ? '+' : '-')
static int dpc_probe(struct pcie_device *dev)
{
	struct dpc_dev *dpc;
	struct pci_dev *pdev = dev->port;
	int status;
	u16 ctl, cap;

	dpc = devm_kzalloc(&dev->device, sizeof(*dpc), GFP_KERNEL);
	if (!dpc)
		return -ENOMEM;

	dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
	dpc->dev = dev;
	INIT_WORK(&dpc->work, interrupt_event_handler);
	set_service_data(dev, dpc);

	status = devm_request_irq(&dev->device, dev->irq, dpc_irq, IRQF_SHARED,
				  "pcie-dpc", dpc);
	if (status) {
		dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq,
			 status);
		return status;
	}

	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);

	dpc->rp = (cap & PCI_EXP_DPC_CAP_RP_EXT);

	ctl |= PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN;
	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);

	dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
		cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
		FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
		FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf,
		FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
	return status;
}

static void dpc_remove(struct pcie_device *dev)
{
	struct dpc_dev *dpc = get_service_data(dev);
	struct pci_dev *pdev = dev->port;
	u16 ctl;

	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
	ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN);
	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
}

static struct pcie_port_service_driver dpcdriver = {
	.name		= "dpc",
	.port_type	= PCIE_ANY_PORT,
	.service	= PCIE_PORT_SERVICE_DPC,
	.probe		= dpc_probe,
	.remove		= dpc_remove,
};

static int __init dpc_service_init(void)
{
	return pcie_port_service_register(&dpcdriver);
}
device_initcall(dpc_service_init);
Commit	Line	Data
26e51571 KB	1	/*
26e51571 KB	2	* PCI Express Downstream Port Containment services driver
61612e6d PG	3	* Author: Keith Busch <keith.busch@intel.com>
61612e6d PG	4	*
26e51571 KB	5	* Copyright (C) 2016 Intel Corp.
	6	*
	7	* This file is subject to the terms and conditions of the GNU General Public
	8	* License. See the file "COPYING" in the main directory of this archive
	9	* for more details.
	10	*/
	11
	12	#include <linux/delay.h>
	13	#include <linux/interrupt.h>
61612e6d	14	#include <linux/init.h>
26e51571 KB	15	#include <linux/pci.h>
	16	#include <linux/pcieport_if.h>
	17
	18	struct dpc_dev {
	19	struct pcie_device *dev;
14a16d57 MW	20	struct work_struct work;
14a16d57 MW	21	int cap_pos;
abdbf4d6	22	bool rp;
26e51571 KB	23	};
26e51571 KB	24
abdbf4d6 KB	25	static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
	26	{
	27	unsigned long timeout = jiffies + HZ;
	28	struct pci_dev *pdev = dpc->dev->port;
	29	u16 status;
	30
	31	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	32	while (status & PCI_EXP_DPC_RP_BUSY &&
	33	!time_after(jiffies, timeout)) {
	34	msleep(10);
	35	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	36	}
	37	if (status & PCI_EXP_DPC_RP_BUSY) {
	38	dev_warn(&pdev->dev, "DPC root port still busy\n");
	39	return -EBUSY;
	40	}
	41	return 0;
	42	}
	43
26e51571 KB	44	static void dpc_wait_link_inactive(struct pci_dev *pdev)
	45	{
	46	unsigned long timeout = jiffies + HZ;
	47	u16 lnk_status;
	48
	49	pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
	50	while (lnk_status & PCI_EXP_LNKSTA_DLLLA &&
	51	!time_after(jiffies, timeout)) {
	52	msleep(10);
	53	pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
	54	}
	55	if (lnk_status & PCI_EXP_LNKSTA_DLLLA)
abdbf4d6	56	dev_warn(&pdev->dev, "Link state not disabled for DPC event\n");
26e51571 KB	57	}
	58
	59	static void interrupt_event_handler(struct work_struct *work)
	60	{
	61	struct dpc_dev *dpc = container_of(work, struct dpc_dev, work);
	62	struct pci_dev dev, temp, *pdev = dpc->dev->port;
	63	struct pci_bus *parent = pdev->subordinate;
	64
	65	pci_lock_rescan_remove();
	66	list_for_each_entry_safe_reverse(dev, temp, &parent->devices,
	67	bus_list) {
	68	pci_dev_get(dev);
	69	pci_stop_and_remove_bus_device(dev);
	70	pci_dev_put(dev);
	71	}
	72	pci_unlock_rescan_remove();
	73
	74	dpc_wait_link_inactive(pdev);
abdbf4d6 KB	75	if (dpc->rp && dpc_wait_rp_inactive(dpc))
abdbf4d6 KB	76	return;
26e51571 KB	77	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS,
	78	PCI_EXP_DPC_STATUS_TRIGGER \| PCI_EXP_DPC_STATUS_INTERRUPT);
	79	}
	80
	81	static irqreturn_t dpc_irq(int irq, void *context)
	82	{
	83	struct dpc_dev dpc = (struct dpc_dev )context;
	84	struct pci_dev *pdev = dpc->dev->port;
	85	u16 status, source;
	86
	87	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status);
	88	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID,
	89	&source);
	90	if (!status)
	91	return IRQ_NONE;
	92
	93	dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n",
	94	status, source);
	95
	96	if (status & PCI_EXP_DPC_STATUS_TRIGGER) {
	97	u16 reason = (status >> 1) & 0x3;
87b336d0	98	u16 ext_reason = (status >> 5) & 0x3;
26e51571	99
87b336d0	100	dev_warn(&dpc->dev->device, "DPC %s detected, remove downstream devices\n",
26e51571 KB	101	(reason == 0) ? "unmasked uncorrectable error" :
26e51571 KB	102	(reason == 1) ? "ERR_NONFATAL" :
87b336d0 KB	103	(reason == 2) ? "ERR_FATAL" :
	104	(ext_reason == 0) ? "RP PIO error" :
	105	(ext_reason == 1) ? "software trigger" :
	106	"reserved error");
26e51571 KB	107	schedule_work(&dpc->work);
	108	}
	109	return IRQ_HANDLED;
	110	}
	111
	112	#define FLAG(x, y) (((x) & (y)) ? '+' : '-')
	113	static int dpc_probe(struct pcie_device *dev)
	114	{
	115	struct dpc_dev *dpc;
	116	struct pci_dev *pdev = dev->port;
	117	int status;
	118	u16 ctl, cap;
	119
733f3d13	120	dpc = devm_kzalloc(&dev->device, sizeof(*dpc), GFP_KERNEL);
26e51571 KB	121	if (!dpc)
	122	return -ENOMEM;
	123
	124	dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
	125	dpc->dev = dev;
	126	INIT_WORK(&dpc->work, interrupt_event_handler);
	127	set_service_data(dev, dpc);
	128
733f3d13 MW	129	status = devm_request_irq(&dev->device, dev->irq, dpc_irq, IRQF_SHARED,
733f3d13 MW	130	"pcie-dpc", dpc);
26e51571 KB	131	if (status) {
	132	dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq,
	133	status);
733f3d13	134	return status;
26e51571 KB	135	}
	136
	137	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap);
	138	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
	139
abdbf4d6 KB	140	dpc->rp = (cap & PCI_EXP_DPC_CAP_RP_EXT);
abdbf4d6 KB	141
26e51571 KB	142	ctl \|= PCI_EXP_DPC_CTL_EN_NONFATAL \| PCI_EXP_DPC_CTL_INT_EN;
	143	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
	144
	145	dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
	146	cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
	147	FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
	148	FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf,
	149	FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
	150	return status;
26e51571 KB	151	}
	152
	153	static void dpc_remove(struct pcie_device *dev)
	154	{
	155	struct dpc_dev *dpc = get_service_data(dev);
	156	struct pci_dev *pdev = dev->port;
	157	u16 ctl;
	158
	159	pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl);
	160	ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL \| PCI_EXP_DPC_CTL_INT_EN);
	161	pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl);
26e51571 KB	162	}
	163
	164	static struct pcie_port_service_driver dpcdriver = {
	165	.name = "dpc",
7e16fd6d	166	.port_type = PCIE_ANY_PORT,
26e51571 KB	167	.service = PCIE_PORT_SERVICE_DPC,
	168	.probe = dpc_probe,
	169	.remove = dpc_remove,
	170	};
	171
	172	static int __init dpc_service_init(void)
	173	{
	174	return pcie_port_service_register(&dpcdriver);
	175	}
61612e6d	176	device_initcall(dpc_service_init);