mn10300/PCI: Remove unused pci_mem_start
[linux-2.6-block.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
363c75db 22#include <linux/export.h>
1da177e4
LT
23#include <linux/topology.h>
24#include <linux/mm.h>
de139a33 25#include <linux/fs.h>
aa0ac365 26#include <linux/capability.h>
a628e7b8 27#include <linux/security.h>
7d715a6c 28#include <linux/pci-aspm.h>
5a0e3ad6 29#include <linux/slab.h>
1a39b310 30#include <linux/vgaarb.h>
448bd857 31#include <linux/pm_runtime.h>
1da177e4
LT
32#include "pci.h"
33
34static int sysfs_initialized; /* = 0 */
35
36/* show configuration fields */
37#define pci_config_attr(field, format_string) \
38static ssize_t \
e404e274 39field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
40{ \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev (dev); \
44 return sprintf (buf, format_string, pdev->field); \
45}
46
47pci_config_attr(vendor, "0x%04x\n");
48pci_config_attr(device, "0x%04x\n");
49pci_config_attr(subsystem_vendor, "0x%04x\n");
50pci_config_attr(subsystem_device, "0x%04x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
bdee9d98
DT
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf (buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 67 unsigned long val;
bdee9d98 68
9a994e8e 69 if (kstrtoul(buf, 0, &val) < 0)
92425a40
TP
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
bdee9d98
DT
75}
76
4327edf6
AC
77static ssize_t local_cpus_show(struct device *dev,
78 struct device_attribute *attr, char *buf)
1da177e4 79{
3be83050 80 const struct cpumask *mask;
4327edf6
AC
81 int len;
82
e0cd5160 83#ifdef CONFIG_NUMA
6be954d1
DJ
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
e0cd5160 86#else
3be83050 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 88#endif
3be83050 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
90 buf[len++] = '\n';
91 buf[len] = '\0';
92 return len;
93}
94
95
96static ssize_t local_cpulist_show(struct device *dev,
97 struct device_attribute *attr, char *buf)
98{
3be83050 99 const struct cpumask *mask;
39106dcf
MT
100 int len;
101
e0cd5160 102#ifdef CONFIG_NUMA
6be954d1
DJ
103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
104 cpumask_of_node(dev_to_node(dev));
e0cd5160 105#else
3be83050 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 107#endif
3be83050 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
109 buf[len++] = '\n';
110 buf[len] = '\0';
111 return len;
1da177e4
LT
112}
113
dc2c2c9d
YL
114/*
115 * PCI Bus Class Devices
116 */
117static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
118 int type,
119 struct device_attribute *attr,
120 char *buf)
121{
122 int ret;
123 const struct cpumask *cpumask;
124
125 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126 ret = type ?
127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
129 buf[ret++] = '\n';
130 buf[ret] = '\0';
131 return ret;
132}
133
56039e65
GKH
134static ssize_t cpuaffinity_show(struct device *dev,
135 struct device_attribute *attr, char *buf)
dc2c2c9d
YL
136{
137 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
138}
56039e65 139static DEVICE_ATTR_RO(cpuaffinity);
dc2c2c9d 140
56039e65
GKH
141static ssize_t cpulistaffinity_show(struct device *dev,
142 struct device_attribute *attr, char *buf)
dc2c2c9d
YL
143{
144 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
145}
56039e65 146static DEVICE_ATTR_RO(cpulistaffinity);
dc2c2c9d 147
1da177e4
LT
148/* show resources */
149static ssize_t
e404e274 150resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
151{
152 struct pci_dev * pci_dev = to_pci_dev(dev);
153 char * str = buf;
154 int i;
fde09c6d 155 int max;
e31dd6e4 156 resource_size_t start, end;
1da177e4
LT
157
158 if (pci_dev->subordinate)
159 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
160 else
161 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
162
163 for (i = 0; i < max; i++) {
2311b1f2
ME
164 struct resource *res = &pci_dev->resource[i];
165 pci_resource_to_user(pci_dev, i, res, &start, &end);
166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
167 (unsigned long long)start,
168 (unsigned long long)end,
169 (unsigned long long)res->flags);
1da177e4
LT
170 }
171 return (str - buf);
172}
173
87c8a443 174static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
175{
176 struct pci_dev *pci_dev = to_pci_dev(dev);
177
178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
179 pci_dev->vendor, pci_dev->device,
180 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
182 (u8)(pci_dev->class));
183}
bae94d02
IPG
184
185static ssize_t is_enabled_store(struct device *dev,
186 struct device_attribute *attr, const char *buf,
187 size_t count)
9f125d30
AV
188{
189 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 190 unsigned long val;
9a994e8e 191 ssize_t result = kstrtoul(buf, 0, &val);
92425a40
TP
192
193 if (result < 0)
194 return result;
9f125d30
AV
195
196 /* this can crash the machine when done on the "wrong" device */
197 if (!capable(CAP_SYS_ADMIN))
92425a40 198 return -EPERM;
9f125d30 199
92425a40 200 if (!val) {
296ccb08 201 if (pci_is_enabled(pdev))
bae94d02
IPG
202 pci_disable_device(pdev);
203 else
204 result = -EIO;
92425a40 205 } else
bae94d02 206 result = pci_enable_device(pdev);
9f125d30 207
bae94d02
IPG
208 return result < 0 ? result : count;
209}
210
211static ssize_t is_enabled_show(struct device *dev,
212 struct device_attribute *attr, char *buf)
213{
214 struct pci_dev *pdev;
9f125d30 215
bae94d02
IPG
216 pdev = to_pci_dev (dev);
217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
218}
219
81bb0e19
BG
220#ifdef CONFIG_NUMA
221static ssize_t
222numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
223{
224 return sprintf (buf, "%d\n", dev->numa_node);
225}
226#endif
227
bb965401
YL
228static ssize_t
229dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
230{
231 struct pci_dev *pdev = to_pci_dev(dev);
232
233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
234}
235
236static ssize_t
237consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
238 char *buf)
239{
240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
241}
242
fe97064c
BG
243static ssize_t
244msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
245{
246 struct pci_dev *pdev = to_pci_dev(dev);
247
248 if (!pdev->subordinate)
249 return 0;
250
251 return sprintf (buf, "%u\n",
252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
253}
254
255static ssize_t
256msi_bus_store(struct device *dev, struct device_attribute *attr,
257 const char *buf, size_t count)
258{
259 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
260 unsigned long val;
261
9a994e8e 262 if (kstrtoul(buf, 0, &val) < 0)
92425a40 263 return -EINVAL;
fe97064c
BG
264
265 /* bad things may happen if the no_msi flag is changed
266 * while some drivers are loaded */
267 if (!capable(CAP_SYS_ADMIN))
92425a40 268 return -EPERM;
fe97064c 269
92425a40
TP
270 /* Maybe pci devices without subordinate busses shouldn't even have this
271 * attribute in the first place? */
fe97064c
BG
272 if (!pdev->subordinate)
273 return count;
274
92425a40
TP
275 /* Is the flag going to change, or keep the value it already had? */
276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
277 !!val) {
278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 279
92425a40
TP
280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
281 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
282 }
283
284 return count;
285}
9888549e 286
705b1aaa
AC
287static DEFINE_MUTEX(pci_remove_rescan_mutex);
288static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
289 size_t count)
290{
291 unsigned long val;
292 struct pci_bus *b = NULL;
293
9a994e8e 294 if (kstrtoul(buf, 0, &val) < 0)
705b1aaa
AC
295 return -EINVAL;
296
297 if (val) {
298 mutex_lock(&pci_remove_rescan_mutex);
299 while ((b = pci_find_next_bus(b)) != NULL)
300 pci_rescan_bus(b);
301 mutex_unlock(&pci_remove_rescan_mutex);
302 }
303 return count;
304}
305
306struct bus_attribute pci_bus_attrs[] = {
307 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
308 __ATTR_NULL
309};
77c27c7b 310
738a6396
AC
311static ssize_t
312dev_rescan_store(struct device *dev, struct device_attribute *attr,
313 const char *buf, size_t count)
314{
315 unsigned long val;
316 struct pci_dev *pdev = to_pci_dev(dev);
317
9a994e8e 318 if (kstrtoul(buf, 0, &val) < 0)
738a6396
AC
319 return -EINVAL;
320
321 if (val) {
322 mutex_lock(&pci_remove_rescan_mutex);
323 pci_rescan_bus(pdev->bus);
324 mutex_unlock(&pci_remove_rescan_mutex);
325 }
326 return count;
327}
dfab88be
JL
328struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP),
329 NULL, dev_rescan_store);
738a6396 330
77c27c7b
AC
331static void remove_callback(struct device *dev)
332{
333 struct pci_dev *pdev = to_pci_dev(dev);
334
335 mutex_lock(&pci_remove_rescan_mutex);
210647af 336 pci_stop_and_remove_bus_device(pdev);
77c27c7b
AC
337 mutex_unlock(&pci_remove_rescan_mutex);
338}
339
340static ssize_t
341remove_store(struct device *dev, struct device_attribute *dummy,
342 const char *buf, size_t count)
343{
344 int ret = 0;
345 unsigned long val;
77c27c7b 346
9a994e8e 347 if (kstrtoul(buf, 0, &val) < 0)
77c27c7b
AC
348 return -EINVAL;
349
77c27c7b
AC
350 /* An attribute cannot be unregistered by one of its own methods,
351 * so we have to use this roundabout approach.
352 */
353 if (val)
354 ret = device_schedule_callback(dev, remove_callback);
355 if (ret)
356 count = ret;
357 return count;
358}
dfab88be
JL
359struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP),
360 NULL, remove_store);
b9d320fc
YL
361
362static ssize_t
363dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
364 const char *buf, size_t count)
365{
366 unsigned long val;
367 struct pci_bus *bus = to_pci_bus(dev);
368
9a994e8e 369 if (kstrtoul(buf, 0, &val) < 0)
b9d320fc
YL
370 return -EINVAL;
371
372 if (val) {
373 mutex_lock(&pci_remove_rescan_mutex);
2f320521
YL
374 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
375 pci_rescan_bus_bridge_resize(bus->self);
376 else
377 pci_rescan_bus(bus);
b9d320fc
YL
378 mutex_unlock(&pci_remove_rescan_mutex);
379 }
380 return count;
381}
56039e65 382static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
b9d320fc 383
448bd857
HY
384#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
385static ssize_t d3cold_allowed_store(struct device *dev,
386 struct device_attribute *attr,
387 const char *buf, size_t count)
388{
389 struct pci_dev *pdev = to_pci_dev(dev);
390 unsigned long val;
391
9a994e8e 392 if (kstrtoul(buf, 0, &val) < 0)
448bd857
HY
393 return -EINVAL;
394
395 pdev->d3cold_allowed = !!val;
396 pm_runtime_resume(dev);
397
398 return count;
399}
400
401static ssize_t d3cold_allowed_show(struct device *dev,
402 struct device_attribute *attr, char *buf)
403{
404 struct pci_dev *pdev = to_pci_dev(dev);
405 return sprintf (buf, "%u\n", pdev->d3cold_allowed);
406}
407#endif
408
1789382a
DD
409#ifdef CONFIG_PCI_IOV
410static ssize_t sriov_totalvfs_show(struct device *dev,
411 struct device_attribute *attr,
412 char *buf)
413{
414 struct pci_dev *pdev = to_pci_dev(dev);
415
bff73156 416 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
417}
418
419
420static ssize_t sriov_numvfs_show(struct device *dev,
421 struct device_attribute *attr,
422 char *buf)
423{
424 struct pci_dev *pdev = to_pci_dev(dev);
425
6b136724 426 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
1789382a
DD
427}
428
429/*
faa48a50
BH
430 * num_vfs > 0; number of VFs to enable
431 * num_vfs = 0; disable all VFs
1789382a
DD
432 *
433 * Note: SRIOV spec doesn't allow partial VF
faa48a50 434 * disable, so it's all or none.
1789382a
DD
435 */
436static ssize_t sriov_numvfs_store(struct device *dev,
437 struct device_attribute *attr,
438 const char *buf, size_t count)
439{
440 struct pci_dev *pdev = to_pci_dev(dev);
faa48a50
BH
441 int ret;
442 u16 num_vfs;
1789382a 443
faa48a50
BH
444 ret = kstrtou16(buf, 0, &num_vfs);
445 if (ret < 0)
446 return ret;
447
448 if (num_vfs > pci_sriov_get_totalvfs(pdev))
449 return -ERANGE;
450
451 if (num_vfs == pdev->sriov->num_VFs)
452 return count; /* no change */
1789382a
DD
453
454 /* is PF driver loaded w/callback */
455 if (!pdev->driver || !pdev->driver->sriov_configure) {
faa48a50 456 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
1789382a
DD
457 return -ENOSYS;
458 }
459
faa48a50
BH
460 if (num_vfs == 0) {
461 /* disable VFs */
462 ret = pdev->driver->sriov_configure(pdev, 0);
463 if (ret < 0)
464 return ret;
465 return count;
1789382a
DD
466 }
467
faa48a50
BH
468 /* enable VFs */
469 if (pdev->sriov->num_VFs) {
470 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
471 pdev->sriov->num_VFs, num_vfs);
472 return -EBUSY;
1789382a
DD
473 }
474
faa48a50
BH
475 ret = pdev->driver->sriov_configure(pdev, num_vfs);
476 if (ret < 0)
477 return ret;
1789382a 478
faa48a50
BH
479 if (ret != num_vfs)
480 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
481 num_vfs, ret);
482
483 return count;
1789382a
DD
484}
485
486static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
487static struct device_attribute sriov_numvfs_attr =
488 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
489 sriov_numvfs_show, sriov_numvfs_store);
490#endif /* CONFIG_PCI_IOV */
491
1da177e4
LT
492struct device_attribute pci_dev_attrs[] = {
493 __ATTR_RO(resource),
494 __ATTR_RO(vendor),
495 __ATTR_RO(device),
496 __ATTR_RO(subsystem_vendor),
497 __ATTR_RO(subsystem_device),
498 __ATTR_RO(class),
499 __ATTR_RO(irq),
500 __ATTR_RO(local_cpus),
39106dcf 501 __ATTR_RO(local_cpulist),
9888549e 502 __ATTR_RO(modalias),
81bb0e19
BG
503#ifdef CONFIG_NUMA
504 __ATTR_RO(numa_node),
505#endif
bb965401
YL
506 __ATTR_RO(dma_mask_bits),
507 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 508 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
509 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
510 broken_parity_status_show,broken_parity_status_store),
fe97064c 511 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
448bd857
HY
512#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
513 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
77c27c7b 514#endif
1da177e4
LT
515 __ATTR_NULL,
516};
517
56039e65
GKH
518static struct attribute *pcibus_attrs[] = {
519 &dev_attr_rescan.attr,
520 &dev_attr_cpuaffinity.attr,
521 &dev_attr_cpulistaffinity.attr,
522 NULL,
523};
524
525static const struct attribute_group pcibus_group = {
526 .attrs = pcibus_attrs,
527};
528
529const struct attribute_group *pcibus_groups[] = {
530 &pcibus_group,
531 NULL,
b9d320fc
YL
532};
533
217f45de
DA
534static ssize_t
535boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
536{
537 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
538 struct pci_dev *vga_dev = vga_default_device();
539
540 if (vga_dev)
541 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
542
543 return sprintf(buf, "%u\n",
544 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
545 IORESOURCE_ROM_SHADOW));
546}
547struct device_attribute vga_attr = __ATTR_RO(boot_vga);
548
1da177e4 549static ssize_t
2c3c8bea
CW
550pci_read_config(struct file *filp, struct kobject *kobj,
551 struct bin_attribute *bin_attr,
91a69029 552 char *buf, loff_t off, size_t count)
1da177e4
LT
553{
554 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
555 unsigned int size = 64;
556 loff_t init_off = off;
4c0619ad 557 u8 *data = (u8*) buf;
1da177e4
LT
558
559 /* Several chips lock up trying to read undefined config space */
b7e724d3 560 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
1da177e4
LT
561 size = dev->cfg_size;
562 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
563 size = 128;
564 }
565
566 if (off > size)
567 return 0;
568 if (off + count > size) {
569 size -= off;
570 count = size;
571 } else {
572 size = count;
573 }
574
3d8387ef
HY
575 pci_config_pm_runtime_get(dev);
576
4c0619ad 577 if ((off & 1) && size) {
578 u8 val;
e04b0ea2 579 pci_user_read_config_byte(dev, off, &val);
4c0619ad 580 data[off - init_off] = val;
1da177e4 581 off++;
4c0619ad 582 size--;
583 }
584
585 if ((off & 3) && size > 2) {
586 u16 val;
e04b0ea2 587 pci_user_read_config_word(dev, off, &val);
4c0619ad 588 data[off - init_off] = val & 0xff;
589 data[off - init_off + 1] = (val >> 8) & 0xff;
590 off += 2;
591 size -= 2;
1da177e4
LT
592 }
593
594 while (size > 3) {
4c0619ad 595 u32 val;
e04b0ea2 596 pci_user_read_config_dword(dev, off, &val);
4c0619ad 597 data[off - init_off] = val & 0xff;
598 data[off - init_off + 1] = (val >> 8) & 0xff;
599 data[off - init_off + 2] = (val >> 16) & 0xff;
600 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
601 off += 4;
602 size -= 4;
603 }
604
4c0619ad 605 if (size >= 2) {
606 u16 val;
e04b0ea2 607 pci_user_read_config_word(dev, off, &val);
4c0619ad 608 data[off - init_off] = val & 0xff;
609 data[off - init_off + 1] = (val >> 8) & 0xff;
610 off += 2;
611 size -= 2;
612 }
613
614 if (size > 0) {
615 u8 val;
e04b0ea2 616 pci_user_read_config_byte(dev, off, &val);
4c0619ad 617 data[off - init_off] = val;
1da177e4
LT
618 off++;
619 --size;
620 }
621
3d8387ef
HY
622 pci_config_pm_runtime_put(dev);
623
1da177e4
LT
624 return count;
625}
626
627static ssize_t
2c3c8bea
CW
628pci_write_config(struct file* filp, struct kobject *kobj,
629 struct bin_attribute *bin_attr,
91a69029 630 char *buf, loff_t off, size_t count)
1da177e4
LT
631{
632 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
633 unsigned int size = count;
634 loff_t init_off = off;
4c0619ad 635 u8 *data = (u8*) buf;
1da177e4
LT
636
637 if (off > dev->cfg_size)
638 return 0;
639 if (off + count > dev->cfg_size) {
640 size = dev->cfg_size - off;
641 count = size;
642 }
4c0619ad 643
3d8387ef
HY
644 pci_config_pm_runtime_get(dev);
645
4c0619ad 646 if ((off & 1) && size) {
e04b0ea2 647 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 648 off++;
4c0619ad 649 size--;
1da177e4 650 }
4c0619ad 651
652 if ((off & 3) && size > 2) {
653 u16 val = data[off - init_off];
654 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 655 pci_user_write_config_word(dev, off, val);
4c0619ad 656 off += 2;
657 size -= 2;
658 }
1da177e4
LT
659
660 while (size > 3) {
4c0619ad 661 u32 val = data[off - init_off];
662 val |= (u32) data[off - init_off + 1] << 8;
663 val |= (u32) data[off - init_off + 2] << 16;
664 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 665 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
666 off += 4;
667 size -= 4;
668 }
4c0619ad 669
670 if (size >= 2) {
671 u16 val = data[off - init_off];
672 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 673 pci_user_write_config_word(dev, off, val);
4c0619ad 674 off += 2;
675 size -= 2;
676 }
1da177e4 677
4c0619ad 678 if (size) {
e04b0ea2 679 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
680 off++;
681 --size;
682 }
683
3d8387ef
HY
684 pci_config_pm_runtime_put(dev);
685
1da177e4
LT
686 return count;
687}
688
94e61088 689static ssize_t
2c3c8bea
CW
690read_vpd_attr(struct file *filp, struct kobject *kobj,
691 struct bin_attribute *bin_attr,
287d19ce 692 char *buf, loff_t off, size_t count)
94e61088
BH
693{
694 struct pci_dev *dev =
695 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
696
697 if (off > bin_attr->size)
698 count = 0;
699 else if (count > bin_attr->size - off)
700 count = bin_attr->size - off;
94e61088 701
287d19ce 702 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
703}
704
705static ssize_t
2c3c8bea
CW
706write_vpd_attr(struct file *filp, struct kobject *kobj,
707 struct bin_attribute *bin_attr,
287d19ce 708 char *buf, loff_t off, size_t count)
94e61088
BH
709{
710 struct pci_dev *dev =
711 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
712
713 if (off > bin_attr->size)
714 count = 0;
715 else if (count > bin_attr->size - off)
716 count = bin_attr->size - off;
94e61088 717
287d19ce 718 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
719}
720
1da177e4
LT
721#ifdef HAVE_PCI_LEGACY
722/**
723 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 724 * @filp: open sysfs file
1da177e4 725 * @kobj: kobject corresponding to file to read from
cffb2faf 726 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
727 * @buf: buffer to store results
728 * @off: offset into legacy I/O port space
729 * @count: number of bytes to read
730 *
731 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
732 * callback routine (pci_legacy_read).
733 */
f19aeb1f 734static ssize_t
2c3c8bea
CW
735pci_read_legacy_io(struct file *filp, struct kobject *kobj,
736 struct bin_attribute *bin_attr,
91a69029 737 char *buf, loff_t off, size_t count)
1da177e4
LT
738{
739 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 740 struct device,
1da177e4
LT
741 kobj));
742
743 /* Only support 1, 2 or 4 byte accesses */
744 if (count != 1 && count != 2 && count != 4)
745 return -EINVAL;
746
747 return pci_legacy_read(bus, off, (u32 *)buf, count);
748}
749
750/**
751 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 752 * @filp: open sysfs file
1da177e4 753 * @kobj: kobject corresponding to file to read from
cffb2faf 754 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
755 * @buf: buffer containing value to be written
756 * @off: offset into legacy I/O port space
757 * @count: number of bytes to write
758 *
759 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
760 * callback routine (pci_legacy_write).
761 */
f19aeb1f 762static ssize_t
2c3c8bea
CW
763pci_write_legacy_io(struct file *filp, struct kobject *kobj,
764 struct bin_attribute *bin_attr,
91a69029 765 char *buf, loff_t off, size_t count)
1da177e4
LT
766{
767 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 768 struct device,
1da177e4
LT
769 kobj));
770 /* Only support 1, 2 or 4 byte accesses */
771 if (count != 1 && count != 2 && count != 4)
772 return -EINVAL;
773
774 return pci_legacy_write(bus, off, *(u32 *)buf, count);
775}
776
777/**
778 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 779 * @filp: open sysfs file
1da177e4
LT
780 * @kobj: kobject corresponding to device to be mapped
781 * @attr: struct bin_attribute for this file
782 * @vma: struct vm_area_struct passed to mmap
783 *
f19aeb1f 784 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
785 * legacy memory space (first meg of bus space) into application virtual
786 * memory space.
787 */
f19aeb1f 788static int
2c3c8bea
CW
789pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
790 struct bin_attribute *attr,
1da177e4
LT
791 struct vm_area_struct *vma)
792{
793 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 794 struct device,
1da177e4
LT
795 kobj));
796
f19aeb1f
BH
797 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
798}
799
800/**
801 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 802 * @filp: open sysfs file
f19aeb1f
BH
803 * @kobj: kobject corresponding to device to be mapped
804 * @attr: struct bin_attribute for this file
805 * @vma: struct vm_area_struct passed to mmap
806 *
807 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
808 * legacy IO space (first meg of bus space) into application virtual
809 * memory space. Returns -ENOSYS if the operation isn't supported
810 */
811static int
2c3c8bea
CW
812pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
813 struct bin_attribute *attr,
f19aeb1f
BH
814 struct vm_area_struct *vma)
815{
816 struct pci_bus *bus = to_pci_bus(container_of(kobj,
817 struct device,
818 kobj));
819
820 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
821}
822
10a0ef39
IK
823/**
824 * pci_adjust_legacy_attr - adjustment of legacy file attributes
825 * @b: bus to create files under
826 * @mmap_type: I/O port or memory
827 *
828 * Stub implementation. Can be overridden by arch if necessary.
829 */
830void __weak
831pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
832{
833 return;
834}
835
f19aeb1f
BH
836/**
837 * pci_create_legacy_files - create legacy I/O port and memory files
838 * @b: bus to create files under
839 *
840 * Some platforms allow access to legacy I/O port and ISA memory space on
841 * a per-bus basis. This routine creates the files and ties them into
842 * their associated read, write and mmap files from pci-sysfs.c
843 *
25985edc 844 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
845 * as it is ok to set up the PCI bus without these files.
846 */
847void pci_create_legacy_files(struct pci_bus *b)
848{
849 int error;
850
851 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
852 GFP_ATOMIC);
853 if (!b->legacy_io)
854 goto kzalloc_err;
855
62e877b8 856 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
857 b->legacy_io->attr.name = "legacy_io";
858 b->legacy_io->size = 0xffff;
859 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
860 b->legacy_io->read = pci_read_legacy_io;
861 b->legacy_io->write = pci_write_legacy_io;
862 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 863 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
864 error = device_create_bin_file(&b->dev, b->legacy_io);
865 if (error)
866 goto legacy_io_err;
867
868 /* Allocated above after the legacy_io struct */
869 b->legacy_mem = b->legacy_io + 1;
6757eca3 870 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
871 b->legacy_mem->attr.name = "legacy_mem";
872 b->legacy_mem->size = 1024*1024;
873 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
874 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 875 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
876 error = device_create_bin_file(&b->dev, b->legacy_mem);
877 if (error)
878 goto legacy_mem_err;
879
880 return;
881
882legacy_mem_err:
883 device_remove_bin_file(&b->dev, b->legacy_io);
884legacy_io_err:
885 kfree(b->legacy_io);
886 b->legacy_io = NULL;
887kzalloc_err:
888 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
889 "and ISA memory resources to sysfs\n");
890 return;
891}
892
893void pci_remove_legacy_files(struct pci_bus *b)
894{
895 if (b->legacy_io) {
896 device_remove_bin_file(&b->dev, b->legacy_io);
897 device_remove_bin_file(&b->dev, b->legacy_mem);
898 kfree(b->legacy_io); /* both are allocated here */
899 }
1da177e4
LT
900}
901#endif /* HAVE_PCI_LEGACY */
902
903#ifdef HAVE_PCI_MMAP
b5ff7df3 904
3b519e4e
MW
905int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
906 enum pci_mmap_api mmap_api)
b5ff7df3 907{
3b519e4e 908 unsigned long nr, start, size, pci_start;
b5ff7df3 909
3b519e4e
MW
910 if (pci_resource_len(pdev, resno) == 0)
911 return 0;
64b00175 912 nr = vma_pages(vma);
b5ff7df3 913 start = vma->vm_pgoff;
88e7df0b 914 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
8c05cd08 915 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
3b519e4e
MW
916 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
917 if (start >= pci_start && start < pci_start + size &&
918 start + nr <= pci_start + size)
b5ff7df3 919 return 1;
b5ff7df3
LT
920 return 0;
921}
922
1da177e4
LT
923/**
924 * pci_mmap_resource - map a PCI resource into user memory space
925 * @kobj: kobject for mapping
926 * @attr: struct bin_attribute for the file being mapped
927 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 928 * @write_combine: 1 for write_combine mapping
1da177e4
LT
929 *
930 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
931 */
932static int
933pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 934 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
935{
936 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
937 struct device, kobj));
a3f5835a 938 struct resource *res = attr->private;
1da177e4 939 enum pci_mmap_state mmap_type;
e31dd6e4 940 resource_size_t start, end;
2311b1f2 941 int i;
1da177e4 942
2311b1f2
ME
943 for (i = 0; i < PCI_ROM_RESOURCE; i++)
944 if (res == &pdev->resource[i])
945 break;
946 if (i >= PCI_ROM_RESOURCE)
947 return -ENODEV;
948
3b519e4e
MW
949 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
950 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
951 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
952 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
953 pci_name(pdev), i,
e25cd062
RD
954 (u64)pci_resource_start(pdev, i),
955 (u64)pci_resource_len(pdev, i));
b5ff7df3 956 return -EINVAL;
3b519e4e 957 }
b5ff7df3 958
2311b1f2
ME
959 /* pci_mmap_page_range() expects the same kind of entry as coming
960 * from /proc/bus/pci/ which is a "user visible" value. If this is
961 * different from the resource itself, arch will do necessary fixup.
962 */
963 pci_resource_to_user(pdev, i, res, &start, &end);
964 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
965 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
966
e8de1481
AV
967 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
968 return -EINVAL;
969
45aec1ae 970 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
971}
972
973static int
2c3c8bea
CW
974pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
975 struct bin_attribute *attr,
45aec1ae 976 struct vm_area_struct *vma)
977{
978 return pci_mmap_resource(kobj, attr, vma, 0);
979}
980
981static int
2c3c8bea
CW
982pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
983 struct bin_attribute *attr,
45aec1ae 984 struct vm_area_struct *vma)
985{
986 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
987}
988
8633328b
AW
989static ssize_t
990pci_resource_io(struct file *filp, struct kobject *kobj,
991 struct bin_attribute *attr, char *buf,
992 loff_t off, size_t count, bool write)
993{
994 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
995 struct device, kobj));
996 struct resource *res = attr->private;
997 unsigned long port = off;
998 int i;
999
1000 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1001 if (res == &pdev->resource[i])
1002 break;
1003 if (i >= PCI_ROM_RESOURCE)
1004 return -ENODEV;
1005
1006 port += pci_resource_start(pdev, i);
1007
1008 if (port > pci_resource_end(pdev, i))
1009 return 0;
1010
1011 if (port + count - 1 > pci_resource_end(pdev, i))
1012 return -EINVAL;
1013
1014 switch (count) {
1015 case 1:
1016 if (write)
1017 outb(*(u8 *)buf, port);
1018 else
1019 *(u8 *)buf = inb(port);
1020 return 1;
1021 case 2:
1022 if (write)
1023 outw(*(u16 *)buf, port);
1024 else
1025 *(u16 *)buf = inw(port);
1026 return 2;
1027 case 4:
1028 if (write)
1029 outl(*(u32 *)buf, port);
1030 else
1031 *(u32 *)buf = inl(port);
1032 return 4;
1033 }
1034 return -EINVAL;
1035}
1036
1037static ssize_t
1038pci_read_resource_io(struct file *filp, struct kobject *kobj,
1039 struct bin_attribute *attr, char *buf,
1040 loff_t off, size_t count)
1041{
1042 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1043}
1044
1045static ssize_t
1046pci_write_resource_io(struct file *filp, struct kobject *kobj,
1047 struct bin_attribute *attr, char *buf,
1048 loff_t off, size_t count)
1049{
1050 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1051}
1052
b19441af
GKH
1053/**
1054 * pci_remove_resource_files - cleanup resource files
cffb2faf 1055 * @pdev: dev to cleanup
b19441af 1056 *
cffb2faf 1057 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1058 * free their resources.
1059 */
1060static void
1061pci_remove_resource_files(struct pci_dev *pdev)
1062{
1063 int i;
1064
1065 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1066 struct bin_attribute *res_attr;
1067
1068 res_attr = pdev->res_attr[i];
1069 if (res_attr) {
1070 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1071 kfree(res_attr);
1072 }
45aec1ae 1073
1074 res_attr = pdev->res_attr_wc[i];
1075 if (res_attr) {
1076 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1077 kfree(res_attr);
1078 }
b19441af
GKH
1079 }
1080}
1081
45aec1ae 1082static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1083{
1084 /* allocate attribute structure, piggyback attribute name */
1085 int name_len = write_combine ? 13 : 10;
1086 struct bin_attribute *res_attr;
1087 int retval;
1088
1089 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1090 if (res_attr) {
1091 char *res_attr_name = (char *)(res_attr + 1);
1092
a07e4156 1093 sysfs_bin_attr_init(res_attr);
45aec1ae 1094 if (write_combine) {
1095 pdev->res_attr_wc[num] = res_attr;
1096 sprintf(res_attr_name, "resource%d_wc", num);
1097 res_attr->mmap = pci_mmap_resource_wc;
1098 } else {
1099 pdev->res_attr[num] = res_attr;
1100 sprintf(res_attr_name, "resource%d", num);
1101 res_attr->mmap = pci_mmap_resource_uc;
1102 }
8633328b
AW
1103 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1104 res_attr->read = pci_read_resource_io;
1105 res_attr->write = pci_write_resource_io;
1106 }
45aec1ae 1107 res_attr->attr.name = res_attr_name;
1108 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1109 res_attr->size = pci_resource_len(pdev, num);
1110 res_attr->private = &pdev->resource[num];
1111 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1112 } else
1113 retval = -ENOMEM;
1114
1115 return retval;
1116}
1117
1da177e4
LT
1118/**
1119 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1120 * @pdev: dev in question
1da177e4 1121 *
cffb2faf 1122 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1123 */
b19441af 1124static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1125{
1126 int i;
b19441af 1127 int retval;
1da177e4
LT
1128
1129 /* Expose the PCI resources from this device as files */
1130 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1131
1132 /* skip empty resources */
1133 if (!pci_resource_len(pdev, i))
1134 continue;
1135
45aec1ae 1136 retval = pci_create_attr(pdev, i, 0);
1137 /* for prefetchable resources, create a WC mappable file */
1138 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1139 retval = pci_create_attr(pdev, i, 1);
1140
1141 if (retval) {
1142 pci_remove_resource_files(pdev);
1143 return retval;
1da177e4
LT
1144 }
1145 }
b19441af 1146 return 0;
1da177e4
LT
1147}
1148#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1149int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1150void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1151#endif /* HAVE_PCI_MMAP */
1152
1153/**
1154 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1155 * @filp: sysfs file
1da177e4 1156 * @kobj: kernel object handle
cffb2faf 1157 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1158 * @buf: user input
1159 * @off: file offset
1160 * @count: number of byte in input
1161 *
1162 * writing anything except 0 enables it
1163 */
1164static ssize_t
2c3c8bea
CW
1165pci_write_rom(struct file *filp, struct kobject *kobj,
1166 struct bin_attribute *bin_attr,
91a69029 1167 char *buf, loff_t off, size_t count)
1da177e4
LT
1168{
1169 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1170
1171 if ((off == 0) && (*buf == '0') && (count == 2))
1172 pdev->rom_attr_enabled = 0;
1173 else
1174 pdev->rom_attr_enabled = 1;
1175
1176 return count;
1177}
1178
1179/**
1180 * pci_read_rom - read a PCI ROM
2c3c8bea 1181 * @filp: sysfs file
1da177e4 1182 * @kobj: kernel object handle
cffb2faf 1183 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1184 * @buf: where to put the data we read from the ROM
1185 * @off: file offset
1186 * @count: number of bytes to read
1187 *
1188 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1189 * device corresponding to @kobj.
1190 */
1191static ssize_t
2c3c8bea
CW
1192pci_read_rom(struct file *filp, struct kobject *kobj,
1193 struct bin_attribute *bin_attr,
91a69029 1194 char *buf, loff_t off, size_t count)
1da177e4
LT
1195{
1196 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1197 void __iomem *rom;
1198 size_t size;
1199
1200 if (!pdev->rom_attr_enabled)
1201 return -EINVAL;
1202
1203 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1204 if (!rom || !size)
1205 return -EIO;
1da177e4
LT
1206
1207 if (off >= size)
1208 count = 0;
1209 else {
1210 if (off + count > size)
1211 count = size - off;
1212
1213 memcpy_fromio(buf, rom + off, count);
1214 }
1215 pci_unmap_rom(pdev, rom);
1216
1217 return count;
1218}
1219
1220static struct bin_attribute pci_config_attr = {
1221 .attr = {
1222 .name = "config",
1223 .mode = S_IRUGO | S_IWUSR,
1da177e4 1224 },
557848c3 1225 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1226 .read = pci_read_config,
1227 .write = pci_write_config,
1228};
1229
1230static struct bin_attribute pcie_config_attr = {
1231 .attr = {
1232 .name = "config",
1233 .mode = S_IRUGO | S_IWUSR,
1da177e4 1234 },
557848c3 1235 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1236 .read = pci_read_config,
1237 .write = pci_write_config,
1238};
1239
d6d88c83 1240int __weak pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 1241{
a2cd52ca 1242 return 0;
575e3348
ME
1243}
1244
711d5779
MT
1245static ssize_t reset_store(struct device *dev,
1246 struct device_attribute *attr, const char *buf,
1247 size_t count)
1248{
1249 struct pci_dev *pdev = to_pci_dev(dev);
1250 unsigned long val;
9a994e8e 1251 ssize_t result = kstrtoul(buf, 0, &val);
711d5779
MT
1252
1253 if (result < 0)
1254 return result;
1255
1256 if (val != 1)
1257 return -EINVAL;
447c5dd7
MS
1258
1259 result = pci_reset_function(pdev);
1260 if (result < 0)
1261 return result;
1262
1263 return count;
711d5779
MT
1264}
1265
1266static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1267
280c73d3
ZY
1268static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1269{
1270 int retval;
1271 struct bin_attribute *attr;
1272
1273 /* If the device has VPD, try to expose it in sysfs. */
1274 if (dev->vpd) {
1275 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1276 if (!attr)
1277 return -ENOMEM;
1278
a07e4156 1279 sysfs_bin_attr_init(attr);
280c73d3
ZY
1280 attr->size = dev->vpd->len;
1281 attr->attr.name = "vpd";
1282 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1283 attr->read = read_vpd_attr;
1284 attr->write = write_vpd_attr;
280c73d3
ZY
1285 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1286 if (retval) {
0f12a4e2 1287 kfree(attr);
280c73d3
ZY
1288 return retval;
1289 }
1290 dev->vpd->attr = attr;
1291 }
1292
1293 /* Active State Power Management */
1294 pcie_aspm_create_sysfs_dev_files(dev);
1295
711d5779
MT
1296 if (!pci_probe_reset_function(dev)) {
1297 retval = device_create_file(&dev->dev, &reset_attr);
1298 if (retval)
1299 goto error;
1300 dev->reset_fn = 1;
1301 }
280c73d3 1302 return 0;
711d5779
MT
1303
1304error:
1305 pcie_aspm_remove_sysfs_dev_files(dev);
1306 if (dev->vpd && dev->vpd->attr) {
1307 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1308 kfree(dev->vpd->attr);
1309 }
1310
1311 return retval;
280c73d3
ZY
1312}
1313
b19441af 1314int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1315{
b19441af 1316 int retval;
280c73d3
ZY
1317 int rom_size = 0;
1318 struct bin_attribute *attr;
b19441af 1319
1da177e4
LT
1320 if (!sysfs_initialized)
1321 return -EACCES;
1322
557848c3 1323 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1324 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1325 else
b19441af
GKH
1326 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1327 if (retval)
1328 goto err;
1da177e4 1329
b19441af
GKH
1330 retval = pci_create_resource_files(pdev);
1331 if (retval)
280c73d3
ZY
1332 goto err_config_file;
1333
1334 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1335 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1336 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1337 rom_size = 0x20000;
1da177e4
LT
1338
1339 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1340 if (rom_size) {
94e61088 1341 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1342 if (!attr) {
b19441af 1343 retval = -ENOMEM;
9890b12a 1344 goto err_resource_files;
1da177e4 1345 }
a07e4156 1346 sysfs_bin_attr_init(attr);
280c73d3
ZY
1347 attr->size = rom_size;
1348 attr->attr.name = "rom";
ff29530e 1349 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1350 attr->read = pci_read_rom;
1351 attr->write = pci_write_rom;
1352 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1353 if (retval) {
1354 kfree(attr);
1355 goto err_resource_files;
1356 }
1357 pdev->rom_attr = attr;
1da177e4 1358 }
280c73d3 1359
1da177e4 1360 /* add platform-specific attributes */
280c73d3
ZY
1361 retval = pcibios_add_platform_entries(pdev);
1362 if (retval)
625e1d59 1363 goto err_rom_file;
b19441af 1364
280c73d3
ZY
1365 /* add sysfs entries for various capabilities */
1366 retval = pci_create_capabilities_sysfs(pdev);
1367 if (retval)
625e1d59 1368 goto err_rom_file;
7d715a6c 1369
911e1c9b
N
1370 pci_create_firmware_label_files(pdev);
1371
1da177e4 1372 return 0;
b19441af 1373
a2cd52ca 1374err_rom_file:
280c73d3 1375 if (rom_size) {
94e61088 1376 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1377 kfree(pdev->rom_attr);
1378 pdev->rom_attr = NULL;
1379 }
9890b12a
ME
1380err_resource_files:
1381 pci_remove_resource_files(pdev);
94e61088 1382err_config_file:
557848c3 1383 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1384 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1385 else
1386 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1387err:
1388 return retval;
1da177e4
LT
1389}
1390
280c73d3
ZY
1391static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1392{
1393 if (dev->vpd && dev->vpd->attr) {
1394 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1395 kfree(dev->vpd->attr);
1396 }
1397
1398 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1399 if (dev->reset_fn) {
1400 device_remove_file(&dev->dev, &reset_attr);
1401 dev->reset_fn = 0;
1402 }
280c73d3
ZY
1403}
1404
1da177e4
LT
1405/**
1406 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1407 * @pdev: device whose entries we should free
1408 *
1409 * Cleanup when @pdev is removed from sysfs.
1410 */
1411void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1412{
280c73d3
ZY
1413 int rom_size = 0;
1414
d67afe5e
DM
1415 if (!sysfs_initialized)
1416 return;
1417
280c73d3 1418 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1419
557848c3 1420 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1421 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1422 else
1423 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1424
1425 pci_remove_resource_files(pdev);
1426
280c73d3
ZY
1427 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1428 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1429 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1430 rom_size = 0x20000;
1431
1432 if (rom_size && pdev->rom_attr) {
1433 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1434 kfree(pdev->rom_attr);
1da177e4 1435 }
911e1c9b
N
1436
1437 pci_remove_firmware_label_files(pdev);
1438
1da177e4
LT
1439}
1440
1441static int __init pci_sysfs_init(void)
1442{
1443 struct pci_dev *pdev = NULL;
b19441af
GKH
1444 int retval;
1445
1da177e4 1446 sysfs_initialized = 1;
b19441af
GKH
1447 for_each_pci_dev(pdev) {
1448 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1449 if (retval) {
1450 pci_dev_put(pdev);
b19441af 1451 return retval;
151fc5df 1452 }
b19441af 1453 }
1da177e4
LT
1454
1455 return 0;
1456}
1457
40ee9e9f 1458late_initcall(pci_sysfs_init);
4e15c46b
YL
1459
1460static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1461 &vga_attr.attr,
4e15c46b
YL
1462 NULL,
1463};
1464
1465static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1466 struct attribute *a, int n)
1467{
625e1d59
YL
1468 struct device *dev = container_of(kobj, struct device, kobj);
1469 struct pci_dev *pdev = to_pci_dev(dev);
1470
1471 if (a == &vga_attr.attr)
1472 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1473 return 0;
1474
4e15c46b
YL
1475 return a->mode;
1476}
1477
dfab88be
JL
1478static struct attribute *pci_dev_hp_attrs[] = {
1479 &dev_remove_attr.attr,
1480 &dev_rescan_attr.attr,
1481 NULL,
1482};
1483
1484static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1485 struct attribute *a, int n)
1486{
1487 struct device *dev = container_of(kobj, struct device, kobj);
1488 struct pci_dev *pdev = to_pci_dev(dev);
1489
1490 if (pdev->is_virtfn)
1491 return 0;
1492
1493 return a->mode;
1494}
1495
1496static struct attribute_group pci_dev_hp_attr_group = {
1497 .attrs = pci_dev_hp_attrs,
1498 .is_visible = pci_dev_hp_attrs_are_visible,
1499};
1500
1789382a
DD
1501#ifdef CONFIG_PCI_IOV
1502static struct attribute *sriov_dev_attrs[] = {
1503 &sriov_totalvfs_attr.attr,
1504 &sriov_numvfs_attr.attr,
1505 NULL,
1506};
1507
1508static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1509 struct attribute *a, int n)
1510{
1511 struct device *dev = container_of(kobj, struct device, kobj);
1512
1513 if (!dev_is_pf(dev))
1514 return 0;
1515
1516 return a->mode;
1517}
1518
1519static struct attribute_group sriov_dev_attr_group = {
1520 .attrs = sriov_dev_attrs,
1521 .is_visible = sriov_attrs_are_visible,
1522};
1523#endif /* CONFIG_PCI_IOV */
1524
4e15c46b
YL
1525static struct attribute_group pci_dev_attr_group = {
1526 .attrs = pci_dev_dev_attrs,
1527 .is_visible = pci_dev_attrs_are_visible,
1528};
1529
1530static const struct attribute_group *pci_dev_attr_groups[] = {
1531 &pci_dev_attr_group,
dfab88be 1532 &pci_dev_hp_attr_group,
1789382a
DD
1533#ifdef CONFIG_PCI_IOV
1534 &sriov_dev_attr_group,
1535#endif
4e15c46b
YL
1536 NULL,
1537};
1538
1539struct device_type pci_dev_type = {
1540 .groups = pci_dev_attr_groups,
1541};