Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> |
4 | * (C) Copyright 2002-2004 IBM Corp. | |
5 | * (C) Copyright 2003 Matthew Wilcox | |
6 | * (C) Copyright 2003 Hewlett-Packard | |
7 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
8 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
9 | * | |
10 | * File attributes for PCI devices | |
11 | * | |
f7625980 | 12 | * Modeled after usb's driverfs.c |
1da177e4 LT |
13 | */ |
14 | ||
15 | ||
1da177e4 | 16 | #include <linux/kernel.h> |
b5ff7df3 | 17 | #include <linux/sched.h> |
1da177e4 LT |
18 | #include <linux/pci.h> |
19 | #include <linux/stat.h> | |
363c75db | 20 | #include <linux/export.h> |
1da177e4 LT |
21 | #include <linux/topology.h> |
22 | #include <linux/mm.h> | |
de139a33 | 23 | #include <linux/fs.h> |
aa0ac365 | 24 | #include <linux/capability.h> |
a628e7b8 | 25 | #include <linux/security.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
1a39b310 | 27 | #include <linux/vgaarb.h> |
448bd857 | 28 | #include <linux/pm_runtime.h> |
ac8e3cef | 29 | #include <linux/msi.h> |
dfc73e7a | 30 | #include <linux/of.h> |
1da177e4 LT |
31 | #include "pci.h" |
32 | ||
33 | static int sysfs_initialized; /* = 0 */ | |
34 | ||
35 | /* show configuration fields */ | |
36 | #define pci_config_attr(field, format_string) \ | |
37 | static ssize_t \ | |
e404e274 | 38 | field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
39 | { \ |
40 | struct pci_dev *pdev; \ | |
41 | \ | |
3c78bc61 | 42 | pdev = to_pci_dev(dev); \ |
ad025f8e | 43 | return sysfs_emit(buf, format_string, pdev->field); \ |
5136b2da GKH |
44 | } \ |
45 | static DEVICE_ATTR_RO(field) | |
1da177e4 LT |
46 | |
47 | pci_config_attr(vendor, "0x%04x\n"); | |
48 | pci_config_attr(device, "0x%04x\n"); | |
49 | pci_config_attr(subsystem_vendor, "0x%04x\n"); | |
50 | pci_config_attr(subsystem_device, "0x%04x\n"); | |
702ed3be | 51 | pci_config_attr(revision, "0x%02x\n"); |
1da177e4 | 52 | pci_config_attr(class, "0x%06x\n"); |
ac8e3cef BS |
53 | |
54 | static ssize_t irq_show(struct device *dev, | |
55 | struct device_attribute *attr, | |
56 | char *buf) | |
57 | { | |
58 | struct pci_dev *pdev = to_pci_dev(dev); | |
59 | ||
60 | #ifdef CONFIG_PCI_MSI | |
61 | /* | |
62 | * For MSI, show the first MSI IRQ; for all other cases including | |
63 | * MSI-X, show the legacy INTx IRQ. | |
64 | */ | |
793c5006 TG |
65 | if (pdev->msi_enabled) |
66 | return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0)); | |
ac8e3cef BS |
67 | #endif |
68 | ||
69 | return sysfs_emit(buf, "%u\n", pdev->irq); | |
70 | } | |
71 | static DEVICE_ATTR_RO(irq); | |
1da177e4 | 72 | |
bdee9d98 DT |
73 | static ssize_t broken_parity_status_show(struct device *dev, |
74 | struct device_attribute *attr, | |
75 | char *buf) | |
76 | { | |
77 | struct pci_dev *pdev = to_pci_dev(dev); | |
ad025f8e | 78 | return sysfs_emit(buf, "%u\n", pdev->broken_parity_status); |
bdee9d98 DT |
79 | } |
80 | ||
81 | static ssize_t broken_parity_status_store(struct device *dev, | |
82 | struct device_attribute *attr, | |
83 | const char *buf, size_t count) | |
84 | { | |
85 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 86 | unsigned long val; |
bdee9d98 | 87 | |
9a994e8e | 88 | if (kstrtoul(buf, 0, &val) < 0) |
92425a40 TP |
89 | return -EINVAL; |
90 | ||
91 | pdev->broken_parity_status = !!val; | |
92 | ||
93 | return count; | |
bdee9d98 | 94 | } |
5136b2da | 95 | static DEVICE_ATTR_RW(broken_parity_status); |
bdee9d98 | 96 | |
5aaba363 | 97 | static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, |
3c78bc61 | 98 | struct device_attribute *attr, char *buf) |
c489f5fb | 99 | { |
3be83050 | 100 | const struct cpumask *mask; |
4327edf6 | 101 | |
e0cd5160 | 102 | #ifdef CONFIG_NUMA |
cee0ad4a MG |
103 | if (dev_to_node(dev) == NUMA_NO_NODE) |
104 | mask = cpu_online_mask; | |
105 | else | |
106 | mask = cpumask_of_node(dev_to_node(dev)); | |
e0cd5160 | 107 | #else |
3be83050 | 108 | mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); |
e0cd5160 | 109 | #endif |
5aaba363 | 110 | return cpumap_print_to_pagebuf(list, buf, mask); |
39106dcf MT |
111 | } |
112 | ||
c489f5fb | 113 | static ssize_t local_cpus_show(struct device *dev, |
3c78bc61 | 114 | struct device_attribute *attr, char *buf) |
c489f5fb | 115 | { |
5aaba363 | 116 | return pci_dev_show_local_cpu(dev, false, attr, buf); |
c489f5fb | 117 | } |
5136b2da | 118 | static DEVICE_ATTR_RO(local_cpus); |
39106dcf MT |
119 | |
120 | static ssize_t local_cpulist_show(struct device *dev, | |
3c78bc61 | 121 | struct device_attribute *attr, char *buf) |
39106dcf | 122 | { |
5aaba363 | 123 | return pci_dev_show_local_cpu(dev, true, attr, buf); |
1da177e4 | 124 | } |
5136b2da | 125 | static DEVICE_ATTR_RO(local_cpulist); |
1da177e4 | 126 | |
dc2c2c9d YL |
127 | /* |
128 | * PCI Bus Class Devices | |
129 | */ | |
56039e65 GKH |
130 | static ssize_t cpuaffinity_show(struct device *dev, |
131 | struct device_attribute *attr, char *buf) | |
dc2c2c9d | 132 | { |
5aaba363 SH |
133 | const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); |
134 | ||
135 | return cpumap_print_to_pagebuf(false, buf, cpumask); | |
dc2c2c9d | 136 | } |
56039e65 | 137 | static DEVICE_ATTR_RO(cpuaffinity); |
dc2c2c9d | 138 | |
56039e65 GKH |
139 | static ssize_t cpulistaffinity_show(struct device *dev, |
140 | struct device_attribute *attr, char *buf) | |
dc2c2c9d | 141 | { |
5aaba363 SH |
142 | const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); |
143 | ||
144 | return cpumap_print_to_pagebuf(true, buf, cpumask); | |
dc2c2c9d | 145 | } |
56039e65 | 146 | static DEVICE_ATTR_RO(cpulistaffinity); |
dc2c2c9d | 147 | |
80a129af ML |
148 | static ssize_t power_state_show(struct device *dev, |
149 | struct device_attribute *attr, char *buf) | |
150 | { | |
151 | struct pci_dev *pdev = to_pci_dev(dev); | |
152 | ||
ad025f8e | 153 | return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state)); |
80a129af ML |
154 | } |
155 | static DEVICE_ATTR_RO(power_state); | |
156 | ||
1da177e4 | 157 | /* show resources */ |
3c78bc61 RD |
158 | static ssize_t resource_show(struct device *dev, struct device_attribute *attr, |
159 | char *buf) | |
1da177e4 | 160 | { |
3c78bc61 | 161 | struct pci_dev *pci_dev = to_pci_dev(dev); |
1da177e4 | 162 | int i; |
fde09c6d | 163 | int max; |
e31dd6e4 | 164 | resource_size_t start, end; |
ad025f8e | 165 | size_t len = 0; |
1da177e4 LT |
166 | |
167 | if (pci_dev->subordinate) | |
168 | max = DEVICE_COUNT_RESOURCE; | |
fde09c6d YZ |
169 | else |
170 | max = PCI_BRIDGE_RESOURCES; | |
1da177e4 LT |
171 | |
172 | for (i = 0; i < max; i++) { | |
2311b1f2 ME |
173 | struct resource *res = &pci_dev->resource[i]; |
174 | pci_resource_to_user(pci_dev, i, res, &start, &end); | |
ad025f8e KW |
175 | len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n", |
176 | (unsigned long long)start, | |
177 | (unsigned long long)end, | |
178 | (unsigned long long)res->flags); | |
1da177e4 | 179 | } |
ad025f8e | 180 | return len; |
1da177e4 | 181 | } |
5136b2da | 182 | static DEVICE_ATTR_RO(resource); |
1da177e4 | 183 | |
56c1af46 WVK |
184 | static ssize_t max_link_speed_show(struct device *dev, |
185 | struct device_attribute *attr, char *buf) | |
186 | { | |
6cf57be0 | 187 | struct pci_dev *pdev = to_pci_dev(dev); |
56c1af46 | 188 | |
ad025f8e KW |
189 | return sysfs_emit(buf, "%s\n", |
190 | pci_speed_string(pcie_get_speed_cap(pdev))); | |
56c1af46 WVK |
191 | } |
192 | static DEVICE_ATTR_RO(max_link_speed); | |
193 | ||
194 | static ssize_t max_link_width_show(struct device *dev, | |
195 | struct device_attribute *attr, char *buf) | |
196 | { | |
c70b65fb | 197 | struct pci_dev *pdev = to_pci_dev(dev); |
56c1af46 | 198 | |
ad025f8e | 199 | return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); |
56c1af46 WVK |
200 | } |
201 | static DEVICE_ATTR_RO(max_link_width); | |
202 | ||
203 | static ssize_t current_link_speed_show(struct device *dev, | |
204 | struct device_attribute *attr, char *buf) | |
205 | { | |
206 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
207 | u16 linkstat; | |
208 | int err; | |
6348a34d | 209 | enum pci_bus_speed speed; |
56c1af46 WVK |
210 | |
211 | err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); | |
212 | if (err) | |
213 | return -EINVAL; | |
214 | ||
6348a34d | 215 | speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; |
56c1af46 | 216 | |
ad025f8e | 217 | return sysfs_emit(buf, "%s\n", pci_speed_string(speed)); |
56c1af46 WVK |
218 | } |
219 | static DEVICE_ATTR_RO(current_link_speed); | |
220 | ||
221 | static ssize_t current_link_width_show(struct device *dev, | |
222 | struct device_attribute *attr, char *buf) | |
223 | { | |
224 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
225 | u16 linkstat; | |
226 | int err; | |
227 | ||
228 | err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); | |
229 | if (err) | |
230 | return -EINVAL; | |
231 | ||
ad025f8e | 232 | return sysfs_emit(buf, "%u\n", |
56c1af46 WVK |
233 | (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT); |
234 | } | |
235 | static DEVICE_ATTR_RO(current_link_width); | |
236 | ||
237 | static ssize_t secondary_bus_number_show(struct device *dev, | |
238 | struct device_attribute *attr, | |
239 | char *buf) | |
240 | { | |
241 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
242 | u8 sec_bus; | |
243 | int err; | |
244 | ||
245 | err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); | |
246 | if (err) | |
247 | return -EINVAL; | |
248 | ||
ad025f8e | 249 | return sysfs_emit(buf, "%u\n", sec_bus); |
56c1af46 WVK |
250 | } |
251 | static DEVICE_ATTR_RO(secondary_bus_number); | |
252 | ||
253 | static ssize_t subordinate_bus_number_show(struct device *dev, | |
254 | struct device_attribute *attr, | |
255 | char *buf) | |
256 | { | |
257 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
258 | u8 sub_bus; | |
259 | int err; | |
260 | ||
261 | err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); | |
262 | if (err) | |
263 | return -EINVAL; | |
264 | ||
ad025f8e | 265 | return sysfs_emit(buf, "%u\n", sub_bus); |
56c1af46 WVK |
266 | } |
267 | static DEVICE_ATTR_RO(subordinate_bus_number); | |
268 | ||
0077a845 SH |
269 | static ssize_t ari_enabled_show(struct device *dev, |
270 | struct device_attribute *attr, | |
271 | char *buf) | |
272 | { | |
273 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
274 | ||
ad025f8e | 275 | return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); |
0077a845 SH |
276 | } |
277 | static DEVICE_ATTR_RO(ari_enabled); | |
278 | ||
3c78bc61 RD |
279 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, |
280 | char *buf) | |
9888549e GK |
281 | { |
282 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
283 | ||
ad025f8e KW |
284 | return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", |
285 | pci_dev->vendor, pci_dev->device, | |
286 | pci_dev->subsystem_vendor, pci_dev->subsystem_device, | |
287 | (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), | |
288 | (u8)(pci_dev->class)); | |
9888549e | 289 | } |
5136b2da | 290 | static DEVICE_ATTR_RO(modalias); |
bae94d02 | 291 | |
d8e7d53a | 292 | static ssize_t enable_store(struct device *dev, struct device_attribute *attr, |
3c78bc61 | 293 | const char *buf, size_t count) |
9f125d30 AV |
294 | { |
295 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 296 | unsigned long val; |
36f354ec | 297 | ssize_t result = 0; |
9f125d30 AV |
298 | |
299 | /* this can crash the machine when done on the "wrong" device */ | |
300 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 301 | return -EPERM; |
9f125d30 | 302 | |
36f354ec KW |
303 | if (kstrtoul(buf, 0, &val) < 0) |
304 | return -EINVAL; | |
95e83e21 | 305 | |
6f5cdfa8 CH |
306 | device_lock(dev); |
307 | if (dev->driver) | |
308 | result = -EBUSY; | |
309 | else if (val) | |
bae94d02 | 310 | result = pci_enable_device(pdev); |
6f5cdfa8 CH |
311 | else if (pci_is_enabled(pdev)) |
312 | pci_disable_device(pdev); | |
313 | else | |
314 | result = -EIO; | |
315 | device_unlock(dev); | |
9f125d30 | 316 | |
bae94d02 IPG |
317 | return result < 0 ? result : count; |
318 | } | |
319 | ||
d8e7d53a | 320 | static ssize_t enable_show(struct device *dev, struct device_attribute *attr, |
3c78bc61 | 321 | char *buf) |
bae94d02 IPG |
322 | { |
323 | struct pci_dev *pdev; | |
9f125d30 | 324 | |
3c78bc61 | 325 | pdev = to_pci_dev(dev); |
ad025f8e | 326 | return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt)); |
9f125d30 | 327 | } |
d8e7d53a | 328 | static DEVICE_ATTR_RW(enable); |
9f125d30 | 329 | |
81bb0e19 | 330 | #ifdef CONFIG_NUMA |
63692df1 PB |
331 | static ssize_t numa_node_store(struct device *dev, |
332 | struct device_attribute *attr, const char *buf, | |
333 | size_t count) | |
334 | { | |
335 | struct pci_dev *pdev = to_pci_dev(dev); | |
36f354ec | 336 | int node; |
63692df1 PB |
337 | |
338 | if (!capable(CAP_SYS_ADMIN)) | |
339 | return -EPERM; | |
340 | ||
36f354ec KW |
341 | if (kstrtoint(buf, 0, &node) < 0) |
342 | return -EINVAL; | |
63692df1 | 343 | |
3dcc8d39 MK |
344 | if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) |
345 | return -EINVAL; | |
346 | ||
347 | if (node != NUMA_NO_NODE && !node_online(node)) | |
63692df1 PB |
348 | return -EINVAL; |
349 | ||
350 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); | |
7506dc79 | 351 | pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", |
63692df1 PB |
352 | node); |
353 | ||
354 | dev->numa_node = node; | |
355 | return count; | |
356 | } | |
357 | ||
3c78bc61 RD |
358 | static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, |
359 | char *buf) | |
81bb0e19 | 360 | { |
ad025f8e | 361 | return sysfs_emit(buf, "%d\n", dev->numa_node); |
81bb0e19 | 362 | } |
63692df1 | 363 | static DEVICE_ATTR_RW(numa_node); |
81bb0e19 BG |
364 | #endif |
365 | ||
3c78bc61 RD |
366 | static ssize_t dma_mask_bits_show(struct device *dev, |
367 | struct device_attribute *attr, char *buf) | |
bb965401 YL |
368 | { |
369 | struct pci_dev *pdev = to_pci_dev(dev); | |
370 | ||
ad025f8e | 371 | return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask)); |
bb965401 | 372 | } |
5136b2da | 373 | static DEVICE_ATTR_RO(dma_mask_bits); |
bb965401 | 374 | |
3c78bc61 RD |
375 | static ssize_t consistent_dma_mask_bits_show(struct device *dev, |
376 | struct device_attribute *attr, | |
377 | char *buf) | |
bb965401 | 378 | { |
ad025f8e | 379 | return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask)); |
bb965401 | 380 | } |
5136b2da | 381 | static DEVICE_ATTR_RO(consistent_dma_mask_bits); |
bb965401 | 382 | |
3c78bc61 RD |
383 | static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, |
384 | char *buf) | |
fe97064c BG |
385 | { |
386 | struct pci_dev *pdev = to_pci_dev(dev); | |
468ff15a | 387 | struct pci_bus *subordinate = pdev->subordinate; |
fe97064c | 388 | |
ad025f8e KW |
389 | return sysfs_emit(buf, "%u\n", subordinate ? |
390 | !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) | |
391 | : !pdev->no_msi); | |
fe97064c BG |
392 | } |
393 | ||
3c78bc61 RD |
394 | static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, |
395 | const char *buf, size_t count) | |
fe97064c BG |
396 | { |
397 | struct pci_dev *pdev = to_pci_dev(dev); | |
468ff15a | 398 | struct pci_bus *subordinate = pdev->subordinate; |
92425a40 TP |
399 | unsigned long val; |
400 | ||
fe97064c | 401 | if (!capable(CAP_SYS_ADMIN)) |
92425a40 | 402 | return -EPERM; |
fe97064c | 403 | |
95e83e21 KW |
404 | if (kstrtoul(buf, 0, &val) < 0) |
405 | return -EINVAL; | |
406 | ||
f7625980 | 407 | /* |
468ff15a YW |
408 | * "no_msi" and "bus_flags" only affect what happens when a driver |
409 | * requests MSI or MSI-X. They don't affect any drivers that have | |
410 | * already requested MSI or MSI-X. | |
f7625980 | 411 | */ |
468ff15a YW |
412 | if (!subordinate) { |
413 | pdev->no_msi = !val; | |
7506dc79 | 414 | pci_info(pdev, "MSI/MSI-X %s for future drivers\n", |
468ff15a | 415 | val ? "allowed" : "disallowed"); |
fe97064c | 416 | return count; |
fe97064c BG |
417 | } |
418 | ||
468ff15a YW |
419 | if (val) |
420 | subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; | |
421 | else | |
422 | subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | |
423 | ||
424 | dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", | |
425 | val ? "allowed" : "disallowed"); | |
fe97064c BG |
426 | return count; |
427 | } | |
5136b2da | 428 | static DEVICE_ATTR_RW(msi_bus); |
9888549e | 429 | |
1094f6d0 | 430 | static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count) |
705b1aaa AC |
431 | { |
432 | unsigned long val; | |
433 | struct pci_bus *b = NULL; | |
434 | ||
9a994e8e | 435 | if (kstrtoul(buf, 0, &val) < 0) |
705b1aaa AC |
436 | return -EINVAL; |
437 | ||
438 | if (val) { | |
9d16947b | 439 | pci_lock_rescan_remove(); |
705b1aaa AC |
440 | while ((b = pci_find_next_bus(b)) != NULL) |
441 | pci_rescan_bus(b); | |
9d16947b | 442 | pci_unlock_rescan_remove(); |
705b1aaa AC |
443 | } |
444 | return count; | |
445 | } | |
1094f6d0 | 446 | static BUS_ATTR_WO(rescan); |
705b1aaa | 447 | |
bf22c90f | 448 | static struct attribute *pci_bus_attrs[] = { |
0f49ba55 GKH |
449 | &bus_attr_rescan.attr, |
450 | NULL, | |
451 | }; | |
452 | ||
453 | static const struct attribute_group pci_bus_group = { | |
454 | .attrs = pci_bus_attrs, | |
455 | }; | |
456 | ||
457 | const struct attribute_group *pci_bus_groups[] = { | |
458 | &pci_bus_group, | |
459 | NULL, | |
705b1aaa | 460 | }; |
77c27c7b | 461 | |
3c78bc61 RD |
462 | static ssize_t dev_rescan_store(struct device *dev, |
463 | struct device_attribute *attr, const char *buf, | |
464 | size_t count) | |
738a6396 AC |
465 | { |
466 | unsigned long val; | |
467 | struct pci_dev *pdev = to_pci_dev(dev); | |
468 | ||
9a994e8e | 469 | if (kstrtoul(buf, 0, &val) < 0) |
738a6396 AC |
470 | return -EINVAL; |
471 | ||
472 | if (val) { | |
9d16947b | 473 | pci_lock_rescan_remove(); |
738a6396 | 474 | pci_rescan_bus(pdev->bus); |
9d16947b | 475 | pci_unlock_rescan_remove(); |
738a6396 AC |
476 | } |
477 | return count; | |
478 | } | |
bd641fd8 KS |
479 | static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, |
480 | dev_rescan_store); | |
738a6396 | 481 | |
3c78bc61 RD |
482 | static ssize_t remove_store(struct device *dev, struct device_attribute *attr, |
483 | const char *buf, size_t count) | |
77c27c7b | 484 | { |
77c27c7b | 485 | unsigned long val; |
77c27c7b | 486 | |
9a994e8e | 487 | if (kstrtoul(buf, 0, &val) < 0) |
77c27c7b AC |
488 | return -EINVAL; |
489 | ||
bc6caf02 TH |
490 | if (val && device_remove_file_self(dev, attr)) |
491 | pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); | |
77c27c7b AC |
492 | return count; |
493 | } | |
e2154044 | 494 | static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, |
8bdfa145 | 495 | remove_store); |
b9d320fc | 496 | |
4e2b7943 KS |
497 | static ssize_t bus_rescan_store(struct device *dev, |
498 | struct device_attribute *attr, | |
499 | const char *buf, size_t count) | |
b9d320fc YL |
500 | { |
501 | unsigned long val; | |
502 | struct pci_bus *bus = to_pci_bus(dev); | |
503 | ||
9a994e8e | 504 | if (kstrtoul(buf, 0, &val) < 0) |
b9d320fc YL |
505 | return -EINVAL; |
506 | ||
507 | if (val) { | |
9d16947b | 508 | pci_lock_rescan_remove(); |
2f320521 YL |
509 | if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) |
510 | pci_rescan_bus_bridge_resize(bus->self); | |
511 | else | |
512 | pci_rescan_bus(bus); | |
9d16947b | 513 | pci_unlock_rescan_remove(); |
b9d320fc YL |
514 | } |
515 | return count; | |
516 | } | |
bd641fd8 KS |
517 | static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, |
518 | bus_rescan_store); | |
b9d320fc | 519 | |
fbb988be | 520 | #if defined(CONFIG_PM) && defined(CONFIG_ACPI) |
448bd857 HY |
521 | static ssize_t d3cold_allowed_store(struct device *dev, |
522 | struct device_attribute *attr, | |
523 | const char *buf, size_t count) | |
524 | { | |
525 | struct pci_dev *pdev = to_pci_dev(dev); | |
526 | unsigned long val; | |
527 | ||
9a994e8e | 528 | if (kstrtoul(buf, 0, &val) < 0) |
448bd857 HY |
529 | return -EINVAL; |
530 | ||
531 | pdev->d3cold_allowed = !!val; | |
9d26d3a8 MW |
532 | if (pdev->d3cold_allowed) |
533 | pci_d3cold_enable(pdev); | |
534 | else | |
535 | pci_d3cold_disable(pdev); | |
536 | ||
448bd857 HY |
537 | pm_runtime_resume(dev); |
538 | ||
539 | return count; | |
540 | } | |
541 | ||
542 | static ssize_t d3cold_allowed_show(struct device *dev, | |
543 | struct device_attribute *attr, char *buf) | |
544 | { | |
545 | struct pci_dev *pdev = to_pci_dev(dev); | |
ad025f8e | 546 | return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); |
448bd857 | 547 | } |
5136b2da | 548 | static DEVICE_ATTR_RW(d3cold_allowed); |
448bd857 HY |
549 | #endif |
550 | ||
dfc73e7a SO |
551 | #ifdef CONFIG_OF |
552 | static ssize_t devspec_show(struct device *dev, | |
553 | struct device_attribute *attr, char *buf) | |
554 | { | |
555 | struct pci_dev *pdev = to_pci_dev(dev); | |
556 | struct device_node *np = pci_device_to_OF_node(pdev); | |
557 | ||
b63773a8 | 558 | if (np == NULL) |
dfc73e7a | 559 | return 0; |
14c19b2a | 560 | return sysfs_emit(buf, "%pOF\n", np); |
dfc73e7a SO |
561 | } |
562 | static DEVICE_ATTR_RO(devspec); | |
563 | #endif | |
564 | ||
782a985d AW |
565 | static ssize_t driver_override_store(struct device *dev, |
566 | struct device_attribute *attr, | |
567 | const char *buf, size_t count) | |
568 | { | |
569 | struct pci_dev *pdev = to_pci_dev(dev); | |
23d99baf | 570 | int ret; |
782a985d | 571 | |
23d99baf KK |
572 | ret = driver_set_override(dev, &pdev->driver_override, buf, count); |
573 | if (ret) | |
574 | return ret; | |
782a985d AW |
575 | |
576 | return count; | |
577 | } | |
578 | ||
579 | static ssize_t driver_override_show(struct device *dev, | |
580 | struct device_attribute *attr, char *buf) | |
581 | { | |
582 | struct pci_dev *pdev = to_pci_dev(dev); | |
9561475d | 583 | ssize_t len; |
782a985d | 584 | |
9561475d | 585 | device_lock(dev); |
ad025f8e | 586 | len = sysfs_emit(buf, "%s\n", pdev->driver_override); |
9561475d NS |
587 | device_unlock(dev); |
588 | return len; | |
782a985d AW |
589 | } |
590 | static DEVICE_ATTR_RW(driver_override); | |
591 | ||
bf22c90f | 592 | static struct attribute *pci_dev_attrs[] = { |
80a129af | 593 | &dev_attr_power_state.attr, |
5136b2da GKH |
594 | &dev_attr_resource.attr, |
595 | &dev_attr_vendor.attr, | |
596 | &dev_attr_device.attr, | |
597 | &dev_attr_subsystem_vendor.attr, | |
598 | &dev_attr_subsystem_device.attr, | |
702ed3be | 599 | &dev_attr_revision.attr, |
5136b2da GKH |
600 | &dev_attr_class.attr, |
601 | &dev_attr_irq.attr, | |
602 | &dev_attr_local_cpus.attr, | |
603 | &dev_attr_local_cpulist.attr, | |
604 | &dev_attr_modalias.attr, | |
81bb0e19 | 605 | #ifdef CONFIG_NUMA |
5136b2da | 606 | &dev_attr_numa_node.attr, |
81bb0e19 | 607 | #endif |
5136b2da GKH |
608 | &dev_attr_dma_mask_bits.attr, |
609 | &dev_attr_consistent_dma_mask_bits.attr, | |
d8e7d53a | 610 | &dev_attr_enable.attr, |
5136b2da GKH |
611 | &dev_attr_broken_parity_status.attr, |
612 | &dev_attr_msi_bus.attr, | |
fbb988be | 613 | #if defined(CONFIG_PM) && defined(CONFIG_ACPI) |
5136b2da | 614 | &dev_attr_d3cold_allowed.attr, |
dfc73e7a SO |
615 | #endif |
616 | #ifdef CONFIG_OF | |
617 | &dev_attr_devspec.attr, | |
77c27c7b | 618 | #endif |
782a985d | 619 | &dev_attr_driver_override.attr, |
0077a845 | 620 | &dev_attr_ari_enabled.attr, |
5136b2da GKH |
621 | NULL, |
622 | }; | |
623 | ||
56c1af46 WVK |
624 | static struct attribute *pci_bridge_attrs[] = { |
625 | &dev_attr_subordinate_bus_number.attr, | |
626 | &dev_attr_secondary_bus_number.attr, | |
627 | NULL, | |
5136b2da GKH |
628 | }; |
629 | ||
56c1af46 WVK |
630 | static struct attribute *pcie_dev_attrs[] = { |
631 | &dev_attr_current_link_speed.attr, | |
632 | &dev_attr_current_link_width.attr, | |
633 | &dev_attr_max_link_width.attr, | |
634 | &dev_attr_max_link_speed.attr, | |
5136b2da | 635 | NULL, |
1da177e4 LT |
636 | }; |
637 | ||
56039e65 | 638 | static struct attribute *pcibus_attrs[] = { |
8bdfa145 | 639 | &dev_attr_bus_rescan.attr, |
56039e65 GKH |
640 | &dev_attr_cpuaffinity.attr, |
641 | &dev_attr_cpulistaffinity.attr, | |
642 | NULL, | |
643 | }; | |
644 | ||
645 | static const struct attribute_group pcibus_group = { | |
646 | .attrs = pcibus_attrs, | |
647 | }; | |
648 | ||
649 | const struct attribute_group *pcibus_groups[] = { | |
650 | &pcibus_group, | |
651 | NULL, | |
b9d320fc YL |
652 | }; |
653 | ||
3c78bc61 RD |
654 | static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, |
655 | char *buf) | |
217f45de DA |
656 | { |
657 | struct pci_dev *pdev = to_pci_dev(dev); | |
1a39b310 MG |
658 | struct pci_dev *vga_dev = vga_default_device(); |
659 | ||
660 | if (vga_dev) | |
ad025f8e | 661 | return sysfs_emit(buf, "%u\n", (pdev == vga_dev)); |
217f45de | 662 | |
ad025f8e KW |
663 | return sysfs_emit(buf, "%u\n", |
664 | !!(pdev->resource[PCI_ROM_RESOURCE].flags & | |
665 | IORESOURCE_ROM_SHADOW)); | |
217f45de | 666 | } |
8bdfa145 | 667 | static DEVICE_ATTR_RO(boot_vga); |
217f45de | 668 | |
3c78bc61 RD |
669 | static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, |
670 | struct bin_attribute *bin_attr, char *buf, | |
671 | loff_t off, size_t count) | |
1da177e4 | 672 | { |
554a6037 | 673 | struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
674 | unsigned int size = 64; |
675 | loff_t init_off = off; | |
3c78bc61 | 676 | u8 *data = (u8 *) buf; |
1da177e4 LT |
677 | |
678 | /* Several chips lock up trying to read undefined config space */ | |
ab0fa82b | 679 | if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) |
1da177e4 | 680 | size = dev->cfg_size; |
3c78bc61 | 681 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
1da177e4 | 682 | size = 128; |
1da177e4 LT |
683 | |
684 | if (off > size) | |
685 | return 0; | |
686 | if (off + count > size) { | |
687 | size -= off; | |
688 | count = size; | |
689 | } else { | |
690 | size = count; | |
691 | } | |
692 | ||
3d8387ef HY |
693 | pci_config_pm_runtime_get(dev); |
694 | ||
4c0619ad | 695 | if ((off & 1) && size) { |
696 | u8 val; | |
e04b0ea2 | 697 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 698 | data[off - init_off] = val; |
1da177e4 | 699 | off++; |
4c0619ad | 700 | size--; |
701 | } | |
702 | ||
703 | if ((off & 3) && size > 2) { | |
704 | u16 val; | |
e04b0ea2 | 705 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 706 | data[off - init_off] = val & 0xff; |
707 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
708 | off += 2; | |
709 | size -= 2; | |
1da177e4 LT |
710 | } |
711 | ||
712 | while (size > 3) { | |
4c0619ad | 713 | u32 val; |
e04b0ea2 | 714 | pci_user_read_config_dword(dev, off, &val); |
4c0619ad | 715 | data[off - init_off] = val & 0xff; |
716 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
717 | data[off - init_off + 2] = (val >> 16) & 0xff; | |
718 | data[off - init_off + 3] = (val >> 24) & 0xff; | |
1da177e4 LT |
719 | off += 4; |
720 | size -= 4; | |
2ce02a86 | 721 | cond_resched(); |
1da177e4 LT |
722 | } |
723 | ||
4c0619ad | 724 | if (size >= 2) { |
725 | u16 val; | |
e04b0ea2 | 726 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 727 | data[off - init_off] = val & 0xff; |
728 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
729 | off += 2; | |
730 | size -= 2; | |
731 | } | |
732 | ||
733 | if (size > 0) { | |
734 | u8 val; | |
e04b0ea2 | 735 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 736 | data[off - init_off] = val; |
1da177e4 LT |
737 | } |
738 | ||
3d8387ef HY |
739 | pci_config_pm_runtime_put(dev); |
740 | ||
1da177e4 LT |
741 | return count; |
742 | } | |
743 | ||
3c78bc61 RD |
744 | static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, |
745 | struct bin_attribute *bin_attr, char *buf, | |
746 | loff_t off, size_t count) | |
1da177e4 | 747 | { |
554a6037 | 748 | struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
749 | unsigned int size = count; |
750 | loff_t init_off = off; | |
3c78bc61 | 751 | u8 *data = (u8 *) buf; |
eb627e17 MG |
752 | int ret; |
753 | ||
754 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
755 | if (ret) | |
756 | return ret; | |
1da177e4 LT |
757 | |
758 | if (off > dev->cfg_size) | |
759 | return 0; | |
760 | if (off + count > dev->cfg_size) { | |
761 | size = dev->cfg_size - off; | |
762 | count = size; | |
763 | } | |
f7625980 | 764 | |
3d8387ef HY |
765 | pci_config_pm_runtime_get(dev); |
766 | ||
4c0619ad | 767 | if ((off & 1) && size) { |
e04b0ea2 | 768 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 769 | off++; |
4c0619ad | 770 | size--; |
1da177e4 | 771 | } |
f7625980 | 772 | |
4c0619ad | 773 | if ((off & 3) && size > 2) { |
774 | u16 val = data[off - init_off]; | |
775 | val |= (u16) data[off - init_off + 1] << 8; | |
3c78bc61 RD |
776 | pci_user_write_config_word(dev, off, val); |
777 | off += 2; | |
778 | size -= 2; | |
779 | } | |
1da177e4 LT |
780 | |
781 | while (size > 3) { | |
4c0619ad | 782 | u32 val = data[off - init_off]; |
783 | val |= (u32) data[off - init_off + 1] << 8; | |
784 | val |= (u32) data[off - init_off + 2] << 16; | |
785 | val |= (u32) data[off - init_off + 3] << 24; | |
e04b0ea2 | 786 | pci_user_write_config_dword(dev, off, val); |
1da177e4 LT |
787 | off += 4; |
788 | size -= 4; | |
789 | } | |
f7625980 | 790 | |
4c0619ad | 791 | if (size >= 2) { |
792 | u16 val = data[off - init_off]; | |
793 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 794 | pci_user_write_config_word(dev, off, val); |
4c0619ad | 795 | off += 2; |
796 | size -= 2; | |
797 | } | |
1da177e4 | 798 | |
c50762a8 | 799 | if (size) |
e04b0ea2 | 800 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 801 | |
3d8387ef HY |
802 | pci_config_pm_runtime_put(dev); |
803 | ||
1da177e4 LT |
804 | return count; |
805 | } | |
e1d3f326 KW |
806 | static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0); |
807 | ||
808 | static struct bin_attribute *pci_dev_config_attrs[] = { | |
809 | &bin_attr_config, | |
810 | NULL, | |
811 | }; | |
812 | ||
813 | static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj, | |
814 | struct bin_attribute *a, int n) | |
815 | { | |
816 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); | |
817 | ||
818 | a->size = PCI_CFG_SPACE_SIZE; | |
819 | if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) | |
820 | a->size = PCI_CFG_SPACE_EXP_SIZE; | |
821 | ||
822 | return a->attr.mode; | |
823 | } | |
824 | ||
825 | static const struct attribute_group pci_dev_config_attr_group = { | |
826 | .bin_attrs = pci_dev_config_attrs, | |
827 | .is_bin_visible = pci_dev_config_attr_is_visible, | |
828 | }; | |
1da177e4 LT |
829 | |
830 | #ifdef HAVE_PCI_LEGACY | |
831 | /** | |
832 | * pci_read_legacy_io - read byte(s) from legacy I/O port space | |
2c3c8bea | 833 | * @filp: open sysfs file |
1da177e4 | 834 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 835 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
836 | * @buf: buffer to store results |
837 | * @off: offset into legacy I/O port space | |
838 | * @count: number of bytes to read | |
839 | * | |
840 | * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
841 | * callback routine (pci_legacy_read). | |
842 | */ | |
3c78bc61 RD |
843 | static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, |
844 | struct bin_attribute *bin_attr, char *buf, | |
845 | loff_t off, size_t count) | |
1da177e4 | 846 | { |
554a6037 | 847 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 848 | |
3c78bc61 RD |
849 | /* Only support 1, 2 or 4 byte accesses */ |
850 | if (count != 1 && count != 2 && count != 4) | |
851 | return -EINVAL; | |
1da177e4 | 852 | |
3c78bc61 | 853 | return pci_legacy_read(bus, off, (u32 *)buf, count); |
1da177e4 LT |
854 | } |
855 | ||
856 | /** | |
857 | * pci_write_legacy_io - write byte(s) to legacy I/O port space | |
2c3c8bea | 858 | * @filp: open sysfs file |
1da177e4 | 859 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 860 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
861 | * @buf: buffer containing value to be written |
862 | * @off: offset into legacy I/O port space | |
863 | * @count: number of bytes to write | |
864 | * | |
865 | * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
866 | * callback routine (pci_legacy_write). | |
867 | */ | |
3c78bc61 RD |
868 | static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, |
869 | struct bin_attribute *bin_attr, char *buf, | |
870 | loff_t off, size_t count) | |
1da177e4 | 871 | { |
554a6037 | 872 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 873 | |
3c78bc61 RD |
874 | /* Only support 1, 2 or 4 byte accesses */ |
875 | if (count != 1 && count != 2 && count != 4) | |
876 | return -EINVAL; | |
877 | ||
878 | return pci_legacy_write(bus, off, *(u32 *)buf, count); | |
1da177e4 LT |
879 | } |
880 | ||
881 | /** | |
882 | * pci_mmap_legacy_mem - map legacy PCI memory into user memory space | |
2c3c8bea | 883 | * @filp: open sysfs file |
1da177e4 LT |
884 | * @kobj: kobject corresponding to device to be mapped |
885 | * @attr: struct bin_attribute for this file | |
886 | * @vma: struct vm_area_struct passed to mmap | |
887 | * | |
f19aeb1f | 888 | * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap |
1da177e4 LT |
889 | * legacy memory space (first meg of bus space) into application virtual |
890 | * memory space. | |
891 | */ | |
3c78bc61 RD |
892 | static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, |
893 | struct bin_attribute *attr, | |
894 | struct vm_area_struct *vma) | |
1da177e4 | 895 | { |
554a6037 | 896 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 897 | |
3c78bc61 | 898 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); |
f19aeb1f BH |
899 | } |
900 | ||
901 | /** | |
902 | * pci_mmap_legacy_io - map legacy PCI IO into user memory space | |
2c3c8bea | 903 | * @filp: open sysfs file |
f19aeb1f BH |
904 | * @kobj: kobject corresponding to device to be mapped |
905 | * @attr: struct bin_attribute for this file | |
906 | * @vma: struct vm_area_struct passed to mmap | |
907 | * | |
908 | * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap | |
909 | * legacy IO space (first meg of bus space) into application virtual | |
910 | * memory space. Returns -ENOSYS if the operation isn't supported | |
911 | */ | |
3c78bc61 RD |
912 | static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, |
913 | struct bin_attribute *attr, | |
914 | struct vm_area_struct *vma) | |
f19aeb1f | 915 | { |
554a6037 | 916 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
f19aeb1f | 917 | |
3c78bc61 | 918 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); |
f19aeb1f BH |
919 | } |
920 | ||
10a0ef39 IK |
921 | /** |
922 | * pci_adjust_legacy_attr - adjustment of legacy file attributes | |
923 | * @b: bus to create files under | |
924 | * @mmap_type: I/O port or memory | |
925 | * | |
926 | * Stub implementation. Can be overridden by arch if necessary. | |
927 | */ | |
3c78bc61 RD |
928 | void __weak pci_adjust_legacy_attr(struct pci_bus *b, |
929 | enum pci_mmap_state mmap_type) | |
10a0ef39 | 930 | { |
10a0ef39 IK |
931 | } |
932 | ||
f19aeb1f BH |
933 | /** |
934 | * pci_create_legacy_files - create legacy I/O port and memory files | |
935 | * @b: bus to create files under | |
936 | * | |
937 | * Some platforms allow access to legacy I/O port and ISA memory space on | |
938 | * a per-bus basis. This routine creates the files and ties them into | |
939 | * their associated read, write and mmap files from pci-sysfs.c | |
940 | * | |
25985edc | 941 | * On error unwind, but don't propagate the error to the caller |
f19aeb1f BH |
942 | * as it is ok to set up the PCI bus without these files. |
943 | */ | |
944 | void pci_create_legacy_files(struct pci_bus *b) | |
945 | { | |
946 | int error; | |
947 | ||
efd532a6 DV |
948 | if (!sysfs_initialized) |
949 | return; | |
950 | ||
6396bb22 | 951 | b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), |
f19aeb1f BH |
952 | GFP_ATOMIC); |
953 | if (!b->legacy_io) | |
954 | goto kzalloc_err; | |
955 | ||
62e877b8 | 956 | sysfs_bin_attr_init(b->legacy_io); |
f19aeb1f BH |
957 | b->legacy_io->attr.name = "legacy_io"; |
958 | b->legacy_io->size = 0xffff; | |
e2154044 | 959 | b->legacy_io->attr.mode = 0600; |
f19aeb1f BH |
960 | b->legacy_io->read = pci_read_legacy_io; |
961 | b->legacy_io->write = pci_write_legacy_io; | |
962 | b->legacy_io->mmap = pci_mmap_legacy_io; | |
f06aff92 | 963 | b->legacy_io->f_mapping = iomem_get_mapping; |
10a0ef39 | 964 | pci_adjust_legacy_attr(b, pci_mmap_io); |
f19aeb1f BH |
965 | error = device_create_bin_file(&b->dev, b->legacy_io); |
966 | if (error) | |
967 | goto legacy_io_err; | |
968 | ||
969 | /* Allocated above after the legacy_io struct */ | |
970 | b->legacy_mem = b->legacy_io + 1; | |
6757eca3 | 971 | sysfs_bin_attr_init(b->legacy_mem); |
f19aeb1f BH |
972 | b->legacy_mem->attr.name = "legacy_mem"; |
973 | b->legacy_mem->size = 1024*1024; | |
e2154044 | 974 | b->legacy_mem->attr.mode = 0600; |
f19aeb1f | 975 | b->legacy_mem->mmap = pci_mmap_legacy_mem; |
c6c3c570 | 976 | b->legacy_mem->f_mapping = iomem_get_mapping; |
10a0ef39 | 977 | pci_adjust_legacy_attr(b, pci_mmap_mem); |
f19aeb1f BH |
978 | error = device_create_bin_file(&b->dev, b->legacy_mem); |
979 | if (error) | |
980 | goto legacy_mem_err; | |
981 | ||
982 | return; | |
983 | ||
984 | legacy_mem_err: | |
985 | device_remove_bin_file(&b->dev, b->legacy_io); | |
986 | legacy_io_err: | |
987 | kfree(b->legacy_io); | |
988 | b->legacy_io = NULL; | |
989 | kzalloc_err: | |
7db4af43 | 990 | dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); |
f19aeb1f BH |
991 | } |
992 | ||
993 | void pci_remove_legacy_files(struct pci_bus *b) | |
994 | { | |
995 | if (b->legacy_io) { | |
996 | device_remove_bin_file(&b->dev, b->legacy_io); | |
997 | device_remove_bin_file(&b->dev, b->legacy_mem); | |
998 | kfree(b->legacy_io); /* both are allocated here */ | |
999 | } | |
1da177e4 LT |
1000 | } |
1001 | #endif /* HAVE_PCI_LEGACY */ | |
1002 | ||
f7195824 | 1003 | #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) |
b5ff7df3 | 1004 | |
3b519e4e MW |
1005 | int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, |
1006 | enum pci_mmap_api mmap_api) | |
b5ff7df3 | 1007 | { |
6bccc7f4 DW |
1008 | unsigned long nr, start, size; |
1009 | resource_size_t pci_start = 0, pci_end; | |
b5ff7df3 | 1010 | |
3b519e4e MW |
1011 | if (pci_resource_len(pdev, resno) == 0) |
1012 | return 0; | |
64b00175 | 1013 | nr = vma_pages(vma); |
b5ff7df3 | 1014 | start = vma->vm_pgoff; |
88e7df0b | 1015 | size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; |
6bccc7f4 DW |
1016 | if (mmap_api == PCI_MMAP_PROCFS) { |
1017 | pci_resource_to_user(pdev, resno, &pdev->resource[resno], | |
1018 | &pci_start, &pci_end); | |
1019 | pci_start >>= PAGE_SHIFT; | |
1020 | } | |
3b519e4e MW |
1021 | if (start >= pci_start && start < pci_start + size && |
1022 | start + nr <= pci_start + size) | |
b5ff7df3 | 1023 | return 1; |
b5ff7df3 LT |
1024 | return 0; |
1025 | } | |
1026 | ||
1da177e4 LT |
1027 | /** |
1028 | * pci_mmap_resource - map a PCI resource into user memory space | |
1029 | * @kobj: kobject for mapping | |
1030 | * @attr: struct bin_attribute for the file being mapped | |
1031 | * @vma: struct vm_area_struct passed into the mmap | |
45aec1ae | 1032 | * @write_combine: 1 for write_combine mapping |
1da177e4 LT |
1033 | * |
1034 | * Use the regular PCI mapping routines to map a PCI resource into userspace. | |
1da177e4 | 1035 | */ |
3c78bc61 RD |
1036 | static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, |
1037 | struct vm_area_struct *vma, int write_combine) | |
1da177e4 | 1038 | { |
554a6037 | 1039 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
dca40b18 | 1040 | int bar = (unsigned long)attr->private; |
1da177e4 | 1041 | enum pci_mmap_state mmap_type; |
dca40b18 | 1042 | struct resource *res = &pdev->resource[bar]; |
eb627e17 MG |
1043 | int ret; |
1044 | ||
1045 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
1046 | if (ret) | |
1047 | return ret; | |
2311b1f2 | 1048 | |
ca620723 BH |
1049 | if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) |
1050 | return -EINVAL; | |
1051 | ||
7a094909 | 1052 | if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) |
b5ff7df3 | 1053 | return -EINVAL; |
7a094909 | 1054 | |
1da177e4 | 1055 | mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; |
f7195824 DW |
1056 | |
1057 | return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); | |
45aec1ae | 1058 | } |
1059 | ||
3c78bc61 RD |
1060 | static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, |
1061 | struct bin_attribute *attr, | |
1062 | struct vm_area_struct *vma) | |
45aec1ae | 1063 | { |
1064 | return pci_mmap_resource(kobj, attr, vma, 0); | |
1065 | } | |
1066 | ||
3c78bc61 RD |
1067 | static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, |
1068 | struct bin_attribute *attr, | |
1069 | struct vm_area_struct *vma) | |
45aec1ae | 1070 | { |
1071 | return pci_mmap_resource(kobj, attr, vma, 1); | |
1da177e4 LT |
1072 | } |
1073 | ||
3c78bc61 RD |
1074 | static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, |
1075 | struct bin_attribute *attr, char *buf, | |
1076 | loff_t off, size_t count, bool write) | |
8633328b | 1077 | { |
554a6037 | 1078 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
dca40b18 | 1079 | int bar = (unsigned long)attr->private; |
8633328b | 1080 | unsigned long port = off; |
8633328b | 1081 | |
dca40b18 | 1082 | port += pci_resource_start(pdev, bar); |
8633328b | 1083 | |
dca40b18 | 1084 | if (port > pci_resource_end(pdev, bar)) |
8633328b AW |
1085 | return 0; |
1086 | ||
dca40b18 | 1087 | if (port + count - 1 > pci_resource_end(pdev, bar)) |
8633328b AW |
1088 | return -EINVAL; |
1089 | ||
1090 | switch (count) { | |
1091 | case 1: | |
1092 | if (write) | |
1093 | outb(*(u8 *)buf, port); | |
1094 | else | |
1095 | *(u8 *)buf = inb(port); | |
1096 | return 1; | |
1097 | case 2: | |
1098 | if (write) | |
1099 | outw(*(u16 *)buf, port); | |
1100 | else | |
1101 | *(u16 *)buf = inw(port); | |
1102 | return 2; | |
1103 | case 4: | |
1104 | if (write) | |
1105 | outl(*(u32 *)buf, port); | |
1106 | else | |
1107 | *(u32 *)buf = inl(port); | |
1108 | return 4; | |
1109 | } | |
1110 | return -EINVAL; | |
1111 | } | |
1112 | ||
3c78bc61 RD |
1113 | static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, |
1114 | struct bin_attribute *attr, char *buf, | |
1115 | loff_t off, size_t count) | |
8633328b AW |
1116 | { |
1117 | return pci_resource_io(filp, kobj, attr, buf, off, count, false); | |
1118 | } | |
1119 | ||
3c78bc61 RD |
1120 | static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, |
1121 | struct bin_attribute *attr, char *buf, | |
1122 | loff_t off, size_t count) | |
8633328b | 1123 | { |
eb627e17 MG |
1124 | int ret; |
1125 | ||
1126 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
1127 | if (ret) | |
1128 | return ret; | |
1129 | ||
8633328b AW |
1130 | return pci_resource_io(filp, kobj, attr, buf, off, count, true); |
1131 | } | |
1132 | ||
b19441af GKH |
1133 | /** |
1134 | * pci_remove_resource_files - cleanup resource files | |
cffb2faf | 1135 | * @pdev: dev to cleanup |
b19441af | 1136 | * |
cffb2faf | 1137 | * If we created resource files for @pdev, remove them from sysfs and |
b19441af GKH |
1138 | * free their resources. |
1139 | */ | |
3c78bc61 | 1140 | static void pci_remove_resource_files(struct pci_dev *pdev) |
b19441af GKH |
1141 | { |
1142 | int i; | |
1143 | ||
c9c13ba4 | 1144 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
b19441af GKH |
1145 | struct bin_attribute *res_attr; |
1146 | ||
1147 | res_attr = pdev->res_attr[i]; | |
1148 | if (res_attr) { | |
1149 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1150 | kfree(res_attr); | |
1151 | } | |
45aec1ae | 1152 | |
1153 | res_attr = pdev->res_attr_wc[i]; | |
1154 | if (res_attr) { | |
1155 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1156 | kfree(res_attr); | |
1157 | } | |
b19441af GKH |
1158 | } |
1159 | } | |
1160 | ||
45aec1ae | 1161 | static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) |
1162 | { | |
1163 | /* allocate attribute structure, piggyback attribute name */ | |
1164 | int name_len = write_combine ? 13 : 10; | |
1165 | struct bin_attribute *res_attr; | |
bd5174df | 1166 | char *res_attr_name; |
45aec1ae | 1167 | int retval; |
1168 | ||
1169 | res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); | |
bd5174df BH |
1170 | if (!res_attr) |
1171 | return -ENOMEM; | |
1172 | ||
1173 | res_attr_name = (char *)(res_attr + 1); | |
1174 | ||
1175 | sysfs_bin_attr_init(res_attr); | |
1176 | if (write_combine) { | |
1177 | pdev->res_attr_wc[num] = res_attr; | |
1178 | sprintf(res_attr_name, "resource%d_wc", num); | |
1179 | res_attr->mmap = pci_mmap_resource_wc; | |
1180 | } else { | |
1181 | pdev->res_attr[num] = res_attr; | |
1182 | sprintf(res_attr_name, "resource%d", num); | |
e854d8b2 DW |
1183 | if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { |
1184 | res_attr->read = pci_read_resource_io; | |
1185 | res_attr->write = pci_write_resource_io; | |
1186 | if (arch_can_pci_mmap_io()) | |
1187 | res_attr->mmap = pci_mmap_resource_uc; | |
1188 | } else { | |
1189 | res_attr->mmap = pci_mmap_resource_uc; | |
1190 | } | |
bd5174df | 1191 | } |
636b21b5 | 1192 | if (res_attr->mmap) |
f06aff92 | 1193 | res_attr->f_mapping = iomem_get_mapping; |
bd5174df | 1194 | res_attr->attr.name = res_attr_name; |
e2154044 | 1195 | res_attr->attr.mode = 0600; |
bd5174df | 1196 | res_attr->size = pci_resource_len(pdev, num); |
dca40b18 | 1197 | res_attr->private = (void *)(unsigned long)num; |
bd5174df BH |
1198 | retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); |
1199 | if (retval) | |
1200 | kfree(res_attr); | |
45aec1ae | 1201 | |
1202 | return retval; | |
1203 | } | |
1204 | ||
1da177e4 LT |
1205 | /** |
1206 | * pci_create_resource_files - create resource files in sysfs for @dev | |
cffb2faf | 1207 | * @pdev: dev in question |
1da177e4 | 1208 | * |
cffb2faf | 1209 | * Walk the resources in @pdev creating files for each resource available. |
1da177e4 | 1210 | */ |
b19441af | 1211 | static int pci_create_resource_files(struct pci_dev *pdev) |
1da177e4 LT |
1212 | { |
1213 | int i; | |
b19441af | 1214 | int retval; |
1da177e4 LT |
1215 | |
1216 | /* Expose the PCI resources from this device as files */ | |
c9c13ba4 | 1217 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
1da177e4 LT |
1218 | |
1219 | /* skip empty resources */ | |
1220 | if (!pci_resource_len(pdev, i)) | |
1221 | continue; | |
1222 | ||
45aec1ae | 1223 | retval = pci_create_attr(pdev, i, 0); |
1224 | /* for prefetchable resources, create a WC mappable file */ | |
ae749c7a DW |
1225 | if (!retval && arch_can_pci_mmap_wc() && |
1226 | pdev->resource[i].flags & IORESOURCE_PREFETCH) | |
45aec1ae | 1227 | retval = pci_create_attr(pdev, i, 1); |
45aec1ae | 1228 | if (retval) { |
1229 | pci_remove_resource_files(pdev); | |
1230 | return retval; | |
1da177e4 LT |
1231 | } |
1232 | } | |
b19441af | 1233 | return 0; |
1da177e4 | 1234 | } |
8c46d543 | 1235 | #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ |
10a0ef39 IK |
1236 | int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } |
1237 | void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } | |
8c46d543 | 1238 | #endif |
1da177e4 LT |
1239 | |
1240 | /** | |
1241 | * pci_write_rom - used to enable access to the PCI ROM display | |
2c3c8bea | 1242 | * @filp: sysfs file |
1da177e4 | 1243 | * @kobj: kernel object handle |
cffb2faf | 1244 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1245 | * @buf: user input |
1246 | * @off: file offset | |
1247 | * @count: number of byte in input | |
1248 | * | |
1249 | * writing anything except 0 enables it | |
1250 | */ | |
3c78bc61 RD |
1251 | static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, |
1252 | struct bin_attribute *bin_attr, char *buf, | |
1253 | loff_t off, size_t count) | |
1da177e4 | 1254 | { |
554a6037 | 1255 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
1256 | |
1257 | if ((off == 0) && (*buf == '0') && (count == 2)) | |
1258 | pdev->rom_attr_enabled = 0; | |
1259 | else | |
1260 | pdev->rom_attr_enabled = 1; | |
1261 | ||
1262 | return count; | |
1263 | } | |
1264 | ||
1265 | /** | |
1266 | * pci_read_rom - read a PCI ROM | |
2c3c8bea | 1267 | * @filp: sysfs file |
1da177e4 | 1268 | * @kobj: kernel object handle |
cffb2faf | 1269 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1270 | * @buf: where to put the data we read from the ROM |
1271 | * @off: file offset | |
1272 | * @count: number of bytes to read | |
1273 | * | |
1274 | * Put @count bytes starting at @off into @buf from the ROM in the PCI | |
1275 | * device corresponding to @kobj. | |
1276 | */ | |
3c78bc61 RD |
1277 | static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, |
1278 | struct bin_attribute *bin_attr, char *buf, | |
1279 | loff_t off, size_t count) | |
1da177e4 | 1280 | { |
554a6037 | 1281 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
1282 | void __iomem *rom; |
1283 | size_t size; | |
1284 | ||
1285 | if (!pdev->rom_attr_enabled) | |
1286 | return -EINVAL; | |
f7625980 | 1287 | |
1da177e4 | 1288 | rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ |
97c44836 TN |
1289 | if (!rom || !size) |
1290 | return -EIO; | |
f7625980 | 1291 | |
1da177e4 LT |
1292 | if (off >= size) |
1293 | count = 0; | |
1294 | else { | |
1295 | if (off + count > size) | |
1296 | count = size - off; | |
f7625980 | 1297 | |
1da177e4 LT |
1298 | memcpy_fromio(buf, rom + off, count); |
1299 | } | |
1300 | pci_unmap_rom(pdev, rom); | |
f7625980 | 1301 | |
1da177e4 LT |
1302 | return count; |
1303 | } | |
527139d7 | 1304 | static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0); |
1da177e4 | 1305 | |
527139d7 KW |
1306 | static struct bin_attribute *pci_dev_rom_attrs[] = { |
1307 | &bin_attr_rom, | |
1308 | NULL, | |
1da177e4 LT |
1309 | }; |
1310 | ||
527139d7 KW |
1311 | static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj, |
1312 | struct bin_attribute *a, int n) | |
1313 | { | |
1314 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); | |
1315 | size_t rom_size; | |
1316 | ||
1317 | /* If the device has a ROM, try to expose it in sysfs. */ | |
1318 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
1319 | if (!rom_size) | |
1320 | return 0; | |
1321 | ||
1322 | a->size = rom_size; | |
1323 | ||
1324 | return a->attr.mode; | |
1325 | } | |
1326 | ||
1327 | static const struct attribute_group pci_dev_rom_attr_group = { | |
1328 | .bin_attrs = pci_dev_rom_attrs, | |
1329 | .is_bin_visible = pci_dev_rom_attr_is_visible, | |
1da177e4 LT |
1330 | }; |
1331 | ||
3c78bc61 RD |
1332 | static ssize_t reset_store(struct device *dev, struct device_attribute *attr, |
1333 | const char *buf, size_t count) | |
711d5779 MT |
1334 | { |
1335 | struct pci_dev *pdev = to_pci_dev(dev); | |
1336 | unsigned long val; | |
36f354ec | 1337 | ssize_t result; |
711d5779 | 1338 | |
36f354ec KW |
1339 | if (kstrtoul(buf, 0, &val) < 0) |
1340 | return -EINVAL; | |
711d5779 MT |
1341 | |
1342 | if (val != 1) | |
1343 | return -EINVAL; | |
447c5dd7 | 1344 | |
82c3fbff | 1345 | pm_runtime_get_sync(dev); |
447c5dd7 | 1346 | result = pci_reset_function(pdev); |
82c3fbff | 1347 | pm_runtime_put(dev); |
447c5dd7 MS |
1348 | if (result < 0) |
1349 | return result; | |
1350 | ||
1351 | return count; | |
711d5779 | 1352 | } |
f42c35ea | 1353 | static DEVICE_ATTR_WO(reset); |
711d5779 | 1354 | |
f42c35ea KW |
1355 | static struct attribute *pci_dev_reset_attrs[] = { |
1356 | &dev_attr_reset.attr, | |
1357 | NULL, | |
1358 | }; | |
711d5779 | 1359 | |
f42c35ea KW |
1360 | static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, |
1361 | struct attribute *a, int n) | |
280c73d3 | 1362 | { |
f42c35ea | 1363 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
280c73d3 | 1364 | |
4ec36dfe | 1365 | if (!pci_reset_supported(pdev)) |
f42c35ea | 1366 | return 0; |
711d5779 | 1367 | |
f42c35ea | 1368 | return a->mode; |
280c73d3 ZY |
1369 | } |
1370 | ||
f42c35ea KW |
1371 | static const struct attribute_group pci_dev_reset_attr_group = { |
1372 | .attrs = pci_dev_reset_attrs, | |
1373 | .is_visible = pci_dev_reset_attr_is_visible, | |
1374 | }; | |
1375 | ||
3c78bc61 | 1376 | int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) |
1da177e4 LT |
1377 | { |
1378 | if (!sysfs_initialized) | |
1379 | return -EACCES; | |
1380 | ||
506140f9 | 1381 | return pci_create_resource_files(pdev); |
280c73d3 ZY |
1382 | } |
1383 | ||
1da177e4 LT |
1384 | /** |
1385 | * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files | |
1386 | * @pdev: device whose entries we should free | |
1387 | * | |
1388 | * Cleanup when @pdev is removed from sysfs. | |
1389 | */ | |
1390 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev) | |
1391 | { | |
d67afe5e DM |
1392 | if (!sysfs_initialized) |
1393 | return; | |
1394 | ||
1da177e4 | 1395 | pci_remove_resource_files(pdev); |
1da177e4 LT |
1396 | } |
1397 | ||
1398 | static int __init pci_sysfs_init(void) | |
1399 | { | |
1400 | struct pci_dev *pdev = NULL; | |
efd532a6 | 1401 | struct pci_bus *pbus = NULL; |
b19441af GKH |
1402 | int retval; |
1403 | ||
1da177e4 | 1404 | sysfs_initialized = 1; |
b19441af GKH |
1405 | for_each_pci_dev(pdev) { |
1406 | retval = pci_create_sysfs_dev_files(pdev); | |
151fc5df JL |
1407 | if (retval) { |
1408 | pci_dev_put(pdev); | |
b19441af | 1409 | return retval; |
151fc5df | 1410 | } |
b19441af | 1411 | } |
1da177e4 | 1412 | |
efd532a6 DV |
1413 | while ((pbus = pci_find_next_bus(pbus))) |
1414 | pci_create_legacy_files(pbus); | |
1415 | ||
1da177e4 LT |
1416 | return 0; |
1417 | } | |
40ee9e9f | 1418 | late_initcall(pci_sysfs_init); |
4e15c46b YL |
1419 | |
1420 | static struct attribute *pci_dev_dev_attrs[] = { | |
8bdfa145 | 1421 | &dev_attr_boot_vga.attr, |
4e15c46b YL |
1422 | NULL, |
1423 | }; | |
1424 | ||
1425 | static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, | |
3c78bc61 | 1426 | struct attribute *a, int n) |
4e15c46b | 1427 | { |
554a6037 | 1428 | struct device *dev = kobj_to_dev(kobj); |
625e1d59 YL |
1429 | struct pci_dev *pdev = to_pci_dev(dev); |
1430 | ||
8bdfa145 | 1431 | if (a == &dev_attr_boot_vga.attr) |
625e1d59 YL |
1432 | if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) |
1433 | return 0; | |
1434 | ||
4e15c46b YL |
1435 | return a->mode; |
1436 | } | |
1437 | ||
dfab88be | 1438 | static struct attribute *pci_dev_hp_attrs[] = { |
8bdfa145 | 1439 | &dev_attr_remove.attr, |
4e2b7943 | 1440 | &dev_attr_dev_rescan.attr, |
dfab88be JL |
1441 | NULL, |
1442 | }; | |
1443 | ||
1444 | static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, | |
3c78bc61 | 1445 | struct attribute *a, int n) |
dfab88be | 1446 | { |
554a6037 | 1447 | struct device *dev = kobj_to_dev(kobj); |
dfab88be JL |
1448 | struct pci_dev *pdev = to_pci_dev(dev); |
1449 | ||
1450 | if (pdev->is_virtfn) | |
1451 | return 0; | |
1452 | ||
1453 | return a->mode; | |
1454 | } | |
1455 | ||
56c1af46 WVK |
1456 | static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, |
1457 | struct attribute *a, int n) | |
1458 | { | |
1459 | struct device *dev = kobj_to_dev(kobj); | |
1460 | struct pci_dev *pdev = to_pci_dev(dev); | |
1461 | ||
1462 | if (pci_is_bridge(pdev)) | |
1463 | return a->mode; | |
1464 | ||
1465 | return 0; | |
1466 | } | |
1467 | ||
1468 | static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, | |
1469 | struct attribute *a, int n) | |
1470 | { | |
1471 | struct device *dev = kobj_to_dev(kobj); | |
1472 | struct pci_dev *pdev = to_pci_dev(dev); | |
1473 | ||
1474 | if (pci_is_pcie(pdev)) | |
1475 | return a->mode; | |
1476 | ||
1477 | return 0; | |
1478 | } | |
1479 | ||
1480 | static const struct attribute_group pci_dev_group = { | |
1481 | .attrs = pci_dev_attrs, | |
1482 | }; | |
1483 | ||
1484 | const struct attribute_group *pci_dev_groups[] = { | |
1485 | &pci_dev_group, | |
e1d3f326 | 1486 | &pci_dev_config_attr_group, |
527139d7 | 1487 | &pci_dev_rom_attr_group, |
f42c35ea | 1488 | &pci_dev_reset_attr_group, |
d88f521d | 1489 | &pci_dev_reset_method_attr_group, |
d93f8399 | 1490 | &pci_dev_vpd_attr_group, |
506140f9 KW |
1491 | #ifdef CONFIG_DMI |
1492 | &pci_dev_smbios_attr_group, | |
1493 | #endif | |
1494 | #ifdef CONFIG_ACPI | |
1495 | &pci_dev_acpi_attr_group, | |
1496 | #endif | |
56c1af46 WVK |
1497 | NULL, |
1498 | }; | |
1499 | ||
e7ea9825 | 1500 | static const struct attribute_group pci_dev_hp_attr_group = { |
dfab88be JL |
1501 | .attrs = pci_dev_hp_attrs, |
1502 | .is_visible = pci_dev_hp_attrs_are_visible, | |
1503 | }; | |
1504 | ||
e7ea9825 | 1505 | static const struct attribute_group pci_dev_attr_group = { |
4e15c46b YL |
1506 | .attrs = pci_dev_dev_attrs, |
1507 | .is_visible = pci_dev_attrs_are_visible, | |
1508 | }; | |
1509 | ||
e7ea9825 | 1510 | static const struct attribute_group pci_bridge_attr_group = { |
56c1af46 WVK |
1511 | .attrs = pci_bridge_attrs, |
1512 | .is_visible = pci_bridge_attrs_are_visible, | |
1513 | }; | |
1514 | ||
e7ea9825 | 1515 | static const struct attribute_group pcie_dev_attr_group = { |
56c1af46 WVK |
1516 | .attrs = pcie_dev_attrs, |
1517 | .is_visible = pcie_dev_attrs_are_visible, | |
1518 | }; | |
1519 | ||
4e15c46b YL |
1520 | static const struct attribute_group *pci_dev_attr_groups[] = { |
1521 | &pci_dev_attr_group, | |
dfab88be | 1522 | &pci_dev_hp_attr_group, |
1789382a | 1523 | #ifdef CONFIG_PCI_IOV |
c3d5c2d9 LR |
1524 | &sriov_pf_dev_attr_group, |
1525 | &sriov_vf_dev_attr_group, | |
1789382a | 1526 | #endif |
56c1af46 WVK |
1527 | &pci_bridge_attr_group, |
1528 | &pcie_dev_attr_group, | |
81aa5206 RJ |
1529 | #ifdef CONFIG_PCIEAER |
1530 | &aer_stats_attr_group, | |
72ea91af HK |
1531 | #endif |
1532 | #ifdef CONFIG_PCIEASPM | |
1533 | &aspm_ctrl_attr_group, | |
81aa5206 | 1534 | #endif |
4e15c46b YL |
1535 | NULL, |
1536 | }; | |
1537 | ||
69f2dc24 | 1538 | const struct device_type pci_dev_type = { |
4e15c46b YL |
1539 | .groups = pci_dev_attr_groups, |
1540 | }; |