Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6
[linux-2.6-block.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
5a0e3ad6 26#include <linux/slab.h>
1da177e4
LT
27#include "pci.h"
28
29static int sysfs_initialized; /* = 0 */
30
31/* show configuration fields */
32#define pci_config_attr(field, format_string) \
33static ssize_t \
e404e274 34field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
35{ \
36 struct pci_dev *pdev; \
37 \
38 pdev = to_pci_dev (dev); \
39 return sprintf (buf, format_string, pdev->field); \
40}
41
42pci_config_attr(vendor, "0x%04x\n");
43pci_config_attr(device, "0x%04x\n");
44pci_config_attr(subsystem_vendor, "0x%04x\n");
45pci_config_attr(subsystem_device, "0x%04x\n");
46pci_config_attr(class, "0x%06x\n");
47pci_config_attr(irq, "%u\n");
48
bdee9d98
DT
49static ssize_t broken_parity_status_show(struct device *dev,
50 struct device_attribute *attr,
51 char *buf)
52{
53 struct pci_dev *pdev = to_pci_dev(dev);
54 return sprintf (buf, "%u\n", pdev->broken_parity_status);
55}
56
57static ssize_t broken_parity_status_store(struct device *dev,
58 struct device_attribute *attr,
59 const char *buf, size_t count)
60{
61 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 62 unsigned long val;
bdee9d98 63
92425a40
TP
64 if (strict_strtoul(buf, 0, &val) < 0)
65 return -EINVAL;
66
67 pdev->broken_parity_status = !!val;
68
69 return count;
bdee9d98
DT
70}
71
4327edf6
AC
72static ssize_t local_cpus_show(struct device *dev,
73 struct device_attribute *attr, char *buf)
1da177e4 74{
3be83050 75 const struct cpumask *mask;
4327edf6
AC
76 int len;
77
e0cd5160 78#ifdef CONFIG_NUMA
6be954d1
DJ
79 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
80 cpumask_of_node(dev_to_node(dev));
e0cd5160 81#else
3be83050 82 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 83#endif
3be83050 84 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
85 buf[len++] = '\n';
86 buf[len] = '\0';
87 return len;
88}
89
90
91static ssize_t local_cpulist_show(struct device *dev,
92 struct device_attribute *attr, char *buf)
93{
3be83050 94 const struct cpumask *mask;
39106dcf
MT
95 int len;
96
e0cd5160 97#ifdef CONFIG_NUMA
6be954d1
DJ
98 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
99 cpumask_of_node(dev_to_node(dev));
e0cd5160 100#else
3be83050 101 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 102#endif
3be83050 103 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
104 buf[len++] = '\n';
105 buf[len] = '\0';
106 return len;
1da177e4
LT
107}
108
109/* show resources */
110static ssize_t
e404e274 111resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
112{
113 struct pci_dev * pci_dev = to_pci_dev(dev);
114 char * str = buf;
115 int i;
fde09c6d 116 int max;
e31dd6e4 117 resource_size_t start, end;
1da177e4
LT
118
119 if (pci_dev->subordinate)
120 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
121 else
122 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
123
124 for (i = 0; i < max; i++) {
2311b1f2
ME
125 struct resource *res = &pci_dev->resource[i];
126 pci_resource_to_user(pci_dev, i, res, &start, &end);
127 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
128 (unsigned long long)start,
129 (unsigned long long)end,
130 (unsigned long long)res->flags);
1da177e4
LT
131 }
132 return (str - buf);
133}
134
87c8a443 135static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
136{
137 struct pci_dev *pci_dev = to_pci_dev(dev);
138
139 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
140 pci_dev->vendor, pci_dev->device,
141 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
142 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
143 (u8)(pci_dev->class));
144}
bae94d02
IPG
145
146static ssize_t is_enabled_store(struct device *dev,
147 struct device_attribute *attr, const char *buf,
148 size_t count)
9f125d30
AV
149{
150 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
151 unsigned long val;
152 ssize_t result = strict_strtoul(buf, 0, &val);
153
154 if (result < 0)
155 return result;
9f125d30
AV
156
157 /* this can crash the machine when done on the "wrong" device */
158 if (!capable(CAP_SYS_ADMIN))
92425a40 159 return -EPERM;
9f125d30 160
92425a40 161 if (!val) {
296ccb08 162 if (pci_is_enabled(pdev))
bae94d02
IPG
163 pci_disable_device(pdev);
164 else
165 result = -EIO;
92425a40 166 } else
bae94d02 167 result = pci_enable_device(pdev);
9f125d30 168
bae94d02
IPG
169 return result < 0 ? result : count;
170}
171
172static ssize_t is_enabled_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pdev;
9f125d30 176
bae94d02
IPG
177 pdev = to_pci_dev (dev);
178 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
179}
180
81bb0e19
BG
181#ifdef CONFIG_NUMA
182static ssize_t
183numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
184{
185 return sprintf (buf, "%d\n", dev->numa_node);
186}
187#endif
188
bb965401
YL
189static ssize_t
190dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
191{
192 struct pci_dev *pdev = to_pci_dev(dev);
193
194 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
195}
196
197static ssize_t
198consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
199 char *buf)
200{
201 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
202}
203
fe97064c
BG
204static ssize_t
205msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
206{
207 struct pci_dev *pdev = to_pci_dev(dev);
208
209 if (!pdev->subordinate)
210 return 0;
211
212 return sprintf (buf, "%u\n",
213 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
214}
215
216static ssize_t
217msi_bus_store(struct device *dev, struct device_attribute *attr,
218 const char *buf, size_t count)
219{
220 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
221 unsigned long val;
222
223 if (strict_strtoul(buf, 0, &val) < 0)
224 return -EINVAL;
fe97064c
BG
225
226 /* bad things may happen if the no_msi flag is changed
227 * while some drivers are loaded */
228 if (!capable(CAP_SYS_ADMIN))
92425a40 229 return -EPERM;
fe97064c 230
92425a40
TP
231 /* Maybe pci devices without subordinate busses shouldn't even have this
232 * attribute in the first place? */
fe97064c
BG
233 if (!pdev->subordinate)
234 return count;
235
92425a40
TP
236 /* Is the flag going to change, or keep the value it already had? */
237 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
238 !!val) {
239 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 240
92425a40
TP
241 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
242 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
243 }
244
245 return count;
246}
9888549e 247
705b1aaa
AC
248#ifdef CONFIG_HOTPLUG
249static DEFINE_MUTEX(pci_remove_rescan_mutex);
250static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
251 size_t count)
252{
253 unsigned long val;
254 struct pci_bus *b = NULL;
255
256 if (strict_strtoul(buf, 0, &val) < 0)
257 return -EINVAL;
258
259 if (val) {
260 mutex_lock(&pci_remove_rescan_mutex);
261 while ((b = pci_find_next_bus(b)) != NULL)
262 pci_rescan_bus(b);
263 mutex_unlock(&pci_remove_rescan_mutex);
264 }
265 return count;
266}
267
268struct bus_attribute pci_bus_attrs[] = {
269 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
270 __ATTR_NULL
271};
77c27c7b 272
738a6396
AC
273static ssize_t
274dev_rescan_store(struct device *dev, struct device_attribute *attr,
275 const char *buf, size_t count)
276{
277 unsigned long val;
278 struct pci_dev *pdev = to_pci_dev(dev);
279
280 if (strict_strtoul(buf, 0, &val) < 0)
281 return -EINVAL;
282
283 if (val) {
284 mutex_lock(&pci_remove_rescan_mutex);
285 pci_rescan_bus(pdev->bus);
286 mutex_unlock(&pci_remove_rescan_mutex);
287 }
288 return count;
289}
290
77c27c7b
AC
291static void remove_callback(struct device *dev)
292{
293 struct pci_dev *pdev = to_pci_dev(dev);
294
295 mutex_lock(&pci_remove_rescan_mutex);
296 pci_remove_bus_device(pdev);
297 mutex_unlock(&pci_remove_rescan_mutex);
298}
299
300static ssize_t
301remove_store(struct device *dev, struct device_attribute *dummy,
302 const char *buf, size_t count)
303{
304 int ret = 0;
305 unsigned long val;
77c27c7b
AC
306
307 if (strict_strtoul(buf, 0, &val) < 0)
308 return -EINVAL;
309
77c27c7b
AC
310 /* An attribute cannot be unregistered by one of its own methods,
311 * so we have to use this roundabout approach.
312 */
313 if (val)
314 ret = device_schedule_callback(dev, remove_callback);
315 if (ret)
316 count = ret;
317 return count;
318}
705b1aaa
AC
319#endif
320
1da177e4
LT
321struct device_attribute pci_dev_attrs[] = {
322 __ATTR_RO(resource),
323 __ATTR_RO(vendor),
324 __ATTR_RO(device),
325 __ATTR_RO(subsystem_vendor),
326 __ATTR_RO(subsystem_device),
327 __ATTR_RO(class),
328 __ATTR_RO(irq),
329 __ATTR_RO(local_cpus),
39106dcf 330 __ATTR_RO(local_cpulist),
9888549e 331 __ATTR_RO(modalias),
81bb0e19
BG
332#ifdef CONFIG_NUMA
333 __ATTR_RO(numa_node),
334#endif
bb965401
YL
335 __ATTR_RO(dma_mask_bits),
336 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 337 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
338 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
339 broken_parity_status_show,broken_parity_status_store),
fe97064c 340 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
341#ifdef CONFIG_HOTPLUG
342 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 343 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
77c27c7b 344#endif
1da177e4
LT
345 __ATTR_NULL,
346};
347
217f45de
DA
348static ssize_t
349boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
350{
351 struct pci_dev *pdev = to_pci_dev(dev);
352
353 return sprintf(buf, "%u\n",
354 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
355 IORESOURCE_ROM_SHADOW));
356}
357struct device_attribute vga_attr = __ATTR_RO(boot_vga);
358
1da177e4 359static ssize_t
91a69029
ZR
360pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
361 char *buf, loff_t off, size_t count)
1da177e4
LT
362{
363 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
364 unsigned int size = 64;
365 loff_t init_off = off;
4c0619ad 366 u8 *data = (u8*) buf;
1da177e4
LT
367
368 /* Several chips lock up trying to read undefined config space */
369 if (capable(CAP_SYS_ADMIN)) {
370 size = dev->cfg_size;
371 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
372 size = 128;
373 }
374
375 if (off > size)
376 return 0;
377 if (off + count > size) {
378 size -= off;
379 count = size;
380 } else {
381 size = count;
382 }
383
4c0619ad 384 if ((off & 1) && size) {
385 u8 val;
e04b0ea2 386 pci_user_read_config_byte(dev, off, &val);
4c0619ad 387 data[off - init_off] = val;
1da177e4 388 off++;
4c0619ad 389 size--;
390 }
391
392 if ((off & 3) && size > 2) {
393 u16 val;
e04b0ea2 394 pci_user_read_config_word(dev, off, &val);
4c0619ad 395 data[off - init_off] = val & 0xff;
396 data[off - init_off + 1] = (val >> 8) & 0xff;
397 off += 2;
398 size -= 2;
1da177e4
LT
399 }
400
401 while (size > 3) {
4c0619ad 402 u32 val;
e04b0ea2 403 pci_user_read_config_dword(dev, off, &val);
4c0619ad 404 data[off - init_off] = val & 0xff;
405 data[off - init_off + 1] = (val >> 8) & 0xff;
406 data[off - init_off + 2] = (val >> 16) & 0xff;
407 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
408 off += 4;
409 size -= 4;
410 }
411
4c0619ad 412 if (size >= 2) {
413 u16 val;
e04b0ea2 414 pci_user_read_config_word(dev, off, &val);
4c0619ad 415 data[off - init_off] = val & 0xff;
416 data[off - init_off + 1] = (val >> 8) & 0xff;
417 off += 2;
418 size -= 2;
419 }
420
421 if (size > 0) {
422 u8 val;
e04b0ea2 423 pci_user_read_config_byte(dev, off, &val);
4c0619ad 424 data[off - init_off] = val;
1da177e4
LT
425 off++;
426 --size;
427 }
428
429 return count;
430}
431
432static ssize_t
91a69029
ZR
433pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
434 char *buf, loff_t off, size_t count)
1da177e4
LT
435{
436 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
437 unsigned int size = count;
438 loff_t init_off = off;
4c0619ad 439 u8 *data = (u8*) buf;
1da177e4
LT
440
441 if (off > dev->cfg_size)
442 return 0;
443 if (off + count > dev->cfg_size) {
444 size = dev->cfg_size - off;
445 count = size;
446 }
4c0619ad 447
448 if ((off & 1) && size) {
e04b0ea2 449 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 450 off++;
4c0619ad 451 size--;
1da177e4 452 }
4c0619ad 453
454 if ((off & 3) && size > 2) {
455 u16 val = data[off - init_off];
456 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 457 pci_user_write_config_word(dev, off, val);
4c0619ad 458 off += 2;
459 size -= 2;
460 }
1da177e4
LT
461
462 while (size > 3) {
4c0619ad 463 u32 val = data[off - init_off];
464 val |= (u32) data[off - init_off + 1] << 8;
465 val |= (u32) data[off - init_off + 2] << 16;
466 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 467 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
468 off += 4;
469 size -= 4;
470 }
4c0619ad 471
472 if (size >= 2) {
473 u16 val = data[off - init_off];
474 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 475 pci_user_write_config_word(dev, off, val);
4c0619ad 476 off += 2;
477 size -= 2;
478 }
1da177e4 479
4c0619ad 480 if (size) {
e04b0ea2 481 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
482 off++;
483 --size;
484 }
485
486 return count;
487}
488
94e61088 489static ssize_t
287d19ce
SH
490read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
491 char *buf, loff_t off, size_t count)
94e61088
BH
492{
493 struct pci_dev *dev =
494 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
495
496 if (off > bin_attr->size)
497 count = 0;
498 else if (count > bin_attr->size - off)
499 count = bin_attr->size - off;
94e61088 500
287d19ce 501 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
502}
503
504static ssize_t
287d19ce
SH
505write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
506 char *buf, loff_t off, size_t count)
94e61088
BH
507{
508 struct pci_dev *dev =
509 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
510
511 if (off > bin_attr->size)
512 count = 0;
513 else if (count > bin_attr->size - off)
514 count = bin_attr->size - off;
94e61088 515
287d19ce 516 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
517}
518
1da177e4
LT
519#ifdef HAVE_PCI_LEGACY
520/**
521 * pci_read_legacy_io - read byte(s) from legacy I/O port space
522 * @kobj: kobject corresponding to file to read from
cffb2faf 523 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
524 * @buf: buffer to store results
525 * @off: offset into legacy I/O port space
526 * @count: number of bytes to read
527 *
528 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
529 * callback routine (pci_legacy_read).
530 */
f19aeb1f 531static ssize_t
91a69029
ZR
532pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
533 char *buf, loff_t off, size_t count)
1da177e4
LT
534{
535 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 536 struct device,
1da177e4
LT
537 kobj));
538
539 /* Only support 1, 2 or 4 byte accesses */
540 if (count != 1 && count != 2 && count != 4)
541 return -EINVAL;
542
543 return pci_legacy_read(bus, off, (u32 *)buf, count);
544}
545
546/**
547 * pci_write_legacy_io - write byte(s) to legacy I/O port space
548 * @kobj: kobject corresponding to file to read from
cffb2faf 549 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
550 * @buf: buffer containing value to be written
551 * @off: offset into legacy I/O port space
552 * @count: number of bytes to write
553 *
554 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
555 * callback routine (pci_legacy_write).
556 */
f19aeb1f 557static ssize_t
91a69029
ZR
558pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
559 char *buf, loff_t off, size_t count)
1da177e4
LT
560{
561 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 562 struct device,
1da177e4
LT
563 kobj));
564 /* Only support 1, 2 or 4 byte accesses */
565 if (count != 1 && count != 2 && count != 4)
566 return -EINVAL;
567
568 return pci_legacy_write(bus, off, *(u32 *)buf, count);
569}
570
571/**
572 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
573 * @kobj: kobject corresponding to device to be mapped
574 * @attr: struct bin_attribute for this file
575 * @vma: struct vm_area_struct passed to mmap
576 *
f19aeb1f 577 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
578 * legacy memory space (first meg of bus space) into application virtual
579 * memory space.
580 */
f19aeb1f 581static int
1da177e4
LT
582pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
583 struct vm_area_struct *vma)
584{
585 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 586 struct device,
1da177e4
LT
587 kobj));
588
f19aeb1f
BH
589 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
590}
591
592/**
593 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
594 * @kobj: kobject corresponding to device to be mapped
595 * @attr: struct bin_attribute for this file
596 * @vma: struct vm_area_struct passed to mmap
597 *
598 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
599 * legacy IO space (first meg of bus space) into application virtual
600 * memory space. Returns -ENOSYS if the operation isn't supported
601 */
602static int
603pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
604 struct vm_area_struct *vma)
605{
606 struct pci_bus *bus = to_pci_bus(container_of(kobj,
607 struct device,
608 kobj));
609
610 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
611}
612
10a0ef39
IK
613/**
614 * pci_adjust_legacy_attr - adjustment of legacy file attributes
615 * @b: bus to create files under
616 * @mmap_type: I/O port or memory
617 *
618 * Stub implementation. Can be overridden by arch if necessary.
619 */
620void __weak
621pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
622{
623 return;
624}
625
f19aeb1f
BH
626/**
627 * pci_create_legacy_files - create legacy I/O port and memory files
628 * @b: bus to create files under
629 *
630 * Some platforms allow access to legacy I/O port and ISA memory space on
631 * a per-bus basis. This routine creates the files and ties them into
632 * their associated read, write and mmap files from pci-sysfs.c
633 *
634 * On error unwind, but don't propogate the error to the caller
635 * as it is ok to set up the PCI bus without these files.
636 */
637void pci_create_legacy_files(struct pci_bus *b)
638{
639 int error;
640
641 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
642 GFP_ATOMIC);
643 if (!b->legacy_io)
644 goto kzalloc_err;
645
62e877b8 646 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
647 b->legacy_io->attr.name = "legacy_io";
648 b->legacy_io->size = 0xffff;
649 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
650 b->legacy_io->read = pci_read_legacy_io;
651 b->legacy_io->write = pci_write_legacy_io;
652 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 653 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
654 error = device_create_bin_file(&b->dev, b->legacy_io);
655 if (error)
656 goto legacy_io_err;
657
658 /* Allocated above after the legacy_io struct */
659 b->legacy_mem = b->legacy_io + 1;
6757eca3 660 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
661 b->legacy_mem->attr.name = "legacy_mem";
662 b->legacy_mem->size = 1024*1024;
663 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
664 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 665 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
666 error = device_create_bin_file(&b->dev, b->legacy_mem);
667 if (error)
668 goto legacy_mem_err;
669
670 return;
671
672legacy_mem_err:
673 device_remove_bin_file(&b->dev, b->legacy_io);
674legacy_io_err:
675 kfree(b->legacy_io);
676 b->legacy_io = NULL;
677kzalloc_err:
678 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
679 "and ISA memory resources to sysfs\n");
680 return;
681}
682
683void pci_remove_legacy_files(struct pci_bus *b)
684{
685 if (b->legacy_io) {
686 device_remove_bin_file(&b->dev, b->legacy_io);
687 device_remove_bin_file(&b->dev, b->legacy_mem);
688 kfree(b->legacy_io); /* both are allocated here */
689 }
1da177e4
LT
690}
691#endif /* HAVE_PCI_LEGACY */
692
693#ifdef HAVE_PCI_MMAP
b5ff7df3 694
9eff02e2 695int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
b5ff7df3
LT
696{
697 unsigned long nr, start, size;
698
699 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
700 start = vma->vm_pgoff;
88e7df0b 701 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
702 if (start < size && size - start >= nr)
703 return 1;
704 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
705 current->comm, start, start+nr, pci_name(pdev), resno, size);
706 return 0;
707}
708
1da177e4
LT
709/**
710 * pci_mmap_resource - map a PCI resource into user memory space
711 * @kobj: kobject for mapping
712 * @attr: struct bin_attribute for the file being mapped
713 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 714 * @write_combine: 1 for write_combine mapping
1da177e4
LT
715 *
716 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
717 */
718static int
719pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 720 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
721{
722 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
723 struct device, kobj));
724 struct resource *res = (struct resource *)attr->private;
725 enum pci_mmap_state mmap_type;
e31dd6e4 726 resource_size_t start, end;
2311b1f2 727 int i;
1da177e4 728
2311b1f2
ME
729 for (i = 0; i < PCI_ROM_RESOURCE; i++)
730 if (res == &pdev->resource[i])
731 break;
732 if (i >= PCI_ROM_RESOURCE)
733 return -ENODEV;
734
b5ff7df3
LT
735 if (!pci_mmap_fits(pdev, i, vma))
736 return -EINVAL;
737
2311b1f2
ME
738 /* pci_mmap_page_range() expects the same kind of entry as coming
739 * from /proc/bus/pci/ which is a "user visible" value. If this is
740 * different from the resource itself, arch will do necessary fixup.
741 */
742 pci_resource_to_user(pdev, i, res, &start, &end);
743 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
744 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
745
e8de1481
AV
746 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
747 return -EINVAL;
748
45aec1ae 749 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
750}
751
752static int
753pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
754 struct vm_area_struct *vma)
755{
756 return pci_mmap_resource(kobj, attr, vma, 0);
757}
758
759static int
760pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
761 struct vm_area_struct *vma)
762{
763 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
764}
765
b19441af
GKH
766/**
767 * pci_remove_resource_files - cleanup resource files
cffb2faf 768 * @pdev: dev to cleanup
b19441af 769 *
cffb2faf 770 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
771 * free their resources.
772 */
773static void
774pci_remove_resource_files(struct pci_dev *pdev)
775{
776 int i;
777
778 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
779 struct bin_attribute *res_attr;
780
781 res_attr = pdev->res_attr[i];
782 if (res_attr) {
783 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
784 kfree(res_attr);
785 }
45aec1ae 786
787 res_attr = pdev->res_attr_wc[i];
788 if (res_attr) {
789 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
790 kfree(res_attr);
791 }
b19441af
GKH
792 }
793}
794
45aec1ae 795static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
796{
797 /* allocate attribute structure, piggyback attribute name */
798 int name_len = write_combine ? 13 : 10;
799 struct bin_attribute *res_attr;
800 int retval;
801
802 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
803 if (res_attr) {
804 char *res_attr_name = (char *)(res_attr + 1);
805
a07e4156 806 sysfs_bin_attr_init(res_attr);
45aec1ae 807 if (write_combine) {
808 pdev->res_attr_wc[num] = res_attr;
809 sprintf(res_attr_name, "resource%d_wc", num);
810 res_attr->mmap = pci_mmap_resource_wc;
811 } else {
812 pdev->res_attr[num] = res_attr;
813 sprintf(res_attr_name, "resource%d", num);
814 res_attr->mmap = pci_mmap_resource_uc;
815 }
816 res_attr->attr.name = res_attr_name;
817 res_attr->attr.mode = S_IRUSR | S_IWUSR;
818 res_attr->size = pci_resource_len(pdev, num);
819 res_attr->private = &pdev->resource[num];
820 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
821 } else
822 retval = -ENOMEM;
823
824 return retval;
825}
826
1da177e4
LT
827/**
828 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 829 * @pdev: dev in question
1da177e4 830 *
cffb2faf 831 * Walk the resources in @pdev creating files for each resource available.
1da177e4 832 */
b19441af 833static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
834{
835 int i;
b19441af 836 int retval;
1da177e4
LT
837
838 /* Expose the PCI resources from this device as files */
839 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
840
841 /* skip empty resources */
842 if (!pci_resource_len(pdev, i))
843 continue;
844
45aec1ae 845 retval = pci_create_attr(pdev, i, 0);
846 /* for prefetchable resources, create a WC mappable file */
847 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
848 retval = pci_create_attr(pdev, i, 1);
849
850 if (retval) {
851 pci_remove_resource_files(pdev);
852 return retval;
1da177e4
LT
853 }
854 }
b19441af 855 return 0;
1da177e4
LT
856}
857#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
858int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
859void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
860#endif /* HAVE_PCI_MMAP */
861
862/**
863 * pci_write_rom - used to enable access to the PCI ROM display
864 * @kobj: kernel object handle
cffb2faf 865 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
866 * @buf: user input
867 * @off: file offset
868 * @count: number of byte in input
869 *
870 * writing anything except 0 enables it
871 */
872static ssize_t
91a69029
ZR
873pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
874 char *buf, loff_t off, size_t count)
1da177e4
LT
875{
876 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
877
878 if ((off == 0) && (*buf == '0') && (count == 2))
879 pdev->rom_attr_enabled = 0;
880 else
881 pdev->rom_attr_enabled = 1;
882
883 return count;
884}
885
886/**
887 * pci_read_rom - read a PCI ROM
888 * @kobj: kernel object handle
cffb2faf 889 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
890 * @buf: where to put the data we read from the ROM
891 * @off: file offset
892 * @count: number of bytes to read
893 *
894 * Put @count bytes starting at @off into @buf from the ROM in the PCI
895 * device corresponding to @kobj.
896 */
897static ssize_t
91a69029
ZR
898pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
899 char *buf, loff_t off, size_t count)
1da177e4
LT
900{
901 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
902 void __iomem *rom;
903 size_t size;
904
905 if (!pdev->rom_attr_enabled)
906 return -EINVAL;
907
908 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
909 if (!rom || !size)
910 return -EIO;
1da177e4
LT
911
912 if (off >= size)
913 count = 0;
914 else {
915 if (off + count > size)
916 count = size - off;
917
918 memcpy_fromio(buf, rom + off, count);
919 }
920 pci_unmap_rom(pdev, rom);
921
922 return count;
923}
924
925static struct bin_attribute pci_config_attr = {
926 .attr = {
927 .name = "config",
928 .mode = S_IRUGO | S_IWUSR,
1da177e4 929 },
557848c3 930 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
931 .read = pci_read_config,
932 .write = pci_write_config,
933};
934
935static struct bin_attribute pcie_config_attr = {
936 .attr = {
937 .name = "config",
938 .mode = S_IRUGO | S_IWUSR,
1da177e4 939 },
557848c3 940 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
941 .read = pci_read_config,
942 .write = pci_write_config,
943};
944
a2cd52ca 945int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 946{
a2cd52ca 947 return 0;
575e3348
ME
948}
949
711d5779
MT
950static ssize_t reset_store(struct device *dev,
951 struct device_attribute *attr, const char *buf,
952 size_t count)
953{
954 struct pci_dev *pdev = to_pci_dev(dev);
955 unsigned long val;
956 ssize_t result = strict_strtoul(buf, 0, &val);
957
958 if (result < 0)
959 return result;
960
961 if (val != 1)
962 return -EINVAL;
963 return pci_reset_function(pdev);
964}
965
966static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
967
280c73d3
ZY
968static int pci_create_capabilities_sysfs(struct pci_dev *dev)
969{
970 int retval;
971 struct bin_attribute *attr;
972
973 /* If the device has VPD, try to expose it in sysfs. */
974 if (dev->vpd) {
975 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
976 if (!attr)
977 return -ENOMEM;
978
a07e4156 979 sysfs_bin_attr_init(attr);
280c73d3
ZY
980 attr->size = dev->vpd->len;
981 attr->attr.name = "vpd";
982 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
983 attr->read = read_vpd_attr;
984 attr->write = write_vpd_attr;
280c73d3
ZY
985 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
986 if (retval) {
987 kfree(dev->vpd->attr);
988 return retval;
989 }
990 dev->vpd->attr = attr;
991 }
992
993 /* Active State Power Management */
994 pcie_aspm_create_sysfs_dev_files(dev);
995
711d5779
MT
996 if (!pci_probe_reset_function(dev)) {
997 retval = device_create_file(&dev->dev, &reset_attr);
998 if (retval)
999 goto error;
1000 dev->reset_fn = 1;
1001 }
280c73d3 1002 return 0;
711d5779
MT
1003
1004error:
1005 pcie_aspm_remove_sysfs_dev_files(dev);
1006 if (dev->vpd && dev->vpd->attr) {
1007 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1008 kfree(dev->vpd->attr);
1009 }
1010
1011 return retval;
280c73d3
ZY
1012}
1013
b19441af 1014int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1015{
b19441af 1016 int retval;
280c73d3
ZY
1017 int rom_size = 0;
1018 struct bin_attribute *attr;
b19441af 1019
1da177e4
LT
1020 if (!sysfs_initialized)
1021 return -EACCES;
1022
557848c3 1023 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1024 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1025 else
b19441af
GKH
1026 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1027 if (retval)
1028 goto err;
1da177e4 1029
b19441af
GKH
1030 retval = pci_create_resource_files(pdev);
1031 if (retval)
280c73d3
ZY
1032 goto err_config_file;
1033
1034 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1035 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1036 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1037 rom_size = 0x20000;
1da177e4
LT
1038
1039 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1040 if (rom_size) {
94e61088 1041 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1042 if (!attr) {
b19441af 1043 retval = -ENOMEM;
9890b12a 1044 goto err_resource_files;
1da177e4 1045 }
a07e4156 1046 sysfs_bin_attr_init(attr);
280c73d3
ZY
1047 attr->size = rom_size;
1048 attr->attr.name = "rom";
1049 attr->attr.mode = S_IRUSR;
1050 attr->read = pci_read_rom;
1051 attr->write = pci_write_rom;
1052 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1053 if (retval) {
1054 kfree(attr);
1055 goto err_resource_files;
1056 }
1057 pdev->rom_attr = attr;
1da177e4 1058 }
280c73d3 1059
217f45de
DA
1060 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1061 retval = device_create_file(&pdev->dev, &vga_attr);
1062 if (retval)
1063 goto err_rom_file;
1064 }
1065
1da177e4 1066 /* add platform-specific attributes */
280c73d3
ZY
1067 retval = pcibios_add_platform_entries(pdev);
1068 if (retval)
217f45de 1069 goto err_vga_file;
b19441af 1070
280c73d3
ZY
1071 /* add sysfs entries for various capabilities */
1072 retval = pci_create_capabilities_sysfs(pdev);
1073 if (retval)
217f45de 1074 goto err_vga_file;
7d715a6c 1075
1da177e4 1076 return 0;
b19441af 1077
217f45de
DA
1078err_vga_file:
1079 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1080 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 1081err_rom_file:
280c73d3 1082 if (rom_size) {
94e61088 1083 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1084 kfree(pdev->rom_attr);
1085 pdev->rom_attr = NULL;
1086 }
9890b12a
ME
1087err_resource_files:
1088 pci_remove_resource_files(pdev);
94e61088 1089err_config_file:
557848c3 1090 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1091 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1092 else
1093 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1094err:
1095 return retval;
1da177e4
LT
1096}
1097
280c73d3
ZY
1098static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1099{
1100 if (dev->vpd && dev->vpd->attr) {
1101 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1102 kfree(dev->vpd->attr);
1103 }
1104
1105 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1106 if (dev->reset_fn) {
1107 device_remove_file(&dev->dev, &reset_attr);
1108 dev->reset_fn = 0;
1109 }
280c73d3
ZY
1110}
1111
1da177e4
LT
1112/**
1113 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1114 * @pdev: device whose entries we should free
1115 *
1116 * Cleanup when @pdev is removed from sysfs.
1117 */
1118void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1119{
280c73d3
ZY
1120 int rom_size = 0;
1121
d67afe5e
DM
1122 if (!sysfs_initialized)
1123 return;
1124
280c73d3 1125 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1126
557848c3 1127 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1128 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1129 else
1130 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1131
1132 pci_remove_resource_files(pdev);
1133
280c73d3
ZY
1134 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1135 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1136 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1137 rom_size = 0x20000;
1138
1139 if (rom_size && pdev->rom_attr) {
1140 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1141 kfree(pdev->rom_attr);
1da177e4
LT
1142 }
1143}
1144
1145static int __init pci_sysfs_init(void)
1146{
1147 struct pci_dev *pdev = NULL;
b19441af
GKH
1148 int retval;
1149
1da177e4 1150 sysfs_initialized = 1;
b19441af
GKH
1151 for_each_pci_dev(pdev) {
1152 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1153 if (retval) {
1154 pci_dev_put(pdev);
b19441af 1155 return retval;
151fc5df 1156 }
b19441af 1157 }
1da177e4
LT
1158
1159 return 0;
1160}
1161
40ee9e9f 1162late_initcall(pci_sysfs_init);