ACPI/PCI: PM: Add missing wakeup.flags.valid checks
[linux-block.git] / drivers / pci / pci-sysfs.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
1da177e4
LT
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
f7625980 12 * Modeled after usb's driverfs.c
1da177e4
LT
13 */
14
15
1da177e4 16#include <linux/kernel.h>
b5ff7df3 17#include <linux/sched.h>
1da177e4
LT
18#include <linux/pci.h>
19#include <linux/stat.h>
363c75db 20#include <linux/export.h>
1da177e4
LT
21#include <linux/topology.h>
22#include <linux/mm.h>
de139a33 23#include <linux/fs.h>
aa0ac365 24#include <linux/capability.h>
a628e7b8 25#include <linux/security.h>
5a0e3ad6 26#include <linux/slab.h>
1a39b310 27#include <linux/vgaarb.h>
448bd857 28#include <linux/pm_runtime.h>
dfc73e7a 29#include <linux/of.h>
1da177e4
LT
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
e404e274 37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
38{ \
39 struct pci_dev *pdev; \
40 \
3c78bc61
RD
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
5136b2da
GKH
43} \
44static DEVICE_ATTR_RO(field)
1da177e4
LT
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
702ed3be 50pci_config_attr(revision, "0x%02x\n");
1da177e4
LT
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
bdee9d98
DT
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
bdee9d98
DT
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 67 unsigned long val;
bdee9d98 68
9a994e8e 69 if (kstrtoul(buf, 0, &val) < 0)
92425a40
TP
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
bdee9d98 75}
5136b2da 76static DEVICE_ATTR_RW(broken_parity_status);
bdee9d98 77
5aaba363 78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
3c78bc61 79 struct device_attribute *attr, char *buf)
c489f5fb 80{
3be83050 81 const struct cpumask *mask;
4327edf6 82
e0cd5160 83#ifdef CONFIG_NUMA
6be954d1
DJ
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
e0cd5160 86#else
3be83050 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 88#endif
5aaba363 89 return cpumap_print_to_pagebuf(list, buf, mask);
39106dcf
MT
90}
91
c489f5fb 92static ssize_t local_cpus_show(struct device *dev,
3c78bc61 93 struct device_attribute *attr, char *buf)
c489f5fb 94{
5aaba363 95 return pci_dev_show_local_cpu(dev, false, attr, buf);
c489f5fb 96}
5136b2da 97static DEVICE_ATTR_RO(local_cpus);
39106dcf
MT
98
99static ssize_t local_cpulist_show(struct device *dev,
3c78bc61 100 struct device_attribute *attr, char *buf)
39106dcf 101{
5aaba363 102 return pci_dev_show_local_cpu(dev, true, attr, buf);
1da177e4 103}
5136b2da 104static DEVICE_ATTR_RO(local_cpulist);
1da177e4 105
dc2c2c9d
YL
106/*
107 * PCI Bus Class Devices
108 */
56039e65
GKH
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
dc2c2c9d 111{
5aaba363
SH
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
dc2c2c9d 115}
56039e65 116static DEVICE_ATTR_RO(cpuaffinity);
dc2c2c9d 117
56039e65
GKH
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
dc2c2c9d 120{
5aaba363
SH
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
dc2c2c9d 124}
56039e65 125static DEVICE_ATTR_RO(cpulistaffinity);
dc2c2c9d 126
1da177e4 127/* show resources */
3c78bc61
RD
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
1da177e4 130{
3c78bc61
RD
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
1da177e4 133 int i;
fde09c6d 134 int max;
e31dd6e4 135 resource_size_t start, end;
1da177e4
LT
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
139 else
140 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
141
142 for (i = 0; i < max; i++) {
2311b1f2
ME
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
3c78bc61 145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
2311b1f2
ME
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
1da177e4
LT
149 }
150 return (str - buf);
151}
5136b2da 152static DEVICE_ATTR_RO(resource);
1da177e4 153
56c1af46
WVK
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
6cf57be0 157 struct pci_dev *pdev = to_pci_dev(dev);
56c1af46 158
6cf57be0 159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
56c1af46
WVK
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
c70b65fb 166 struct pci_dev *pdev = to_pci_dev(dev);
56c1af46 167
c70b65fb 168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
56c1af46
WVK
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
1acfb9b7
JF
185 case PCI_EXP_LNKSTA_CLS_16_0GB:
186 speed = "16 GT/s";
187 break;
56c1af46
WVK
188 case PCI_EXP_LNKSTA_CLS_8_0GB:
189 speed = "8 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_5_0GB:
192 speed = "5 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_2_5GB:
195 speed = "2.5 GT/s";
196 break;
197 default:
198 speed = "Unknown speed";
199 }
200
201 return sprintf(buf, "%s\n", speed);
202}
203static DEVICE_ATTR_RO(current_link_speed);
204
205static ssize_t current_link_width_show(struct device *dev,
206 struct device_attribute *attr, char *buf)
207{
208 struct pci_dev *pci_dev = to_pci_dev(dev);
209 u16 linkstat;
210 int err;
211
212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
213 if (err)
214 return -EINVAL;
215
216 return sprintf(buf, "%u\n",
217 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
218}
219static DEVICE_ATTR_RO(current_link_width);
220
221static ssize_t secondary_bus_number_show(struct device *dev,
222 struct device_attribute *attr,
223 char *buf)
224{
225 struct pci_dev *pci_dev = to_pci_dev(dev);
226 u8 sec_bus;
227 int err;
228
229 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
230 if (err)
231 return -EINVAL;
232
233 return sprintf(buf, "%u\n", sec_bus);
234}
235static DEVICE_ATTR_RO(secondary_bus_number);
236
237static ssize_t subordinate_bus_number_show(struct device *dev,
238 struct device_attribute *attr,
239 char *buf)
240{
241 struct pci_dev *pci_dev = to_pci_dev(dev);
242 u8 sub_bus;
243 int err;
244
245 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
246 if (err)
247 return -EINVAL;
248
249 return sprintf(buf, "%u\n", sub_bus);
250}
251static DEVICE_ATTR_RO(subordinate_bus_number);
252
0077a845
SH
253static ssize_t ari_enabled_show(struct device *dev,
254 struct device_attribute *attr,
255 char *buf)
256{
257 struct pci_dev *pci_dev = to_pci_dev(dev);
258
259 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
260}
261static DEVICE_ATTR_RO(ari_enabled);
262
3c78bc61
RD
263static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
264 char *buf)
9888549e
GK
265{
266 struct pci_dev *pci_dev = to_pci_dev(dev);
267
89ec3dcf 268 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
9888549e
GK
269 pci_dev->vendor, pci_dev->device,
270 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
271 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
272 (u8)(pci_dev->class));
273}
5136b2da 274static DEVICE_ATTR_RO(modalias);
bae94d02 275
d8e7d53a 276static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
3c78bc61 277 const char *buf, size_t count)
9f125d30
AV
278{
279 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 280 unsigned long val;
9a994e8e 281 ssize_t result = kstrtoul(buf, 0, &val);
92425a40
TP
282
283 if (result < 0)
284 return result;
9f125d30
AV
285
286 /* this can crash the machine when done on the "wrong" device */
287 if (!capable(CAP_SYS_ADMIN))
92425a40 288 return -EPERM;
9f125d30 289
6f5cdfa8
CH
290 device_lock(dev);
291 if (dev->driver)
292 result = -EBUSY;
293 else if (val)
bae94d02 294 result = pci_enable_device(pdev);
6f5cdfa8
CH
295 else if (pci_is_enabled(pdev))
296 pci_disable_device(pdev);
297 else
298 result = -EIO;
299 device_unlock(dev);
9f125d30 300
bae94d02
IPG
301 return result < 0 ? result : count;
302}
303
d8e7d53a 304static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
3c78bc61 305 char *buf)
bae94d02
IPG
306{
307 struct pci_dev *pdev;
9f125d30 308
3c78bc61
RD
309 pdev = to_pci_dev(dev);
310 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30 311}
d8e7d53a 312static DEVICE_ATTR_RW(enable);
9f125d30 313
81bb0e19 314#ifdef CONFIG_NUMA
63692df1
PB
315static ssize_t numa_node_store(struct device *dev,
316 struct device_attribute *attr, const char *buf,
317 size_t count)
318{
319 struct pci_dev *pdev = to_pci_dev(dev);
320 int node, ret;
321
322 if (!capable(CAP_SYS_ADMIN))
323 return -EPERM;
324
325 ret = kstrtoint(buf, 0, &node);
326 if (ret)
327 return ret;
328
3dcc8d39
MK
329 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
330 return -EINVAL;
331
332 if (node != NUMA_NO_NODE && !node_online(node))
63692df1
PB
333 return -EINVAL;
334
335 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
7506dc79 336 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
63692df1
PB
337 node);
338
339 dev->numa_node = node;
340 return count;
341}
342
3c78bc61
RD
343static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
344 char *buf)
81bb0e19 345{
3c78bc61 346 return sprintf(buf, "%d\n", dev->numa_node);
81bb0e19 347}
63692df1 348static DEVICE_ATTR_RW(numa_node);
81bb0e19
BG
349#endif
350
3c78bc61
RD
351static ssize_t dma_mask_bits_show(struct device *dev,
352 struct device_attribute *attr, char *buf)
bb965401
YL
353{
354 struct pci_dev *pdev = to_pci_dev(dev);
355
3c78bc61 356 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
bb965401 357}
5136b2da 358static DEVICE_ATTR_RO(dma_mask_bits);
bb965401 359
3c78bc61
RD
360static ssize_t consistent_dma_mask_bits_show(struct device *dev,
361 struct device_attribute *attr,
362 char *buf)
bb965401 363{
3c78bc61 364 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
bb965401 365}
5136b2da 366static DEVICE_ATTR_RO(consistent_dma_mask_bits);
bb965401 367
3c78bc61
RD
368static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
369 char *buf)
fe97064c
BG
370{
371 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 372 struct pci_bus *subordinate = pdev->subordinate;
fe97064c 373
468ff15a
YW
374 return sprintf(buf, "%u\n", subordinate ?
375 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
376 : !pdev->no_msi);
fe97064c
BG
377}
378
3c78bc61
RD
379static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
380 const char *buf, size_t count)
fe97064c
BG
381{
382 struct pci_dev *pdev = to_pci_dev(dev);
468ff15a 383 struct pci_bus *subordinate = pdev->subordinate;
92425a40
TP
384 unsigned long val;
385
9a994e8e 386 if (kstrtoul(buf, 0, &val) < 0)
92425a40 387 return -EINVAL;
fe97064c 388
fe97064c 389 if (!capable(CAP_SYS_ADMIN))
92425a40 390 return -EPERM;
fe97064c 391
f7625980 392 /*
468ff15a
YW
393 * "no_msi" and "bus_flags" only affect what happens when a driver
394 * requests MSI or MSI-X. They don't affect any drivers that have
395 * already requested MSI or MSI-X.
f7625980 396 */
468ff15a
YW
397 if (!subordinate) {
398 pdev->no_msi = !val;
7506dc79 399 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
468ff15a 400 val ? "allowed" : "disallowed");
fe97064c 401 return count;
fe97064c
BG
402 }
403
468ff15a
YW
404 if (val)
405 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
406 else
407 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
408
409 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
410 val ? "allowed" : "disallowed");
fe97064c
BG
411 return count;
412}
5136b2da 413static DEVICE_ATTR_RW(msi_bus);
9888549e 414
1094f6d0 415static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
705b1aaa
AC
416{
417 unsigned long val;
418 struct pci_bus *b = NULL;
419
9a994e8e 420 if (kstrtoul(buf, 0, &val) < 0)
705b1aaa
AC
421 return -EINVAL;
422
423 if (val) {
9d16947b 424 pci_lock_rescan_remove();
705b1aaa
AC
425 while ((b = pci_find_next_bus(b)) != NULL)
426 pci_rescan_bus(b);
9d16947b 427 pci_unlock_rescan_remove();
705b1aaa
AC
428 }
429 return count;
430}
1094f6d0 431static BUS_ATTR_WO(rescan);
705b1aaa 432
bf22c90f 433static struct attribute *pci_bus_attrs[] = {
0f49ba55
GKH
434 &bus_attr_rescan.attr,
435 NULL,
436};
437
438static const struct attribute_group pci_bus_group = {
439 .attrs = pci_bus_attrs,
440};
441
442const struct attribute_group *pci_bus_groups[] = {
443 &pci_bus_group,
444 NULL,
705b1aaa 445};
77c27c7b 446
3c78bc61
RD
447static ssize_t dev_rescan_store(struct device *dev,
448 struct device_attribute *attr, const char *buf,
449 size_t count)
738a6396
AC
450{
451 unsigned long val;
452 struct pci_dev *pdev = to_pci_dev(dev);
453
9a994e8e 454 if (kstrtoul(buf, 0, &val) < 0)
738a6396
AC
455 return -EINVAL;
456
457 if (val) {
9d16947b 458 pci_lock_rescan_remove();
738a6396 459 pci_rescan_bus(pdev->bus);
9d16947b 460 pci_unlock_rescan_remove();
738a6396
AC
461 }
462 return count;
463}
bf22c90f
SK
464static struct device_attribute dev_rescan_attr = __ATTR(rescan,
465 (S_IWUSR|S_IWGRP),
466 NULL, dev_rescan_store);
738a6396 467
3c78bc61
RD
468static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
469 const char *buf, size_t count)
77c27c7b 470{
77c27c7b 471 unsigned long val;
77c27c7b 472
9a994e8e 473 if (kstrtoul(buf, 0, &val) < 0)
77c27c7b
AC
474 return -EINVAL;
475
bc6caf02
TH
476 if (val && device_remove_file_self(dev, attr))
477 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
77c27c7b
AC
478 return count;
479}
bf22c90f
SK
480static struct device_attribute dev_remove_attr = __ATTR(remove,
481 (S_IWUSR|S_IWGRP),
482 NULL, remove_store);
b9d320fc 483
3c78bc61
RD
484static ssize_t dev_bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
b9d320fc
YL
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
9a994e8e 491 if (kstrtoul(buf, 0, &val) < 0)
b9d320fc
YL
492 return -EINVAL;
493
494 if (val) {
9d16947b 495 pci_lock_rescan_remove();
2f320521
YL
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
9d16947b 500 pci_unlock_rescan_remove();
b9d320fc
YL
501 }
502 return count;
503}
56039e65 504static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
b9d320fc 505
fbb988be 506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
448bd857
HY
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
9a994e8e 514 if (kstrtoul(buf, 0, &val) < 0)
448bd857
HY
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
9d26d3a8
MW
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
448bd857
HY
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
3c78bc61 532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
448bd857 533}
5136b2da 534static DEVICE_ATTR_RW(d3cold_allowed);
448bd857
HY
535#endif
536
dfc73e7a
SO
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
b63773a8 544 if (np == NULL)
dfc73e7a 545 return 0;
b63773a8 546 return sprintf(buf, "%pOF", np);
dfc73e7a
SO
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
1789382a
DD
551#ifdef CONFIG_PCI_IOV
552static ssize_t sriov_totalvfs_show(struct device *dev,
553 struct device_attribute *attr,
554 char *buf)
555{
556 struct pci_dev *pdev = to_pci_dev(dev);
557
bff73156 558 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
559}
560
561
562static ssize_t sriov_numvfs_show(struct device *dev,
563 struct device_attribute *attr,
564 char *buf)
565{
566 struct pci_dev *pdev = to_pci_dev(dev);
567
6b136724 568 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
1789382a
DD
569}
570
571/*
faa48a50
BH
572 * num_vfs > 0; number of VFs to enable
573 * num_vfs = 0; disable all VFs
1789382a
DD
574 *
575 * Note: SRIOV spec doesn't allow partial VF
faa48a50 576 * disable, so it's all or none.
1789382a
DD
577 */
578static ssize_t sriov_numvfs_store(struct device *dev,
579 struct device_attribute *attr,
580 const char *buf, size_t count)
581{
582 struct pci_dev *pdev = to_pci_dev(dev);
faa48a50
BH
583 int ret;
584 u16 num_vfs;
1789382a 585
faa48a50
BH
586 ret = kstrtou16(buf, 0, &num_vfs);
587 if (ret < 0)
588 return ret;
589
590 if (num_vfs > pci_sriov_get_totalvfs(pdev))
591 return -ERANGE;
592
17530e71 593 device_lock(&pdev->dev);
5b0948df 594
faa48a50 595 if (num_vfs == pdev->sriov->num_VFs)
5b0948df 596 goto exit;
1789382a
DD
597
598 /* is PF driver loaded w/callback */
599 if (!pdev->driver || !pdev->driver->sriov_configure) {
7506dc79 600 pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
5b0948df
ET
601 ret = -ENOENT;
602 goto exit;
1789382a
DD
603 }
604
faa48a50
BH
605 if (num_vfs == 0) {
606 /* disable VFs */
607 ret = pdev->driver->sriov_configure(pdev, 0);
5b0948df 608 goto exit;
1789382a
DD
609 }
610
faa48a50
BH
611 /* enable VFs */
612 if (pdev->sriov->num_VFs) {
7506dc79 613 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
faa48a50 614 pdev->sriov->num_VFs, num_vfs);
5b0948df
ET
615 ret = -EBUSY;
616 goto exit;
1789382a
DD
617 }
618
faa48a50
BH
619 ret = pdev->driver->sriov_configure(pdev, num_vfs);
620 if (ret < 0)
5b0948df 621 goto exit;
1789382a 622
faa48a50 623 if (ret != num_vfs)
7506dc79 624 pci_warn(pdev, "%d VFs requested; only %d enabled\n",
faa48a50
BH
625 num_vfs, ret);
626
5b0948df 627exit:
17530e71 628 device_unlock(&pdev->dev);
5b0948df
ET
629
630 if (ret < 0)
631 return ret;
632
faa48a50 633 return count;
1789382a
DD
634}
635
7dfca152
FS
636static ssize_t sriov_offset_show(struct device *dev,
637 struct device_attribute *attr,
638 char *buf)
639{
640 struct pci_dev *pdev = to_pci_dev(dev);
641
642 return sprintf(buf, "%u\n", pdev->sriov->offset);
643}
644
645static ssize_t sriov_stride_show(struct device *dev,
646 struct device_attribute *attr,
647 char *buf)
648{
649 struct pci_dev *pdev = to_pci_dev(dev);
650
651 return sprintf(buf, "%u\n", pdev->sriov->stride);
652}
653
654static ssize_t sriov_vf_device_show(struct device *dev,
655 struct device_attribute *attr,
656 char *buf)
657{
658 struct pci_dev *pdev = to_pci_dev(dev);
659
660 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
661}
662
0e7df224
BW
663static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
664 struct device_attribute *attr,
665 char *buf)
666{
667 struct pci_dev *pdev = to_pci_dev(dev);
668
669 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
670}
671
672static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
673 struct device_attribute *attr,
674 const char *buf, size_t count)
675{
676 struct pci_dev *pdev = to_pci_dev(dev);
677 bool drivers_autoprobe;
678
679 if (kstrtobool(buf, &drivers_autoprobe) < 0)
680 return -EINVAL;
681
682 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
683
684 return count;
685}
686
1789382a
DD
687static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
688static struct device_attribute sriov_numvfs_attr =
689 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
690 sriov_numvfs_show, sriov_numvfs_store);
7dfca152
FS
691static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
692static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
693static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
0e7df224
BW
694static struct device_attribute sriov_drivers_autoprobe_attr =
695 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
696 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
1789382a
DD
697#endif /* CONFIG_PCI_IOV */
698
782a985d
AW
699static ssize_t driver_override_store(struct device *dev,
700 struct device_attribute *attr,
701 const char *buf, size_t count)
702{
703 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 704 char *driver_override, *old, *cp;
782a985d 705
4efe874a
SL
706 /* We need to keep extra room for a newline */
707 if (count >= (PAGE_SIZE - 1))
782a985d
AW
708 return -EINVAL;
709
710 driver_override = kstrndup(buf, count, GFP_KERNEL);
711 if (!driver_override)
712 return -ENOMEM;
713
714 cp = strchr(driver_override, '\n');
715 if (cp)
716 *cp = '\0';
717
9561475d
NS
718 device_lock(dev);
719 old = pdev->driver_override;
782a985d
AW
720 if (strlen(driver_override)) {
721 pdev->driver_override = driver_override;
722 } else {
723 kfree(driver_override);
724 pdev->driver_override = NULL;
725 }
9561475d 726 device_unlock(dev);
782a985d
AW
727
728 kfree(old);
729
730 return count;
731}
732
733static ssize_t driver_override_show(struct device *dev,
734 struct device_attribute *attr, char *buf)
735{
736 struct pci_dev *pdev = to_pci_dev(dev);
9561475d 737 ssize_t len;
782a985d 738
9561475d
NS
739 device_lock(dev);
740 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
741 device_unlock(dev);
742 return len;
782a985d
AW
743}
744static DEVICE_ATTR_RW(driver_override);
745
bf22c90f 746static struct attribute *pci_dev_attrs[] = {
5136b2da
GKH
747 &dev_attr_resource.attr,
748 &dev_attr_vendor.attr,
749 &dev_attr_device.attr,
750 &dev_attr_subsystem_vendor.attr,
751 &dev_attr_subsystem_device.attr,
702ed3be 752 &dev_attr_revision.attr,
5136b2da
GKH
753 &dev_attr_class.attr,
754 &dev_attr_irq.attr,
755 &dev_attr_local_cpus.attr,
756 &dev_attr_local_cpulist.attr,
757 &dev_attr_modalias.attr,
81bb0e19 758#ifdef CONFIG_NUMA
5136b2da 759 &dev_attr_numa_node.attr,
81bb0e19 760#endif
5136b2da
GKH
761 &dev_attr_dma_mask_bits.attr,
762 &dev_attr_consistent_dma_mask_bits.attr,
d8e7d53a 763 &dev_attr_enable.attr,
5136b2da
GKH
764 &dev_attr_broken_parity_status.attr,
765 &dev_attr_msi_bus.attr,
fbb988be 766#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
5136b2da 767 &dev_attr_d3cold_allowed.attr,
dfc73e7a
SO
768#endif
769#ifdef CONFIG_OF
770 &dev_attr_devspec.attr,
77c27c7b 771#endif
782a985d 772 &dev_attr_driver_override.attr,
0077a845 773 &dev_attr_ari_enabled.attr,
5136b2da
GKH
774 NULL,
775};
776
56c1af46
WVK
777static struct attribute *pci_bridge_attrs[] = {
778 &dev_attr_subordinate_bus_number.attr,
779 &dev_attr_secondary_bus_number.attr,
780 NULL,
5136b2da
GKH
781};
782
56c1af46
WVK
783static struct attribute *pcie_dev_attrs[] = {
784 &dev_attr_current_link_speed.attr,
785 &dev_attr_current_link_width.attr,
786 &dev_attr_max_link_width.attr,
787 &dev_attr_max_link_speed.attr,
5136b2da 788 NULL,
1da177e4
LT
789};
790
56039e65
GKH
791static struct attribute *pcibus_attrs[] = {
792 &dev_attr_rescan.attr,
793 &dev_attr_cpuaffinity.attr,
794 &dev_attr_cpulistaffinity.attr,
795 NULL,
796};
797
798static const struct attribute_group pcibus_group = {
799 .attrs = pcibus_attrs,
800};
801
802const struct attribute_group *pcibus_groups[] = {
803 &pcibus_group,
804 NULL,
b9d320fc
YL
805};
806
3c78bc61
RD
807static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
808 char *buf)
217f45de
DA
809{
810 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
811 struct pci_dev *vga_dev = vga_default_device();
812
813 if (vga_dev)
814 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
815
816 return sprintf(buf, "%u\n",
817 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
818 IORESOURCE_ROM_SHADOW));
819}
bf22c90f 820static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
217f45de 821
3c78bc61
RD
822static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
823 struct bin_attribute *bin_attr, char *buf,
824 loff_t off, size_t count)
1da177e4 825{
554a6037 826 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
827 unsigned int size = 64;
828 loff_t init_off = off;
3c78bc61 829 u8 *data = (u8 *) buf;
1da177e4
LT
830
831 /* Several chips lock up trying to read undefined config space */
ab0fa82b 832 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
1da177e4 833 size = dev->cfg_size;
3c78bc61 834 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1da177e4 835 size = 128;
1da177e4
LT
836
837 if (off > size)
838 return 0;
839 if (off + count > size) {
840 size -= off;
841 count = size;
842 } else {
843 size = count;
844 }
845
3d8387ef
HY
846 pci_config_pm_runtime_get(dev);
847
4c0619ad 848 if ((off & 1) && size) {
849 u8 val;
e04b0ea2 850 pci_user_read_config_byte(dev, off, &val);
4c0619ad 851 data[off - init_off] = val;
1da177e4 852 off++;
4c0619ad 853 size--;
854 }
855
856 if ((off & 3) && size > 2) {
857 u16 val;
e04b0ea2 858 pci_user_read_config_word(dev, off, &val);
4c0619ad 859 data[off - init_off] = val & 0xff;
860 data[off - init_off + 1] = (val >> 8) & 0xff;
861 off += 2;
862 size -= 2;
1da177e4
LT
863 }
864
865 while (size > 3) {
4c0619ad 866 u32 val;
e04b0ea2 867 pci_user_read_config_dword(dev, off, &val);
4c0619ad 868 data[off - init_off] = val & 0xff;
869 data[off - init_off + 1] = (val >> 8) & 0xff;
870 data[off - init_off + 2] = (val >> 16) & 0xff;
871 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
872 off += 4;
873 size -= 4;
874 }
875
4c0619ad 876 if (size >= 2) {
877 u16 val;
e04b0ea2 878 pci_user_read_config_word(dev, off, &val);
4c0619ad 879 data[off - init_off] = val & 0xff;
880 data[off - init_off + 1] = (val >> 8) & 0xff;
881 off += 2;
882 size -= 2;
883 }
884
885 if (size > 0) {
886 u8 val;
e04b0ea2 887 pci_user_read_config_byte(dev, off, &val);
4c0619ad 888 data[off - init_off] = val;
1da177e4
LT
889 off++;
890 --size;
891 }
892
3d8387ef
HY
893 pci_config_pm_runtime_put(dev);
894
1da177e4
LT
895 return count;
896}
897
3c78bc61
RD
898static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *bin_attr, char *buf,
900 loff_t off, size_t count)
1da177e4 901{
554a6037 902 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
903 unsigned int size = count;
904 loff_t init_off = off;
3c78bc61 905 u8 *data = (u8 *) buf;
1da177e4
LT
906
907 if (off > dev->cfg_size)
908 return 0;
909 if (off + count > dev->cfg_size) {
910 size = dev->cfg_size - off;
911 count = size;
912 }
f7625980 913
3d8387ef
HY
914 pci_config_pm_runtime_get(dev);
915
4c0619ad 916 if ((off & 1) && size) {
e04b0ea2 917 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 918 off++;
4c0619ad 919 size--;
1da177e4 920 }
f7625980 921
4c0619ad 922 if ((off & 3) && size > 2) {
923 u16 val = data[off - init_off];
924 val |= (u16) data[off - init_off + 1] << 8;
3c78bc61
RD
925 pci_user_write_config_word(dev, off, val);
926 off += 2;
927 size -= 2;
928 }
1da177e4
LT
929
930 while (size > 3) {
4c0619ad 931 u32 val = data[off - init_off];
932 val |= (u32) data[off - init_off + 1] << 8;
933 val |= (u32) data[off - init_off + 2] << 16;
934 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 935 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
936 off += 4;
937 size -= 4;
938 }
f7625980 939
4c0619ad 940 if (size >= 2) {
941 u16 val = data[off - init_off];
942 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 943 pci_user_write_config_word(dev, off, val);
4c0619ad 944 off += 2;
945 size -= 2;
946 }
1da177e4 947
4c0619ad 948 if (size) {
e04b0ea2 949 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
950 off++;
951 --size;
952 }
953
3d8387ef
HY
954 pci_config_pm_runtime_put(dev);
955
1da177e4
LT
956 return count;
957}
958
959#ifdef HAVE_PCI_LEGACY
960/**
961 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 962 * @filp: open sysfs file
1da177e4 963 * @kobj: kobject corresponding to file to read from
cffb2faf 964 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
965 * @buf: buffer to store results
966 * @off: offset into legacy I/O port space
967 * @count: number of bytes to read
968 *
969 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
970 * callback routine (pci_legacy_read).
971 */
3c78bc61
RD
972static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
973 struct bin_attribute *bin_attr, char *buf,
974 loff_t off, size_t count)
1da177e4 975{
554a6037 976 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 977
3c78bc61
RD
978 /* Only support 1, 2 or 4 byte accesses */
979 if (count != 1 && count != 2 && count != 4)
980 return -EINVAL;
1da177e4 981
3c78bc61 982 return pci_legacy_read(bus, off, (u32 *)buf, count);
1da177e4
LT
983}
984
985/**
986 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 987 * @filp: open sysfs file
1da177e4 988 * @kobj: kobject corresponding to file to read from
cffb2faf 989 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
990 * @buf: buffer containing value to be written
991 * @off: offset into legacy I/O port space
992 * @count: number of bytes to write
993 *
994 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
995 * callback routine (pci_legacy_write).
996 */
3c78bc61
RD
997static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
998 struct bin_attribute *bin_attr, char *buf,
999 loff_t off, size_t count)
1da177e4 1000{
554a6037 1001 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1002
3c78bc61
RD
1003 /* Only support 1, 2 or 4 byte accesses */
1004 if (count != 1 && count != 2 && count != 4)
1005 return -EINVAL;
1006
1007 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1da177e4
LT
1008}
1009
1010/**
1011 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 1012 * @filp: open sysfs file
1da177e4
LT
1013 * @kobj: kobject corresponding to device to be mapped
1014 * @attr: struct bin_attribute for this file
1015 * @vma: struct vm_area_struct passed to mmap
1016 *
f19aeb1f 1017 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
1018 * legacy memory space (first meg of bus space) into application virtual
1019 * memory space.
1020 */
3c78bc61
RD
1021static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1022 struct bin_attribute *attr,
1023 struct vm_area_struct *vma)
1da177e4 1024{
554a6037 1025 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1da177e4 1026
3c78bc61 1027 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
f19aeb1f
BH
1028}
1029
1030/**
1031 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 1032 * @filp: open sysfs file
f19aeb1f
BH
1033 * @kobj: kobject corresponding to device to be mapped
1034 * @attr: struct bin_attribute for this file
1035 * @vma: struct vm_area_struct passed to mmap
1036 *
1037 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1038 * legacy IO space (first meg of bus space) into application virtual
1039 * memory space. Returns -ENOSYS if the operation isn't supported
1040 */
3c78bc61
RD
1041static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
f19aeb1f 1044{
554a6037 1045 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
f19aeb1f 1046
3c78bc61 1047 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
f19aeb1f
BH
1048}
1049
10a0ef39
IK
1050/**
1051 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1052 * @b: bus to create files under
1053 * @mmap_type: I/O port or memory
1054 *
1055 * Stub implementation. Can be overridden by arch if necessary.
1056 */
3c78bc61
RD
1057void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1058 enum pci_mmap_state mmap_type)
10a0ef39 1059{
10a0ef39
IK
1060}
1061
f19aeb1f
BH
1062/**
1063 * pci_create_legacy_files - create legacy I/O port and memory files
1064 * @b: bus to create files under
1065 *
1066 * Some platforms allow access to legacy I/O port and ISA memory space on
1067 * a per-bus basis. This routine creates the files and ties them into
1068 * their associated read, write and mmap files from pci-sysfs.c
1069 *
25985edc 1070 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
1071 * as it is ok to set up the PCI bus without these files.
1072 */
1073void pci_create_legacy_files(struct pci_bus *b)
1074{
1075 int error;
1076
6396bb22 1077 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
f19aeb1f
BH
1078 GFP_ATOMIC);
1079 if (!b->legacy_io)
1080 goto kzalloc_err;
1081
62e877b8 1082 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
1083 b->legacy_io->attr.name = "legacy_io";
1084 b->legacy_io->size = 0xffff;
1085 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1086 b->legacy_io->read = pci_read_legacy_io;
1087 b->legacy_io->write = pci_write_legacy_io;
1088 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 1089 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
1090 error = device_create_bin_file(&b->dev, b->legacy_io);
1091 if (error)
1092 goto legacy_io_err;
1093
1094 /* Allocated above after the legacy_io struct */
1095 b->legacy_mem = b->legacy_io + 1;
6757eca3 1096 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
1097 b->legacy_mem->attr.name = "legacy_mem";
1098 b->legacy_mem->size = 1024*1024;
1099 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1100 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 1101 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
1102 error = device_create_bin_file(&b->dev, b->legacy_mem);
1103 if (error)
1104 goto legacy_mem_err;
1105
1106 return;
1107
1108legacy_mem_err:
1109 device_remove_bin_file(&b->dev, b->legacy_io);
1110legacy_io_err:
1111 kfree(b->legacy_io);
1112 b->legacy_io = NULL;
1113kzalloc_err:
7db4af43 1114 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
f19aeb1f
BH
1115}
1116
1117void pci_remove_legacy_files(struct pci_bus *b)
1118{
1119 if (b->legacy_io) {
1120 device_remove_bin_file(&b->dev, b->legacy_io);
1121 device_remove_bin_file(&b->dev, b->legacy_mem);
1122 kfree(b->legacy_io); /* both are allocated here */
1123 }
1da177e4
LT
1124}
1125#endif /* HAVE_PCI_LEGACY */
1126
f7195824 1127#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
b5ff7df3 1128
3b519e4e
MW
1129int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1130 enum pci_mmap_api mmap_api)
b5ff7df3 1131{
6bccc7f4
DW
1132 unsigned long nr, start, size;
1133 resource_size_t pci_start = 0, pci_end;
b5ff7df3 1134
3b519e4e
MW
1135 if (pci_resource_len(pdev, resno) == 0)
1136 return 0;
64b00175 1137 nr = vma_pages(vma);
b5ff7df3 1138 start = vma->vm_pgoff;
88e7df0b 1139 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
6bccc7f4
DW
1140 if (mmap_api == PCI_MMAP_PROCFS) {
1141 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1142 &pci_start, &pci_end);
1143 pci_start >>= PAGE_SHIFT;
1144 }
3b519e4e
MW
1145 if (start >= pci_start && start < pci_start + size &&
1146 start + nr <= pci_start + size)
b5ff7df3 1147 return 1;
b5ff7df3
LT
1148 return 0;
1149}
1150
1da177e4
LT
1151/**
1152 * pci_mmap_resource - map a PCI resource into user memory space
1153 * @kobj: kobject for mapping
1154 * @attr: struct bin_attribute for the file being mapped
1155 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 1156 * @write_combine: 1 for write_combine mapping
1da177e4
LT
1157 *
1158 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4 1159 */
3c78bc61
RD
1160static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1161 struct vm_area_struct *vma, int write_combine)
1da177e4 1162{
554a6037 1163 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1164 int bar = (unsigned long)attr->private;
1da177e4 1165 enum pci_mmap_state mmap_type;
dca40b18 1166 struct resource *res = &pdev->resource[bar];
2311b1f2 1167
ca620723
BH
1168 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1169 return -EINVAL;
1170
7a094909 1171 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
b5ff7df3 1172 return -EINVAL;
7a094909 1173
1da177e4 1174 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
f7195824
DW
1175
1176 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
45aec1ae 1177}
1178
3c78bc61
RD
1179static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1180 struct bin_attribute *attr,
1181 struct vm_area_struct *vma)
45aec1ae 1182{
1183 return pci_mmap_resource(kobj, attr, vma, 0);
1184}
1185
3c78bc61
RD
1186static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1187 struct bin_attribute *attr,
1188 struct vm_area_struct *vma)
45aec1ae 1189{
1190 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
1191}
1192
3c78bc61
RD
1193static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1194 struct bin_attribute *attr, char *buf,
1195 loff_t off, size_t count, bool write)
8633328b 1196{
554a6037 1197 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
dca40b18 1198 int bar = (unsigned long)attr->private;
8633328b 1199 unsigned long port = off;
8633328b 1200
dca40b18 1201 port += pci_resource_start(pdev, bar);
8633328b 1202
dca40b18 1203 if (port > pci_resource_end(pdev, bar))
8633328b
AW
1204 return 0;
1205
dca40b18 1206 if (port + count - 1 > pci_resource_end(pdev, bar))
8633328b
AW
1207 return -EINVAL;
1208
1209 switch (count) {
1210 case 1:
1211 if (write)
1212 outb(*(u8 *)buf, port);
1213 else
1214 *(u8 *)buf = inb(port);
1215 return 1;
1216 case 2:
1217 if (write)
1218 outw(*(u16 *)buf, port);
1219 else
1220 *(u16 *)buf = inw(port);
1221 return 2;
1222 case 4:
1223 if (write)
1224 outl(*(u32 *)buf, port);
1225 else
1226 *(u32 *)buf = inl(port);
1227 return 4;
1228 }
1229 return -EINVAL;
1230}
1231
3c78bc61
RD
1232static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1233 struct bin_attribute *attr, char *buf,
1234 loff_t off, size_t count)
8633328b
AW
1235{
1236 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1237}
1238
3c78bc61
RD
1239static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1240 struct bin_attribute *attr, char *buf,
1241 loff_t off, size_t count)
8633328b
AW
1242{
1243 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1244}
1245
b19441af
GKH
1246/**
1247 * pci_remove_resource_files - cleanup resource files
cffb2faf 1248 * @pdev: dev to cleanup
b19441af 1249 *
cffb2faf 1250 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1251 * free their resources.
1252 */
3c78bc61 1253static void pci_remove_resource_files(struct pci_dev *pdev)
b19441af
GKH
1254{
1255 int i;
1256
1257 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1258 struct bin_attribute *res_attr;
1259
1260 res_attr = pdev->res_attr[i];
1261 if (res_attr) {
1262 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1263 kfree(res_attr);
1264 }
45aec1ae 1265
1266 res_attr = pdev->res_attr_wc[i];
1267 if (res_attr) {
1268 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1269 kfree(res_attr);
1270 }
b19441af
GKH
1271 }
1272}
1273
45aec1ae 1274static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1275{
1276 /* allocate attribute structure, piggyback attribute name */
1277 int name_len = write_combine ? 13 : 10;
1278 struct bin_attribute *res_attr;
bd5174df 1279 char *res_attr_name;
45aec1ae 1280 int retval;
1281
1282 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
bd5174df
BH
1283 if (!res_attr)
1284 return -ENOMEM;
1285
1286 res_attr_name = (char *)(res_attr + 1);
1287
1288 sysfs_bin_attr_init(res_attr);
1289 if (write_combine) {
1290 pdev->res_attr_wc[num] = res_attr;
1291 sprintf(res_attr_name, "resource%d_wc", num);
1292 res_attr->mmap = pci_mmap_resource_wc;
1293 } else {
1294 pdev->res_attr[num] = res_attr;
1295 sprintf(res_attr_name, "resource%d", num);
e854d8b2
DW
1296 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1297 res_attr->read = pci_read_resource_io;
1298 res_attr->write = pci_write_resource_io;
1299 if (arch_can_pci_mmap_io())
1300 res_attr->mmap = pci_mmap_resource_uc;
1301 } else {
1302 res_attr->mmap = pci_mmap_resource_uc;
1303 }
bd5174df
BH
1304 }
1305 res_attr->attr.name = res_attr_name;
1306 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1307 res_attr->size = pci_resource_len(pdev, num);
dca40b18 1308 res_attr->private = (void *)(unsigned long)num;
bd5174df
BH
1309 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1310 if (retval)
1311 kfree(res_attr);
45aec1ae 1312
1313 return retval;
1314}
1315
1da177e4
LT
1316/**
1317 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1318 * @pdev: dev in question
1da177e4 1319 *
cffb2faf 1320 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1321 */
b19441af 1322static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1323{
1324 int i;
b19441af 1325 int retval;
1da177e4
LT
1326
1327 /* Expose the PCI resources from this device as files */
1328 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1329
1330 /* skip empty resources */
1331 if (!pci_resource_len(pdev, i))
1332 continue;
1333
45aec1ae 1334 retval = pci_create_attr(pdev, i, 0);
1335 /* for prefetchable resources, create a WC mappable file */
ae749c7a
DW
1336 if (!retval && arch_can_pci_mmap_wc() &&
1337 pdev->resource[i].flags & IORESOURCE_PREFETCH)
45aec1ae 1338 retval = pci_create_attr(pdev, i, 1);
45aec1ae 1339 if (retval) {
1340 pci_remove_resource_files(pdev);
1341 return retval;
1da177e4
LT
1342 }
1343 }
b19441af 1344 return 0;
1da177e4
LT
1345}
1346#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1347int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1348void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1349#endif /* HAVE_PCI_MMAP */
1350
1351/**
1352 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1353 * @filp: sysfs file
1da177e4 1354 * @kobj: kernel object handle
cffb2faf 1355 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1356 * @buf: user input
1357 * @off: file offset
1358 * @count: number of byte in input
1359 *
1360 * writing anything except 0 enables it
1361 */
3c78bc61
RD
1362static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1363 struct bin_attribute *bin_attr, char *buf,
1364 loff_t off, size_t count)
1da177e4 1365{
554a6037 1366 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1367
1368 if ((off == 0) && (*buf == '0') && (count == 2))
1369 pdev->rom_attr_enabled = 0;
1370 else
1371 pdev->rom_attr_enabled = 1;
1372
1373 return count;
1374}
1375
1376/**
1377 * pci_read_rom - read a PCI ROM
2c3c8bea 1378 * @filp: sysfs file
1da177e4 1379 * @kobj: kernel object handle
cffb2faf 1380 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1381 * @buf: where to put the data we read from the ROM
1382 * @off: file offset
1383 * @count: number of bytes to read
1384 *
1385 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1386 * device corresponding to @kobj.
1387 */
3c78bc61
RD
1388static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1389 struct bin_attribute *bin_attr, char *buf,
1390 loff_t off, size_t count)
1da177e4 1391{
554a6037 1392 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1da177e4
LT
1393 void __iomem *rom;
1394 size_t size;
1395
1396 if (!pdev->rom_attr_enabled)
1397 return -EINVAL;
f7625980 1398
1da177e4 1399 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1400 if (!rom || !size)
1401 return -EIO;
f7625980 1402
1da177e4
LT
1403 if (off >= size)
1404 count = 0;
1405 else {
1406 if (off + count > size)
1407 count = size - off;
f7625980 1408
1da177e4
LT
1409 memcpy_fromio(buf, rom + off, count);
1410 }
1411 pci_unmap_rom(pdev, rom);
f7625980 1412
1da177e4
LT
1413 return count;
1414}
1415
8bdc50ac 1416static const struct bin_attribute pci_config_attr = {
1da177e4
LT
1417 .attr = {
1418 .name = "config",
1419 .mode = S_IRUGO | S_IWUSR,
1da177e4 1420 },
557848c3 1421 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1422 .read = pci_read_config,
1423 .write = pci_write_config,
1424};
1425
8bdc50ac 1426static const struct bin_attribute pcie_config_attr = {
1da177e4
LT
1427 .attr = {
1428 .name = "config",
1429 .mode = S_IRUGO | S_IWUSR,
1da177e4 1430 },
557848c3 1431 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1432 .read = pci_read_config,
1433 .write = pci_write_config,
1434};
1435
3c78bc61
RD
1436static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1437 const char *buf, size_t count)
711d5779
MT
1438{
1439 struct pci_dev *pdev = to_pci_dev(dev);
1440 unsigned long val;
9a994e8e 1441 ssize_t result = kstrtoul(buf, 0, &val);
711d5779
MT
1442
1443 if (result < 0)
1444 return result;
1445
1446 if (val != 1)
1447 return -EINVAL;
447c5dd7 1448
82c3fbff 1449 pm_runtime_get_sync(dev);
447c5dd7 1450 result = pci_reset_function(pdev);
82c3fbff 1451 pm_runtime_put(dev);
447c5dd7
MS
1452 if (result < 0)
1453 return result;
1454
1455 return count;
711d5779
MT
1456}
1457
1458static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1459
280c73d3
ZY
1460static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1461{
1462 int retval;
280c73d3 1463
b1c615c4 1464 pcie_vpd_create_sysfs_dev_files(dev);
280c73d3
ZY
1465 pcie_aspm_create_sysfs_dev_files(dev);
1466
5b0764ca 1467 if (dev->reset_fn) {
711d5779
MT
1468 retval = device_create_file(&dev->dev, &reset_attr);
1469 if (retval)
1470 goto error;
711d5779 1471 }
280c73d3 1472 return 0;
711d5779
MT
1473
1474error:
1475 pcie_aspm_remove_sysfs_dev_files(dev);
b1c615c4 1476 pcie_vpd_remove_sysfs_dev_files(dev);
711d5779 1477 return retval;
280c73d3
ZY
1478}
1479
3c78bc61 1480int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1da177e4 1481{
b19441af 1482 int retval;
ac0c302a 1483 int rom_size;
280c73d3 1484 struct bin_attribute *attr;
b19441af 1485
1da177e4
LT
1486 if (!sysfs_initialized)
1487 return -EACCES;
1488
c20aecf6 1489 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1490 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1491 else
1492 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1493 if (retval)
1494 goto err;
1da177e4 1495
b19441af
GKH
1496 retval = pci_create_resource_files(pdev);
1497 if (retval)
280c73d3
ZY
1498 goto err_config_file;
1499
1da177e4 1500 /* If the device has a ROM, try to expose it in sysfs. */
ac0c302a 1501 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
280c73d3 1502 if (rom_size) {
94e61088 1503 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1504 if (!attr) {
b19441af 1505 retval = -ENOMEM;
9890b12a 1506 goto err_resource_files;
1da177e4 1507 }
a07e4156 1508 sysfs_bin_attr_init(attr);
280c73d3
ZY
1509 attr->size = rom_size;
1510 attr->attr.name = "rom";
ff29530e 1511 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1512 attr->read = pci_read_rom;
1513 attr->write = pci_write_rom;
1514 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1515 if (retval) {
1516 kfree(attr);
1517 goto err_resource_files;
1518 }
1519 pdev->rom_attr = attr;
1da177e4 1520 }
280c73d3 1521
280c73d3
ZY
1522 /* add sysfs entries for various capabilities */
1523 retval = pci_create_capabilities_sysfs(pdev);
1524 if (retval)
625e1d59 1525 goto err_rom_file;
7d715a6c 1526
911e1c9b
N
1527 pci_create_firmware_label_files(pdev);
1528
1da177e4 1529 return 0;
b19441af 1530
a2cd52ca 1531err_rom_file:
9d88b93b 1532 if (pdev->rom_attr) {
94e61088 1533 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1534 kfree(pdev->rom_attr);
1535 pdev->rom_attr = NULL;
1536 }
9890b12a
ME
1537err_resource_files:
1538 pci_remove_resource_files(pdev);
94e61088 1539err_config_file:
c20aecf6 1540 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
b19441af 1541 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1542 else
1543 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
b19441af
GKH
1544err:
1545 return retval;
1da177e4
LT
1546}
1547
280c73d3
ZY
1548static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1549{
b1c615c4 1550 pcie_vpd_remove_sysfs_dev_files(dev);
280c73d3 1551 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1552 if (dev->reset_fn) {
1553 device_remove_file(&dev->dev, &reset_attr);
1554 dev->reset_fn = 0;
1555 }
280c73d3
ZY
1556}
1557
1da177e4
LT
1558/**
1559 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1560 * @pdev: device whose entries we should free
1561 *
1562 * Cleanup when @pdev is removed from sysfs.
1563 */
1564void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1565{
d67afe5e
DM
1566 if (!sysfs_initialized)
1567 return;
1568
280c73d3 1569 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1570
c20aecf6 1571 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1da177e4 1572 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
c20aecf6
JM
1573 else
1574 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4
LT
1575
1576 pci_remove_resource_files(pdev);
1577
9d88b93b 1578 if (pdev->rom_attr) {
280c73d3
ZY
1579 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1580 kfree(pdev->rom_attr);
9d88b93b 1581 pdev->rom_attr = NULL;
1da177e4 1582 }
911e1c9b
N
1583
1584 pci_remove_firmware_label_files(pdev);
1da177e4
LT
1585}
1586
1587static int __init pci_sysfs_init(void)
1588{
1589 struct pci_dev *pdev = NULL;
b19441af
GKH
1590 int retval;
1591
1da177e4 1592 sysfs_initialized = 1;
b19441af
GKH
1593 for_each_pci_dev(pdev) {
1594 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1595 if (retval) {
1596 pci_dev_put(pdev);
b19441af 1597 return retval;
151fc5df 1598 }
b19441af 1599 }
1da177e4
LT
1600
1601 return 0;
1602}
40ee9e9f 1603late_initcall(pci_sysfs_init);
4e15c46b
YL
1604
1605static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1606 &vga_attr.attr,
4e15c46b
YL
1607 NULL,
1608};
1609
1610static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
3c78bc61 1611 struct attribute *a, int n)
4e15c46b 1612{
554a6037 1613 struct device *dev = kobj_to_dev(kobj);
625e1d59
YL
1614 struct pci_dev *pdev = to_pci_dev(dev);
1615
1616 if (a == &vga_attr.attr)
1617 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1618 return 0;
1619
4e15c46b
YL
1620 return a->mode;
1621}
1622
dfab88be
JL
1623static struct attribute *pci_dev_hp_attrs[] = {
1624 &dev_remove_attr.attr,
1625 &dev_rescan_attr.attr,
1626 NULL,
1627};
1628
1629static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
3c78bc61 1630 struct attribute *a, int n)
dfab88be 1631{
554a6037 1632 struct device *dev = kobj_to_dev(kobj);
dfab88be
JL
1633 struct pci_dev *pdev = to_pci_dev(dev);
1634
1635 if (pdev->is_virtfn)
1636 return 0;
1637
1638 return a->mode;
1639}
1640
56c1af46
WVK
1641static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1642 struct attribute *a, int n)
1643{
1644 struct device *dev = kobj_to_dev(kobj);
1645 struct pci_dev *pdev = to_pci_dev(dev);
1646
1647 if (pci_is_bridge(pdev))
1648 return a->mode;
1649
1650 return 0;
1651}
1652
1653static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1654 struct attribute *a, int n)
1655{
1656 struct device *dev = kobj_to_dev(kobj);
1657 struct pci_dev *pdev = to_pci_dev(dev);
1658
1659 if (pci_is_pcie(pdev))
1660 return a->mode;
1661
1662 return 0;
1663}
1664
1665static const struct attribute_group pci_dev_group = {
1666 .attrs = pci_dev_attrs,
1667};
1668
1669const struct attribute_group *pci_dev_groups[] = {
1670 &pci_dev_group,
1671 NULL,
1672};
1673
1674static const struct attribute_group pci_bridge_group = {
1675 .attrs = pci_bridge_attrs,
1676};
1677
1678const struct attribute_group *pci_bridge_groups[] = {
1679 &pci_bridge_group,
1680 NULL,
1681};
1682
1683static const struct attribute_group pcie_dev_group = {
1684 .attrs = pcie_dev_attrs,
1685};
1686
1687const struct attribute_group *pcie_dev_groups[] = {
1688 &pcie_dev_group,
1689 NULL,
1690};
1691
e7ea9825 1692static const struct attribute_group pci_dev_hp_attr_group = {
dfab88be
JL
1693 .attrs = pci_dev_hp_attrs,
1694 .is_visible = pci_dev_hp_attrs_are_visible,
1695};
1696
1789382a
DD
1697#ifdef CONFIG_PCI_IOV
1698static struct attribute *sriov_dev_attrs[] = {
1699 &sriov_totalvfs_attr.attr,
1700 &sriov_numvfs_attr.attr,
7dfca152
FS
1701 &sriov_offset_attr.attr,
1702 &sriov_stride_attr.attr,
1703 &sriov_vf_device_attr.attr,
0e7df224 1704 &sriov_drivers_autoprobe_attr.attr,
1789382a
DD
1705 NULL,
1706};
1707
1708static umode_t sriov_attrs_are_visible(struct kobject *kobj,
3c78bc61 1709 struct attribute *a, int n)
1789382a 1710{
554a6037 1711 struct device *dev = kobj_to_dev(kobj);
1789382a
DD
1712
1713 if (!dev_is_pf(dev))
1714 return 0;
1715
1716 return a->mode;
1717}
1718
e7ea9825 1719static const struct attribute_group sriov_dev_attr_group = {
1789382a
DD
1720 .attrs = sriov_dev_attrs,
1721 .is_visible = sriov_attrs_are_visible,
1722};
1723#endif /* CONFIG_PCI_IOV */
1724
e7ea9825 1725static const struct attribute_group pci_dev_attr_group = {
4e15c46b
YL
1726 .attrs = pci_dev_dev_attrs,
1727 .is_visible = pci_dev_attrs_are_visible,
1728};
1729
e7ea9825 1730static const struct attribute_group pci_bridge_attr_group = {
56c1af46
WVK
1731 .attrs = pci_bridge_attrs,
1732 .is_visible = pci_bridge_attrs_are_visible,
1733};
1734
e7ea9825 1735static const struct attribute_group pcie_dev_attr_group = {
56c1af46
WVK
1736 .attrs = pcie_dev_attrs,
1737 .is_visible = pcie_dev_attrs_are_visible,
1738};
1739
4e15c46b
YL
1740static const struct attribute_group *pci_dev_attr_groups[] = {
1741 &pci_dev_attr_group,
dfab88be 1742 &pci_dev_hp_attr_group,
1789382a
DD
1743#ifdef CONFIG_PCI_IOV
1744 &sriov_dev_attr_group,
1745#endif
56c1af46
WVK
1746 &pci_bridge_attr_group,
1747 &pcie_dev_attr_group,
81aa5206
RJ
1748#ifdef CONFIG_PCIEAER
1749 &aer_stats_attr_group,
1750#endif
4e15c46b
YL
1751 NULL,
1752};
1753
69f2dc24 1754const struct device_type pci_dev_type = {
4e15c46b
YL
1755 .groups = pci_dev_attr_groups,
1756};