Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> |
4 | * (C) Copyright 2002-2004 IBM Corp. | |
5 | * (C) Copyright 2003 Matthew Wilcox | |
6 | * (C) Copyright 2003 Hewlett-Packard | |
7 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
8 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
9 | * | |
10 | * File attributes for PCI devices | |
11 | * | |
f7625980 | 12 | * Modeled after usb's driverfs.c |
1da177e4 LT |
13 | */ |
14 | ||
d1f9b39d | 15 | #include <linux/bitfield.h> |
1da177e4 | 16 | #include <linux/kernel.h> |
b5ff7df3 | 17 | #include <linux/sched.h> |
1da177e4 LT |
18 | #include <linux/pci.h> |
19 | #include <linux/stat.h> | |
363c75db | 20 | #include <linux/export.h> |
1da177e4 LT |
21 | #include <linux/topology.h> |
22 | #include <linux/mm.h> | |
de139a33 | 23 | #include <linux/fs.h> |
aa0ac365 | 24 | #include <linux/capability.h> |
a628e7b8 | 25 | #include <linux/security.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
1a39b310 | 27 | #include <linux/vgaarb.h> |
448bd857 | 28 | #include <linux/pm_runtime.h> |
ac8e3cef | 29 | #include <linux/msi.h> |
dfc73e7a | 30 | #include <linux/of.h> |
91fa1277 | 31 | #include <linux/aperture.h> |
1da177e4 LT |
32 | #include "pci.h" |
33 | ||
34 | static int sysfs_initialized; /* = 0 */ | |
35 | ||
36 | /* show configuration fields */ | |
37 | #define pci_config_attr(field, format_string) \ | |
38 | static ssize_t \ | |
e404e274 | 39 | field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
40 | { \ |
41 | struct pci_dev *pdev; \ | |
42 | \ | |
3c78bc61 | 43 | pdev = to_pci_dev(dev); \ |
ad025f8e | 44 | return sysfs_emit(buf, format_string, pdev->field); \ |
5136b2da GKH |
45 | } \ |
46 | static DEVICE_ATTR_RO(field) | |
1da177e4 LT |
47 | |
48 | pci_config_attr(vendor, "0x%04x\n"); | |
49 | pci_config_attr(device, "0x%04x\n"); | |
50 | pci_config_attr(subsystem_vendor, "0x%04x\n"); | |
51 | pci_config_attr(subsystem_device, "0x%04x\n"); | |
702ed3be | 52 | pci_config_attr(revision, "0x%02x\n"); |
1da177e4 | 53 | pci_config_attr(class, "0x%06x\n"); |
ac8e3cef BS |
54 | |
55 | static ssize_t irq_show(struct device *dev, | |
56 | struct device_attribute *attr, | |
57 | char *buf) | |
58 | { | |
59 | struct pci_dev *pdev = to_pci_dev(dev); | |
60 | ||
61 | #ifdef CONFIG_PCI_MSI | |
62 | /* | |
63 | * For MSI, show the first MSI IRQ; for all other cases including | |
64 | * MSI-X, show the legacy INTx IRQ. | |
65 | */ | |
793c5006 TG |
66 | if (pdev->msi_enabled) |
67 | return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0)); | |
ac8e3cef BS |
68 | #endif |
69 | ||
70 | return sysfs_emit(buf, "%u\n", pdev->irq); | |
71 | } | |
72 | static DEVICE_ATTR_RO(irq); | |
1da177e4 | 73 | |
bdee9d98 DT |
74 | static ssize_t broken_parity_status_show(struct device *dev, |
75 | struct device_attribute *attr, | |
76 | char *buf) | |
77 | { | |
78 | struct pci_dev *pdev = to_pci_dev(dev); | |
ad025f8e | 79 | return sysfs_emit(buf, "%u\n", pdev->broken_parity_status); |
bdee9d98 DT |
80 | } |
81 | ||
82 | static ssize_t broken_parity_status_store(struct device *dev, | |
83 | struct device_attribute *attr, | |
84 | const char *buf, size_t count) | |
85 | { | |
86 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 87 | unsigned long val; |
bdee9d98 | 88 | |
9a994e8e | 89 | if (kstrtoul(buf, 0, &val) < 0) |
92425a40 TP |
90 | return -EINVAL; |
91 | ||
92 | pdev->broken_parity_status = !!val; | |
93 | ||
94 | return count; | |
bdee9d98 | 95 | } |
5136b2da | 96 | static DEVICE_ATTR_RW(broken_parity_status); |
bdee9d98 | 97 | |
5aaba363 | 98 | static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, |
3c78bc61 | 99 | struct device_attribute *attr, char *buf) |
c489f5fb | 100 | { |
3be83050 | 101 | const struct cpumask *mask; |
4327edf6 | 102 | |
e0cd5160 | 103 | #ifdef CONFIG_NUMA |
cee0ad4a MG |
104 | if (dev_to_node(dev) == NUMA_NO_NODE) |
105 | mask = cpu_online_mask; | |
106 | else | |
107 | mask = cpumask_of_node(dev_to_node(dev)); | |
e0cd5160 | 108 | #else |
3be83050 | 109 | mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); |
e0cd5160 | 110 | #endif |
5aaba363 | 111 | return cpumap_print_to_pagebuf(list, buf, mask); |
39106dcf MT |
112 | } |
113 | ||
c489f5fb | 114 | static ssize_t local_cpus_show(struct device *dev, |
3c78bc61 | 115 | struct device_attribute *attr, char *buf) |
c489f5fb | 116 | { |
5aaba363 | 117 | return pci_dev_show_local_cpu(dev, false, attr, buf); |
c489f5fb | 118 | } |
5136b2da | 119 | static DEVICE_ATTR_RO(local_cpus); |
39106dcf MT |
120 | |
121 | static ssize_t local_cpulist_show(struct device *dev, | |
3c78bc61 | 122 | struct device_attribute *attr, char *buf) |
39106dcf | 123 | { |
5aaba363 | 124 | return pci_dev_show_local_cpu(dev, true, attr, buf); |
1da177e4 | 125 | } |
5136b2da | 126 | static DEVICE_ATTR_RO(local_cpulist); |
1da177e4 | 127 | |
dc2c2c9d YL |
128 | /* |
129 | * PCI Bus Class Devices | |
130 | */ | |
56039e65 GKH |
131 | static ssize_t cpuaffinity_show(struct device *dev, |
132 | struct device_attribute *attr, char *buf) | |
dc2c2c9d | 133 | { |
5aaba363 SH |
134 | const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); |
135 | ||
136 | return cpumap_print_to_pagebuf(false, buf, cpumask); | |
dc2c2c9d | 137 | } |
56039e65 | 138 | static DEVICE_ATTR_RO(cpuaffinity); |
dc2c2c9d | 139 | |
56039e65 GKH |
140 | static ssize_t cpulistaffinity_show(struct device *dev, |
141 | struct device_attribute *attr, char *buf) | |
dc2c2c9d | 142 | { |
5aaba363 SH |
143 | const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); |
144 | ||
145 | return cpumap_print_to_pagebuf(true, buf, cpumask); | |
dc2c2c9d | 146 | } |
56039e65 | 147 | static DEVICE_ATTR_RO(cpulistaffinity); |
dc2c2c9d | 148 | |
80a129af ML |
149 | static ssize_t power_state_show(struct device *dev, |
150 | struct device_attribute *attr, char *buf) | |
151 | { | |
152 | struct pci_dev *pdev = to_pci_dev(dev); | |
153 | ||
ad025f8e | 154 | return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state)); |
80a129af ML |
155 | } |
156 | static DEVICE_ATTR_RO(power_state); | |
157 | ||
1da177e4 | 158 | /* show resources */ |
3c78bc61 RD |
159 | static ssize_t resource_show(struct device *dev, struct device_attribute *attr, |
160 | char *buf) | |
1da177e4 | 161 | { |
3c78bc61 | 162 | struct pci_dev *pci_dev = to_pci_dev(dev); |
1da177e4 | 163 | int i; |
fde09c6d | 164 | int max; |
e31dd6e4 | 165 | resource_size_t start, end; |
ad025f8e | 166 | size_t len = 0; |
1da177e4 LT |
167 | |
168 | if (pci_dev->subordinate) | |
169 | max = DEVICE_COUNT_RESOURCE; | |
fde09c6d YZ |
170 | else |
171 | max = PCI_BRIDGE_RESOURCES; | |
1da177e4 LT |
172 | |
173 | for (i = 0; i < max; i++) { | |
2311b1f2 ME |
174 | struct resource *res = &pci_dev->resource[i]; |
175 | pci_resource_to_user(pci_dev, i, res, &start, &end); | |
ad025f8e KW |
176 | len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n", |
177 | (unsigned long long)start, | |
178 | (unsigned long long)end, | |
179 | (unsigned long long)res->flags); | |
1da177e4 | 180 | } |
ad025f8e | 181 | return len; |
1da177e4 | 182 | } |
5136b2da | 183 | static DEVICE_ATTR_RO(resource); |
1da177e4 | 184 | |
56c1af46 WVK |
185 | static ssize_t max_link_speed_show(struct device *dev, |
186 | struct device_attribute *attr, char *buf) | |
187 | { | |
6cf57be0 | 188 | struct pci_dev *pdev = to_pci_dev(dev); |
56c1af46 | 189 | |
ad025f8e KW |
190 | return sysfs_emit(buf, "%s\n", |
191 | pci_speed_string(pcie_get_speed_cap(pdev))); | |
56c1af46 WVK |
192 | } |
193 | static DEVICE_ATTR_RO(max_link_speed); | |
194 | ||
195 | static ssize_t max_link_width_show(struct device *dev, | |
196 | struct device_attribute *attr, char *buf) | |
197 | { | |
c70b65fb | 198 | struct pci_dev *pdev = to_pci_dev(dev); |
56c1af46 | 199 | |
ad025f8e | 200 | return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); |
56c1af46 WVK |
201 | } |
202 | static DEVICE_ATTR_RO(max_link_width); | |
203 | ||
204 | static ssize_t current_link_speed_show(struct device *dev, | |
205 | struct device_attribute *attr, char *buf) | |
206 | { | |
207 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
208 | u16 linkstat; | |
209 | int err; | |
6348a34d | 210 | enum pci_bus_speed speed; |
56c1af46 WVK |
211 | |
212 | err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); | |
213 | if (err) | |
214 | return -EINVAL; | |
215 | ||
6348a34d | 216 | speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; |
56c1af46 | 217 | |
ad025f8e | 218 | return sysfs_emit(buf, "%s\n", pci_speed_string(speed)); |
56c1af46 WVK |
219 | } |
220 | static DEVICE_ATTR_RO(current_link_speed); | |
221 | ||
222 | static ssize_t current_link_width_show(struct device *dev, | |
223 | struct device_attribute *attr, char *buf) | |
224 | { | |
225 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
226 | u16 linkstat; | |
227 | int err; | |
228 | ||
229 | err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); | |
230 | if (err) | |
231 | return -EINVAL; | |
232 | ||
d1f9b39d | 233 | return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat)); |
56c1af46 WVK |
234 | } |
235 | static DEVICE_ATTR_RO(current_link_width); | |
236 | ||
237 | static ssize_t secondary_bus_number_show(struct device *dev, | |
238 | struct device_attribute *attr, | |
239 | char *buf) | |
240 | { | |
241 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
242 | u8 sec_bus; | |
243 | int err; | |
244 | ||
245 | err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); | |
246 | if (err) | |
247 | return -EINVAL; | |
248 | ||
ad025f8e | 249 | return sysfs_emit(buf, "%u\n", sec_bus); |
56c1af46 WVK |
250 | } |
251 | static DEVICE_ATTR_RO(secondary_bus_number); | |
252 | ||
253 | static ssize_t subordinate_bus_number_show(struct device *dev, | |
254 | struct device_attribute *attr, | |
255 | char *buf) | |
256 | { | |
257 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
258 | u8 sub_bus; | |
259 | int err; | |
260 | ||
261 | err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); | |
262 | if (err) | |
263 | return -EINVAL; | |
264 | ||
ad025f8e | 265 | return sysfs_emit(buf, "%u\n", sub_bus); |
56c1af46 WVK |
266 | } |
267 | static DEVICE_ATTR_RO(subordinate_bus_number); | |
268 | ||
0077a845 SH |
269 | static ssize_t ari_enabled_show(struct device *dev, |
270 | struct device_attribute *attr, | |
271 | char *buf) | |
272 | { | |
273 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
274 | ||
ad025f8e | 275 | return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); |
0077a845 SH |
276 | } |
277 | static DEVICE_ATTR_RO(ari_enabled); | |
278 | ||
3c78bc61 RD |
279 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, |
280 | char *buf) | |
9888549e GK |
281 | { |
282 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
283 | ||
ad025f8e KW |
284 | return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", |
285 | pci_dev->vendor, pci_dev->device, | |
286 | pci_dev->subsystem_vendor, pci_dev->subsystem_device, | |
287 | (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), | |
288 | (u8)(pci_dev->class)); | |
9888549e | 289 | } |
5136b2da | 290 | static DEVICE_ATTR_RO(modalias); |
bae94d02 | 291 | |
d8e7d53a | 292 | static ssize_t enable_store(struct device *dev, struct device_attribute *attr, |
3c78bc61 | 293 | const char *buf, size_t count) |
9f125d30 AV |
294 | { |
295 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 296 | unsigned long val; |
36f354ec | 297 | ssize_t result = 0; |
9f125d30 AV |
298 | |
299 | /* this can crash the machine when done on the "wrong" device */ | |
300 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 301 | return -EPERM; |
9f125d30 | 302 | |
36f354ec KW |
303 | if (kstrtoul(buf, 0, &val) < 0) |
304 | return -EINVAL; | |
95e83e21 | 305 | |
6f5cdfa8 CH |
306 | device_lock(dev); |
307 | if (dev->driver) | |
308 | result = -EBUSY; | |
309 | else if (val) | |
bae94d02 | 310 | result = pci_enable_device(pdev); |
6f5cdfa8 CH |
311 | else if (pci_is_enabled(pdev)) |
312 | pci_disable_device(pdev); | |
313 | else | |
314 | result = -EIO; | |
315 | device_unlock(dev); | |
9f125d30 | 316 | |
bae94d02 IPG |
317 | return result < 0 ? result : count; |
318 | } | |
319 | ||
d8e7d53a | 320 | static ssize_t enable_show(struct device *dev, struct device_attribute *attr, |
3c78bc61 | 321 | char *buf) |
bae94d02 IPG |
322 | { |
323 | struct pci_dev *pdev; | |
9f125d30 | 324 | |
3c78bc61 | 325 | pdev = to_pci_dev(dev); |
ad025f8e | 326 | return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt)); |
9f125d30 | 327 | } |
d8e7d53a | 328 | static DEVICE_ATTR_RW(enable); |
9f125d30 | 329 | |
81bb0e19 | 330 | #ifdef CONFIG_NUMA |
63692df1 PB |
331 | static ssize_t numa_node_store(struct device *dev, |
332 | struct device_attribute *attr, const char *buf, | |
333 | size_t count) | |
334 | { | |
335 | struct pci_dev *pdev = to_pci_dev(dev); | |
36f354ec | 336 | int node; |
63692df1 PB |
337 | |
338 | if (!capable(CAP_SYS_ADMIN)) | |
339 | return -EPERM; | |
340 | ||
36f354ec KW |
341 | if (kstrtoint(buf, 0, &node) < 0) |
342 | return -EINVAL; | |
63692df1 | 343 | |
3dcc8d39 MK |
344 | if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) |
345 | return -EINVAL; | |
346 | ||
347 | if (node != NUMA_NO_NODE && !node_online(node)) | |
63692df1 PB |
348 | return -EINVAL; |
349 | ||
350 | add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); | |
7506dc79 | 351 | pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", |
63692df1 PB |
352 | node); |
353 | ||
354 | dev->numa_node = node; | |
355 | return count; | |
356 | } | |
357 | ||
3c78bc61 RD |
358 | static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, |
359 | char *buf) | |
81bb0e19 | 360 | { |
ad025f8e | 361 | return sysfs_emit(buf, "%d\n", dev->numa_node); |
81bb0e19 | 362 | } |
63692df1 | 363 | static DEVICE_ATTR_RW(numa_node); |
81bb0e19 BG |
364 | #endif |
365 | ||
3c78bc61 RD |
366 | static ssize_t dma_mask_bits_show(struct device *dev, |
367 | struct device_attribute *attr, char *buf) | |
bb965401 YL |
368 | { |
369 | struct pci_dev *pdev = to_pci_dev(dev); | |
370 | ||
ad025f8e | 371 | return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask)); |
bb965401 | 372 | } |
5136b2da | 373 | static DEVICE_ATTR_RO(dma_mask_bits); |
bb965401 | 374 | |
3c78bc61 RD |
375 | static ssize_t consistent_dma_mask_bits_show(struct device *dev, |
376 | struct device_attribute *attr, | |
377 | char *buf) | |
bb965401 | 378 | { |
ad025f8e | 379 | return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask)); |
bb965401 | 380 | } |
5136b2da | 381 | static DEVICE_ATTR_RO(consistent_dma_mask_bits); |
bb965401 | 382 | |
3c78bc61 RD |
383 | static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, |
384 | char *buf) | |
fe97064c BG |
385 | { |
386 | struct pci_dev *pdev = to_pci_dev(dev); | |
468ff15a | 387 | struct pci_bus *subordinate = pdev->subordinate; |
fe97064c | 388 | |
ad025f8e KW |
389 | return sysfs_emit(buf, "%u\n", subordinate ? |
390 | !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) | |
391 | : !pdev->no_msi); | |
fe97064c BG |
392 | } |
393 | ||
3c78bc61 RD |
394 | static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, |
395 | const char *buf, size_t count) | |
fe97064c BG |
396 | { |
397 | struct pci_dev *pdev = to_pci_dev(dev); | |
468ff15a | 398 | struct pci_bus *subordinate = pdev->subordinate; |
92425a40 TP |
399 | unsigned long val; |
400 | ||
fe97064c | 401 | if (!capable(CAP_SYS_ADMIN)) |
92425a40 | 402 | return -EPERM; |
fe97064c | 403 | |
95e83e21 KW |
404 | if (kstrtoul(buf, 0, &val) < 0) |
405 | return -EINVAL; | |
406 | ||
f7625980 | 407 | /* |
468ff15a YW |
408 | * "no_msi" and "bus_flags" only affect what happens when a driver |
409 | * requests MSI or MSI-X. They don't affect any drivers that have | |
410 | * already requested MSI or MSI-X. | |
f7625980 | 411 | */ |
468ff15a YW |
412 | if (!subordinate) { |
413 | pdev->no_msi = !val; | |
7506dc79 | 414 | pci_info(pdev, "MSI/MSI-X %s for future drivers\n", |
468ff15a | 415 | val ? "allowed" : "disallowed"); |
fe97064c | 416 | return count; |
fe97064c BG |
417 | } |
418 | ||
468ff15a YW |
419 | if (val) |
420 | subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; | |
421 | else | |
422 | subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; | |
423 | ||
424 | dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", | |
425 | val ? "allowed" : "disallowed"); | |
fe97064c BG |
426 | return count; |
427 | } | |
5136b2da | 428 | static DEVICE_ATTR_RW(msi_bus); |
9888549e | 429 | |
75cff725 | 430 | static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count) |
705b1aaa AC |
431 | { |
432 | unsigned long val; | |
433 | struct pci_bus *b = NULL; | |
434 | ||
9a994e8e | 435 | if (kstrtoul(buf, 0, &val) < 0) |
705b1aaa AC |
436 | return -EINVAL; |
437 | ||
438 | if (val) { | |
9d16947b | 439 | pci_lock_rescan_remove(); |
705b1aaa AC |
440 | while ((b = pci_find_next_bus(b)) != NULL) |
441 | pci_rescan_bus(b); | |
9d16947b | 442 | pci_unlock_rescan_remove(); |
705b1aaa AC |
443 | } |
444 | return count; | |
445 | } | |
1094f6d0 | 446 | static BUS_ATTR_WO(rescan); |
705b1aaa | 447 | |
bf22c90f | 448 | static struct attribute *pci_bus_attrs[] = { |
0f49ba55 GKH |
449 | &bus_attr_rescan.attr, |
450 | NULL, | |
451 | }; | |
452 | ||
453 | static const struct attribute_group pci_bus_group = { | |
454 | .attrs = pci_bus_attrs, | |
455 | }; | |
456 | ||
457 | const struct attribute_group *pci_bus_groups[] = { | |
458 | &pci_bus_group, | |
459 | NULL, | |
705b1aaa | 460 | }; |
77c27c7b | 461 | |
3c78bc61 RD |
462 | static ssize_t dev_rescan_store(struct device *dev, |
463 | struct device_attribute *attr, const char *buf, | |
464 | size_t count) | |
738a6396 AC |
465 | { |
466 | unsigned long val; | |
467 | struct pci_dev *pdev = to_pci_dev(dev); | |
468 | ||
9a994e8e | 469 | if (kstrtoul(buf, 0, &val) < 0) |
738a6396 AC |
470 | return -EINVAL; |
471 | ||
472 | if (val) { | |
9d16947b | 473 | pci_lock_rescan_remove(); |
738a6396 | 474 | pci_rescan_bus(pdev->bus); |
9d16947b | 475 | pci_unlock_rescan_remove(); |
738a6396 AC |
476 | } |
477 | return count; | |
478 | } | |
bd641fd8 KS |
479 | static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, |
480 | dev_rescan_store); | |
738a6396 | 481 | |
3c78bc61 RD |
482 | static ssize_t remove_store(struct device *dev, struct device_attribute *attr, |
483 | const char *buf, size_t count) | |
77c27c7b | 484 | { |
77c27c7b | 485 | unsigned long val; |
77c27c7b | 486 | |
9a994e8e | 487 | if (kstrtoul(buf, 0, &val) < 0) |
77c27c7b AC |
488 | return -EINVAL; |
489 | ||
bc6caf02 TH |
490 | if (val && device_remove_file_self(dev, attr)) |
491 | pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); | |
77c27c7b AC |
492 | return count; |
493 | } | |
e2154044 | 494 | static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, |
8bdfa145 | 495 | remove_store); |
b9d320fc | 496 | |
4e2b7943 KS |
497 | static ssize_t bus_rescan_store(struct device *dev, |
498 | struct device_attribute *attr, | |
499 | const char *buf, size_t count) | |
b9d320fc YL |
500 | { |
501 | unsigned long val; | |
502 | struct pci_bus *bus = to_pci_bus(dev); | |
503 | ||
9a994e8e | 504 | if (kstrtoul(buf, 0, &val) < 0) |
b9d320fc YL |
505 | return -EINVAL; |
506 | ||
507 | if (val) { | |
9d16947b | 508 | pci_lock_rescan_remove(); |
2f320521 YL |
509 | if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) |
510 | pci_rescan_bus_bridge_resize(bus->self); | |
511 | else | |
512 | pci_rescan_bus(bus); | |
9d16947b | 513 | pci_unlock_rescan_remove(); |
b9d320fc YL |
514 | } |
515 | return count; | |
516 | } | |
bd641fd8 KS |
517 | static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, |
518 | bus_rescan_store); | |
b9d320fc | 519 | |
fbb988be | 520 | #if defined(CONFIG_PM) && defined(CONFIG_ACPI) |
448bd857 HY |
521 | static ssize_t d3cold_allowed_store(struct device *dev, |
522 | struct device_attribute *attr, | |
523 | const char *buf, size_t count) | |
524 | { | |
525 | struct pci_dev *pdev = to_pci_dev(dev); | |
526 | unsigned long val; | |
527 | ||
9a994e8e | 528 | if (kstrtoul(buf, 0, &val) < 0) |
448bd857 HY |
529 | return -EINVAL; |
530 | ||
531 | pdev->d3cold_allowed = !!val; | |
70b70a43 | 532 | pci_bridge_d3_update(pdev); |
9d26d3a8 | 533 | |
448bd857 HY |
534 | pm_runtime_resume(dev); |
535 | ||
536 | return count; | |
537 | } | |
538 | ||
539 | static ssize_t d3cold_allowed_show(struct device *dev, | |
540 | struct device_attribute *attr, char *buf) | |
541 | { | |
542 | struct pci_dev *pdev = to_pci_dev(dev); | |
ad025f8e | 543 | return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); |
448bd857 | 544 | } |
5136b2da | 545 | static DEVICE_ATTR_RW(d3cold_allowed); |
448bd857 HY |
546 | #endif |
547 | ||
dfc73e7a SO |
548 | #ifdef CONFIG_OF |
549 | static ssize_t devspec_show(struct device *dev, | |
550 | struct device_attribute *attr, char *buf) | |
551 | { | |
552 | struct pci_dev *pdev = to_pci_dev(dev); | |
553 | struct device_node *np = pci_device_to_OF_node(pdev); | |
554 | ||
b63773a8 | 555 | if (np == NULL) |
dfc73e7a | 556 | return 0; |
14c19b2a | 557 | return sysfs_emit(buf, "%pOF\n", np); |
dfc73e7a SO |
558 | } |
559 | static DEVICE_ATTR_RO(devspec); | |
560 | #endif | |
561 | ||
782a985d AW |
562 | static ssize_t driver_override_store(struct device *dev, |
563 | struct device_attribute *attr, | |
564 | const char *buf, size_t count) | |
565 | { | |
566 | struct pci_dev *pdev = to_pci_dev(dev); | |
23d99baf | 567 | int ret; |
782a985d | 568 | |
23d99baf KK |
569 | ret = driver_set_override(dev, &pdev->driver_override, buf, count); |
570 | if (ret) | |
571 | return ret; | |
782a985d AW |
572 | |
573 | return count; | |
574 | } | |
575 | ||
576 | static ssize_t driver_override_show(struct device *dev, | |
577 | struct device_attribute *attr, char *buf) | |
578 | { | |
579 | struct pci_dev *pdev = to_pci_dev(dev); | |
9561475d | 580 | ssize_t len; |
782a985d | 581 | |
9561475d | 582 | device_lock(dev); |
ad025f8e | 583 | len = sysfs_emit(buf, "%s\n", pdev->driver_override); |
9561475d NS |
584 | device_unlock(dev); |
585 | return len; | |
782a985d AW |
586 | } |
587 | static DEVICE_ATTR_RW(driver_override); | |
588 | ||
bf22c90f | 589 | static struct attribute *pci_dev_attrs[] = { |
80a129af | 590 | &dev_attr_power_state.attr, |
5136b2da GKH |
591 | &dev_attr_resource.attr, |
592 | &dev_attr_vendor.attr, | |
593 | &dev_attr_device.attr, | |
594 | &dev_attr_subsystem_vendor.attr, | |
595 | &dev_attr_subsystem_device.attr, | |
702ed3be | 596 | &dev_attr_revision.attr, |
5136b2da GKH |
597 | &dev_attr_class.attr, |
598 | &dev_attr_irq.attr, | |
599 | &dev_attr_local_cpus.attr, | |
600 | &dev_attr_local_cpulist.attr, | |
601 | &dev_attr_modalias.attr, | |
81bb0e19 | 602 | #ifdef CONFIG_NUMA |
5136b2da | 603 | &dev_attr_numa_node.attr, |
81bb0e19 | 604 | #endif |
5136b2da GKH |
605 | &dev_attr_dma_mask_bits.attr, |
606 | &dev_attr_consistent_dma_mask_bits.attr, | |
d8e7d53a | 607 | &dev_attr_enable.attr, |
5136b2da GKH |
608 | &dev_attr_broken_parity_status.attr, |
609 | &dev_attr_msi_bus.attr, | |
fbb988be | 610 | #if defined(CONFIG_PM) && defined(CONFIG_ACPI) |
5136b2da | 611 | &dev_attr_d3cold_allowed.attr, |
dfc73e7a SO |
612 | #endif |
613 | #ifdef CONFIG_OF | |
614 | &dev_attr_devspec.attr, | |
77c27c7b | 615 | #endif |
782a985d | 616 | &dev_attr_driver_override.attr, |
0077a845 | 617 | &dev_attr_ari_enabled.attr, |
5136b2da GKH |
618 | NULL, |
619 | }; | |
620 | ||
56c1af46 WVK |
621 | static struct attribute *pci_bridge_attrs[] = { |
622 | &dev_attr_subordinate_bus_number.attr, | |
623 | &dev_attr_secondary_bus_number.attr, | |
624 | NULL, | |
5136b2da GKH |
625 | }; |
626 | ||
56c1af46 WVK |
627 | static struct attribute *pcie_dev_attrs[] = { |
628 | &dev_attr_current_link_speed.attr, | |
629 | &dev_attr_current_link_width.attr, | |
630 | &dev_attr_max_link_width.attr, | |
631 | &dev_attr_max_link_speed.attr, | |
5136b2da | 632 | NULL, |
1da177e4 LT |
633 | }; |
634 | ||
56039e65 | 635 | static struct attribute *pcibus_attrs[] = { |
8bdfa145 | 636 | &dev_attr_bus_rescan.attr, |
56039e65 GKH |
637 | &dev_attr_cpuaffinity.attr, |
638 | &dev_attr_cpulistaffinity.attr, | |
639 | NULL, | |
640 | }; | |
641 | ||
642 | static const struct attribute_group pcibus_group = { | |
643 | .attrs = pcibus_attrs, | |
644 | }; | |
645 | ||
646 | const struct attribute_group *pcibus_groups[] = { | |
647 | &pcibus_group, | |
648 | NULL, | |
b9d320fc YL |
649 | }; |
650 | ||
3c78bc61 RD |
651 | static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, |
652 | char *buf) | |
217f45de DA |
653 | { |
654 | struct pci_dev *pdev = to_pci_dev(dev); | |
1a39b310 MG |
655 | struct pci_dev *vga_dev = vga_default_device(); |
656 | ||
657 | if (vga_dev) | |
ad025f8e | 658 | return sysfs_emit(buf, "%u\n", (pdev == vga_dev)); |
217f45de | 659 | |
ad025f8e KW |
660 | return sysfs_emit(buf, "%u\n", |
661 | !!(pdev->resource[PCI_ROM_RESOURCE].flags & | |
662 | IORESOURCE_ROM_SHADOW)); | |
217f45de | 663 | } |
8bdfa145 | 664 | static DEVICE_ATTR_RO(boot_vga); |
217f45de | 665 | |
3c78bc61 RD |
666 | static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, |
667 | struct bin_attribute *bin_attr, char *buf, | |
668 | loff_t off, size_t count) | |
1da177e4 | 669 | { |
554a6037 | 670 | struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
671 | unsigned int size = 64; |
672 | loff_t init_off = off; | |
3c78bc61 | 673 | u8 *data = (u8 *) buf; |
1da177e4 LT |
674 | |
675 | /* Several chips lock up trying to read undefined config space */ | |
ab0fa82b | 676 | if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) |
1da177e4 | 677 | size = dev->cfg_size; |
3c78bc61 | 678 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
1da177e4 | 679 | size = 128; |
1da177e4 LT |
680 | |
681 | if (off > size) | |
682 | return 0; | |
683 | if (off + count > size) { | |
684 | size -= off; | |
685 | count = size; | |
686 | } else { | |
687 | size = count; | |
688 | } | |
689 | ||
3d8387ef HY |
690 | pci_config_pm_runtime_get(dev); |
691 | ||
4c0619ad | 692 | if ((off & 1) && size) { |
693 | u8 val; | |
e04b0ea2 | 694 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 695 | data[off - init_off] = val; |
1da177e4 | 696 | off++; |
4c0619ad | 697 | size--; |
698 | } | |
699 | ||
700 | if ((off & 3) && size > 2) { | |
701 | u16 val; | |
e04b0ea2 | 702 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 703 | data[off - init_off] = val & 0xff; |
704 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
705 | off += 2; | |
706 | size -= 2; | |
1da177e4 LT |
707 | } |
708 | ||
709 | while (size > 3) { | |
4c0619ad | 710 | u32 val; |
e04b0ea2 | 711 | pci_user_read_config_dword(dev, off, &val); |
4c0619ad | 712 | data[off - init_off] = val & 0xff; |
713 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
714 | data[off - init_off + 2] = (val >> 16) & 0xff; | |
715 | data[off - init_off + 3] = (val >> 24) & 0xff; | |
1da177e4 LT |
716 | off += 4; |
717 | size -= 4; | |
2ce02a86 | 718 | cond_resched(); |
1da177e4 LT |
719 | } |
720 | ||
4c0619ad | 721 | if (size >= 2) { |
722 | u16 val; | |
e04b0ea2 | 723 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 724 | data[off - init_off] = val & 0xff; |
725 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
726 | off += 2; | |
727 | size -= 2; | |
728 | } | |
729 | ||
730 | if (size > 0) { | |
731 | u8 val; | |
e04b0ea2 | 732 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 733 | data[off - init_off] = val; |
1da177e4 LT |
734 | } |
735 | ||
3d8387ef HY |
736 | pci_config_pm_runtime_put(dev); |
737 | ||
1da177e4 LT |
738 | return count; |
739 | } | |
740 | ||
3c78bc61 RD |
741 | static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, |
742 | struct bin_attribute *bin_attr, char *buf, | |
743 | loff_t off, size_t count) | |
1da177e4 | 744 | { |
554a6037 | 745 | struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
746 | unsigned int size = count; |
747 | loff_t init_off = off; | |
3c78bc61 | 748 | u8 *data = (u8 *) buf; |
eb627e17 MG |
749 | int ret; |
750 | ||
751 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
752 | if (ret) | |
753 | return ret; | |
1da177e4 | 754 | |
27829479 IW |
755 | if (resource_is_exclusive(&dev->driver_exclusive_resource, off, |
756 | count)) { | |
757 | pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx", | |
758 | current->comm, off); | |
759 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | |
760 | } | |
761 | ||
1da177e4 LT |
762 | if (off > dev->cfg_size) |
763 | return 0; | |
764 | if (off + count > dev->cfg_size) { | |
765 | size = dev->cfg_size - off; | |
766 | count = size; | |
767 | } | |
f7625980 | 768 | |
3d8387ef HY |
769 | pci_config_pm_runtime_get(dev); |
770 | ||
4c0619ad | 771 | if ((off & 1) && size) { |
e04b0ea2 | 772 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 773 | off++; |
4c0619ad | 774 | size--; |
1da177e4 | 775 | } |
f7625980 | 776 | |
4c0619ad | 777 | if ((off & 3) && size > 2) { |
778 | u16 val = data[off - init_off]; | |
779 | val |= (u16) data[off - init_off + 1] << 8; | |
3c78bc61 RD |
780 | pci_user_write_config_word(dev, off, val); |
781 | off += 2; | |
782 | size -= 2; | |
783 | } | |
1da177e4 LT |
784 | |
785 | while (size > 3) { | |
4c0619ad | 786 | u32 val = data[off - init_off]; |
787 | val |= (u32) data[off - init_off + 1] << 8; | |
788 | val |= (u32) data[off - init_off + 2] << 16; | |
789 | val |= (u32) data[off - init_off + 3] << 24; | |
e04b0ea2 | 790 | pci_user_write_config_dword(dev, off, val); |
1da177e4 LT |
791 | off += 4; |
792 | size -= 4; | |
793 | } | |
f7625980 | 794 | |
4c0619ad | 795 | if (size >= 2) { |
796 | u16 val = data[off - init_off]; | |
797 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 798 | pci_user_write_config_word(dev, off, val); |
4c0619ad | 799 | off += 2; |
800 | size -= 2; | |
801 | } | |
1da177e4 | 802 | |
c50762a8 | 803 | if (size) |
e04b0ea2 | 804 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 805 | |
3d8387ef HY |
806 | pci_config_pm_runtime_put(dev); |
807 | ||
1da177e4 LT |
808 | return count; |
809 | } | |
e1d3f326 KW |
810 | static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0); |
811 | ||
812 | static struct bin_attribute *pci_dev_config_attrs[] = { | |
813 | &bin_attr_config, | |
814 | NULL, | |
815 | }; | |
816 | ||
817 | static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj, | |
818 | struct bin_attribute *a, int n) | |
819 | { | |
820 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); | |
821 | ||
822 | a->size = PCI_CFG_SPACE_SIZE; | |
823 | if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) | |
824 | a->size = PCI_CFG_SPACE_EXP_SIZE; | |
825 | ||
826 | return a->attr.mode; | |
827 | } | |
828 | ||
829 | static const struct attribute_group pci_dev_config_attr_group = { | |
830 | .bin_attrs = pci_dev_config_attrs, | |
831 | .is_bin_visible = pci_dev_config_attr_is_visible, | |
832 | }; | |
1da177e4 | 833 | |
24de09c1 VS |
834 | /* |
835 | * llseek operation for mmappable PCI resources. | |
836 | * May be left unused if the arch doesn't provide them. | |
837 | */ | |
838 | static __maybe_unused loff_t | |
839 | pci_llseek_resource(struct file *filep, | |
840 | struct kobject *kobj __always_unused, | |
841 | struct bin_attribute *attr, | |
842 | loff_t offset, int whence) | |
843 | { | |
844 | return fixed_size_llseek(filep, offset, whence, attr->size); | |
845 | } | |
846 | ||
1da177e4 LT |
847 | #ifdef HAVE_PCI_LEGACY |
848 | /** | |
849 | * pci_read_legacy_io - read byte(s) from legacy I/O port space | |
2c3c8bea | 850 | * @filp: open sysfs file |
1da177e4 | 851 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 852 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
853 | * @buf: buffer to store results |
854 | * @off: offset into legacy I/O port space | |
855 | * @count: number of bytes to read | |
856 | * | |
857 | * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
858 | * callback routine (pci_legacy_read). | |
859 | */ | |
3c78bc61 RD |
860 | static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, |
861 | struct bin_attribute *bin_attr, char *buf, | |
862 | loff_t off, size_t count) | |
1da177e4 | 863 | { |
554a6037 | 864 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 865 | |
3c78bc61 RD |
866 | /* Only support 1, 2 or 4 byte accesses */ |
867 | if (count != 1 && count != 2 && count != 4) | |
868 | return -EINVAL; | |
1da177e4 | 869 | |
3c78bc61 | 870 | return pci_legacy_read(bus, off, (u32 *)buf, count); |
1da177e4 LT |
871 | } |
872 | ||
873 | /** | |
874 | * pci_write_legacy_io - write byte(s) to legacy I/O port space | |
2c3c8bea | 875 | * @filp: open sysfs file |
1da177e4 | 876 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 877 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
878 | * @buf: buffer containing value to be written |
879 | * @off: offset into legacy I/O port space | |
880 | * @count: number of bytes to write | |
881 | * | |
882 | * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
883 | * callback routine (pci_legacy_write). | |
884 | */ | |
3c78bc61 RD |
885 | static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, |
886 | struct bin_attribute *bin_attr, char *buf, | |
887 | loff_t off, size_t count) | |
1da177e4 | 888 | { |
554a6037 | 889 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 890 | |
3c78bc61 RD |
891 | /* Only support 1, 2 or 4 byte accesses */ |
892 | if (count != 1 && count != 2 && count != 4) | |
893 | return -EINVAL; | |
894 | ||
895 | return pci_legacy_write(bus, off, *(u32 *)buf, count); | |
1da177e4 LT |
896 | } |
897 | ||
898 | /** | |
899 | * pci_mmap_legacy_mem - map legacy PCI memory into user memory space | |
2c3c8bea | 900 | * @filp: open sysfs file |
1da177e4 LT |
901 | * @kobj: kobject corresponding to device to be mapped |
902 | * @attr: struct bin_attribute for this file | |
903 | * @vma: struct vm_area_struct passed to mmap | |
904 | * | |
f19aeb1f | 905 | * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap |
1da177e4 LT |
906 | * legacy memory space (first meg of bus space) into application virtual |
907 | * memory space. | |
908 | */ | |
3c78bc61 RD |
909 | static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, |
910 | struct bin_attribute *attr, | |
911 | struct vm_area_struct *vma) | |
1da177e4 | 912 | { |
554a6037 | 913 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
1da177e4 | 914 | |
3c78bc61 | 915 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); |
f19aeb1f BH |
916 | } |
917 | ||
918 | /** | |
919 | * pci_mmap_legacy_io - map legacy PCI IO into user memory space | |
2c3c8bea | 920 | * @filp: open sysfs file |
f19aeb1f BH |
921 | * @kobj: kobject corresponding to device to be mapped |
922 | * @attr: struct bin_attribute for this file | |
923 | * @vma: struct vm_area_struct passed to mmap | |
924 | * | |
925 | * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap | |
926 | * legacy IO space (first meg of bus space) into application virtual | |
927 | * memory space. Returns -ENOSYS if the operation isn't supported | |
928 | */ | |
3c78bc61 RD |
929 | static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, |
930 | struct bin_attribute *attr, | |
931 | struct vm_area_struct *vma) | |
f19aeb1f | 932 | { |
554a6037 | 933 | struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); |
f19aeb1f | 934 | |
3c78bc61 | 935 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); |
f19aeb1f BH |
936 | } |
937 | ||
10a0ef39 IK |
938 | /** |
939 | * pci_adjust_legacy_attr - adjustment of legacy file attributes | |
940 | * @b: bus to create files under | |
941 | * @mmap_type: I/O port or memory | |
942 | * | |
943 | * Stub implementation. Can be overridden by arch if necessary. | |
944 | */ | |
3c78bc61 RD |
945 | void __weak pci_adjust_legacy_attr(struct pci_bus *b, |
946 | enum pci_mmap_state mmap_type) | |
10a0ef39 | 947 | { |
10a0ef39 IK |
948 | } |
949 | ||
f19aeb1f BH |
950 | /** |
951 | * pci_create_legacy_files - create legacy I/O port and memory files | |
952 | * @b: bus to create files under | |
953 | * | |
954 | * Some platforms allow access to legacy I/O port and ISA memory space on | |
955 | * a per-bus basis. This routine creates the files and ties them into | |
956 | * their associated read, write and mmap files from pci-sysfs.c | |
957 | * | |
25985edc | 958 | * On error unwind, but don't propagate the error to the caller |
f19aeb1f BH |
959 | * as it is ok to set up the PCI bus without these files. |
960 | */ | |
961 | void pci_create_legacy_files(struct pci_bus *b) | |
962 | { | |
963 | int error; | |
964 | ||
efd532a6 DV |
965 | if (!sysfs_initialized) |
966 | return; | |
967 | ||
6396bb22 | 968 | b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), |
f19aeb1f BH |
969 | GFP_ATOMIC); |
970 | if (!b->legacy_io) | |
971 | goto kzalloc_err; | |
972 | ||
62e877b8 | 973 | sysfs_bin_attr_init(b->legacy_io); |
f19aeb1f BH |
974 | b->legacy_io->attr.name = "legacy_io"; |
975 | b->legacy_io->size = 0xffff; | |
e2154044 | 976 | b->legacy_io->attr.mode = 0600; |
f19aeb1f BH |
977 | b->legacy_io->read = pci_read_legacy_io; |
978 | b->legacy_io->write = pci_write_legacy_io; | |
24de09c1 VS |
979 | /* See pci_create_attr() for motivation */ |
980 | b->legacy_io->llseek = pci_llseek_resource; | |
f19aeb1f | 981 | b->legacy_io->mmap = pci_mmap_legacy_io; |
f06aff92 | 982 | b->legacy_io->f_mapping = iomem_get_mapping; |
10a0ef39 | 983 | pci_adjust_legacy_attr(b, pci_mmap_io); |
f19aeb1f BH |
984 | error = device_create_bin_file(&b->dev, b->legacy_io); |
985 | if (error) | |
986 | goto legacy_io_err; | |
987 | ||
988 | /* Allocated above after the legacy_io struct */ | |
989 | b->legacy_mem = b->legacy_io + 1; | |
6757eca3 | 990 | sysfs_bin_attr_init(b->legacy_mem); |
f19aeb1f BH |
991 | b->legacy_mem->attr.name = "legacy_mem"; |
992 | b->legacy_mem->size = 1024*1024; | |
e2154044 | 993 | b->legacy_mem->attr.mode = 0600; |
f19aeb1f | 994 | b->legacy_mem->mmap = pci_mmap_legacy_mem; |
24de09c1 VS |
995 | /* See pci_create_attr() for motivation */ |
996 | b->legacy_mem->llseek = pci_llseek_resource; | |
c6c3c570 | 997 | b->legacy_mem->f_mapping = iomem_get_mapping; |
10a0ef39 | 998 | pci_adjust_legacy_attr(b, pci_mmap_mem); |
f19aeb1f BH |
999 | error = device_create_bin_file(&b->dev, b->legacy_mem); |
1000 | if (error) | |
1001 | goto legacy_mem_err; | |
1002 | ||
1003 | return; | |
1004 | ||
1005 | legacy_mem_err: | |
1006 | device_remove_bin_file(&b->dev, b->legacy_io); | |
1007 | legacy_io_err: | |
1008 | kfree(b->legacy_io); | |
1009 | b->legacy_io = NULL; | |
1010 | kzalloc_err: | |
7db4af43 | 1011 | dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); |
f19aeb1f BH |
1012 | } |
1013 | ||
1014 | void pci_remove_legacy_files(struct pci_bus *b) | |
1015 | { | |
1016 | if (b->legacy_io) { | |
1017 | device_remove_bin_file(&b->dev, b->legacy_io); | |
1018 | device_remove_bin_file(&b->dev, b->legacy_mem); | |
1019 | kfree(b->legacy_io); /* both are allocated here */ | |
1020 | } | |
1da177e4 LT |
1021 | } |
1022 | #endif /* HAVE_PCI_LEGACY */ | |
1023 | ||
f7195824 | 1024 | #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) |
1da177e4 LT |
1025 | /** |
1026 | * pci_mmap_resource - map a PCI resource into user memory space | |
1027 | * @kobj: kobject for mapping | |
1028 | * @attr: struct bin_attribute for the file being mapped | |
1029 | * @vma: struct vm_area_struct passed into the mmap | |
45aec1ae | 1030 | * @write_combine: 1 for write_combine mapping |
1da177e4 LT |
1031 | * |
1032 | * Use the regular PCI mapping routines to map a PCI resource into userspace. | |
1da177e4 | 1033 | */ |
3c78bc61 RD |
1034 | static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, |
1035 | struct vm_area_struct *vma, int write_combine) | |
1da177e4 | 1036 | { |
554a6037 | 1037 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
dca40b18 | 1038 | int bar = (unsigned long)attr->private; |
1da177e4 | 1039 | enum pci_mmap_state mmap_type; |
dca40b18 | 1040 | struct resource *res = &pdev->resource[bar]; |
eb627e17 MG |
1041 | int ret; |
1042 | ||
1043 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
1044 | if (ret) | |
1045 | return ret; | |
2311b1f2 | 1046 | |
ca620723 BH |
1047 | if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) |
1048 | return -EINVAL; | |
1049 | ||
7a094909 | 1050 | if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) |
b5ff7df3 | 1051 | return -EINVAL; |
7a094909 | 1052 | |
1da177e4 | 1053 | mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; |
f7195824 DW |
1054 | |
1055 | return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); | |
45aec1ae | 1056 | } |
1057 | ||
3c78bc61 RD |
1058 | static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, |
1059 | struct bin_attribute *attr, | |
1060 | struct vm_area_struct *vma) | |
45aec1ae | 1061 | { |
1062 | return pci_mmap_resource(kobj, attr, vma, 0); | |
1063 | } | |
1064 | ||
3c78bc61 RD |
1065 | static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, |
1066 | struct bin_attribute *attr, | |
1067 | struct vm_area_struct *vma) | |
45aec1ae | 1068 | { |
1069 | return pci_mmap_resource(kobj, attr, vma, 1); | |
1da177e4 LT |
1070 | } |
1071 | ||
3c78bc61 RD |
1072 | static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, |
1073 | struct bin_attribute *attr, char *buf, | |
1074 | loff_t off, size_t count, bool write) | |
8633328b | 1075 | { |
5da1b588 | 1076 | #ifdef CONFIG_HAS_IOPORT |
554a6037 | 1077 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
dca40b18 | 1078 | int bar = (unsigned long)attr->private; |
8633328b | 1079 | unsigned long port = off; |
8633328b | 1080 | |
dca40b18 | 1081 | port += pci_resource_start(pdev, bar); |
8633328b | 1082 | |
dca40b18 | 1083 | if (port > pci_resource_end(pdev, bar)) |
8633328b AW |
1084 | return 0; |
1085 | ||
dca40b18 | 1086 | if (port + count - 1 > pci_resource_end(pdev, bar)) |
8633328b AW |
1087 | return -EINVAL; |
1088 | ||
1089 | switch (count) { | |
1090 | case 1: | |
1091 | if (write) | |
1092 | outb(*(u8 *)buf, port); | |
1093 | else | |
1094 | *(u8 *)buf = inb(port); | |
1095 | return 1; | |
1096 | case 2: | |
1097 | if (write) | |
1098 | outw(*(u16 *)buf, port); | |
1099 | else | |
1100 | *(u16 *)buf = inw(port); | |
1101 | return 2; | |
1102 | case 4: | |
1103 | if (write) | |
1104 | outl(*(u32 *)buf, port); | |
1105 | else | |
1106 | *(u32 *)buf = inl(port); | |
1107 | return 4; | |
1108 | } | |
1109 | return -EINVAL; | |
5da1b588 NS |
1110 | #else |
1111 | return -ENXIO; | |
1112 | #endif | |
8633328b AW |
1113 | } |
1114 | ||
3c78bc61 RD |
1115 | static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, |
1116 | struct bin_attribute *attr, char *buf, | |
1117 | loff_t off, size_t count) | |
8633328b AW |
1118 | { |
1119 | return pci_resource_io(filp, kobj, attr, buf, off, count, false); | |
1120 | } | |
1121 | ||
3c78bc61 RD |
1122 | static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, |
1123 | struct bin_attribute *attr, char *buf, | |
1124 | loff_t off, size_t count) | |
8633328b | 1125 | { |
eb627e17 MG |
1126 | int ret; |
1127 | ||
1128 | ret = security_locked_down(LOCKDOWN_PCI_ACCESS); | |
1129 | if (ret) | |
1130 | return ret; | |
1131 | ||
8633328b AW |
1132 | return pci_resource_io(filp, kobj, attr, buf, off, count, true); |
1133 | } | |
1134 | ||
b19441af GKH |
1135 | /** |
1136 | * pci_remove_resource_files - cleanup resource files | |
cffb2faf | 1137 | * @pdev: dev to cleanup |
b19441af | 1138 | * |
cffb2faf | 1139 | * If we created resource files for @pdev, remove them from sysfs and |
b19441af GKH |
1140 | * free their resources. |
1141 | */ | |
3c78bc61 | 1142 | static void pci_remove_resource_files(struct pci_dev *pdev) |
b19441af GKH |
1143 | { |
1144 | int i; | |
1145 | ||
c9c13ba4 | 1146 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
b19441af GKH |
1147 | struct bin_attribute *res_attr; |
1148 | ||
1149 | res_attr = pdev->res_attr[i]; | |
1150 | if (res_attr) { | |
1151 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1152 | kfree(res_attr); | |
1153 | } | |
45aec1ae | 1154 | |
1155 | res_attr = pdev->res_attr_wc[i]; | |
1156 | if (res_attr) { | |
1157 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1158 | kfree(res_attr); | |
1159 | } | |
b19441af GKH |
1160 | } |
1161 | } | |
1162 | ||
45aec1ae | 1163 | static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) |
1164 | { | |
1165 | /* allocate attribute structure, piggyback attribute name */ | |
1166 | int name_len = write_combine ? 13 : 10; | |
1167 | struct bin_attribute *res_attr; | |
bd5174df | 1168 | char *res_attr_name; |
45aec1ae | 1169 | int retval; |
1170 | ||
1171 | res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); | |
bd5174df BH |
1172 | if (!res_attr) |
1173 | return -ENOMEM; | |
1174 | ||
1175 | res_attr_name = (char *)(res_attr + 1); | |
1176 | ||
1177 | sysfs_bin_attr_init(res_attr); | |
1178 | if (write_combine) { | |
bd5174df BH |
1179 | sprintf(res_attr_name, "resource%d_wc", num); |
1180 | res_attr->mmap = pci_mmap_resource_wc; | |
1181 | } else { | |
bd5174df | 1182 | sprintf(res_attr_name, "resource%d", num); |
e854d8b2 DW |
1183 | if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { |
1184 | res_attr->read = pci_read_resource_io; | |
1185 | res_attr->write = pci_write_resource_io; | |
1186 | if (arch_can_pci_mmap_io()) | |
1187 | res_attr->mmap = pci_mmap_resource_uc; | |
1188 | } else { | |
1189 | res_attr->mmap = pci_mmap_resource_uc; | |
1190 | } | |
bd5174df | 1191 | } |
24de09c1 | 1192 | if (res_attr->mmap) { |
f06aff92 | 1193 | res_attr->f_mapping = iomem_get_mapping; |
24de09c1 VS |
1194 | /* |
1195 | * generic_file_llseek() consults f_mapping->host to determine | |
1196 | * the file size. As iomem_inode knows nothing about the | |
1197 | * attribute, it's not going to work, so override it as well. | |
1198 | */ | |
1199 | res_attr->llseek = pci_llseek_resource; | |
1200 | } | |
bd5174df | 1201 | res_attr->attr.name = res_attr_name; |
e2154044 | 1202 | res_attr->attr.mode = 0600; |
bd5174df | 1203 | res_attr->size = pci_resource_len(pdev, num); |
dca40b18 | 1204 | res_attr->private = (void *)(unsigned long)num; |
bd5174df | 1205 | retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); |
aa382ffa | 1206 | if (retval) { |
bd5174df | 1207 | kfree(res_attr); |
aa382ffa SH |
1208 | return retval; |
1209 | } | |
1210 | ||
1211 | if (write_combine) | |
1212 | pdev->res_attr_wc[num] = res_attr; | |
1213 | else | |
1214 | pdev->res_attr[num] = res_attr; | |
45aec1ae | 1215 | |
aa382ffa | 1216 | return 0; |
45aec1ae | 1217 | } |
1218 | ||
1da177e4 LT |
1219 | /** |
1220 | * pci_create_resource_files - create resource files in sysfs for @dev | |
cffb2faf | 1221 | * @pdev: dev in question |
1da177e4 | 1222 | * |
cffb2faf | 1223 | * Walk the resources in @pdev creating files for each resource available. |
1da177e4 | 1224 | */ |
b19441af | 1225 | static int pci_create_resource_files(struct pci_dev *pdev) |
1da177e4 LT |
1226 | { |
1227 | int i; | |
b19441af | 1228 | int retval; |
1da177e4 LT |
1229 | |
1230 | /* Expose the PCI resources from this device as files */ | |
c9c13ba4 | 1231 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { |
1da177e4 LT |
1232 | |
1233 | /* skip empty resources */ | |
1234 | if (!pci_resource_len(pdev, i)) | |
1235 | continue; | |
1236 | ||
45aec1ae | 1237 | retval = pci_create_attr(pdev, i, 0); |
1238 | /* for prefetchable resources, create a WC mappable file */ | |
ae749c7a DW |
1239 | if (!retval && arch_can_pci_mmap_wc() && |
1240 | pdev->resource[i].flags & IORESOURCE_PREFETCH) | |
45aec1ae | 1241 | retval = pci_create_attr(pdev, i, 1); |
45aec1ae | 1242 | if (retval) { |
1243 | pci_remove_resource_files(pdev); | |
1244 | return retval; | |
1da177e4 LT |
1245 | } |
1246 | } | |
b19441af | 1247 | return 0; |
1da177e4 | 1248 | } |
8c46d543 | 1249 | #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ |
10a0ef39 IK |
1250 | int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } |
1251 | void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } | |
8c46d543 | 1252 | #endif |
1da177e4 LT |
1253 | |
1254 | /** | |
1255 | * pci_write_rom - used to enable access to the PCI ROM display | |
2c3c8bea | 1256 | * @filp: sysfs file |
1da177e4 | 1257 | * @kobj: kernel object handle |
cffb2faf | 1258 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1259 | * @buf: user input |
1260 | * @off: file offset | |
1261 | * @count: number of byte in input | |
1262 | * | |
1263 | * writing anything except 0 enables it | |
1264 | */ | |
3c78bc61 RD |
1265 | static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, |
1266 | struct bin_attribute *bin_attr, char *buf, | |
1267 | loff_t off, size_t count) | |
1da177e4 | 1268 | { |
554a6037 | 1269 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
1270 | |
1271 | if ((off == 0) && (*buf == '0') && (count == 2)) | |
1272 | pdev->rom_attr_enabled = 0; | |
1273 | else | |
1274 | pdev->rom_attr_enabled = 1; | |
1275 | ||
1276 | return count; | |
1277 | } | |
1278 | ||
1279 | /** | |
1280 | * pci_read_rom - read a PCI ROM | |
2c3c8bea | 1281 | * @filp: sysfs file |
1da177e4 | 1282 | * @kobj: kernel object handle |
cffb2faf | 1283 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1284 | * @buf: where to put the data we read from the ROM |
1285 | * @off: file offset | |
1286 | * @count: number of bytes to read | |
1287 | * | |
1288 | * Put @count bytes starting at @off into @buf from the ROM in the PCI | |
1289 | * device corresponding to @kobj. | |
1290 | */ | |
3c78bc61 RD |
1291 | static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, |
1292 | struct bin_attribute *bin_attr, char *buf, | |
1293 | loff_t off, size_t count) | |
1da177e4 | 1294 | { |
554a6037 | 1295 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
1da177e4 LT |
1296 | void __iomem *rom; |
1297 | size_t size; | |
1298 | ||
1299 | if (!pdev->rom_attr_enabled) | |
1300 | return -EINVAL; | |
f7625980 | 1301 | |
1da177e4 | 1302 | rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ |
97c44836 TN |
1303 | if (!rom || !size) |
1304 | return -EIO; | |
f7625980 | 1305 | |
1da177e4 LT |
1306 | if (off >= size) |
1307 | count = 0; | |
1308 | else { | |
1309 | if (off + count > size) | |
1310 | count = size - off; | |
f7625980 | 1311 | |
1da177e4 LT |
1312 | memcpy_fromio(buf, rom + off, count); |
1313 | } | |
1314 | pci_unmap_rom(pdev, rom); | |
f7625980 | 1315 | |
1da177e4 LT |
1316 | return count; |
1317 | } | |
527139d7 | 1318 | static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0); |
1da177e4 | 1319 | |
527139d7 KW |
1320 | static struct bin_attribute *pci_dev_rom_attrs[] = { |
1321 | &bin_attr_rom, | |
1322 | NULL, | |
1da177e4 LT |
1323 | }; |
1324 | ||
527139d7 KW |
1325 | static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj, |
1326 | struct bin_attribute *a, int n) | |
1327 | { | |
1328 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); | |
1329 | size_t rom_size; | |
1330 | ||
1331 | /* If the device has a ROM, try to expose it in sysfs. */ | |
1332 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
1333 | if (!rom_size) | |
1334 | return 0; | |
1335 | ||
1336 | a->size = rom_size; | |
1337 | ||
1338 | return a->attr.mode; | |
1339 | } | |
1340 | ||
1341 | static const struct attribute_group pci_dev_rom_attr_group = { | |
1342 | .bin_attrs = pci_dev_rom_attrs, | |
1343 | .is_bin_visible = pci_dev_rom_attr_is_visible, | |
1da177e4 LT |
1344 | }; |
1345 | ||
3c78bc61 RD |
1346 | static ssize_t reset_store(struct device *dev, struct device_attribute *attr, |
1347 | const char *buf, size_t count) | |
711d5779 MT |
1348 | { |
1349 | struct pci_dev *pdev = to_pci_dev(dev); | |
1350 | unsigned long val; | |
36f354ec | 1351 | ssize_t result; |
711d5779 | 1352 | |
36f354ec KW |
1353 | if (kstrtoul(buf, 0, &val) < 0) |
1354 | return -EINVAL; | |
711d5779 MT |
1355 | |
1356 | if (val != 1) | |
1357 | return -EINVAL; | |
447c5dd7 | 1358 | |
82c3fbff | 1359 | pm_runtime_get_sync(dev); |
447c5dd7 | 1360 | result = pci_reset_function(pdev); |
82c3fbff | 1361 | pm_runtime_put(dev); |
447c5dd7 MS |
1362 | if (result < 0) |
1363 | return result; | |
1364 | ||
1365 | return count; | |
711d5779 | 1366 | } |
f42c35ea | 1367 | static DEVICE_ATTR_WO(reset); |
711d5779 | 1368 | |
f42c35ea KW |
1369 | static struct attribute *pci_dev_reset_attrs[] = { |
1370 | &dev_attr_reset.attr, | |
1371 | NULL, | |
1372 | }; | |
711d5779 | 1373 | |
f42c35ea KW |
1374 | static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, |
1375 | struct attribute *a, int n) | |
280c73d3 | 1376 | { |
f42c35ea | 1377 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); |
280c73d3 | 1378 | |
4ec36dfe | 1379 | if (!pci_reset_supported(pdev)) |
f42c35ea | 1380 | return 0; |
711d5779 | 1381 | |
f42c35ea | 1382 | return a->mode; |
280c73d3 ZY |
1383 | } |
1384 | ||
f42c35ea KW |
1385 | static const struct attribute_group pci_dev_reset_attr_group = { |
1386 | .attrs = pci_dev_reset_attrs, | |
1387 | .is_visible = pci_dev_reset_attr_is_visible, | |
1388 | }; | |
1389 | ||
f6c73999 IJ |
1390 | static ssize_t __resource_resize_show(struct device *dev, int n, char *buf) |
1391 | { | |
1392 | struct pci_dev *pdev = to_pci_dev(dev); | |
1393 | ssize_t ret; | |
1394 | ||
1395 | pci_config_pm_runtime_get(pdev); | |
1396 | ||
1397 | ret = sysfs_emit(buf, "%016llx\n", | |
1398 | (u64)pci_rebar_get_possible_sizes(pdev, n)); | |
1399 | ||
1400 | pci_config_pm_runtime_put(pdev); | |
1401 | ||
1402 | return ret; | |
1403 | } | |
1404 | ||
1405 | static ssize_t __resource_resize_store(struct device *dev, int n, | |
1406 | const char *buf, size_t count) | |
1407 | { | |
1408 | struct pci_dev *pdev = to_pci_dev(dev); | |
1409 | unsigned long size, flags; | |
1410 | int ret, i; | |
1411 | u16 cmd; | |
1412 | ||
1413 | if (kstrtoul(buf, 0, &size) < 0) | |
1414 | return -EINVAL; | |
1415 | ||
1416 | device_lock(dev); | |
1417 | if (dev->driver) { | |
1418 | ret = -EBUSY; | |
1419 | goto unlock; | |
1420 | } | |
1421 | ||
1422 | pci_config_pm_runtime_get(pdev); | |
1423 | ||
1424 | if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { | |
1425 | ret = aperture_remove_conflicting_pci_devices(pdev, | |
1426 | "resourceN_resize"); | |
1427 | if (ret) | |
1428 | goto pm_put; | |
1429 | } | |
1430 | ||
1431 | pci_read_config_word(pdev, PCI_COMMAND, &cmd); | |
1432 | pci_write_config_word(pdev, PCI_COMMAND, | |
1433 | cmd & ~PCI_COMMAND_MEMORY); | |
1434 | ||
1435 | flags = pci_resource_flags(pdev, n); | |
1436 | ||
1437 | pci_remove_resource_files(pdev); | |
1438 | ||
1439 | for (i = 0; i < PCI_STD_NUM_BARS; i++) { | |
1440 | if (pci_resource_len(pdev, i) && | |
1441 | pci_resource_flags(pdev, i) == flags) | |
1442 | pci_release_resource(pdev, i); | |
1443 | } | |
1444 | ||
1445 | ret = pci_resize_resource(pdev, n, size); | |
1446 | ||
1447 | pci_assign_unassigned_bus_resources(pdev->bus); | |
1448 | ||
1449 | if (pci_create_resource_files(pdev)) | |
1450 | pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n"); | |
1451 | ||
1452 | pci_write_config_word(pdev, PCI_COMMAND, cmd); | |
1453 | pm_put: | |
1454 | pci_config_pm_runtime_put(pdev); | |
1455 | unlock: | |
1456 | device_unlock(dev); | |
1457 | ||
1458 | return ret ? ret : count; | |
1459 | } | |
1460 | ||
91fa1277 AW |
1461 | #define pci_dev_resource_resize_attr(n) \ |
1462 | static ssize_t resource##n##_resize_show(struct device *dev, \ | |
1463 | struct device_attribute *attr, \ | |
f6c73999 | 1464 | char *buf) \ |
91fa1277 | 1465 | { \ |
f6c73999 | 1466 | return __resource_resize_show(dev, n, buf); \ |
91fa1277 | 1467 | } \ |
91fa1277 AW |
1468 | static ssize_t resource##n##_resize_store(struct device *dev, \ |
1469 | struct device_attribute *attr,\ | |
1470 | const char *buf, size_t count)\ | |
1471 | { \ | |
f6c73999 | 1472 | return __resource_resize_store(dev, n, buf, count); \ |
91fa1277 AW |
1473 | } \ |
1474 | static DEVICE_ATTR_RW(resource##n##_resize) | |
1475 | ||
1476 | pci_dev_resource_resize_attr(0); | |
1477 | pci_dev_resource_resize_attr(1); | |
1478 | pci_dev_resource_resize_attr(2); | |
1479 | pci_dev_resource_resize_attr(3); | |
1480 | pci_dev_resource_resize_attr(4); | |
1481 | pci_dev_resource_resize_attr(5); | |
1482 | ||
1483 | static struct attribute *resource_resize_attrs[] = { | |
1484 | &dev_attr_resource0_resize.attr, | |
1485 | &dev_attr_resource1_resize.attr, | |
1486 | &dev_attr_resource2_resize.attr, | |
1487 | &dev_attr_resource3_resize.attr, | |
1488 | &dev_attr_resource4_resize.attr, | |
1489 | &dev_attr_resource5_resize.attr, | |
1490 | NULL, | |
1491 | }; | |
1492 | ||
1493 | static umode_t resource_resize_is_visible(struct kobject *kobj, | |
1494 | struct attribute *a, int n) | |
1495 | { | |
1496 | struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); | |
1497 | ||
1498 | return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode; | |
1499 | } | |
1500 | ||
1501 | static const struct attribute_group pci_dev_resource_resize_group = { | |
1502 | .attrs = resource_resize_attrs, | |
1503 | .is_visible = resource_resize_is_visible, | |
1504 | }; | |
1505 | ||
3c78bc61 | 1506 | int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) |
1da177e4 LT |
1507 | { |
1508 | if (!sysfs_initialized) | |
1509 | return -EACCES; | |
1510 | ||
506140f9 | 1511 | return pci_create_resource_files(pdev); |
280c73d3 ZY |
1512 | } |
1513 | ||
1da177e4 LT |
1514 | /** |
1515 | * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files | |
1516 | * @pdev: device whose entries we should free | |
1517 | * | |
1518 | * Cleanup when @pdev is removed from sysfs. | |
1519 | */ | |
1520 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev) | |
1521 | { | |
d67afe5e DM |
1522 | if (!sysfs_initialized) |
1523 | return; | |
1524 | ||
1da177e4 | 1525 | pci_remove_resource_files(pdev); |
1da177e4 LT |
1526 | } |
1527 | ||
1528 | static int __init pci_sysfs_init(void) | |
1529 | { | |
1530 | struct pci_dev *pdev = NULL; | |
efd532a6 | 1531 | struct pci_bus *pbus = NULL; |
b19441af GKH |
1532 | int retval; |
1533 | ||
1da177e4 | 1534 | sysfs_initialized = 1; |
b19441af GKH |
1535 | for_each_pci_dev(pdev) { |
1536 | retval = pci_create_sysfs_dev_files(pdev); | |
151fc5df JL |
1537 | if (retval) { |
1538 | pci_dev_put(pdev); | |
b19441af | 1539 | return retval; |
151fc5df | 1540 | } |
b19441af | 1541 | } |
1da177e4 | 1542 | |
efd532a6 DV |
1543 | while ((pbus = pci_find_next_bus(pbus))) |
1544 | pci_create_legacy_files(pbus); | |
1545 | ||
1da177e4 LT |
1546 | return 0; |
1547 | } | |
40ee9e9f | 1548 | late_initcall(pci_sysfs_init); |
4e15c46b YL |
1549 | |
1550 | static struct attribute *pci_dev_dev_attrs[] = { | |
8bdfa145 | 1551 | &dev_attr_boot_vga.attr, |
4e15c46b YL |
1552 | NULL, |
1553 | }; | |
1554 | ||
1555 | static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, | |
3c78bc61 | 1556 | struct attribute *a, int n) |
4e15c46b | 1557 | { |
554a6037 | 1558 | struct device *dev = kobj_to_dev(kobj); |
625e1d59 YL |
1559 | struct pci_dev *pdev = to_pci_dev(dev); |
1560 | ||
cdd3cecb SJ |
1561 | if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev)) |
1562 | return a->mode; | |
625e1d59 | 1563 | |
cdd3cecb | 1564 | return 0; |
4e15c46b YL |
1565 | } |
1566 | ||
dfab88be | 1567 | static struct attribute *pci_dev_hp_attrs[] = { |
8bdfa145 | 1568 | &dev_attr_remove.attr, |
4e2b7943 | 1569 | &dev_attr_dev_rescan.attr, |
dfab88be JL |
1570 | NULL, |
1571 | }; | |
1572 | ||
1573 | static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, | |
3c78bc61 | 1574 | struct attribute *a, int n) |
dfab88be | 1575 | { |
554a6037 | 1576 | struct device *dev = kobj_to_dev(kobj); |
dfab88be JL |
1577 | struct pci_dev *pdev = to_pci_dev(dev); |
1578 | ||
1579 | if (pdev->is_virtfn) | |
1580 | return 0; | |
1581 | ||
1582 | return a->mode; | |
1583 | } | |
1584 | ||
56c1af46 WVK |
1585 | static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, |
1586 | struct attribute *a, int n) | |
1587 | { | |
1588 | struct device *dev = kobj_to_dev(kobj); | |
1589 | struct pci_dev *pdev = to_pci_dev(dev); | |
1590 | ||
1591 | if (pci_is_bridge(pdev)) | |
1592 | return a->mode; | |
1593 | ||
1594 | return 0; | |
1595 | } | |
1596 | ||
1597 | static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, | |
1598 | struct attribute *a, int n) | |
1599 | { | |
1600 | struct device *dev = kobj_to_dev(kobj); | |
1601 | struct pci_dev *pdev = to_pci_dev(dev); | |
1602 | ||
1603 | if (pci_is_pcie(pdev)) | |
1604 | return a->mode; | |
1605 | ||
1606 | return 0; | |
1607 | } | |
1608 | ||
1609 | static const struct attribute_group pci_dev_group = { | |
1610 | .attrs = pci_dev_attrs, | |
1611 | }; | |
1612 | ||
1613 | const struct attribute_group *pci_dev_groups[] = { | |
1614 | &pci_dev_group, | |
e1d3f326 | 1615 | &pci_dev_config_attr_group, |
527139d7 | 1616 | &pci_dev_rom_attr_group, |
f42c35ea | 1617 | &pci_dev_reset_attr_group, |
d88f521d | 1618 | &pci_dev_reset_method_attr_group, |
d93f8399 | 1619 | &pci_dev_vpd_attr_group, |
506140f9 KW |
1620 | #ifdef CONFIG_DMI |
1621 | &pci_dev_smbios_attr_group, | |
1622 | #endif | |
1623 | #ifdef CONFIG_ACPI | |
1624 | &pci_dev_acpi_attr_group, | |
1625 | #endif | |
91fa1277 | 1626 | &pci_dev_resource_resize_group, |
56c1af46 WVK |
1627 | NULL, |
1628 | }; | |
1629 | ||
e7ea9825 | 1630 | static const struct attribute_group pci_dev_hp_attr_group = { |
dfab88be JL |
1631 | .attrs = pci_dev_hp_attrs, |
1632 | .is_visible = pci_dev_hp_attrs_are_visible, | |
1633 | }; | |
1634 | ||
e7ea9825 | 1635 | static const struct attribute_group pci_dev_attr_group = { |
4e15c46b YL |
1636 | .attrs = pci_dev_dev_attrs, |
1637 | .is_visible = pci_dev_attrs_are_visible, | |
1638 | }; | |
1639 | ||
e7ea9825 | 1640 | static const struct attribute_group pci_bridge_attr_group = { |
56c1af46 WVK |
1641 | .attrs = pci_bridge_attrs, |
1642 | .is_visible = pci_bridge_attrs_are_visible, | |
1643 | }; | |
1644 | ||
e7ea9825 | 1645 | static const struct attribute_group pcie_dev_attr_group = { |
56c1af46 WVK |
1646 | .attrs = pcie_dev_attrs, |
1647 | .is_visible = pcie_dev_attrs_are_visible, | |
1648 | }; | |
1649 | ||
be9c3a4c | 1650 | const struct attribute_group *pci_dev_attr_groups[] = { |
4e15c46b | 1651 | &pci_dev_attr_group, |
dfab88be | 1652 | &pci_dev_hp_attr_group, |
1789382a | 1653 | #ifdef CONFIG_PCI_IOV |
c3d5c2d9 LR |
1654 | &sriov_pf_dev_attr_group, |
1655 | &sriov_vf_dev_attr_group, | |
1789382a | 1656 | #endif |
56c1af46 WVK |
1657 | &pci_bridge_attr_group, |
1658 | &pcie_dev_attr_group, | |
81aa5206 RJ |
1659 | #ifdef CONFIG_PCIEAER |
1660 | &aer_stats_attr_group, | |
72ea91af HK |
1661 | #endif |
1662 | #ifdef CONFIG_PCIEASPM | |
1663 | &aspm_ctrl_attr_group, | |
81aa5206 | 1664 | #endif |
4e15c46b YL |
1665 | NULL, |
1666 | }; |