Commit | Line | Data |
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5823d089 AS |
1 | /* |
2 | * Intel MID platform PM support | |
3 | * | |
4 | * Copyright (C) 2016, Intel Corporation | |
5 | * | |
6 | * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms and conditions of the GNU General Public License, | |
10 | * version 2, as published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/init.h> | |
14 | #include <linux/pci.h> | |
15 | ||
16 | #include <asm/cpu_device_id.h> | |
17 | #include <asm/intel-family.h> | |
18 | #include <asm/intel-mid.h> | |
19 | ||
20 | #include "pci.h" | |
21 | ||
22 | static bool mid_pci_power_manageable(struct pci_dev *dev) | |
23 | { | |
24 | return true; | |
25 | } | |
26 | ||
27 | static int mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state) | |
28 | { | |
29 | return intel_mid_pci_set_power_state(pdev, state); | |
30 | } | |
31 | ||
e8a6123e LW |
32 | static pci_power_t mid_pci_get_power_state(struct pci_dev *pdev) |
33 | { | |
34 | return intel_mid_pci_get_power_state(pdev); | |
35 | } | |
36 | ||
5823d089 AS |
37 | static pci_power_t mid_pci_choose_state(struct pci_dev *pdev) |
38 | { | |
39 | return PCI_D3hot; | |
40 | } | |
41 | ||
0847684c | 42 | static int mid_pci_wakeup(struct pci_dev *dev, bool enable) |
5823d089 AS |
43 | { |
44 | return 0; | |
45 | } | |
46 | ||
47 | static bool mid_pci_need_resume(struct pci_dev *dev) | |
48 | { | |
49 | return false; | |
50 | } | |
51 | ||
c9312254 | 52 | static const struct pci_platform_pm_ops mid_pci_platform_pm = { |
5823d089 AS |
53 | .is_manageable = mid_pci_power_manageable, |
54 | .set_state = mid_pci_set_power_state, | |
e8a6123e | 55 | .get_state = mid_pci_get_power_state, |
5823d089 | 56 | .choose_state = mid_pci_choose_state, |
0847684c | 57 | .set_wakeup = mid_pci_wakeup, |
5823d089 AS |
58 | .need_resume = mid_pci_need_resume, |
59 | }; | |
60 | ||
61 | #define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } | |
62 | ||
8e522e1d AS |
63 | /* |
64 | * This table should be in sync with the one in | |
65 | * arch/x86/platform/intel-mid/pwr.c. | |
66 | */ | |
5823d089 | 67 | static const struct x86_cpu_id lpss_cpu_ids[] = { |
8e522e1d | 68 | ICPU(INTEL_FAM6_ATOM_PENWELL), |
f5fbf848 | 69 | ICPU(INTEL_FAM6_ATOM_MERRIFIELD), |
5823d089 AS |
70 | {} |
71 | }; | |
72 | ||
73 | static int __init mid_pci_init(void) | |
74 | { | |
75 | const struct x86_cpu_id *id; | |
76 | ||
77 | id = x86_match_cpu(lpss_cpu_ids); | |
78 | if (id) | |
79 | pci_set_platform_pm(&mid_pci_platform_pm); | |
80 | return 0; | |
81 | } | |
82 | arch_initcall(mid_pci_init); |