Commit | Line | Data |
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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
df62ab5e | 3 | * PCI support in ACPI |
1da177e4 | 4 | * |
84df749f DSL |
5 | * Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com> |
6 | * Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com> | |
7 | * Copyright (C) 2004 Intel Corp. | |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/init.h> | |
471036b2 | 12 | #include <linux/irqdomain.h> |
1da177e4 | 13 | #include <linux/pci.h> |
471036b2 | 14 | #include <linux/msi.h> |
9ce90ea5 | 15 | #include <linux/pci_hotplug.h> |
1da177e4 | 16 | #include <linux/module.h> |
5fde244d | 17 | #include <linux/pci-aspm.h> |
1da177e4 | 18 | #include <linux/pci-acpi.h> |
b67ea761 | 19 | #include <linux/pm_runtime.h> |
8b713a88 | 20 | #include <linux/pm_qos.h> |
0f64474b | 21 | #include "pci.h" |
1da177e4 | 22 | |
18e94a33 | 23 | /* |
94116f81 | 24 | * The GUID is defined in the PCI Firmware Specification available here: |
18e94a33 AL |
25 | * https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf |
26 | */ | |
94116f81 AS |
27 | const guid_t pci_acpi_dsm_guid = |
28 | GUID_INIT(0xe5c937d0, 0x3553, 0x4d7a, | |
29 | 0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d); | |
18e94a33 | 30 | |
169de969 DL |
31 | #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64) |
32 | static int acpi_get_rc_addr(struct acpi_device *adev, struct resource *res) | |
33 | { | |
34 | struct device *dev = &adev->dev; | |
35 | struct resource_entry *entry; | |
36 | struct list_head list; | |
37 | unsigned long flags; | |
38 | int ret; | |
39 | ||
40 | INIT_LIST_HEAD(&list); | |
41 | flags = IORESOURCE_MEM; | |
42 | ret = acpi_dev_get_resources(adev, &list, | |
43 | acpi_dev_filter_resource_type_cb, | |
44 | (void *) flags); | |
45 | if (ret < 0) { | |
46 | dev_err(dev, "failed to parse _CRS method, error code %d\n", | |
47 | ret); | |
48 | return ret; | |
49 | } | |
50 | ||
51 | if (ret == 0) { | |
52 | dev_err(dev, "no IO and memory resources present in _CRS\n"); | |
53 | return -EINVAL; | |
54 | } | |
55 | ||
56 | entry = list_first_entry(&list, struct resource_entry, node); | |
57 | *res = *entry->res; | |
58 | acpi_dev_free_resource_list(&list); | |
59 | return 0; | |
60 | } | |
61 | ||
62 | static acpi_status acpi_match_rc(acpi_handle handle, u32 lvl, void *context, | |
63 | void **retval) | |
64 | { | |
65 | u16 *segment = context; | |
66 | unsigned long long uid; | |
67 | acpi_status status; | |
68 | ||
69 | status = acpi_evaluate_integer(handle, "_UID", NULL, &uid); | |
70 | if (ACPI_FAILURE(status) || uid != *segment) | |
71 | return AE_CTRL_DEPTH; | |
72 | ||
73 | *(acpi_handle *)retval = handle; | |
74 | return AE_CTRL_TERMINATE; | |
75 | } | |
76 | ||
77 | int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, | |
78 | struct resource *res) | |
79 | { | |
80 | struct acpi_device *adev; | |
81 | acpi_status status; | |
82 | acpi_handle handle; | |
83 | int ret; | |
84 | ||
85 | status = acpi_get_devices(hid, acpi_match_rc, &segment, &handle); | |
86 | if (ACPI_FAILURE(status)) { | |
87 | dev_err(dev, "can't find _HID %s device to locate resources\n", | |
88 | hid); | |
89 | return -ENODEV; | |
90 | } | |
91 | ||
92 | ret = acpi_bus_get_device(handle, &adev); | |
93 | if (ret) | |
94 | return ret; | |
95 | ||
96 | ret = acpi_get_rc_addr(adev, res); | |
97 | if (ret) { | |
98 | dev_err(dev, "can't get resource from %s\n", | |
99 | dev_name(&adev->dev)); | |
100 | return ret; | |
101 | } | |
102 | ||
103 | return 0; | |
104 | } | |
105 | #endif | |
106 | ||
f4b57a3b JL |
107 | phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle) |
108 | { | |
109 | acpi_status status = AE_NOT_EXIST; | |
110 | unsigned long long mcfg_addr; | |
111 | ||
112 | if (handle) | |
113 | status = acpi_evaluate_integer(handle, METHOD_NAME__CBA, | |
114 | NULL, &mcfg_addr); | |
115 | if (ACPI_FAILURE(status)) | |
116 | return 0; | |
117 | ||
118 | return (phys_addr_t)mcfg_addr; | |
119 | } | |
120 | ||
abbfec34 BH |
121 | static acpi_status decode_type0_hpx_record(union acpi_object *record, |
122 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
123 | { |
124 | int i; | |
125 | union acpi_object *fields = record->package.elements; | |
126 | u32 revision = fields[1].integer.value; | |
127 | ||
128 | switch (revision) { | |
129 | case 1: | |
130 | if (record->package.count != 6) | |
131 | return AE_ERROR; | |
132 | for (i = 2; i < 6; i++) | |
133 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
134 | return AE_ERROR; | |
135 | hpx->t0 = &hpx->type0_data; | |
136 | hpx->t0->revision = revision; | |
137 | hpx->t0->cache_line_size = fields[2].integer.value; | |
138 | hpx->t0->latency_timer = fields[3].integer.value; | |
139 | hpx->t0->enable_serr = fields[4].integer.value; | |
140 | hpx->t0->enable_perr = fields[5].integer.value; | |
141 | break; | |
142 | default: | |
143 | printk(KERN_WARNING | |
144 | "%s: Type 0 Revision %d record not supported\n", | |
145 | __func__, revision); | |
146 | return AE_ERROR; | |
147 | } | |
148 | return AE_OK; | |
149 | } | |
150 | ||
abbfec34 BH |
151 | static acpi_status decode_type1_hpx_record(union acpi_object *record, |
152 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
153 | { |
154 | int i; | |
155 | union acpi_object *fields = record->package.elements; | |
156 | u32 revision = fields[1].integer.value; | |
157 | ||
158 | switch (revision) { | |
159 | case 1: | |
160 | if (record->package.count != 5) | |
161 | return AE_ERROR; | |
162 | for (i = 2; i < 5; i++) | |
163 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
164 | return AE_ERROR; | |
165 | hpx->t1 = &hpx->type1_data; | |
166 | hpx->t1->revision = revision; | |
167 | hpx->t1->max_mem_read = fields[2].integer.value; | |
168 | hpx->t1->avg_max_split = fields[3].integer.value; | |
169 | hpx->t1->tot_max_split = fields[4].integer.value; | |
170 | break; | |
171 | default: | |
172 | printk(KERN_WARNING | |
173 | "%s: Type 1 Revision %d record not supported\n", | |
174 | __func__, revision); | |
175 | return AE_ERROR; | |
176 | } | |
177 | return AE_OK; | |
178 | } | |
179 | ||
abbfec34 BH |
180 | static acpi_status decode_type2_hpx_record(union acpi_object *record, |
181 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
182 | { |
183 | int i; | |
184 | union acpi_object *fields = record->package.elements; | |
185 | u32 revision = fields[1].integer.value; | |
186 | ||
187 | switch (revision) { | |
188 | case 1: | |
189 | if (record->package.count != 18) | |
190 | return AE_ERROR; | |
191 | for (i = 2; i < 18; i++) | |
192 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
193 | return AE_ERROR; | |
194 | hpx->t2 = &hpx->type2_data; | |
195 | hpx->t2->revision = revision; | |
196 | hpx->t2->unc_err_mask_and = fields[2].integer.value; | |
197 | hpx->t2->unc_err_mask_or = fields[3].integer.value; | |
198 | hpx->t2->unc_err_sever_and = fields[4].integer.value; | |
199 | hpx->t2->unc_err_sever_or = fields[5].integer.value; | |
200 | hpx->t2->cor_err_mask_and = fields[6].integer.value; | |
201 | hpx->t2->cor_err_mask_or = fields[7].integer.value; | |
202 | hpx->t2->adv_err_cap_and = fields[8].integer.value; | |
203 | hpx->t2->adv_err_cap_or = fields[9].integer.value; | |
204 | hpx->t2->pci_exp_devctl_and = fields[10].integer.value; | |
205 | hpx->t2->pci_exp_devctl_or = fields[11].integer.value; | |
206 | hpx->t2->pci_exp_lnkctl_and = fields[12].integer.value; | |
207 | hpx->t2->pci_exp_lnkctl_or = fields[13].integer.value; | |
208 | hpx->t2->sec_unc_err_sever_and = fields[14].integer.value; | |
209 | hpx->t2->sec_unc_err_sever_or = fields[15].integer.value; | |
210 | hpx->t2->sec_unc_err_mask_and = fields[16].integer.value; | |
211 | hpx->t2->sec_unc_err_mask_or = fields[17].integer.value; | |
212 | break; | |
213 | default: | |
214 | printk(KERN_WARNING | |
215 | "%s: Type 2 Revision %d record not supported\n", | |
216 | __func__, revision); | |
217 | return AE_ERROR; | |
218 | } | |
219 | return AE_OK; | |
220 | } | |
221 | ||
abbfec34 | 222 | static acpi_status acpi_run_hpx(acpi_handle handle, struct hotplug_params *hpx) |
9ce90ea5 BH |
223 | { |
224 | acpi_status status; | |
225 | struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; | |
226 | union acpi_object *package, *record, *fields; | |
227 | u32 type; | |
228 | int i; | |
229 | ||
230 | /* Clear the return buffer with zeros */ | |
231 | memset(hpx, 0, sizeof(struct hotplug_params)); | |
232 | ||
233 | status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer); | |
234 | if (ACPI_FAILURE(status)) | |
235 | return status; | |
236 | ||
237 | package = (union acpi_object *)buffer.pointer; | |
238 | if (package->type != ACPI_TYPE_PACKAGE) { | |
239 | status = AE_ERROR; | |
240 | goto exit; | |
241 | } | |
242 | ||
243 | for (i = 0; i < package->package.count; i++) { | |
244 | record = &package->package.elements[i]; | |
245 | if (record->type != ACPI_TYPE_PACKAGE) { | |
246 | status = AE_ERROR; | |
247 | goto exit; | |
248 | } | |
249 | ||
250 | fields = record->package.elements; | |
251 | if (fields[0].type != ACPI_TYPE_INTEGER || | |
252 | fields[1].type != ACPI_TYPE_INTEGER) { | |
253 | status = AE_ERROR; | |
254 | goto exit; | |
255 | } | |
256 | ||
257 | type = fields[0].integer.value; | |
258 | switch (type) { | |
259 | case 0: | |
260 | status = decode_type0_hpx_record(record, hpx); | |
261 | if (ACPI_FAILURE(status)) | |
262 | goto exit; | |
263 | break; | |
264 | case 1: | |
265 | status = decode_type1_hpx_record(record, hpx); | |
266 | if (ACPI_FAILURE(status)) | |
267 | goto exit; | |
268 | break; | |
269 | case 2: | |
270 | status = decode_type2_hpx_record(record, hpx); | |
271 | if (ACPI_FAILURE(status)) | |
272 | goto exit; | |
273 | break; | |
274 | default: | |
275 | printk(KERN_ERR "%s: Type %d record not supported\n", | |
276 | __func__, type); | |
277 | status = AE_ERROR; | |
278 | goto exit; | |
279 | } | |
280 | } | |
281 | exit: | |
282 | kfree(buffer.pointer); | |
283 | return status; | |
284 | } | |
285 | ||
abbfec34 | 286 | static acpi_status acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp) |
9ce90ea5 BH |
287 | { |
288 | acpi_status status; | |
289 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
290 | union acpi_object *package, *fields; | |
291 | int i; | |
292 | ||
293 | memset(hpp, 0, sizeof(struct hotplug_params)); | |
294 | ||
295 | status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer); | |
296 | if (ACPI_FAILURE(status)) | |
297 | return status; | |
298 | ||
299 | package = (union acpi_object *) buffer.pointer; | |
300 | if (package->type != ACPI_TYPE_PACKAGE || | |
301 | package->package.count != 4) { | |
302 | status = AE_ERROR; | |
303 | goto exit; | |
304 | } | |
305 | ||
306 | fields = package->package.elements; | |
307 | for (i = 0; i < 4; i++) { | |
308 | if (fields[i].type != ACPI_TYPE_INTEGER) { | |
309 | status = AE_ERROR; | |
310 | goto exit; | |
311 | } | |
312 | } | |
313 | ||
314 | hpp->t0 = &hpp->type0_data; | |
315 | hpp->t0->revision = 1; | |
316 | hpp->t0->cache_line_size = fields[0].integer.value; | |
317 | hpp->t0->latency_timer = fields[1].integer.value; | |
318 | hpp->t0->enable_serr = fields[2].integer.value; | |
319 | hpp->t0->enable_perr = fields[3].integer.value; | |
320 | ||
321 | exit: | |
322 | kfree(buffer.pointer); | |
323 | return status; | |
324 | } | |
325 | ||
326 | /* pci_get_hp_params | |
327 | * | |
328 | * @dev - the pci_dev for which we want parameters | |
329 | * @hpp - allocated by the caller | |
330 | */ | |
331 | int pci_get_hp_params(struct pci_dev *dev, struct hotplug_params *hpp) | |
332 | { | |
333 | acpi_status status; | |
334 | acpi_handle handle, phandle; | |
335 | struct pci_bus *pbus; | |
336 | ||
8647ca9a BH |
337 | if (acpi_pci_disabled) |
338 | return -ENODEV; | |
339 | ||
9ce90ea5 BH |
340 | handle = NULL; |
341 | for (pbus = dev->bus; pbus; pbus = pbus->parent) { | |
342 | handle = acpi_pci_get_bridge_handle(pbus); | |
343 | if (handle) | |
344 | break; | |
345 | } | |
346 | ||
347 | /* | |
348 | * _HPP settings apply to all child buses, until another _HPP is | |
349 | * encountered. If we don't find an _HPP for the input pci dev, | |
350 | * look for it in the parent device scope since that would apply to | |
351 | * this pci dev. | |
352 | */ | |
353 | while (handle) { | |
354 | status = acpi_run_hpx(handle, hpp); | |
355 | if (ACPI_SUCCESS(status)) | |
356 | return 0; | |
357 | status = acpi_run_hpp(handle, hpp); | |
358 | if (ACPI_SUCCESS(status)) | |
359 | return 0; | |
360 | if (acpi_is_root_bridge(handle)) | |
361 | break; | |
362 | status = acpi_get_parent(handle, &phandle); | |
363 | if (ACPI_FAILURE(status)) | |
364 | break; | |
365 | handle = phandle; | |
366 | } | |
367 | return -ENODEV; | |
368 | } | |
9ce90ea5 | 369 | |
437eb7bf LW |
370 | /** |
371 | * pciehp_is_native - Check whether a hotplug port is handled by the OS | |
5352a44a | 372 | * @bridge: Hotplug port to check |
437eb7bf | 373 | * |
5352a44a MW |
374 | * Returns true if the given @bridge is handled by the native PCIe hotplug |
375 | * driver. | |
437eb7bf | 376 | */ |
5352a44a | 377 | bool pciehp_is_native(struct pci_dev *bridge) |
437eb7bf | 378 | { |
5352a44a MW |
379 | const struct pci_host_bridge *host; |
380 | u32 slot_cap; | |
437eb7bf | 381 | |
5352a44a | 382 | if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) |
437eb7bf LW |
383 | return false; |
384 | ||
5352a44a MW |
385 | pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap); |
386 | if (!(slot_cap & PCI_EXP_SLTCAP_HPC)) | |
437eb7bf LW |
387 | return false; |
388 | ||
5352a44a MW |
389 | if (pcie_ports_native) |
390 | return true; | |
391 | ||
392 | host = pci_find_host_bridge(bridge->bus); | |
393 | return host->native_pcie_hotplug; | |
437eb7bf LW |
394 | } |
395 | ||
90cc0c3c MW |
396 | /** |
397 | * shpchp_is_native - Check whether a hotplug port is handled by the OS | |
398 | * @bridge: Hotplug port to check | |
399 | * | |
400 | * Returns true if the given @bridge is handled by the native SHPC hotplug | |
401 | * driver. | |
402 | */ | |
403 | bool shpchp_is_native(struct pci_dev *bridge) | |
404 | { | |
b03799b0 | 405 | return bridge->shpc_managed; |
90cc0c3c MW |
406 | } |
407 | ||
5e3d2344 BH |
408 | /** |
409 | * pci_acpi_wake_bus - Root bus wakeup notification fork function. | |
64fd1c70 | 410 | * @context: Device wakeup context. |
5e3d2344 | 411 | */ |
64fd1c70 | 412 | static void pci_acpi_wake_bus(struct acpi_device_wakeup_context *context) |
5e3d2344 BH |
413 | { |
414 | struct acpi_device *adev; | |
415 | struct acpi_pci_root *root; | |
416 | ||
64fd1c70 | 417 | adev = container_of(context, struct acpi_device, wakeup.context); |
5e3d2344 BH |
418 | root = acpi_driver_data(adev); |
419 | pci_pme_wakeup_bus(root->bus); | |
420 | } | |
421 | ||
422 | /** | |
423 | * pci_acpi_wake_dev - PCI device wakeup notification work function. | |
64fd1c70 | 424 | * @context: Device wakeup context. |
5e3d2344 | 425 | */ |
64fd1c70 | 426 | static void pci_acpi_wake_dev(struct acpi_device_wakeup_context *context) |
5e3d2344 | 427 | { |
5e3d2344 BH |
428 | struct pci_dev *pci_dev; |
429 | ||
5e3d2344 BH |
430 | pci_dev = to_pci_dev(context->dev); |
431 | ||
432 | if (pci_dev->pme_poll) | |
433 | pci_dev->pme_poll = false; | |
434 | ||
435 | if (pci_dev->current_state == PCI_D3cold) { | |
436 | pci_wakeup_event(pci_dev); | |
64fd1c70 | 437 | pm_request_resume(&pci_dev->dev); |
5e3d2344 BH |
438 | return; |
439 | } | |
440 | ||
441 | /* Clear PME Status if set. */ | |
442 | if (pci_dev->pme_support) | |
443 | pci_check_pme_status(pci_dev); | |
444 | ||
445 | pci_wakeup_event(pci_dev); | |
64fd1c70 | 446 | pm_request_resume(&pci_dev->dev); |
5e3d2344 | 447 | |
ff0387c3 | 448 | pci_pme_wakeup_bus(pci_dev->subordinate); |
5e3d2344 BH |
449 | } |
450 | ||
451 | /** | |
452 | * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus. | |
453 | * @dev: PCI root bridge ACPI device. | |
454 | */ | |
455 | acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev) | |
456 | { | |
457 | return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus); | |
458 | } | |
459 | ||
460 | /** | |
461 | * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device. | |
462 | * @dev: ACPI device to add the notifier for. | |
463 | * @pci_dev: PCI device to check for the PME status if an event is signaled. | |
464 | */ | |
465 | acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev, | |
466 | struct pci_dev *pci_dev) | |
467 | { | |
468 | return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev); | |
469 | } | |
470 | ||
0f64474b DSL |
471 | /* |
472 | * _SxD returns the D-state with the highest power | |
473 | * (lowest D-state number) supported in the S-state "x". | |
474 | * | |
475 | * If the devices does not have a _PRW | |
476 | * (Power Resources for Wake) supporting system wakeup from "x" | |
477 | * then the OS is free to choose a lower power (higher number | |
478 | * D-state) than the return value from _SxD. | |
479 | * | |
480 | * But if _PRW is enabled at S-state "x", the OS | |
481 | * must not choose a power lower than _SxD -- | |
482 | * unless the device has an _SxW method specifying | |
483 | * the lowest power (highest D-state number) the device | |
484 | * may enter while still able to wake the system. | |
485 | * | |
486 | * ie. depending on global OS policy: | |
487 | * | |
488 | * if (_PRW at S-state x) | |
489 | * choose from highest power _SxD to lowest power _SxW | |
490 | * else // no _PRW at S-state x | |
f7625980 | 491 | * choose highest power _SxD or any lower power |
0f64474b DSL |
492 | */ |
493 | ||
8d2bdf49 | 494 | static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) |
0f64474b | 495 | { |
448bd857 | 496 | int acpi_state, d_max; |
0f64474b | 497 | |
448bd857 HY |
498 | if (pdev->no_d3cold) |
499 | d_max = ACPI_STATE_D3_HOT; | |
500 | else | |
501 | d_max = ACPI_STATE_D3_COLD; | |
502 | acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); | |
ab826ca4 SL |
503 | if (acpi_state < 0) |
504 | return PCI_POWER_ERROR; | |
505 | ||
506 | switch (acpi_state) { | |
507 | case ACPI_STATE_D0: | |
508 | return PCI_D0; | |
509 | case ACPI_STATE_D1: | |
510 | return PCI_D1; | |
511 | case ACPI_STATE_D2: | |
512 | return PCI_D2; | |
1cc0c998 | 513 | case ACPI_STATE_D3_HOT: |
ab826ca4 | 514 | return PCI_D3hot; |
28c2103d LM |
515 | case ACPI_STATE_D3_COLD: |
516 | return PCI_D3cold; | |
ab826ca4 SL |
517 | } |
518 | return PCI_POWER_ERROR; | |
0f64474b | 519 | } |
961d9120 | 520 | |
26ad34d5 MW |
521 | static struct acpi_device *acpi_pci_find_companion(struct device *dev); |
522 | ||
523 | static bool acpi_pci_bridge_d3(struct pci_dev *dev) | |
524 | { | |
525 | const struct fwnode_handle *fwnode; | |
526 | struct acpi_device *adev; | |
527 | struct pci_dev *root; | |
528 | u8 val; | |
529 | ||
530 | if (!dev->is_hotplug_bridge) | |
531 | return false; | |
532 | ||
533 | /* | |
534 | * Look for a special _DSD property for the root port and if it | |
535 | * is set we know the hierarchy behind it supports D3 just fine. | |
536 | */ | |
537 | root = pci_find_pcie_root_port(dev); | |
538 | if (!root) | |
539 | return false; | |
540 | ||
541 | adev = ACPI_COMPANION(&root->dev); | |
542 | if (root == dev) { | |
543 | /* | |
544 | * It is possible that the ACPI companion is not yet bound | |
545 | * for the root port so look it up manually here. | |
546 | */ | |
547 | if (!adev && !pci_dev_is_added(root)) | |
548 | adev = acpi_pci_find_companion(&root->dev); | |
549 | } | |
550 | ||
551 | if (!adev) | |
552 | return false; | |
553 | ||
554 | fwnode = acpi_fwnode_handle(adev); | |
555 | if (fwnode_property_read_u8(fwnode, "HotPlugSupportInD3", &val)) | |
556 | return false; | |
557 | ||
558 | return val == 1; | |
559 | } | |
560 | ||
961d9120 RW |
561 | static bool acpi_pci_power_manageable(struct pci_dev *dev) |
562 | { | |
85dbb3d0 RW |
563 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
564 | return adev ? acpi_device_power_manageable(adev) : false; | |
961d9120 | 565 | } |
0f64474b | 566 | |
b913100d DSL |
567 | static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
568 | { | |
85dbb3d0 | 569 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
583c377f DB |
570 | static const u8 state_conv[] = { |
571 | [PCI_D0] = ACPI_STATE_D0, | |
572 | [PCI_D1] = ACPI_STATE_D1, | |
573 | [PCI_D2] = ACPI_STATE_D2, | |
20dacb71 | 574 | [PCI_D3hot] = ACPI_STATE_D3_HOT, |
fc6504b3 | 575 | [PCI_D3cold] = ACPI_STATE_D3_COLD, |
b913100d | 576 | }; |
44e4e66e | 577 | int error = -EINVAL; |
b913100d | 578 | |
10b3dcae | 579 | /* If the ACPI device has _EJ0, ignore the device */ |
85dbb3d0 | 580 | if (!adev || acpi_has_method(adev->handle, "_EJ0")) |
44e4e66e | 581 | return -ENODEV; |
583c377f DB |
582 | |
583 | switch (state) { | |
8b713a88 RW |
584 | case PCI_D3cold: |
585 | if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == | |
586 | PM_QOS_FLAGS_ALL) { | |
587 | error = -EBUSY; | |
588 | break; | |
589 | } | |
fa295bec | 590 | /* Fall through */ |
583c377f DB |
591 | case PCI_D0: |
592 | case PCI_D1: | |
593 | case PCI_D2: | |
594 | case PCI_D3hot: | |
85dbb3d0 | 595 | error = acpi_device_set_power(adev, state_conv[state]); |
583c377f | 596 | } |
44e4e66e RW |
597 | |
598 | if (!error) | |
7506dc79 | 599 | pci_dbg(dev, "power state changed by ACPI to %s\n", |
fc6504b3 | 600 | acpi_power_state_string(state_conv[state])); |
44e4e66e RW |
601 | |
602 | return error; | |
b913100d DSL |
603 | } |
604 | ||
cc7cc02b LW |
605 | static pci_power_t acpi_pci_get_power_state(struct pci_dev *dev) |
606 | { | |
607 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); | |
608 | static const pci_power_t state_conv[] = { | |
609 | [ACPI_STATE_D0] = PCI_D0, | |
610 | [ACPI_STATE_D1] = PCI_D1, | |
611 | [ACPI_STATE_D2] = PCI_D2, | |
612 | [ACPI_STATE_D3_HOT] = PCI_D3hot, | |
613 | [ACPI_STATE_D3_COLD] = PCI_D3cold, | |
614 | }; | |
615 | int state; | |
616 | ||
617 | if (!adev || !acpi_device_power_manageable(adev)) | |
618 | return PCI_UNKNOWN; | |
619 | ||
620 | if (acpi_device_get_power(adev, &state) || state == ACPI_STATE_UNKNOWN) | |
621 | return PCI_UNKNOWN; | |
622 | ||
623 | return state_conv[state]; | |
624 | } | |
625 | ||
8370c2dc | 626 | static int acpi_pci_propagate_wakeup(struct pci_bus *bus, bool enable) |
0baed8da RW |
627 | { |
628 | while (bus->parent) { | |
8370c2dc | 629 | if (acpi_pm_device_can_wakeup(&bus->self->dev)) |
1ba51a7c | 630 | return acpi_pm_set_bridge_wakeup(&bus->self->dev, enable); |
0baed8da | 631 | |
b67ea761 RW |
632 | bus = bus->parent; |
633 | } | |
634 | ||
635 | /* We have reached the root bus. */ | |
8370c2dc RW |
636 | if (bus->bridge) { |
637 | if (acpi_pm_device_can_wakeup(bus->bridge)) | |
1ba51a7c | 638 | return acpi_pm_set_bridge_wakeup(bus->bridge, enable); |
8370c2dc RW |
639 | } |
640 | return 0; | |
b67ea761 RW |
641 | } |
642 | ||
8370c2dc | 643 | static int acpi_pci_wakeup(struct pci_dev *dev, bool enable) |
b67ea761 | 644 | { |
8370c2dc RW |
645 | if (acpi_pm_device_can_wakeup(&dev->dev)) |
646 | return acpi_pm_set_device_wakeup(&dev->dev, enable); | |
b67ea761 | 647 | |
8370c2dc | 648 | return acpi_pci_propagate_wakeup(dev->bus, enable); |
b67ea761 RW |
649 | } |
650 | ||
bac2a909 RW |
651 | static bool acpi_pci_need_resume(struct pci_dev *dev) |
652 | { | |
653 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); | |
654 | ||
26112ddc RW |
655 | /* |
656 | * In some cases (eg. Samsung 305V4A) leaving a bridge in suspend over | |
657 | * system-wide suspend/resume confuses the platform firmware, so avoid | |
9d64b539 | 658 | * doing that. According to Section 16.1.6 of ACPI 6.2, endpoint |
26112ddc RW |
659 | * devices are expected to be in D3 before invoking the S3 entry path |
660 | * from the firmware, so they should not be affected by this issue. | |
661 | */ | |
9d64b539 | 662 | if (pci_is_bridge(dev) && acpi_target_system_state() != ACPI_STATE_S0) |
26112ddc RW |
663 | return true; |
664 | ||
bac2a909 RW |
665 | if (!adev || !acpi_device_power_manageable(adev)) |
666 | return false; | |
667 | ||
668 | if (device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) | |
669 | return true; | |
670 | ||
671 | if (acpi_target_system_state() == ACPI_STATE_S0) | |
672 | return false; | |
673 | ||
674 | return !!adev->power.flags.dsw_present; | |
675 | } | |
676 | ||
299f2ffe | 677 | static const struct pci_platform_pm_ops acpi_pci_platform_pm = { |
26ad34d5 | 678 | .bridge_d3 = acpi_pci_bridge_d3, |
961d9120 RW |
679 | .is_manageable = acpi_pci_power_manageable, |
680 | .set_state = acpi_pci_set_power_state, | |
cc7cc02b | 681 | .get_state = acpi_pci_get_power_state, |
961d9120 | 682 | .choose_state = acpi_pci_choose_state, |
0847684c | 683 | .set_wakeup = acpi_pci_wakeup, |
bac2a909 | 684 | .need_resume = acpi_pci_need_resume, |
961d9120 | 685 | }; |
b913100d | 686 | |
5090d4a6 JL |
687 | void acpi_pci_add_bus(struct pci_bus *bus) |
688 | { | |
e33caa82 AL |
689 | union acpi_object *obj; |
690 | struct pci_host_bridge *bridge; | |
691 | ||
a0040c01 | 692 | if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge)) |
5090d4a6 JL |
693 | return; |
694 | ||
be1c9de9 RW |
695 | acpi_pci_slot_enumerate(bus); |
696 | acpiphp_enumerate_slots(bus); | |
e33caa82 AL |
697 | |
698 | /* | |
699 | * For a host bridge, check its _DSM for function 8 and if | |
700 | * that is available, mark it in pci_host_bridge. | |
701 | */ | |
702 | if (!pci_is_root_bus(bus)) | |
703 | return; | |
704 | ||
94116f81 | 705 | obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3, |
e33caa82 AL |
706 | RESET_DELAY_DSM, NULL); |
707 | if (!obj) | |
708 | return; | |
709 | ||
710 | if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) { | |
711 | bridge = pci_find_host_bridge(bus); | |
712 | bridge->ignore_reset_delay = 1; | |
713 | } | |
714 | ACPI_FREE(obj); | |
5090d4a6 JL |
715 | } |
716 | ||
717 | void acpi_pci_remove_bus(struct pci_bus *bus) | |
718 | { | |
be1c9de9 | 719 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
720 | return; |
721 | ||
3b63aaa7 | 722 | acpiphp_remove_slots(bus); |
5c0b04e3 | 723 | acpi_pci_slot_remove(bus); |
5090d4a6 JL |
724 | } |
725 | ||
84df749f | 726 | /* ACPI bus type */ |
e3f02c52 | 727 | static struct acpi_device *acpi_pci_find_companion(struct device *dev) |
84df749f | 728 | { |
60f75b8e | 729 | struct pci_dev *pci_dev = to_pci_dev(dev); |
5ce79d20 | 730 | bool check_children; |
60f75b8e | 731 | u64 addr; |
84df749f | 732 | |
6788a51f | 733 | check_children = pci_is_bridge(pci_dev); |
84df749f DSL |
734 | /* Please ref to ACPI spec for the syntax of _ADR */ |
735 | addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); | |
e3f02c52 | 736 | return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, |
5ce79d20 | 737 | check_children); |
84df749f DSL |
738 | } |
739 | ||
e33caa82 AL |
740 | /** |
741 | * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI | |
742 | * @pdev: the PCI device whose delay is to be updated | |
113e0d11 | 743 | * @handle: ACPI handle of this device |
e33caa82 AL |
744 | * |
745 | * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM | |
746 | * control method of either the device itself or the PCI host bridge. | |
747 | * | |
748 | * Function 8, "Reset Delay," applies to the entire hierarchy below a PCI | |
749 | * host bridge. If it returns one, the OS may assume that all devices in | |
750 | * the hierarchy have already completed power-on reset delays. | |
751 | * | |
752 | * Function 9, "Device Readiness Durations," applies only to the object | |
753 | * where it is located. It returns delay durations required after various | |
754 | * events if the device requires less time than the spec requires. Delays | |
755 | * from this function take precedence over the Reset Delay function. | |
756 | * | |
757 | * These _DSM functions are defined by the draft ECN of January 28, 2014, | |
758 | * titled "ACPI additions for FW latency optimizations." | |
759 | */ | |
760 | static void pci_acpi_optimize_delay(struct pci_dev *pdev, | |
761 | acpi_handle handle) | |
762 | { | |
763 | struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); | |
764 | int value; | |
765 | union acpi_object *obj, *elements; | |
766 | ||
767 | if (bridge->ignore_reset_delay) | |
768 | pdev->d3cold_delay = 0; | |
769 | ||
94116f81 | 770 | obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3, |
e33caa82 AL |
771 | FUNCTION_DELAY_DSM, NULL); |
772 | if (!obj) | |
773 | return; | |
774 | ||
775 | if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { | |
776 | elements = obj->package.elements; | |
777 | if (elements[0].type == ACPI_TYPE_INTEGER) { | |
778 | value = (int)elements[0].integer.value / 1000; | |
779 | if (value < PCI_PM_D3COLD_WAIT) | |
780 | pdev->d3cold_delay = value; | |
781 | } | |
782 | if (elements[3].type == ACPI_TYPE_INTEGER) { | |
783 | value = (int)elements[3].integer.value / 1000; | |
784 | if (value < PCI_PM_D3_WAIT) | |
785 | pdev->d3_delay = value; | |
786 | } | |
787 | } | |
788 | ACPI_FREE(obj); | |
789 | } | |
790 | ||
617654aa MW |
791 | static void pci_acpi_set_untrusted(struct pci_dev *dev) |
792 | { | |
793 | u8 val; | |
794 | ||
795 | if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) | |
796 | return; | |
797 | if (device_property_read_u8(&dev->dev, "ExternalFacingPort", &val)) | |
798 | return; | |
799 | ||
800 | /* | |
801 | * These root ports expose PCIe (including DMA) outside of the | |
802 | * system so make sure we treat them and everything behind as | |
803 | * untrusted. | |
804 | */ | |
805 | if (val) | |
806 | dev->untrusted = 1; | |
807 | } | |
808 | ||
38a9a67a | 809 | static void pci_acpi_setup(struct device *dev) |
d2e5f0c1 | 810 | { |
d2e5f0c1 | 811 | struct pci_dev *pci_dev = to_pci_dev(dev); |
f084280c | 812 | struct acpi_device *adev = ACPI_COMPANION(dev); |
38a9a67a | 813 | |
f084280c RW |
814 | if (!adev) |
815 | return; | |
816 | ||
e33caa82 | 817 | pci_acpi_optimize_delay(pci_dev, adev->handle); |
617654aa | 818 | pci_acpi_set_untrusted(pci_dev); |
e33caa82 | 819 | |
f084280c RW |
820 | pci_acpi_add_pm_notifier(adev, pci_dev); |
821 | if (!adev->wakeup.flags.valid) | |
d2e5f0c1 RW |
822 | return; |
823 | ||
824 | device_set_wakeup_capable(dev, true); | |
6299cf9e MW |
825 | /* |
826 | * For bridges that can do D3 we enable wake automatically (as | |
827 | * we do for the power management itself in that case). The | |
828 | * reason is that the bridge may have additional methods such as | |
829 | * _DSW that need to be called. | |
830 | */ | |
831 | if (pci_dev->bridge_d3) | |
832 | device_wakeup_enable(dev); | |
833 | ||
8370c2dc | 834 | acpi_pci_wakeup(pci_dev, false); |
d2e5f0c1 RW |
835 | } |
836 | ||
38a9a67a | 837 | static void pci_acpi_cleanup(struct device *dev) |
d2e5f0c1 | 838 | { |
f084280c | 839 | struct acpi_device *adev = ACPI_COMPANION(dev); |
6299cf9e | 840 | struct pci_dev *pci_dev = to_pci_dev(dev); |
f084280c RW |
841 | |
842 | if (!adev) | |
843 | return; | |
d2e5f0c1 | 844 | |
f084280c | 845 | pci_acpi_remove_pm_notifier(adev); |
6299cf9e MW |
846 | if (adev->wakeup.flags.valid) { |
847 | if (pci_dev->bridge_d3) | |
848 | device_wakeup_disable(dev); | |
849 | ||
d2e5f0c1 | 850 | device_set_wakeup_capable(dev, false); |
6299cf9e | 851 | } |
d2e5f0c1 RW |
852 | } |
853 | ||
53540098 RW |
854 | static bool pci_acpi_bus_match(struct device *dev) |
855 | { | |
40c368c1 | 856 | return dev_is_pci(dev); |
53540098 RW |
857 | } |
858 | ||
9c273b95 | 859 | static struct acpi_bus_type acpi_pci_bus = { |
53540098 RW |
860 | .name = "PCI", |
861 | .match = pci_acpi_bus_match, | |
e3f02c52 | 862 | .find_companion = acpi_pci_find_companion, |
38a9a67a RW |
863 | .setup = pci_acpi_setup, |
864 | .cleanup = pci_acpi_cleanup, | |
84df749f DSL |
865 | }; |
866 | ||
471036b2 SS |
867 | |
868 | static struct fwnode_handle *(*pci_msi_get_fwnode_cb)(struct device *dev); | |
869 | ||
870 | /** | |
871 | * pci_msi_register_fwnode_provider - Register callback to retrieve fwnode | |
872 | * @fn: Callback matching a device to a fwnode that identifies a PCI | |
873 | * MSI domain. | |
874 | * | |
875 | * This should be called by irqchip driver, which is the parent of | |
876 | * the MSI domain to provide callback interface to query fwnode. | |
877 | */ | |
878 | void | |
879 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)) | |
880 | { | |
881 | pci_msi_get_fwnode_cb = fn; | |
882 | } | |
883 | ||
884 | /** | |
885 | * pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge | |
886 | * @bus: The PCI host bridge bus. | |
887 | * | |
888 | * This function uses the callback function registered by | |
889 | * pci_msi_register_fwnode_provider() to retrieve the irq_domain with | |
890 | * type DOMAIN_BUS_PCI_MSI of the specified host bridge bus. | |
891 | * This returns NULL on error or when the domain is not found. | |
892 | */ | |
893 | struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) | |
894 | { | |
895 | struct fwnode_handle *fwnode; | |
896 | ||
897 | if (!pci_msi_get_fwnode_cb) | |
898 | return NULL; | |
899 | ||
900 | fwnode = pci_msi_get_fwnode_cb(&bus->dev); | |
901 | if (!fwnode) | |
902 | return NULL; | |
903 | ||
904 | return irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI); | |
905 | } | |
906 | ||
9c273b95 | 907 | static int __init acpi_pci_init(void) |
84df749f DSL |
908 | { |
909 | int ret; | |
910 | ||
993958fe | 911 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { |
e7d45152 | 912 | pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); |
f8993aff SL |
913 | pci_no_msi(); |
914 | } | |
5fde244d | 915 | |
993958fe | 916 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
e7d45152 | 917 | pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); |
5fde244d SL |
918 | pcie_no_aspm(); |
919 | } | |
920 | ||
9c273b95 | 921 | ret = register_acpi_bus_type(&acpi_pci_bus); |
84df749f DSL |
922 | if (ret) |
923 | return 0; | |
5c0b04e3 | 924 | |
961d9120 | 925 | pci_set_platform_pm(&acpi_pci_platform_pm); |
5c0b04e3 | 926 | acpi_pci_slot_init(); |
3b63aaa7 | 927 | acpiphp_init(); |
5c0b04e3 | 928 | |
84df749f DSL |
929 | return 0; |
930 | } | |
9c273b95 | 931 | arch_initcall(acpi_pci_init); |