Commit | Line | Data |
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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
df62ab5e | 3 | * PCI support in ACPI |
1da177e4 | 4 | * |
84df749f DSL |
5 | * Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com> |
6 | * Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com> | |
7 | * Copyright (C) 2004 Intel Corp. | |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/init.h> | |
471036b2 | 12 | #include <linux/irqdomain.h> |
1da177e4 | 13 | #include <linux/pci.h> |
471036b2 | 14 | #include <linux/msi.h> |
9ce90ea5 | 15 | #include <linux/pci_hotplug.h> |
1da177e4 | 16 | #include <linux/module.h> |
5fde244d | 17 | #include <linux/pci-aspm.h> |
1da177e4 | 18 | #include <linux/pci-acpi.h> |
b67ea761 | 19 | #include <linux/pm_runtime.h> |
8b713a88 | 20 | #include <linux/pm_qos.h> |
0f64474b | 21 | #include "pci.h" |
1da177e4 | 22 | |
18e94a33 | 23 | /* |
94116f81 | 24 | * The GUID is defined in the PCI Firmware Specification available here: |
18e94a33 AL |
25 | * https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf |
26 | */ | |
94116f81 AS |
27 | const guid_t pci_acpi_dsm_guid = |
28 | GUID_INIT(0xe5c937d0, 0x3553, 0x4d7a, | |
29 | 0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d); | |
18e94a33 | 30 | |
169de969 DL |
31 | #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64) |
32 | static int acpi_get_rc_addr(struct acpi_device *adev, struct resource *res) | |
33 | { | |
34 | struct device *dev = &adev->dev; | |
35 | struct resource_entry *entry; | |
36 | struct list_head list; | |
37 | unsigned long flags; | |
38 | int ret; | |
39 | ||
40 | INIT_LIST_HEAD(&list); | |
41 | flags = IORESOURCE_MEM; | |
42 | ret = acpi_dev_get_resources(adev, &list, | |
43 | acpi_dev_filter_resource_type_cb, | |
44 | (void *) flags); | |
45 | if (ret < 0) { | |
46 | dev_err(dev, "failed to parse _CRS method, error code %d\n", | |
47 | ret); | |
48 | return ret; | |
49 | } | |
50 | ||
51 | if (ret == 0) { | |
52 | dev_err(dev, "no IO and memory resources present in _CRS\n"); | |
53 | return -EINVAL; | |
54 | } | |
55 | ||
56 | entry = list_first_entry(&list, struct resource_entry, node); | |
57 | *res = *entry->res; | |
58 | acpi_dev_free_resource_list(&list); | |
59 | return 0; | |
60 | } | |
61 | ||
62 | static acpi_status acpi_match_rc(acpi_handle handle, u32 lvl, void *context, | |
63 | void **retval) | |
64 | { | |
65 | u16 *segment = context; | |
66 | unsigned long long uid; | |
67 | acpi_status status; | |
68 | ||
69 | status = acpi_evaluate_integer(handle, "_UID", NULL, &uid); | |
70 | if (ACPI_FAILURE(status) || uid != *segment) | |
71 | return AE_CTRL_DEPTH; | |
72 | ||
73 | *(acpi_handle *)retval = handle; | |
74 | return AE_CTRL_TERMINATE; | |
75 | } | |
76 | ||
77 | int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, | |
78 | struct resource *res) | |
79 | { | |
80 | struct acpi_device *adev; | |
81 | acpi_status status; | |
82 | acpi_handle handle; | |
83 | int ret; | |
84 | ||
85 | status = acpi_get_devices(hid, acpi_match_rc, &segment, &handle); | |
86 | if (ACPI_FAILURE(status)) { | |
87 | dev_err(dev, "can't find _HID %s device to locate resources\n", | |
88 | hid); | |
89 | return -ENODEV; | |
90 | } | |
91 | ||
92 | ret = acpi_bus_get_device(handle, &adev); | |
93 | if (ret) | |
94 | return ret; | |
95 | ||
96 | ret = acpi_get_rc_addr(adev, res); | |
97 | if (ret) { | |
98 | dev_err(dev, "can't get resource from %s\n", | |
99 | dev_name(&adev->dev)); | |
100 | return ret; | |
101 | } | |
102 | ||
103 | return 0; | |
104 | } | |
105 | #endif | |
106 | ||
f4b57a3b JL |
107 | phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle) |
108 | { | |
109 | acpi_status status = AE_NOT_EXIST; | |
110 | unsigned long long mcfg_addr; | |
111 | ||
112 | if (handle) | |
113 | status = acpi_evaluate_integer(handle, METHOD_NAME__CBA, | |
114 | NULL, &mcfg_addr); | |
115 | if (ACPI_FAILURE(status)) | |
116 | return 0; | |
117 | ||
118 | return (phys_addr_t)mcfg_addr; | |
119 | } | |
120 | ||
abbfec34 BH |
121 | static acpi_status decode_type0_hpx_record(union acpi_object *record, |
122 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
123 | { |
124 | int i; | |
125 | union acpi_object *fields = record->package.elements; | |
126 | u32 revision = fields[1].integer.value; | |
127 | ||
128 | switch (revision) { | |
129 | case 1: | |
130 | if (record->package.count != 6) | |
131 | return AE_ERROR; | |
132 | for (i = 2; i < 6; i++) | |
133 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
134 | return AE_ERROR; | |
135 | hpx->t0 = &hpx->type0_data; | |
136 | hpx->t0->revision = revision; | |
137 | hpx->t0->cache_line_size = fields[2].integer.value; | |
138 | hpx->t0->latency_timer = fields[3].integer.value; | |
139 | hpx->t0->enable_serr = fields[4].integer.value; | |
140 | hpx->t0->enable_perr = fields[5].integer.value; | |
141 | break; | |
142 | default: | |
143 | printk(KERN_WARNING | |
144 | "%s: Type 0 Revision %d record not supported\n", | |
145 | __func__, revision); | |
146 | return AE_ERROR; | |
147 | } | |
148 | return AE_OK; | |
149 | } | |
150 | ||
abbfec34 BH |
151 | static acpi_status decode_type1_hpx_record(union acpi_object *record, |
152 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
153 | { |
154 | int i; | |
155 | union acpi_object *fields = record->package.elements; | |
156 | u32 revision = fields[1].integer.value; | |
157 | ||
158 | switch (revision) { | |
159 | case 1: | |
160 | if (record->package.count != 5) | |
161 | return AE_ERROR; | |
162 | for (i = 2; i < 5; i++) | |
163 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
164 | return AE_ERROR; | |
165 | hpx->t1 = &hpx->type1_data; | |
166 | hpx->t1->revision = revision; | |
167 | hpx->t1->max_mem_read = fields[2].integer.value; | |
168 | hpx->t1->avg_max_split = fields[3].integer.value; | |
169 | hpx->t1->tot_max_split = fields[4].integer.value; | |
170 | break; | |
171 | default: | |
172 | printk(KERN_WARNING | |
173 | "%s: Type 1 Revision %d record not supported\n", | |
174 | __func__, revision); | |
175 | return AE_ERROR; | |
176 | } | |
177 | return AE_OK; | |
178 | } | |
179 | ||
abbfec34 BH |
180 | static acpi_status decode_type2_hpx_record(union acpi_object *record, |
181 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
182 | { |
183 | int i; | |
184 | union acpi_object *fields = record->package.elements; | |
185 | u32 revision = fields[1].integer.value; | |
186 | ||
187 | switch (revision) { | |
188 | case 1: | |
189 | if (record->package.count != 18) | |
190 | return AE_ERROR; | |
191 | for (i = 2; i < 18; i++) | |
192 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
193 | return AE_ERROR; | |
194 | hpx->t2 = &hpx->type2_data; | |
195 | hpx->t2->revision = revision; | |
196 | hpx->t2->unc_err_mask_and = fields[2].integer.value; | |
197 | hpx->t2->unc_err_mask_or = fields[3].integer.value; | |
198 | hpx->t2->unc_err_sever_and = fields[4].integer.value; | |
199 | hpx->t2->unc_err_sever_or = fields[5].integer.value; | |
200 | hpx->t2->cor_err_mask_and = fields[6].integer.value; | |
201 | hpx->t2->cor_err_mask_or = fields[7].integer.value; | |
202 | hpx->t2->adv_err_cap_and = fields[8].integer.value; | |
203 | hpx->t2->adv_err_cap_or = fields[9].integer.value; | |
204 | hpx->t2->pci_exp_devctl_and = fields[10].integer.value; | |
205 | hpx->t2->pci_exp_devctl_or = fields[11].integer.value; | |
206 | hpx->t2->pci_exp_lnkctl_and = fields[12].integer.value; | |
207 | hpx->t2->pci_exp_lnkctl_or = fields[13].integer.value; | |
208 | hpx->t2->sec_unc_err_sever_and = fields[14].integer.value; | |
209 | hpx->t2->sec_unc_err_sever_or = fields[15].integer.value; | |
210 | hpx->t2->sec_unc_err_mask_and = fields[16].integer.value; | |
211 | hpx->t2->sec_unc_err_mask_or = fields[17].integer.value; | |
212 | break; | |
213 | default: | |
214 | printk(KERN_WARNING | |
215 | "%s: Type 2 Revision %d record not supported\n", | |
216 | __func__, revision); | |
217 | return AE_ERROR; | |
218 | } | |
219 | return AE_OK; | |
220 | } | |
221 | ||
abbfec34 | 222 | static acpi_status acpi_run_hpx(acpi_handle handle, struct hotplug_params *hpx) |
9ce90ea5 BH |
223 | { |
224 | acpi_status status; | |
225 | struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; | |
226 | union acpi_object *package, *record, *fields; | |
227 | u32 type; | |
228 | int i; | |
229 | ||
230 | /* Clear the return buffer with zeros */ | |
231 | memset(hpx, 0, sizeof(struct hotplug_params)); | |
232 | ||
233 | status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer); | |
234 | if (ACPI_FAILURE(status)) | |
235 | return status; | |
236 | ||
237 | package = (union acpi_object *)buffer.pointer; | |
238 | if (package->type != ACPI_TYPE_PACKAGE) { | |
239 | status = AE_ERROR; | |
240 | goto exit; | |
241 | } | |
242 | ||
243 | for (i = 0; i < package->package.count; i++) { | |
244 | record = &package->package.elements[i]; | |
245 | if (record->type != ACPI_TYPE_PACKAGE) { | |
246 | status = AE_ERROR; | |
247 | goto exit; | |
248 | } | |
249 | ||
250 | fields = record->package.elements; | |
251 | if (fields[0].type != ACPI_TYPE_INTEGER || | |
252 | fields[1].type != ACPI_TYPE_INTEGER) { | |
253 | status = AE_ERROR; | |
254 | goto exit; | |
255 | } | |
256 | ||
257 | type = fields[0].integer.value; | |
258 | switch (type) { | |
259 | case 0: | |
260 | status = decode_type0_hpx_record(record, hpx); | |
261 | if (ACPI_FAILURE(status)) | |
262 | goto exit; | |
263 | break; | |
264 | case 1: | |
265 | status = decode_type1_hpx_record(record, hpx); | |
266 | if (ACPI_FAILURE(status)) | |
267 | goto exit; | |
268 | break; | |
269 | case 2: | |
270 | status = decode_type2_hpx_record(record, hpx); | |
271 | if (ACPI_FAILURE(status)) | |
272 | goto exit; | |
273 | break; | |
274 | default: | |
275 | printk(KERN_ERR "%s: Type %d record not supported\n", | |
276 | __func__, type); | |
277 | status = AE_ERROR; | |
278 | goto exit; | |
279 | } | |
280 | } | |
281 | exit: | |
282 | kfree(buffer.pointer); | |
283 | return status; | |
284 | } | |
285 | ||
abbfec34 | 286 | static acpi_status acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp) |
9ce90ea5 BH |
287 | { |
288 | acpi_status status; | |
289 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
290 | union acpi_object *package, *fields; | |
291 | int i; | |
292 | ||
293 | memset(hpp, 0, sizeof(struct hotplug_params)); | |
294 | ||
295 | status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer); | |
296 | if (ACPI_FAILURE(status)) | |
297 | return status; | |
298 | ||
299 | package = (union acpi_object *) buffer.pointer; | |
300 | if (package->type != ACPI_TYPE_PACKAGE || | |
301 | package->package.count != 4) { | |
302 | status = AE_ERROR; | |
303 | goto exit; | |
304 | } | |
305 | ||
306 | fields = package->package.elements; | |
307 | for (i = 0; i < 4; i++) { | |
308 | if (fields[i].type != ACPI_TYPE_INTEGER) { | |
309 | status = AE_ERROR; | |
310 | goto exit; | |
311 | } | |
312 | } | |
313 | ||
314 | hpp->t0 = &hpp->type0_data; | |
315 | hpp->t0->revision = 1; | |
316 | hpp->t0->cache_line_size = fields[0].integer.value; | |
317 | hpp->t0->latency_timer = fields[1].integer.value; | |
318 | hpp->t0->enable_serr = fields[2].integer.value; | |
319 | hpp->t0->enable_perr = fields[3].integer.value; | |
320 | ||
321 | exit: | |
322 | kfree(buffer.pointer); | |
323 | return status; | |
324 | } | |
325 | ||
326 | /* pci_get_hp_params | |
327 | * | |
328 | * @dev - the pci_dev for which we want parameters | |
329 | * @hpp - allocated by the caller | |
330 | */ | |
331 | int pci_get_hp_params(struct pci_dev *dev, struct hotplug_params *hpp) | |
332 | { | |
333 | acpi_status status; | |
334 | acpi_handle handle, phandle; | |
335 | struct pci_bus *pbus; | |
336 | ||
8647ca9a BH |
337 | if (acpi_pci_disabled) |
338 | return -ENODEV; | |
339 | ||
9ce90ea5 BH |
340 | handle = NULL; |
341 | for (pbus = dev->bus; pbus; pbus = pbus->parent) { | |
342 | handle = acpi_pci_get_bridge_handle(pbus); | |
343 | if (handle) | |
344 | break; | |
345 | } | |
346 | ||
347 | /* | |
348 | * _HPP settings apply to all child buses, until another _HPP is | |
349 | * encountered. If we don't find an _HPP for the input pci dev, | |
350 | * look for it in the parent device scope since that would apply to | |
351 | * this pci dev. | |
352 | */ | |
353 | while (handle) { | |
354 | status = acpi_run_hpx(handle, hpp); | |
355 | if (ACPI_SUCCESS(status)) | |
356 | return 0; | |
357 | status = acpi_run_hpp(handle, hpp); | |
358 | if (ACPI_SUCCESS(status)) | |
359 | return 0; | |
360 | if (acpi_is_root_bridge(handle)) | |
361 | break; | |
362 | status = acpi_get_parent(handle, &phandle); | |
363 | if (ACPI_FAILURE(status)) | |
364 | break; | |
365 | handle = phandle; | |
366 | } | |
367 | return -ENODEV; | |
368 | } | |
369 | EXPORT_SYMBOL_GPL(pci_get_hp_params); | |
370 | ||
437eb7bf LW |
371 | /** |
372 | * pciehp_is_native - Check whether a hotplug port is handled by the OS | |
5352a44a | 373 | * @bridge: Hotplug port to check |
437eb7bf | 374 | * |
5352a44a MW |
375 | * Returns true if the given @bridge is handled by the native PCIe hotplug |
376 | * driver. | |
437eb7bf | 377 | */ |
5352a44a | 378 | bool pciehp_is_native(struct pci_dev *bridge) |
437eb7bf | 379 | { |
5352a44a MW |
380 | const struct pci_host_bridge *host; |
381 | u32 slot_cap; | |
437eb7bf | 382 | |
5352a44a | 383 | if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) |
437eb7bf LW |
384 | return false; |
385 | ||
5352a44a MW |
386 | pcie_capability_read_dword(bridge, PCI_EXP_SLTCAP, &slot_cap); |
387 | if (!(slot_cap & PCI_EXP_SLTCAP_HPC)) | |
437eb7bf LW |
388 | return false; |
389 | ||
5352a44a MW |
390 | if (pcie_ports_native) |
391 | return true; | |
392 | ||
393 | host = pci_find_host_bridge(bridge->bus); | |
394 | return host->native_pcie_hotplug; | |
437eb7bf LW |
395 | } |
396 | ||
90cc0c3c MW |
397 | /** |
398 | * shpchp_is_native - Check whether a hotplug port is handled by the OS | |
399 | * @bridge: Hotplug port to check | |
400 | * | |
401 | * Returns true if the given @bridge is handled by the native SHPC hotplug | |
402 | * driver. | |
403 | */ | |
404 | bool shpchp_is_native(struct pci_dev *bridge) | |
405 | { | |
406 | const struct pci_host_bridge *host; | |
407 | ||
408 | if (!IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC)) | |
409 | return false; | |
410 | ||
411 | /* | |
412 | * It is assumed that AMD GOLAM chips support SHPC but they do not | |
413 | * have SHPC capability. | |
414 | */ | |
415 | if (bridge->vendor == PCI_VENDOR_ID_AMD && | |
416 | bridge->device == PCI_DEVICE_ID_AMD_GOLAM_7450) | |
417 | return true; | |
418 | ||
419 | if (!pci_find_capability(bridge, PCI_CAP_ID_SHPC)) | |
420 | return false; | |
421 | ||
422 | host = pci_find_host_bridge(bridge->bus); | |
423 | return host->native_shpc_hotplug; | |
424 | } | |
425 | ||
5e3d2344 BH |
426 | /** |
427 | * pci_acpi_wake_bus - Root bus wakeup notification fork function. | |
64fd1c70 | 428 | * @context: Device wakeup context. |
5e3d2344 | 429 | */ |
64fd1c70 | 430 | static void pci_acpi_wake_bus(struct acpi_device_wakeup_context *context) |
5e3d2344 BH |
431 | { |
432 | struct acpi_device *adev; | |
433 | struct acpi_pci_root *root; | |
434 | ||
64fd1c70 | 435 | adev = container_of(context, struct acpi_device, wakeup.context); |
5e3d2344 BH |
436 | root = acpi_driver_data(adev); |
437 | pci_pme_wakeup_bus(root->bus); | |
438 | } | |
439 | ||
440 | /** | |
441 | * pci_acpi_wake_dev - PCI device wakeup notification work function. | |
64fd1c70 | 442 | * @context: Device wakeup context. |
5e3d2344 | 443 | */ |
64fd1c70 | 444 | static void pci_acpi_wake_dev(struct acpi_device_wakeup_context *context) |
5e3d2344 | 445 | { |
5e3d2344 BH |
446 | struct pci_dev *pci_dev; |
447 | ||
5e3d2344 BH |
448 | pci_dev = to_pci_dev(context->dev); |
449 | ||
450 | if (pci_dev->pme_poll) | |
451 | pci_dev->pme_poll = false; | |
452 | ||
453 | if (pci_dev->current_state == PCI_D3cold) { | |
454 | pci_wakeup_event(pci_dev); | |
64fd1c70 | 455 | pm_request_resume(&pci_dev->dev); |
5e3d2344 BH |
456 | return; |
457 | } | |
458 | ||
459 | /* Clear PME Status if set. */ | |
460 | if (pci_dev->pme_support) | |
461 | pci_check_pme_status(pci_dev); | |
462 | ||
463 | pci_wakeup_event(pci_dev); | |
64fd1c70 | 464 | pm_request_resume(&pci_dev->dev); |
5e3d2344 | 465 | |
ff0387c3 | 466 | pci_pme_wakeup_bus(pci_dev->subordinate); |
5e3d2344 BH |
467 | } |
468 | ||
469 | /** | |
470 | * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus. | |
471 | * @dev: PCI root bridge ACPI device. | |
472 | */ | |
473 | acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev) | |
474 | { | |
475 | return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus); | |
476 | } | |
477 | ||
478 | /** | |
479 | * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device. | |
480 | * @dev: ACPI device to add the notifier for. | |
481 | * @pci_dev: PCI device to check for the PME status if an event is signaled. | |
482 | */ | |
483 | acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev, | |
484 | struct pci_dev *pci_dev) | |
485 | { | |
486 | return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev); | |
487 | } | |
488 | ||
0f64474b DSL |
489 | /* |
490 | * _SxD returns the D-state with the highest power | |
491 | * (lowest D-state number) supported in the S-state "x". | |
492 | * | |
493 | * If the devices does not have a _PRW | |
494 | * (Power Resources for Wake) supporting system wakeup from "x" | |
495 | * then the OS is free to choose a lower power (higher number | |
496 | * D-state) than the return value from _SxD. | |
497 | * | |
498 | * But if _PRW is enabled at S-state "x", the OS | |
499 | * must not choose a power lower than _SxD -- | |
500 | * unless the device has an _SxW method specifying | |
501 | * the lowest power (highest D-state number) the device | |
502 | * may enter while still able to wake the system. | |
503 | * | |
504 | * ie. depending on global OS policy: | |
505 | * | |
506 | * if (_PRW at S-state x) | |
507 | * choose from highest power _SxD to lowest power _SxW | |
508 | * else // no _PRW at S-state x | |
f7625980 | 509 | * choose highest power _SxD or any lower power |
0f64474b DSL |
510 | */ |
511 | ||
8d2bdf49 | 512 | static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) |
0f64474b | 513 | { |
448bd857 | 514 | int acpi_state, d_max; |
0f64474b | 515 | |
448bd857 HY |
516 | if (pdev->no_d3cold) |
517 | d_max = ACPI_STATE_D3_HOT; | |
518 | else | |
519 | d_max = ACPI_STATE_D3_COLD; | |
520 | acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); | |
ab826ca4 SL |
521 | if (acpi_state < 0) |
522 | return PCI_POWER_ERROR; | |
523 | ||
524 | switch (acpi_state) { | |
525 | case ACPI_STATE_D0: | |
526 | return PCI_D0; | |
527 | case ACPI_STATE_D1: | |
528 | return PCI_D1; | |
529 | case ACPI_STATE_D2: | |
530 | return PCI_D2; | |
1cc0c998 | 531 | case ACPI_STATE_D3_HOT: |
ab826ca4 | 532 | return PCI_D3hot; |
28c2103d LM |
533 | case ACPI_STATE_D3_COLD: |
534 | return PCI_D3cold; | |
ab826ca4 SL |
535 | } |
536 | return PCI_POWER_ERROR; | |
0f64474b | 537 | } |
961d9120 RW |
538 | |
539 | static bool acpi_pci_power_manageable(struct pci_dev *dev) | |
540 | { | |
85dbb3d0 RW |
541 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
542 | return adev ? acpi_device_power_manageable(adev) : false; | |
961d9120 | 543 | } |
0f64474b | 544 | |
b913100d DSL |
545 | static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
546 | { | |
85dbb3d0 | 547 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
583c377f DB |
548 | static const u8 state_conv[] = { |
549 | [PCI_D0] = ACPI_STATE_D0, | |
550 | [PCI_D1] = ACPI_STATE_D1, | |
551 | [PCI_D2] = ACPI_STATE_D2, | |
20dacb71 | 552 | [PCI_D3hot] = ACPI_STATE_D3_HOT, |
fc6504b3 | 553 | [PCI_D3cold] = ACPI_STATE_D3_COLD, |
b913100d | 554 | }; |
44e4e66e | 555 | int error = -EINVAL; |
b913100d | 556 | |
10b3dcae | 557 | /* If the ACPI device has _EJ0, ignore the device */ |
85dbb3d0 | 558 | if (!adev || acpi_has_method(adev->handle, "_EJ0")) |
44e4e66e | 559 | return -ENODEV; |
583c377f DB |
560 | |
561 | switch (state) { | |
8b713a88 RW |
562 | case PCI_D3cold: |
563 | if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == | |
564 | PM_QOS_FLAGS_ALL) { | |
565 | error = -EBUSY; | |
566 | break; | |
567 | } | |
583c377f DB |
568 | case PCI_D0: |
569 | case PCI_D1: | |
570 | case PCI_D2: | |
571 | case PCI_D3hot: | |
85dbb3d0 | 572 | error = acpi_device_set_power(adev, state_conv[state]); |
583c377f | 573 | } |
44e4e66e RW |
574 | |
575 | if (!error) | |
7506dc79 | 576 | pci_dbg(dev, "power state changed by ACPI to %s\n", |
fc6504b3 | 577 | acpi_power_state_string(state_conv[state])); |
44e4e66e RW |
578 | |
579 | return error; | |
b913100d DSL |
580 | } |
581 | ||
cc7cc02b LW |
582 | static pci_power_t acpi_pci_get_power_state(struct pci_dev *dev) |
583 | { | |
584 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); | |
585 | static const pci_power_t state_conv[] = { | |
586 | [ACPI_STATE_D0] = PCI_D0, | |
587 | [ACPI_STATE_D1] = PCI_D1, | |
588 | [ACPI_STATE_D2] = PCI_D2, | |
589 | [ACPI_STATE_D3_HOT] = PCI_D3hot, | |
590 | [ACPI_STATE_D3_COLD] = PCI_D3cold, | |
591 | }; | |
592 | int state; | |
593 | ||
594 | if (!adev || !acpi_device_power_manageable(adev)) | |
595 | return PCI_UNKNOWN; | |
596 | ||
597 | if (acpi_device_get_power(adev, &state) || state == ACPI_STATE_UNKNOWN) | |
598 | return PCI_UNKNOWN; | |
599 | ||
600 | return state_conv[state]; | |
601 | } | |
602 | ||
8370c2dc | 603 | static int acpi_pci_propagate_wakeup(struct pci_bus *bus, bool enable) |
0baed8da RW |
604 | { |
605 | while (bus->parent) { | |
8370c2dc | 606 | if (acpi_pm_device_can_wakeup(&bus->self->dev)) |
1ba51a7c | 607 | return acpi_pm_set_bridge_wakeup(&bus->self->dev, enable); |
0baed8da | 608 | |
b67ea761 RW |
609 | bus = bus->parent; |
610 | } | |
611 | ||
612 | /* We have reached the root bus. */ | |
8370c2dc RW |
613 | if (bus->bridge) { |
614 | if (acpi_pm_device_can_wakeup(bus->bridge)) | |
1ba51a7c | 615 | return acpi_pm_set_bridge_wakeup(bus->bridge, enable); |
8370c2dc RW |
616 | } |
617 | return 0; | |
b67ea761 RW |
618 | } |
619 | ||
8370c2dc | 620 | static int acpi_pci_wakeup(struct pci_dev *dev, bool enable) |
b67ea761 | 621 | { |
8370c2dc RW |
622 | if (acpi_pm_device_can_wakeup(&dev->dev)) |
623 | return acpi_pm_set_device_wakeup(&dev->dev, enable); | |
b67ea761 | 624 | |
8370c2dc | 625 | return acpi_pci_propagate_wakeup(dev->bus, enable); |
b67ea761 RW |
626 | } |
627 | ||
bac2a909 RW |
628 | static bool acpi_pci_need_resume(struct pci_dev *dev) |
629 | { | |
630 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); | |
631 | ||
632 | if (!adev || !acpi_device_power_manageable(adev)) | |
633 | return false; | |
634 | ||
635 | if (device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) | |
636 | return true; | |
637 | ||
638 | if (acpi_target_system_state() == ACPI_STATE_S0) | |
639 | return false; | |
640 | ||
641 | return !!adev->power.flags.dsw_present; | |
642 | } | |
643 | ||
299f2ffe | 644 | static const struct pci_platform_pm_ops acpi_pci_platform_pm = { |
961d9120 RW |
645 | .is_manageable = acpi_pci_power_manageable, |
646 | .set_state = acpi_pci_set_power_state, | |
cc7cc02b | 647 | .get_state = acpi_pci_get_power_state, |
961d9120 | 648 | .choose_state = acpi_pci_choose_state, |
0847684c | 649 | .set_wakeup = acpi_pci_wakeup, |
bac2a909 | 650 | .need_resume = acpi_pci_need_resume, |
961d9120 | 651 | }; |
b913100d | 652 | |
5090d4a6 JL |
653 | void acpi_pci_add_bus(struct pci_bus *bus) |
654 | { | |
e33caa82 AL |
655 | union acpi_object *obj; |
656 | struct pci_host_bridge *bridge; | |
657 | ||
a0040c01 | 658 | if (acpi_pci_disabled || !bus->bridge || !ACPI_HANDLE(bus->bridge)) |
5090d4a6 JL |
659 | return; |
660 | ||
be1c9de9 RW |
661 | acpi_pci_slot_enumerate(bus); |
662 | acpiphp_enumerate_slots(bus); | |
e33caa82 AL |
663 | |
664 | /* | |
665 | * For a host bridge, check its _DSM for function 8 and if | |
666 | * that is available, mark it in pci_host_bridge. | |
667 | */ | |
668 | if (!pci_is_root_bus(bus)) | |
669 | return; | |
670 | ||
94116f81 | 671 | obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 3, |
e33caa82 AL |
672 | RESET_DELAY_DSM, NULL); |
673 | if (!obj) | |
674 | return; | |
675 | ||
676 | if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) { | |
677 | bridge = pci_find_host_bridge(bus); | |
678 | bridge->ignore_reset_delay = 1; | |
679 | } | |
680 | ACPI_FREE(obj); | |
5090d4a6 JL |
681 | } |
682 | ||
683 | void acpi_pci_remove_bus(struct pci_bus *bus) | |
684 | { | |
be1c9de9 | 685 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
686 | return; |
687 | ||
3b63aaa7 | 688 | acpiphp_remove_slots(bus); |
5c0b04e3 | 689 | acpi_pci_slot_remove(bus); |
5090d4a6 JL |
690 | } |
691 | ||
84df749f | 692 | /* ACPI bus type */ |
e3f02c52 | 693 | static struct acpi_device *acpi_pci_find_companion(struct device *dev) |
84df749f | 694 | { |
60f75b8e | 695 | struct pci_dev *pci_dev = to_pci_dev(dev); |
5ce79d20 | 696 | bool check_children; |
60f75b8e | 697 | u64 addr; |
84df749f | 698 | |
6788a51f | 699 | check_children = pci_is_bridge(pci_dev); |
84df749f DSL |
700 | /* Please ref to ACPI spec for the syntax of _ADR */ |
701 | addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); | |
e3f02c52 | 702 | return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, |
5ce79d20 | 703 | check_children); |
84df749f DSL |
704 | } |
705 | ||
e33caa82 AL |
706 | /** |
707 | * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI | |
708 | * @pdev: the PCI device whose delay is to be updated | |
113e0d11 | 709 | * @handle: ACPI handle of this device |
e33caa82 AL |
710 | * |
711 | * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM | |
712 | * control method of either the device itself or the PCI host bridge. | |
713 | * | |
714 | * Function 8, "Reset Delay," applies to the entire hierarchy below a PCI | |
715 | * host bridge. If it returns one, the OS may assume that all devices in | |
716 | * the hierarchy have already completed power-on reset delays. | |
717 | * | |
718 | * Function 9, "Device Readiness Durations," applies only to the object | |
719 | * where it is located. It returns delay durations required after various | |
720 | * events if the device requires less time than the spec requires. Delays | |
721 | * from this function take precedence over the Reset Delay function. | |
722 | * | |
723 | * These _DSM functions are defined by the draft ECN of January 28, 2014, | |
724 | * titled "ACPI additions for FW latency optimizations." | |
725 | */ | |
726 | static void pci_acpi_optimize_delay(struct pci_dev *pdev, | |
727 | acpi_handle handle) | |
728 | { | |
729 | struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); | |
730 | int value; | |
731 | union acpi_object *obj, *elements; | |
732 | ||
733 | if (bridge->ignore_reset_delay) | |
734 | pdev->d3cold_delay = 0; | |
735 | ||
94116f81 | 736 | obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3, |
e33caa82 AL |
737 | FUNCTION_DELAY_DSM, NULL); |
738 | if (!obj) | |
739 | return; | |
740 | ||
741 | if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { | |
742 | elements = obj->package.elements; | |
743 | if (elements[0].type == ACPI_TYPE_INTEGER) { | |
744 | value = (int)elements[0].integer.value / 1000; | |
745 | if (value < PCI_PM_D3COLD_WAIT) | |
746 | pdev->d3cold_delay = value; | |
747 | } | |
748 | if (elements[3].type == ACPI_TYPE_INTEGER) { | |
749 | value = (int)elements[3].integer.value / 1000; | |
750 | if (value < PCI_PM_D3_WAIT) | |
751 | pdev->d3_delay = value; | |
752 | } | |
753 | } | |
754 | ACPI_FREE(obj); | |
755 | } | |
756 | ||
38a9a67a | 757 | static void pci_acpi_setup(struct device *dev) |
d2e5f0c1 | 758 | { |
d2e5f0c1 | 759 | struct pci_dev *pci_dev = to_pci_dev(dev); |
f084280c | 760 | struct acpi_device *adev = ACPI_COMPANION(dev); |
38a9a67a | 761 | |
f084280c RW |
762 | if (!adev) |
763 | return; | |
764 | ||
e33caa82 AL |
765 | pci_acpi_optimize_delay(pci_dev, adev->handle); |
766 | ||
f084280c RW |
767 | pci_acpi_add_pm_notifier(adev, pci_dev); |
768 | if (!adev->wakeup.flags.valid) | |
d2e5f0c1 RW |
769 | return; |
770 | ||
771 | device_set_wakeup_capable(dev, true); | |
8370c2dc | 772 | acpi_pci_wakeup(pci_dev, false); |
d2e5f0c1 RW |
773 | } |
774 | ||
38a9a67a | 775 | static void pci_acpi_cleanup(struct device *dev) |
d2e5f0c1 | 776 | { |
f084280c RW |
777 | struct acpi_device *adev = ACPI_COMPANION(dev); |
778 | ||
779 | if (!adev) | |
780 | return; | |
d2e5f0c1 | 781 | |
f084280c | 782 | pci_acpi_remove_pm_notifier(adev); |
de3ef1eb | 783 | if (adev->wakeup.flags.valid) |
d2e5f0c1 | 784 | device_set_wakeup_capable(dev, false); |
d2e5f0c1 RW |
785 | } |
786 | ||
53540098 RW |
787 | static bool pci_acpi_bus_match(struct device *dev) |
788 | { | |
40c368c1 | 789 | return dev_is_pci(dev); |
53540098 RW |
790 | } |
791 | ||
9c273b95 | 792 | static struct acpi_bus_type acpi_pci_bus = { |
53540098 RW |
793 | .name = "PCI", |
794 | .match = pci_acpi_bus_match, | |
e3f02c52 | 795 | .find_companion = acpi_pci_find_companion, |
38a9a67a RW |
796 | .setup = pci_acpi_setup, |
797 | .cleanup = pci_acpi_cleanup, | |
84df749f DSL |
798 | }; |
799 | ||
471036b2 SS |
800 | |
801 | static struct fwnode_handle *(*pci_msi_get_fwnode_cb)(struct device *dev); | |
802 | ||
803 | /** | |
804 | * pci_msi_register_fwnode_provider - Register callback to retrieve fwnode | |
805 | * @fn: Callback matching a device to a fwnode that identifies a PCI | |
806 | * MSI domain. | |
807 | * | |
808 | * This should be called by irqchip driver, which is the parent of | |
809 | * the MSI domain to provide callback interface to query fwnode. | |
810 | */ | |
811 | void | |
812 | pci_msi_register_fwnode_provider(struct fwnode_handle *(*fn)(struct device *)) | |
813 | { | |
814 | pci_msi_get_fwnode_cb = fn; | |
815 | } | |
816 | ||
817 | /** | |
818 | * pci_host_bridge_acpi_msi_domain - Retrieve MSI domain of a PCI host bridge | |
819 | * @bus: The PCI host bridge bus. | |
820 | * | |
821 | * This function uses the callback function registered by | |
822 | * pci_msi_register_fwnode_provider() to retrieve the irq_domain with | |
823 | * type DOMAIN_BUS_PCI_MSI of the specified host bridge bus. | |
824 | * This returns NULL on error or when the domain is not found. | |
825 | */ | |
826 | struct irq_domain *pci_host_bridge_acpi_msi_domain(struct pci_bus *bus) | |
827 | { | |
828 | struct fwnode_handle *fwnode; | |
829 | ||
830 | if (!pci_msi_get_fwnode_cb) | |
831 | return NULL; | |
832 | ||
833 | fwnode = pci_msi_get_fwnode_cb(&bus->dev); | |
834 | if (!fwnode) | |
835 | return NULL; | |
836 | ||
837 | return irq_find_matching_fwnode(fwnode, DOMAIN_BUS_PCI_MSI); | |
838 | } | |
839 | ||
9c273b95 | 840 | static int __init acpi_pci_init(void) |
84df749f DSL |
841 | { |
842 | int ret; | |
843 | ||
993958fe | 844 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { |
e7d45152 | 845 | pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); |
f8993aff SL |
846 | pci_no_msi(); |
847 | } | |
5fde244d | 848 | |
993958fe | 849 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
e7d45152 | 850 | pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); |
5fde244d SL |
851 | pcie_no_aspm(); |
852 | } | |
853 | ||
9c273b95 | 854 | ret = register_acpi_bus_type(&acpi_pci_bus); |
84df749f DSL |
855 | if (ret) |
856 | return 0; | |
5c0b04e3 | 857 | |
961d9120 | 858 | pci_set_platform_pm(&acpi_pci_platform_pm); |
5c0b04e3 | 859 | acpi_pci_slot_init(); |
3b63aaa7 | 860 | acpiphp_init(); |
5c0b04e3 | 861 | |
84df749f DSL |
862 | return 0; |
863 | } | |
9c273b95 | 864 | arch_initcall(acpi_pci_init); |