Commit | Line | Data |
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7328c8f4 | 1 | // SPDX-License-Identifier: GPL-2.0 |
d1b054da | 2 | /* |
df62ab5e | 3 | * PCI Express I/O Virtualization (IOV) support |
d1b054da | 4 | * Single Root IOV 1.0 |
302b4215 | 5 | * Address Translation Service 1.0 |
df62ab5e BH |
6 | * |
7 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> | |
d1b054da YZ |
8 | */ |
9 | ||
10 | #include <linux/pci.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
d1b054da | 12 | #include <linux/mutex.h> |
363c75db | 13 | #include <linux/export.h> |
d1b054da YZ |
14 | #include <linux/string.h> |
15 | #include <linux/delay.h> | |
5cdede24 | 16 | #include <linux/pci-ats.h> |
d1b054da YZ |
17 | #include "pci.h" |
18 | ||
dd7cc44d | 19 | #define VIRTFN_ID_LEN 16 |
d1b054da | 20 | |
b07579c0 | 21 | int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id) |
a28724b0 | 22 | { |
b07579c0 WY |
23 | if (!dev->is_physfn) |
24 | return -EINVAL; | |
a28724b0 | 25 | return dev->bus->number + ((dev->devfn + dev->sriov->offset + |
b07579c0 | 26 | dev->sriov->stride * vf_id) >> 8); |
a28724b0 YZ |
27 | } |
28 | ||
b07579c0 | 29 | int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id) |
a28724b0 | 30 | { |
b07579c0 WY |
31 | if (!dev->is_physfn) |
32 | return -EINVAL; | |
a28724b0 | 33 | return (dev->devfn + dev->sriov->offset + |
b07579c0 | 34 | dev->sriov->stride * vf_id) & 0xff; |
a28724b0 YZ |
35 | } |
36 | ||
f59dca27 WY |
37 | /* |
38 | * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may | |
39 | * change when NumVFs changes. | |
40 | * | |
41 | * Update iov->offset and iov->stride when NumVFs is written. | |
42 | */ | |
43 | static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn) | |
44 | { | |
45 | struct pci_sriov *iov = dev->sriov; | |
46 | ||
47 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); | |
48 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); | |
49 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); | |
50 | } | |
51 | ||
4449f079 WY |
52 | /* |
53 | * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride | |
54 | * determine how many additional bus numbers will be consumed by VFs. | |
55 | * | |
ea9a8854 AD |
56 | * Iterate over all valid NumVFs, validate offset and stride, and calculate |
57 | * the maximum number of bus numbers that could ever be required. | |
4449f079 | 58 | */ |
ea9a8854 | 59 | static int compute_max_vf_buses(struct pci_dev *dev) |
4449f079 WY |
60 | { |
61 | struct pci_sriov *iov = dev->sriov; | |
ea9a8854 | 62 | int nr_virtfn, busnr, rc = 0; |
4449f079 | 63 | |
ea9a8854 | 64 | for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) { |
4449f079 | 65 | pci_iov_set_numvfs(dev, nr_virtfn); |
ea9a8854 AD |
66 | if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) { |
67 | rc = -EIO; | |
68 | goto out; | |
69 | } | |
70 | ||
b07579c0 | 71 | busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
ea9a8854 AD |
72 | if (busnr > iov->max_VF_buses) |
73 | iov->max_VF_buses = busnr; | |
4449f079 WY |
74 | } |
75 | ||
ea9a8854 AD |
76 | out: |
77 | pci_iov_set_numvfs(dev, 0); | |
78 | return rc; | |
4449f079 WY |
79 | } |
80 | ||
dd7cc44d YZ |
81 | static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr) |
82 | { | |
dd7cc44d YZ |
83 | struct pci_bus *child; |
84 | ||
85 | if (bus->number == busnr) | |
86 | return bus; | |
87 | ||
88 | child = pci_find_bus(pci_domain_nr(bus), busnr); | |
89 | if (child) | |
90 | return child; | |
91 | ||
92 | child = pci_add_new_bus(bus, NULL, busnr); | |
93 | if (!child) | |
94 | return NULL; | |
95 | ||
b7eac055 | 96 | pci_bus_insert_busn_res(child, busnr, busnr); |
dd7cc44d YZ |
97 | |
98 | return child; | |
99 | } | |
100 | ||
dc087f2f | 101 | static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus) |
dd7cc44d | 102 | { |
dc087f2f JL |
103 | if (physbus != virtbus && list_empty(&virtbus->devices)) |
104 | pci_remove_bus(virtbus); | |
dd7cc44d YZ |
105 | } |
106 | ||
0e6c9122 WY |
107 | resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno) |
108 | { | |
109 | if (!dev->is_physfn) | |
110 | return 0; | |
111 | ||
112 | return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; | |
113 | } | |
114 | ||
cf0921be KA |
115 | static void pci_read_vf_config_common(struct pci_dev *virtfn) |
116 | { | |
117 | struct pci_dev *physfn = virtfn->physfn; | |
118 | ||
119 | /* | |
120 | * Some config registers are the same across all associated VFs. | |
121 | * Read them once from VF0 so we can skip reading them from the | |
122 | * other VFs. | |
123 | * | |
124 | * PCIe r4.0, sec 9.3.4.1, technically doesn't require all VFs to | |
125 | * have the same Revision ID and Subsystem ID, but we assume they | |
126 | * do. | |
127 | */ | |
128 | pci_read_config_dword(virtfn, PCI_CLASS_REVISION, | |
129 | &physfn->sriov->class); | |
130 | pci_read_config_byte(virtfn, PCI_HEADER_TYPE, | |
131 | &physfn->sriov->hdr_type); | |
132 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_VENDOR_ID, | |
133 | &physfn->sriov->subsystem_vendor); | |
134 | pci_read_config_word(virtfn, PCI_SUBSYSTEM_ID, | |
135 | &physfn->sriov->subsystem_device); | |
136 | } | |
137 | ||
753f6124 | 138 | int pci_iov_add_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
139 | { |
140 | int i; | |
dc087f2f | 141 | int rc = -ENOMEM; |
dd7cc44d YZ |
142 | u64 size; |
143 | char buf[VIRTFN_ID_LEN]; | |
144 | struct pci_dev *virtfn; | |
145 | struct resource *res; | |
146 | struct pci_sriov *iov = dev->sriov; | |
8b1fce04 | 147 | struct pci_bus *bus; |
dd7cc44d | 148 | |
b07579c0 | 149 | bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); |
dc087f2f JL |
150 | if (!bus) |
151 | goto failed; | |
152 | ||
153 | virtfn = pci_alloc_dev(bus); | |
dd7cc44d | 154 | if (!virtfn) |
dc087f2f | 155 | goto failed0; |
dd7cc44d | 156 | |
b07579c0 | 157 | virtfn->devfn = pci_iov_virtfn_devfn(dev, id); |
dd7cc44d | 158 | virtfn->vendor = dev->vendor; |
3142d832 | 159 | virtfn->device = iov->vf_device; |
cf0921be KA |
160 | virtfn->is_virtfn = 1; |
161 | virtfn->physfn = pci_dev_get(dev); | |
162 | ||
163 | if (id == 0) | |
164 | pci_read_vf_config_common(virtfn); | |
165 | ||
156c5532 PL |
166 | rc = pci_setup_device(virtfn); |
167 | if (rc) | |
cf0921be | 168 | goto failed1; |
156c5532 | 169 | |
dd7cc44d | 170 | virtfn->dev.parent = dev->dev.parent; |
aa931977 | 171 | virtfn->multifunction = 0; |
dd7cc44d YZ |
172 | |
173 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 174 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
175 | if (!res->parent) |
176 | continue; | |
177 | virtfn->resource[i].name = pci_name(virtfn); | |
178 | virtfn->resource[i].flags = res->flags; | |
0e6c9122 | 179 | size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); |
dd7cc44d YZ |
180 | virtfn->resource[i].start = res->start + size * id; |
181 | virtfn->resource[i].end = virtfn->resource[i].start + size - 1; | |
182 | rc = request_resource(res, &virtfn->resource[i]); | |
183 | BUG_ON(rc); | |
184 | } | |
185 | ||
dd7cc44d | 186 | pci_device_add(virtfn, virtfn->bus); |
dd7cc44d | 187 | |
dd7cc44d YZ |
188 | sprintf(buf, "virtfn%u", id); |
189 | rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); | |
190 | if (rc) | |
cf0921be | 191 | goto failed2; |
dd7cc44d YZ |
192 | rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); |
193 | if (rc) | |
cf0921be | 194 | goto failed3; |
dd7cc44d YZ |
195 | |
196 | kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); | |
197 | ||
27d61629 SH |
198 | pci_bus_add_device(virtfn); |
199 | ||
dd7cc44d YZ |
200 | return 0; |
201 | ||
cf0921be | 202 | failed3: |
dd7cc44d | 203 | sysfs_remove_link(&dev->dev.kobj, buf); |
cf0921be KA |
204 | failed2: |
205 | pci_stop_and_remove_bus_device(virtfn); | |
dd7cc44d YZ |
206 | failed1: |
207 | pci_dev_put(dev); | |
dc087f2f JL |
208 | failed0: |
209 | virtfn_remove_bus(dev->bus, bus); | |
210 | failed: | |
dd7cc44d YZ |
211 | |
212 | return rc; | |
213 | } | |
214 | ||
753f6124 | 215 | void pci_iov_remove_virtfn(struct pci_dev *dev, int id) |
dd7cc44d YZ |
216 | { |
217 | char buf[VIRTFN_ID_LEN]; | |
dd7cc44d | 218 | struct pci_dev *virtfn; |
dd7cc44d | 219 | |
dc087f2f | 220 | virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), |
b07579c0 WY |
221 | pci_iov_virtfn_bus(dev, id), |
222 | pci_iov_virtfn_devfn(dev, id)); | |
dd7cc44d YZ |
223 | if (!virtfn) |
224 | return; | |
225 | ||
dd7cc44d YZ |
226 | sprintf(buf, "virtfn%u", id); |
227 | sysfs_remove_link(&dev->dev.kobj, buf); | |
09cedbef YL |
228 | /* |
229 | * pci_stop_dev() could have been called for this virtfn already, | |
230 | * so the directory for the virtfn may have been removed before. | |
231 | * Double check to avoid spurious sysfs warnings. | |
232 | */ | |
233 | if (virtfn->dev.kobj.sd) | |
234 | sysfs_remove_link(&virtfn->dev.kobj, "physfn"); | |
dd7cc44d | 235 | |
210647af | 236 | pci_stop_and_remove_bus_device(virtfn); |
dc087f2f | 237 | virtfn_remove_bus(dev->bus, virtfn->bus); |
dd7cc44d | 238 | |
dc087f2f JL |
239 | /* balance pci_get_domain_bus_and_slot() */ |
240 | pci_dev_put(virtfn); | |
dd7cc44d YZ |
241 | pci_dev_put(dev); |
242 | } | |
243 | ||
995df527 WY |
244 | int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs) |
245 | { | |
a39e3fcd AD |
246 | return 0; |
247 | } | |
248 | ||
249 | int __weak pcibios_sriov_disable(struct pci_dev *pdev) | |
250 | { | |
251 | return 0; | |
995df527 WY |
252 | } |
253 | ||
dd7cc44d YZ |
254 | static int sriov_enable(struct pci_dev *dev, int nr_virtfn) |
255 | { | |
256 | int rc; | |
3443c382 | 257 | int i; |
dd7cc44d | 258 | int nres; |
ce288ec3 | 259 | u16 initial; |
dd7cc44d YZ |
260 | struct resource *res; |
261 | struct pci_dev *pdev; | |
262 | struct pci_sriov *iov = dev->sriov; | |
bbef98ab | 263 | int bars = 0; |
b07579c0 | 264 | int bus; |
dd7cc44d YZ |
265 | |
266 | if (!nr_virtfn) | |
267 | return 0; | |
268 | ||
6b136724 | 269 | if (iov->num_VFs) |
dd7cc44d YZ |
270 | return -EINVAL; |
271 | ||
272 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); | |
6b136724 BH |
273 | if (initial > iov->total_VFs || |
274 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs))) | |
dd7cc44d YZ |
275 | return -EIO; |
276 | ||
6b136724 | 277 | if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs || |
dd7cc44d YZ |
278 | (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial))) |
279 | return -EINVAL; | |
280 | ||
dd7cc44d YZ |
281 | nres = 0; |
282 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
bbef98ab | 283 | bars |= (1 << (i + PCI_IOV_RESOURCES)); |
c1fe1f96 | 284 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
dd7cc44d YZ |
285 | if (res->parent) |
286 | nres++; | |
287 | } | |
288 | if (nres != iov->nres) { | |
7506dc79 | 289 | pci_err(dev, "not enough MMIO resources for SR-IOV\n"); |
dd7cc44d YZ |
290 | return -ENOMEM; |
291 | } | |
292 | ||
b07579c0 | 293 | bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); |
68f8e9fa | 294 | if (bus > dev->bus->busn_res.end) { |
7506dc79 | 295 | pci_err(dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", |
68f8e9fa | 296 | nr_virtfn, bus, &dev->bus->busn_res); |
dd7cc44d YZ |
297 | return -ENOMEM; |
298 | } | |
299 | ||
bbef98ab | 300 | if (pci_enable_resources(dev, bars)) { |
7506dc79 | 301 | pci_err(dev, "SR-IOV: IOV BARS not allocated\n"); |
bbef98ab RP |
302 | return -ENOMEM; |
303 | } | |
304 | ||
dd7cc44d YZ |
305 | if (iov->link != dev->devfn) { |
306 | pdev = pci_get_slot(dev->bus, iov->link); | |
307 | if (!pdev) | |
308 | return -ENODEV; | |
309 | ||
dc087f2f JL |
310 | if (!pdev->is_physfn) { |
311 | pci_dev_put(pdev); | |
652d1100 | 312 | return -ENOSYS; |
dc087f2f | 313 | } |
dd7cc44d YZ |
314 | |
315 | rc = sysfs_create_link(&dev->dev.kobj, | |
316 | &pdev->dev.kobj, "dep_link"); | |
dc087f2f | 317 | pci_dev_put(pdev); |
dd7cc44d YZ |
318 | if (rc) |
319 | return rc; | |
320 | } | |
321 | ||
6b136724 | 322 | iov->initial_VFs = initial; |
dd7cc44d YZ |
323 | if (nr_virtfn < initial) |
324 | initial = nr_virtfn; | |
325 | ||
c23b6135 AD |
326 | rc = pcibios_sriov_enable(dev, initial); |
327 | if (rc) { | |
7506dc79 | 328 | pci_err(dev, "failure %d from pcibios_sriov_enable()\n", rc); |
c23b6135 | 329 | goto err_pcibios; |
995df527 WY |
330 | } |
331 | ||
f40ec3c7 GS |
332 | pci_iov_set_numvfs(dev, nr_virtfn); |
333 | iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE; | |
334 | pci_cfg_access_lock(dev); | |
335 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); | |
336 | msleep(100); | |
337 | pci_cfg_access_unlock(dev); | |
338 | ||
dd7cc44d | 339 | for (i = 0; i < initial; i++) { |
753f6124 | 340 | rc = pci_iov_add_virtfn(dev, i); |
dd7cc44d YZ |
341 | if (rc) |
342 | goto failed; | |
343 | } | |
344 | ||
345 | kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); | |
6b136724 | 346 | iov->num_VFs = nr_virtfn; |
dd7cc44d YZ |
347 | |
348 | return 0; | |
349 | ||
350 | failed: | |
3443c382 | 351 | while (i--) |
753f6124 | 352 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d | 353 | |
c23b6135 | 354 | err_pcibios: |
dd7cc44d | 355 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); |
fb51ccbf | 356 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
357 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
358 | ssleep(1); | |
fb51ccbf | 359 | pci_cfg_access_unlock(dev); |
dd7cc44d | 360 | |
0fc690a7 GS |
361 | pcibios_sriov_disable(dev); |
362 | ||
dd7cc44d YZ |
363 | if (iov->link != dev->devfn) |
364 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
365 | ||
b3908644 | 366 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
367 | return rc; |
368 | } | |
369 | ||
370 | static void sriov_disable(struct pci_dev *dev) | |
371 | { | |
372 | int i; | |
373 | struct pci_sriov *iov = dev->sriov; | |
374 | ||
6b136724 | 375 | if (!iov->num_VFs) |
dd7cc44d YZ |
376 | return; |
377 | ||
6b136724 | 378 | for (i = 0; i < iov->num_VFs; i++) |
753f6124 | 379 | pci_iov_remove_virtfn(dev, i); |
dd7cc44d YZ |
380 | |
381 | iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE); | |
fb51ccbf | 382 | pci_cfg_access_lock(dev); |
dd7cc44d YZ |
383 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
384 | ssleep(1); | |
fb51ccbf | 385 | pci_cfg_access_unlock(dev); |
dd7cc44d | 386 | |
0fc690a7 GS |
387 | pcibios_sriov_disable(dev); |
388 | ||
dd7cc44d YZ |
389 | if (iov->link != dev->devfn) |
390 | sysfs_remove_link(&dev->dev.kobj, "dep_link"); | |
391 | ||
6b136724 | 392 | iov->num_VFs = 0; |
f59dca27 | 393 | pci_iov_set_numvfs(dev, 0); |
dd7cc44d YZ |
394 | } |
395 | ||
d1b054da YZ |
396 | static int sriov_init(struct pci_dev *dev, int pos) |
397 | { | |
0e6c9122 | 398 | int i, bar64; |
d1b054da YZ |
399 | int rc; |
400 | int nres; | |
401 | u32 pgsz; | |
ea9a8854 | 402 | u16 ctrl, total; |
d1b054da YZ |
403 | struct pci_sriov *iov; |
404 | struct resource *res; | |
405 | struct pci_dev *pdev; | |
406 | ||
d1b054da YZ |
407 | pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); |
408 | if (ctrl & PCI_SRIOV_CTRL_VFE) { | |
409 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); | |
410 | ssleep(1); | |
411 | } | |
412 | ||
d1b054da YZ |
413 | ctrl = 0; |
414 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | |
415 | if (pdev->is_physfn) | |
416 | goto found; | |
417 | ||
418 | pdev = NULL; | |
419 | if (pci_ari_enabled(dev->bus)) | |
420 | ctrl |= PCI_SRIOV_CTRL_ARI; | |
421 | ||
422 | found: | |
423 | pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); | |
d1b054da | 424 | |
ff45f9dd BS |
425 | pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); |
426 | if (!total) | |
427 | return 0; | |
d1b054da YZ |
428 | |
429 | pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); | |
430 | i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0; | |
431 | pgsz &= ~((1 << i) - 1); | |
432 | if (!pgsz) | |
433 | return -EIO; | |
434 | ||
435 | pgsz &= ~(pgsz - 1); | |
8161fe91 | 436 | pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); |
d1b054da | 437 | |
0e6c9122 WY |
438 | iov = kzalloc(sizeof(*iov), GFP_KERNEL); |
439 | if (!iov) | |
440 | return -ENOMEM; | |
441 | ||
d1b054da YZ |
442 | nres = 0; |
443 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 444 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
11183991 DD |
445 | /* |
446 | * If it is already FIXED, don't change it, something | |
447 | * (perhaps EA or header fixups) wants it this way. | |
448 | */ | |
449 | if (res->flags & IORESOURCE_PCI_FIXED) | |
450 | bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0; | |
451 | else | |
452 | bar64 = __pci_read_base(dev, pci_bar_unknown, res, | |
453 | pos + PCI_SRIOV_BAR + i * 4); | |
d1b054da YZ |
454 | if (!res->flags) |
455 | continue; | |
456 | if (resource_size(res) & (PAGE_SIZE - 1)) { | |
457 | rc = -EIO; | |
458 | goto failed; | |
459 | } | |
0e6c9122 | 460 | iov->barsz[i] = resource_size(res); |
d1b054da | 461 | res->end = res->start + resource_size(res) * total - 1; |
7506dc79 | 462 | pci_info(dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", |
e88ae01d | 463 | i, res, i, total); |
0e6c9122 | 464 | i += bar64; |
d1b054da YZ |
465 | nres++; |
466 | } | |
467 | ||
d1b054da YZ |
468 | iov->pos = pos; |
469 | iov->nres = nres; | |
470 | iov->ctrl = ctrl; | |
6b136724 | 471 | iov->total_VFs = total; |
3142d832 | 472 | pci_read_config_word(dev, pos + PCI_SRIOV_VF_DID, &iov->vf_device); |
d1b054da YZ |
473 | iov->pgsz = pgsz; |
474 | iov->self = dev; | |
0e7df224 | 475 | iov->drivers_autoprobe = true; |
d1b054da YZ |
476 | pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); |
477 | pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); | |
62f87c0e | 478 | if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
4d135dbe | 479 | iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); |
d1b054da YZ |
480 | |
481 | if (pdev) | |
482 | iov->dev = pci_dev_get(pdev); | |
e277d2fc | 483 | else |
d1b054da | 484 | iov->dev = dev; |
e277d2fc | 485 | |
d1b054da YZ |
486 | dev->sriov = iov; |
487 | dev->is_physfn = 1; | |
ea9a8854 AD |
488 | rc = compute_max_vf_buses(dev); |
489 | if (rc) | |
490 | goto fail_max_buses; | |
d1b054da YZ |
491 | |
492 | return 0; | |
493 | ||
ea9a8854 AD |
494 | fail_max_buses: |
495 | dev->sriov = NULL; | |
496 | dev->is_physfn = 0; | |
d1b054da YZ |
497 | failed: |
498 | for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) { | |
c1fe1f96 | 499 | res = &dev->resource[i + PCI_IOV_RESOURCES]; |
d1b054da YZ |
500 | res->flags = 0; |
501 | } | |
502 | ||
0e6c9122 | 503 | kfree(iov); |
d1b054da YZ |
504 | return rc; |
505 | } | |
506 | ||
507 | static void sriov_release(struct pci_dev *dev) | |
508 | { | |
6b136724 | 509 | BUG_ON(dev->sriov->num_VFs); |
dd7cc44d | 510 | |
e277d2fc | 511 | if (dev != dev->sriov->dev) |
d1b054da YZ |
512 | pci_dev_put(dev->sriov->dev); |
513 | ||
514 | kfree(dev->sriov); | |
515 | dev->sriov = NULL; | |
516 | } | |
517 | ||
8c5cdb6a YZ |
518 | static void sriov_restore_state(struct pci_dev *dev) |
519 | { | |
520 | int i; | |
521 | u16 ctrl; | |
522 | struct pci_sriov *iov = dev->sriov; | |
523 | ||
524 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); | |
525 | if (ctrl & PCI_SRIOV_CTRL_VFE) | |
526 | return; | |
527 | ||
ff26449e TN |
528 | /* |
529 | * Restore PCI_SRIOV_CTRL_ARI before pci_iov_set_numvfs() because | |
530 | * it reads offset & stride, which depend on PCI_SRIOV_CTRL_ARI. | |
531 | */ | |
532 | ctrl &= ~PCI_SRIOV_CTRL_ARI; | |
533 | ctrl |= iov->ctrl & PCI_SRIOV_CTRL_ARI; | |
534 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, ctrl); | |
535 | ||
8c5cdb6a YZ |
536 | for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) |
537 | pci_update_resource(dev, i); | |
538 | ||
539 | pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); | |
f59dca27 | 540 | pci_iov_set_numvfs(dev, iov->num_VFs); |
8c5cdb6a YZ |
541 | pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); |
542 | if (iov->ctrl & PCI_SRIOV_CTRL_VFE) | |
543 | msleep(100); | |
544 | } | |
545 | ||
d1b054da YZ |
546 | /** |
547 | * pci_iov_init - initialize the IOV capability | |
548 | * @dev: the PCI device | |
549 | * | |
550 | * Returns 0 on success, or negative on failure. | |
551 | */ | |
552 | int pci_iov_init(struct pci_dev *dev) | |
553 | { | |
554 | int pos; | |
555 | ||
5f4d91a1 | 556 | if (!pci_is_pcie(dev)) |
d1b054da YZ |
557 | return -ENODEV; |
558 | ||
559 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); | |
560 | if (pos) | |
561 | return sriov_init(dev, pos); | |
562 | ||
563 | return -ENODEV; | |
564 | } | |
565 | ||
566 | /** | |
567 | * pci_iov_release - release resources used by the IOV capability | |
568 | * @dev: the PCI device | |
569 | */ | |
570 | void pci_iov_release(struct pci_dev *dev) | |
571 | { | |
572 | if (dev->is_physfn) | |
573 | sriov_release(dev); | |
574 | } | |
575 | ||
6ffa2489 BH |
576 | /** |
577 | * pci_iov_update_resource - update a VF BAR | |
578 | * @dev: the PCI device | |
579 | * @resno: the resource number | |
580 | * | |
581 | * Update a VF BAR in the SR-IOV capability of a PF. | |
582 | */ | |
583 | void pci_iov_update_resource(struct pci_dev *dev, int resno) | |
584 | { | |
585 | struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL; | |
586 | struct resource *res = dev->resource + resno; | |
587 | int vf_bar = resno - PCI_IOV_RESOURCES; | |
588 | struct pci_bus_region region; | |
546ba9f8 | 589 | u16 cmd; |
6ffa2489 BH |
590 | u32 new; |
591 | int reg; | |
592 | ||
593 | /* | |
594 | * The generic pci_restore_bars() path calls this for all devices, | |
595 | * including VFs and non-SR-IOV devices. If this is not a PF, we | |
596 | * have nothing to do. | |
597 | */ | |
598 | if (!iov) | |
599 | return; | |
600 | ||
546ba9f8 BH |
601 | pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd); |
602 | if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) { | |
603 | dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n", | |
604 | vf_bar, res); | |
605 | return; | |
606 | } | |
607 | ||
6ffa2489 BH |
608 | /* |
609 | * Ignore unimplemented BARs, unused resource slots for 64-bit | |
610 | * BARs, and non-movable resources, e.g., those described via | |
611 | * Enhanced Allocation. | |
612 | */ | |
613 | if (!res->flags) | |
614 | return; | |
615 | ||
616 | if (res->flags & IORESOURCE_UNSET) | |
617 | return; | |
618 | ||
619 | if (res->flags & IORESOURCE_PCI_FIXED) | |
620 | return; | |
621 | ||
622 | pcibios_resource_to_bus(dev->bus, ®ion, res); | |
623 | new = region.start; | |
624 | new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK; | |
625 | ||
626 | reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar; | |
627 | pci_write_config_dword(dev, reg, new); | |
628 | if (res->flags & IORESOURCE_MEM_64) { | |
629 | new = region.start >> 16 >> 16; | |
630 | pci_write_config_dword(dev, reg + 4, new); | |
631 | } | |
632 | } | |
633 | ||
978d2d68 WY |
634 | resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev, |
635 | int resno) | |
636 | { | |
637 | return pci_iov_resource_size(dev, resno); | |
638 | } | |
639 | ||
6faf17f6 CW |
640 | /** |
641 | * pci_sriov_resource_alignment - get resource alignment for VF BAR | |
642 | * @dev: the PCI device | |
643 | * @resno: the resource number | |
644 | * | |
645 | * Returns the alignment of the VF BAR found in the SR-IOV capability. | |
646 | * This is not the same as the resource size which is defined as | |
647 | * the VF BAR size multiplied by the number of VFs. The alignment | |
648 | * is just the VF BAR size. | |
649 | */ | |
0e52247a | 650 | resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno) |
6faf17f6 | 651 | { |
978d2d68 | 652 | return pcibios_iov_resource_alignment(dev, resno); |
6faf17f6 CW |
653 | } |
654 | ||
8c5cdb6a YZ |
655 | /** |
656 | * pci_restore_iov_state - restore the state of the IOV capability | |
657 | * @dev: the PCI device | |
658 | */ | |
659 | void pci_restore_iov_state(struct pci_dev *dev) | |
660 | { | |
661 | if (dev->is_physfn) | |
662 | sriov_restore_state(dev); | |
663 | } | |
a28724b0 | 664 | |
608c0d88 BL |
665 | /** |
666 | * pci_vf_drivers_autoprobe - set PF property drivers_autoprobe for VFs | |
667 | * @dev: the PCI device | |
668 | * @auto_probe: set VF drivers auto probe flag | |
669 | */ | |
670 | void pci_vf_drivers_autoprobe(struct pci_dev *dev, bool auto_probe) | |
671 | { | |
672 | if (dev->is_physfn) | |
673 | dev->sriov->drivers_autoprobe = auto_probe; | |
674 | } | |
675 | ||
a28724b0 YZ |
676 | /** |
677 | * pci_iov_bus_range - find bus range used by Virtual Function | |
678 | * @bus: the PCI bus | |
679 | * | |
680 | * Returns max number of buses (exclude current one) used by Virtual | |
681 | * Functions. | |
682 | */ | |
683 | int pci_iov_bus_range(struct pci_bus *bus) | |
684 | { | |
685 | int max = 0; | |
a28724b0 YZ |
686 | struct pci_dev *dev; |
687 | ||
688 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
689 | if (!dev->is_physfn) | |
690 | continue; | |
4449f079 WY |
691 | if (dev->sriov->max_VF_buses > max) |
692 | max = dev->sriov->max_VF_buses; | |
a28724b0 YZ |
693 | } |
694 | ||
695 | return max ? max - bus->number : 0; | |
696 | } | |
dd7cc44d YZ |
697 | |
698 | /** | |
699 | * pci_enable_sriov - enable the SR-IOV capability | |
700 | * @dev: the PCI device | |
52a8873b | 701 | * @nr_virtfn: number of virtual functions to enable |
dd7cc44d YZ |
702 | * |
703 | * Returns 0 on success, or negative on failure. | |
704 | */ | |
705 | int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) | |
706 | { | |
707 | might_sleep(); | |
708 | ||
709 | if (!dev->is_physfn) | |
652d1100 | 710 | return -ENOSYS; |
dd7cc44d YZ |
711 | |
712 | return sriov_enable(dev, nr_virtfn); | |
713 | } | |
714 | EXPORT_SYMBOL_GPL(pci_enable_sriov); | |
715 | ||
716 | /** | |
717 | * pci_disable_sriov - disable the SR-IOV capability | |
718 | * @dev: the PCI device | |
719 | */ | |
720 | void pci_disable_sriov(struct pci_dev *dev) | |
721 | { | |
722 | might_sleep(); | |
723 | ||
724 | if (!dev->is_physfn) | |
725 | return; | |
726 | ||
727 | sriov_disable(dev); | |
728 | } | |
729 | EXPORT_SYMBOL_GPL(pci_disable_sriov); | |
74bb1bcc | 730 | |
fb8a0d9d WM |
731 | /** |
732 | * pci_num_vf - return number of VFs associated with a PF device_release_driver | |
733 | * @dev: the PCI device | |
734 | * | |
735 | * Returns number of VFs, or 0 if SR-IOV is not enabled. | |
736 | */ | |
737 | int pci_num_vf(struct pci_dev *dev) | |
738 | { | |
1452cd76 | 739 | if (!dev->is_physfn) |
fb8a0d9d | 740 | return 0; |
1452cd76 BH |
741 | |
742 | return dev->sriov->num_VFs; | |
fb8a0d9d WM |
743 | } |
744 | EXPORT_SYMBOL_GPL(pci_num_vf); | |
bff73156 | 745 | |
5a8eb242 AD |
746 | /** |
747 | * pci_vfs_assigned - returns number of VFs are assigned to a guest | |
748 | * @dev: the PCI device | |
749 | * | |
750 | * Returns number of VFs belonging to this device that are assigned to a guest. | |
652d1100 | 751 | * If device is not a physical function returns 0. |
5a8eb242 AD |
752 | */ |
753 | int pci_vfs_assigned(struct pci_dev *dev) | |
754 | { | |
755 | struct pci_dev *vfdev; | |
756 | unsigned int vfs_assigned = 0; | |
757 | unsigned short dev_id; | |
758 | ||
759 | /* only search if we are a PF */ | |
760 | if (!dev->is_physfn) | |
761 | return 0; | |
762 | ||
763 | /* | |
764 | * determine the device ID for the VFs, the vendor ID will be the | |
765 | * same as the PF so there is no need to check for that one | |
766 | */ | |
3142d832 | 767 | dev_id = dev->sriov->vf_device; |
5a8eb242 AD |
768 | |
769 | /* loop through all the VFs to see if we own any that are assigned */ | |
770 | vfdev = pci_get_device(dev->vendor, dev_id, NULL); | |
771 | while (vfdev) { | |
772 | /* | |
773 | * It is considered assigned if it is a virtual function with | |
774 | * our dev as the physical function and the assigned bit is set | |
775 | */ | |
776 | if (vfdev->is_virtfn && (vfdev->physfn == dev) && | |
be63497c | 777 | pci_is_dev_assigned(vfdev)) |
5a8eb242 AD |
778 | vfs_assigned++; |
779 | ||
780 | vfdev = pci_get_device(dev->vendor, dev_id, vfdev); | |
781 | } | |
782 | ||
783 | return vfs_assigned; | |
784 | } | |
785 | EXPORT_SYMBOL_GPL(pci_vfs_assigned); | |
786 | ||
bff73156 DD |
787 | /** |
788 | * pci_sriov_set_totalvfs -- reduce the TotalVFs available | |
789 | * @dev: the PCI PF device | |
2094f167 | 790 | * @numvfs: number that should be used for TotalVFs supported |
bff73156 DD |
791 | * |
792 | * Should be called from PF driver's probe routine with | |
793 | * device's mutex held. | |
794 | * | |
795 | * Returns 0 if PF is an SRIOV-capable device and | |
652d1100 SA |
796 | * value of numvfs valid. If not a PF return -ENOSYS; |
797 | * if numvfs is invalid return -EINVAL; | |
bff73156 DD |
798 | * if VFs already enabled, return -EBUSY. |
799 | */ | |
800 | int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs) | |
801 | { | |
652d1100 SA |
802 | if (!dev->is_physfn) |
803 | return -ENOSYS; | |
804 | if (numvfs > dev->sriov->total_VFs) | |
bff73156 DD |
805 | return -EINVAL; |
806 | ||
807 | /* Shouldn't change if VFs already enabled */ | |
808 | if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) | |
809 | return -EBUSY; | |
810 | else | |
6b136724 | 811 | dev->sriov->driver_max_VFs = numvfs; |
bff73156 DD |
812 | |
813 | return 0; | |
814 | } | |
815 | EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs); | |
816 | ||
817 | /** | |
ddc191f5 | 818 | * pci_sriov_get_totalvfs -- get total VFs supported on this device |
bff73156 DD |
819 | * @dev: the PCI PF device |
820 | * | |
821 | * For a PCIe device with SRIOV support, return the PCIe | |
6b136724 | 822 | * SRIOV capability value of TotalVFs or the value of driver_max_VFs |
652d1100 | 823 | * if the driver reduced it. Otherwise 0. |
bff73156 DD |
824 | */ |
825 | int pci_sriov_get_totalvfs(struct pci_dev *dev) | |
826 | { | |
1452cd76 | 827 | if (!dev->is_physfn) |
652d1100 | 828 | return 0; |
bff73156 | 829 | |
6b136724 BH |
830 | if (dev->sriov->driver_max_VFs) |
831 | return dev->sriov->driver_max_VFs; | |
1452cd76 BH |
832 | |
833 | return dev->sriov->total_VFs; | |
bff73156 DD |
834 | } |
835 | EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs); |