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qlcnic: Fix usage of netif_tx_{wake, stop} api during link change.
[linux-2.6-block.git] / drivers / pci / iov.c
CommitLineData
d1b054da
YZ		 1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ		 9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ		 15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ		 18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
a28724b0
YZ		 22static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23{
24 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25 dev->sriov->stride * id) >> 8);
26}
27
28static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29{
30 return (dev->devfn + dev->sriov->offset +
31 dev->sriov->stride * id) & 0xff;
32}
33
dd7cc44d
YZ		 34static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
35{
dd7cc44d
YZ		 36 struct pci_bus *child;
37
38 if (bus->number == busnr)
39 return bus;
40
41 child = pci_find_bus(pci_domain_nr(bus), busnr);
42 if (child)
43 return child;
44
45 child = pci_add_new_bus(bus, NULL, busnr);
46 if (!child)
47 return NULL;
48
b7eac055 49 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ		 50
51 return child;
52}
53
dc087f2f 54static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 55{
dc087f2f
JL		 56 if (physbus != virtbus && list_empty(&virtbus->devices))
57 pci_remove_bus(virtbus);
dd7cc44d
YZ		 58}
59
60static int virtfn_add(struct pci_dev *dev, int id, int reset)
61{
62 int i;
dc087f2f 63 int rc = -ENOMEM;
dd7cc44d
YZ		 64 u64 size;
65 char buf[VIRTFN_ID_LEN];
66 struct pci_dev *virtfn;
67 struct resource *res;
68 struct pci_sriov *iov = dev->sriov;
8b1fce04 69 struct pci_bus *bus;
dd7cc44d 70
dd7cc44d 71 mutex_lock(&iov->dev->sriov->lock);
8b1fce04 72 bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
dc087f2f
JL		 73 if (!bus)
74 goto failed;
75
76 virtfn = pci_alloc_dev(bus);
dd7cc44d 77 if (!virtfn)
dc087f2f 78 goto failed0;
dd7cc44d 79
dd7cc44d
YZ		 80 virtfn->devfn = virtfn_devfn(dev, id);
81 virtfn->vendor = dev->vendor;
82 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
83 pci_setup_device(virtfn);
84 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH		 85 virtfn->physfn = pci_dev_get(dev);
86 virtfn->is_virtfn = 1;
dd7cc44d
YZ		 87
88 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
89 res = dev->resource + PCI_IOV_RESOURCES + i;
90 if (!res->parent)
91 continue;
92 virtfn->resource[i].name = pci_name(virtfn);
93 virtfn->resource[i].flags = res->flags;
94 size = resource_size(res);
6b136724 95 do_div(size, iov->total_VFs);
dd7cc44d
YZ		 96 virtfn->resource[i].start = res->start + size * id;
97 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
98 rc = request_resource(res, &virtfn->resource[i]);
99 BUG_ON(rc);
100 }
101
102 if (reset)
8c1c699f 103 __pci_reset_function(virtfn);
dd7cc44d
YZ		 104
105 pci_device_add(virtfn, virtfn->bus);
106 mutex_unlock(&iov->dev->sriov->lock);
107
dd7cc44d 108 rc = pci_bus_add_device(virtfn);
dd7cc44d
YZ		 109 sprintf(buf, "virtfn%u", id);
110 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
111 if (rc)
112 goto failed1;
113 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
114 if (rc)
115 goto failed2;
116
117 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
118
119 return 0;
120
121failed2:
122 sysfs_remove_link(&dev->dev.kobj, buf);
123failed1:
124 pci_dev_put(dev);
125 mutex_lock(&iov->dev->sriov->lock);
210647af 126 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL		 127failed0:
128 virtfn_remove_bus(dev->bus, bus);
129failed:
dd7cc44d
YZ		 130 mutex_unlock(&iov->dev->sriov->lock);
131
132 return rc;
133}
134
135static void virtfn_remove(struct pci_dev *dev, int id, int reset)
136{
137 char buf[VIRTFN_ID_LEN];
dd7cc44d
YZ		 138 struct pci_dev *virtfn;
139 struct pci_sriov *iov = dev->sriov;
140
dc087f2f
JL		 141 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
142 virtfn_bus(dev, id),
143 virtfn_devfn(dev, id));
dd7cc44d
YZ		 144 if (!virtfn)
145 return;
146
dd7cc44d
YZ		 147 if (reset) {
148 device_release_driver(&virtfn->dev);
8c1c699f 149 __pci_reset_function(virtfn);
dd7cc44d
YZ		 150 }
151
152 sprintf(buf, "virtfn%u", id);
153 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL		 154 /*
155 * pci_stop_dev() could have been called for this virtfn already,
156 * so the directory for the virtfn may have been removed before.
157 * Double check to avoid spurious sysfs warnings.
158 */
159 if (virtfn->dev.kobj.sd)
160 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d
YZ		 161
162 mutex_lock(&iov->dev->sriov->lock);
210647af 163 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 164 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d
YZ		 165 mutex_unlock(&iov->dev->sriov->lock);
166
dc087f2f
JL		 167 /* balance pci_get_domain_bus_and_slot() */
168 pci_dev_put(virtfn);
dd7cc44d
YZ		 169 pci_dev_put(dev);
170}
171
74bb1bcc
YZ		 172static int sriov_migration(struct pci_dev *dev)
173{
174 u16 status;
175 struct pci_sriov *iov = dev->sriov;
176
6b136724 177 if (!iov->num_VFs)
74bb1bcc
YZ		 178 return 0;
179
180 if (!(iov->cap & PCI_SRIOV_CAP_VFM))
181 return 0;
182
183 pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
184 if (!(status & PCI_SRIOV_STATUS_VFM))
185 return 0;
186
187 schedule_work(&iov->mtask);
188
189 return 1;
190}
191
192static void sriov_migration_task(struct work_struct *work)
193{
194 int i;
195 u8 state;
196 u16 status;
197 struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
198
6b136724 199 for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
74bb1bcc
YZ		 200 state = readb(iov->mstate + i);
201 if (state == PCI_SRIOV_VFM_MI) {
202 writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
203 state = readb(iov->mstate + i);
204 if (state == PCI_SRIOV_VFM_AV)
205 virtfn_add(iov->self, i, 1);
206 } else if (state == PCI_SRIOV_VFM_MO) {
207 virtfn_remove(iov->self, i, 1);
208 writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
209 state = readb(iov->mstate + i);
210 if (state == PCI_SRIOV_VFM_AV)
211 virtfn_add(iov->self, i, 0);
212 }
213 }
214
215 pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
216 status &= ~PCI_SRIOV_STATUS_VFM;
217 pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
218}
219
220static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
221{
222 int bir;
223 u32 table;
224 resource_size_t pa;
225 struct pci_sriov *iov = dev->sriov;
226
6b136724 227 if (nr_virtfn <= iov->initial_VFs)
74bb1bcc
YZ		 228 return 0;
229
230 pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
231 bir = PCI_SRIOV_VFM_BIR(table);
232 if (bir > PCI_STD_RESOURCE_END)
233 return -EIO;
234
235 table = PCI_SRIOV_VFM_OFFSET(table);
236 if (table + nr_virtfn > pci_resource_len(dev, bir))
237 return -EIO;
238
239 pa = pci_resource_start(dev, bir) + table;
240 iov->mstate = ioremap(pa, nr_virtfn);
241 if (!iov->mstate)
242 return -ENOMEM;
243
244 INIT_WORK(&iov->mtask, sriov_migration_task);
245
246 iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
247 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
248
249 return 0;
250}
251
252static void sriov_disable_migration(struct pci_dev *dev)
253{
254 struct pci_sriov *iov = dev->sriov;
255
256 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
257 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
258
259 cancel_work_sync(&iov->mtask);
260 iounmap(iov->mstate);
261}
262
dd7cc44d
YZ		 263static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
264{
265 int rc;
266 int i, j;
267 int nres;
268 u16 offset, stride, initial;
269 struct resource *res;
270 struct pci_dev *pdev;
271 struct pci_sriov *iov = dev->sriov;
bbef98ab 272 int bars = 0;
dd7cc44d
YZ		 273
274 if (!nr_virtfn)
275 return 0;
276
6b136724 277 if (iov->num_VFs)
dd7cc44d
YZ		 278 return -EINVAL;
279
280 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH		 281 if (initial > iov->total_VFs ||
282 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ		 283 return -EIO;
284
6b136724 285 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ		 286 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
287 return -EINVAL;
288
dd7cc44d
YZ		 289 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
290 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
291 if (!offset || (nr_virtfn > 1 && !stride))
292 return -EIO;
293
294 nres = 0;
295 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 296 bars |= (1 << (i + PCI_IOV_RESOURCES));
dd7cc44d
YZ		 297 res = dev->resource + PCI_IOV_RESOURCES + i;
298 if (res->parent)
299 nres++;
300 }
301 if (nres != iov->nres) {
302 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
303 return -ENOMEM;
304 }
305
306 iov->offset = offset;
307 iov->stride = stride;
308
b918c62e 309 if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
dd7cc44d
YZ		 310 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
311 return -ENOMEM;
312 }
313
bbef98ab
RP		 314 if (pci_enable_resources(dev, bars)) {
315 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
316 return -ENOMEM;
317 }
318
dd7cc44d
YZ		 319 if (iov->link != dev->devfn) {
320 pdev = pci_get_slot(dev->bus, iov->link);
321 if (!pdev)
322 return -ENODEV;
323
dc087f2f
JL		 324 if (!pdev->is_physfn) {
325 pci_dev_put(pdev);
652d1100 326 return -ENOSYS;
dc087f2f 327 }
dd7cc44d
YZ		 328
329 rc = sysfs_create_link(&dev->dev.kobj,
330 &pdev->dev.kobj, "dep_link");
dc087f2f 331 pci_dev_put(pdev);
dd7cc44d
YZ		 332 if (rc)
333 return rc;
334 }
335
19b6984e 336 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
dd7cc44d 337 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
fb51ccbf 338 pci_cfg_access_lock(dev);
dd7cc44d
YZ		 339 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
340 msleep(100);
fb51ccbf 341 pci_cfg_access_unlock(dev);
dd7cc44d 342
6b136724 343 iov->initial_VFs = initial;
dd7cc44d
YZ		 344 if (nr_virtfn < initial)
345 initial = nr_virtfn;
346
347 for (i = 0; i < initial; i++) {
348 rc = virtfn_add(dev, i, 0);
349 if (rc)
350 goto failed;
351 }
352
74bb1bcc
YZ		 353 if (iov->cap & PCI_SRIOV_CAP_VFM) {
354 rc = sriov_enable_migration(dev, nr_virtfn);
355 if (rc)
356 goto failed;
357 }
358
dd7cc44d 359 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 360 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ		 361
362 return 0;
363
364failed:
365 for (j = 0; j < i; j++)
366 virtfn_remove(dev, j, 0);
367
368 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 369 pci_cfg_access_lock(dev);
dd7cc44d 370 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
19b6984e 371 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d 372 ssleep(1);
fb51ccbf 373 pci_cfg_access_unlock(dev);
dd7cc44d
YZ		 374
375 if (iov->link != dev->devfn)
376 sysfs_remove_link(&dev->dev.kobj, "dep_link");
377
378 return rc;
379}
380
381static void sriov_disable(struct pci_dev *dev)
382{
383 int i;
384 struct pci_sriov *iov = dev->sriov;
385
6b136724 386 if (!iov->num_VFs)
dd7cc44d
YZ		 387 return;
388
74bb1bcc
YZ		 389 if (iov->cap & PCI_SRIOV_CAP_VFM)
390 sriov_disable_migration(dev);
391
6b136724 392 for (i = 0; i < iov->num_VFs; i++)
dd7cc44d
YZ		 393 virtfn_remove(dev, i, 0);
394
395 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 396 pci_cfg_access_lock(dev);
dd7cc44d
YZ		 397 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
398 ssleep(1);
fb51ccbf 399 pci_cfg_access_unlock(dev);
dd7cc44d
YZ		 400
401 if (iov->link != dev->devfn)
402 sysfs_remove_link(&dev->dev.kobj, "dep_link");
403
6b136724 404 iov->num_VFs = 0;
19b6984e 405 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d
YZ		 406}
407
d1b054da
YZ		 408static int sriov_init(struct pci_dev *dev, int pos)
409{
410 int i;
411 int rc;
412 int nres;
413 u32 pgsz;
414 u16 ctrl, total, offset, stride;
415 struct pci_sriov *iov;
416 struct resource *res;
417 struct pci_dev *pdev;
418
62f87c0e
YW		 419 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
420 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da
YZ		 421 return -ENODEV;
422
423 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
424 if (ctrl & PCI_SRIOV_CTRL_VFE) {
425 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
426 ssleep(1);
427 }
428
429 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
430 if (!total)
431 return 0;
432
433 ctrl = 0;
434 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
435 if (pdev->is_physfn)
436 goto found;
437
438 pdev = NULL;
439 if (pci_ari_enabled(dev->bus))
440 ctrl |= PCI_SRIOV_CTRL_ARI;
441
442found:
443 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
d1b054da
YZ		 444 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
445 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
446 if (!offset || (total > 1 && !stride))
447 return -EIO;
448
449 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
450 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
451 pgsz &= ~((1 << i) - 1);
452 if (!pgsz)
453 return -EIO;
454
455 pgsz &= ~(pgsz - 1);
8161fe91 456 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da
YZ		 457
458 nres = 0;
459 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
460 res = dev->resource + PCI_IOV_RESOURCES + i;
461 i += __pci_read_base(dev, pci_bar_unknown, res,
462 pos + PCI_SRIOV_BAR + i * 4);
463 if (!res->flags)
464 continue;
465 if (resource_size(res) & (PAGE_SIZE - 1)) {
466 rc = -EIO;
467 goto failed;
468 }
469 res->end = res->start + resource_size(res) * total - 1;
470 nres++;
471 }
472
473 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
474 if (!iov) {
475 rc = -ENOMEM;
476 goto failed;
477 }
478
479 iov->pos = pos;
480 iov->nres = nres;
481 iov->ctrl = ctrl;
6b136724 482 iov->total_VFs = total;
d1b054da
YZ		 483 iov->offset = offset;
484 iov->stride = stride;
485 iov->pgsz = pgsz;
486 iov->self = dev;
487 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
488 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 489 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 490 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ		 491
492 if (pdev)
493 iov->dev = pci_dev_get(pdev);
e277d2fc 494 else
d1b054da 495 iov->dev = dev;
e277d2fc
YZ		 496
497 mutex_init(&iov->lock);
d1b054da
YZ		 498
499 dev->sriov = iov;
500 dev->is_physfn = 1;
501
502 return 0;
503
504failed:
505 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
506 res = dev->resource + PCI_IOV_RESOURCES + i;
507 res->flags = 0;
508 }
509
510 return rc;
511}
512
513static void sriov_release(struct pci_dev *dev)
514{
6b136724 515 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 516
e277d2fc 517 if (dev != dev->sriov->dev)
d1b054da
YZ		 518 pci_dev_put(dev->sriov->dev);
519
e277d2fc
YZ		 520 mutex_destroy(&dev->sriov->lock);
521
d1b054da
YZ		 522 kfree(dev->sriov);
523 dev->sriov = NULL;
524}
525
8c5cdb6a
YZ		 526static void sriov_restore_state(struct pci_dev *dev)
527{
528 int i;
529 u16 ctrl;
530 struct pci_sriov *iov = dev->sriov;
531
532 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
533 if (ctrl & PCI_SRIOV_CTRL_VFE)
534 return;
535
536 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
537 pci_update_resource(dev, i);
538
539 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
6b136724 540 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
8c5cdb6a
YZ		 541 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
542 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
543 msleep(100);
544}
545
d1b054da
YZ		 546/**
547 * pci_iov_init - initialize the IOV capability
548 * @dev: the PCI device
549 *
550 * Returns 0 on success, or negative on failure.
551 */
552int pci_iov_init(struct pci_dev *dev)
553{
554 int pos;
555
5f4d91a1 556 if (!pci_is_pcie(dev))
d1b054da
YZ		 557 return -ENODEV;
558
559 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
560 if (pos)
561 return sriov_init(dev, pos);
562
563 return -ENODEV;
564}
565
566/**
567 * pci_iov_release - release resources used by the IOV capability
568 * @dev: the PCI device
569 */
570void pci_iov_release(struct pci_dev *dev)
571{
572 if (dev->is_physfn)
573 sriov_release(dev);
574}
575
576/**
577 * pci_iov_resource_bar - get position of the SR-IOV BAR
578 * @dev: the PCI device
579 * @resno: the resource number
580 * @type: the BAR type to be filled in
581 *
582 * Returns position of the BAR encapsulated in the SR-IOV capability.
583 */
584int pci_iov_resource_bar(struct pci_dev *dev, int resno,
585 enum pci_bar_type *type)
586{
587 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
588 return 0;
589
590 BUG_ON(!dev->is_physfn);
591
592 *type = pci_bar_unknown;
593
594 return dev->sriov->pos + PCI_SRIOV_BAR +
595 4 * (resno - PCI_IOV_RESOURCES);
596}
8c5cdb6a 597
6faf17f6
CW		 598/**
599 * pci_sriov_resource_alignment - get resource alignment for VF BAR
600 * @dev: the PCI device
601 * @resno: the resource number
602 *
603 * Returns the alignment of the VF BAR found in the SR-IOV capability.
604 * This is not the same as the resource size which is defined as
605 * the VF BAR size multiplied by the number of VFs. The alignment
606 * is just the VF BAR size.
607 */
0e52247a 608resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6
CW		 609{
610 struct resource tmp;
611 enum pci_bar_type type;
612 int reg = pci_iov_resource_bar(dev, resno, &type);
f7625980 613
6faf17f6
CW		 614 if (!reg)
615 return 0;
616
617 __pci_read_base(dev, type, &tmp, reg);
618 return resource_alignment(&tmp);
619}
620
8c5cdb6a
YZ		 621/**
622 * pci_restore_iov_state - restore the state of the IOV capability
623 * @dev: the PCI device
624 */
625void pci_restore_iov_state(struct pci_dev *dev)
626{
627 if (dev->is_physfn)
628 sriov_restore_state(dev);
629}
a28724b0
YZ		 630
631/**
632 * pci_iov_bus_range - find bus range used by Virtual Function
633 * @bus: the PCI bus
634 *
635 * Returns max number of buses (exclude current one) used by Virtual
636 * Functions.
637 */
638int pci_iov_bus_range(struct pci_bus *bus)
639{
640 int max = 0;
641 u8 busnr;
642 struct pci_dev *dev;
643
644 list_for_each_entry(dev, &bus->devices, bus_list) {
645 if (!dev->is_physfn)
646 continue;
6b136724 647 busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
a28724b0
YZ		 648 if (busnr > max)
649 max = busnr;
650 }
651
652 return max ? max - bus->number : 0;
653}
dd7cc44d
YZ		 654
655/**
656 * pci_enable_sriov - enable the SR-IOV capability
657 * @dev: the PCI device
52a8873b 658 * @nr_virtfn: number of virtual functions to enable
dd7cc44d
YZ		 659 *
660 * Returns 0 on success, or negative on failure.
661 */
662int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
663{
664 might_sleep();
665
666 if (!dev->is_physfn)
652d1100 667 return -ENOSYS;
dd7cc44d
YZ		 668
669 return sriov_enable(dev, nr_virtfn);
670}
671EXPORT_SYMBOL_GPL(pci_enable_sriov);
672
673/**
674 * pci_disable_sriov - disable the SR-IOV capability
675 * @dev: the PCI device
676 */
677void pci_disable_sriov(struct pci_dev *dev)
678{
679 might_sleep();
680
681 if (!dev->is_physfn)
682 return;
683
684 sriov_disable(dev);
685}
686EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc
YZ		 687
688/**
689 * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
690 * @dev: the PCI device
691 *
692 * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
693 *
694 * Physical Function driver is responsible to register IRQ handler using
695 * VF Migration Interrupt Message Number, and call this function when the
696 * interrupt is generated by the hardware.
697 */
698irqreturn_t pci_sriov_migration(struct pci_dev *dev)
699{
700 if (!dev->is_physfn)
701 return IRQ_NONE;
702
703 return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
704}
705EXPORT_SYMBOL_GPL(pci_sriov_migration);
302b4215 706
fb8a0d9d
WM		 707/**
708 * pci_num_vf - return number of VFs associated with a PF device_release_driver
709 * @dev: the PCI device
710 *
711 * Returns number of VFs, or 0 if SR-IOV is not enabled.
712 */
713int pci_num_vf(struct pci_dev *dev)
714{
1452cd76 715 if (!dev->is_physfn)
fb8a0d9d 716 return 0;
1452cd76
BH		 717
718 return dev->sriov->num_VFs;
fb8a0d9d
WM		 719}
720EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156 721
5a8eb242
AD		 722/**
723 * pci_vfs_assigned - returns number of VFs are assigned to a guest
724 * @dev: the PCI device
725 *
726 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 727 * If device is not a physical function returns 0.
5a8eb242
AD		 728 */
729int pci_vfs_assigned(struct pci_dev *dev)
730{
731 struct pci_dev *vfdev;
732 unsigned int vfs_assigned = 0;
733 unsigned short dev_id;
734
735 /* only search if we are a PF */
736 if (!dev->is_physfn)
737 return 0;
738
739 /*
740 * determine the device ID for the VFs, the vendor ID will be the
741 * same as the PF so there is no need to check for that one
742 */
743 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
744
745 /* loop through all the VFs to see if we own any that are assigned */
746 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
747 while (vfdev) {
748 /*
749 * It is considered assigned if it is a virtual function with
750 * our dev as the physical function and the assigned bit is set
751 */
752 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
753 (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
754 vfs_assigned++;
755
756 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
757 }
758
759 return vfs_assigned;
760}
761EXPORT_SYMBOL_GPL(pci_vfs_assigned);
762
bff73156
DD		 763/**
764 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
765 * @dev: the PCI PF device
2094f167 766 * @numvfs: number that should be used for TotalVFs supported
bff73156
DD		 767 *
768 * Should be called from PF driver's probe routine with
769 * device's mutex held.
770 *
771 * Returns 0 if PF is an SRIOV-capable device and
652d1100
SA		 772 * value of numvfs valid. If not a PF return -ENOSYS;
773 * if numvfs is invalid return -EINVAL;
bff73156
DD		 774 * if VFs already enabled, return -EBUSY.
775 */
776int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
777{
652d1100
SA		 778 if (!dev->is_physfn)
779 return -ENOSYS;
780 if (numvfs > dev->sriov->total_VFs)
bff73156
DD		 781 return -EINVAL;
782
783 /* Shouldn't change if VFs already enabled */
784 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
785 return -EBUSY;
786 else
6b136724 787 dev->sriov->driver_max_VFs = numvfs;
bff73156
DD		 788
789 return 0;
790}
791EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
792
793/**
ddc191f5 794 * pci_sriov_get_totalvfs -- get total VFs supported on this device
bff73156
DD		 795 * @dev: the PCI PF device
796 *
797 * For a PCIe device with SRIOV support, return the PCIe
6b136724 798 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 799 * if the driver reduced it. Otherwise 0.
bff73156
DD		 800 */
801int pci_sriov_get_totalvfs(struct pci_dev *dev)
802{
1452cd76 803 if (!dev->is_physfn)
652d1100 804 return 0;
bff73156 805
6b136724
BH		 806 if (dev->sriov->driver_max_VFs)
807 return dev->sriov->driver_max_VFs;
1452cd76
BH		 808
809 return dev->sriov->total_VFs;
bff73156
DD		 810}
811EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
Linux 6.x block layer and io_uring tree(s)