Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/chrome...
[linux-2.6-block.git] / drivers / pci / htirq.c
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1/*
2 * File: htirq.c
3 * Purpose: Hypertransport Interrupt Capability
4 *
5 * Copyright (C) 2006 Linux Networx
6 * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
7 */
8
9#include <linux/irq.h>
10#include <linux/pci.h>
11#include <linux/spinlock.h>
363c75db 12#include <linux/export.h>
8b955b0d 13#include <linux/slab.h>
95d77884 14#include <linux/htirq.h>
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15
16/* Global ht irq lock.
17 *
18 * This is needed to serialize access to the data port in hypertransport
19 * irq capability.
20 *
21 * With multiple simultaneous hypertransport irq devices it might pay
22 * to make this more fine grained. But start with simple, stupid, and correct.
23 */
24static DEFINE_SPINLOCK(ht_irq_lock);
25
26struct ht_irq_cfg {
27 struct pci_dev *dev;
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28 /* Update callback used to cope with buggy hardware */
29 ht_irq_update_t *update;
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30 unsigned pos;
31 unsigned idx;
ec68307c 32 struct ht_irq_msg msg;
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33};
34
8b955b0d 35
ec68307c 36void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
8b955b0d 37{
dced35ae 38 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
8b955b0d 39 unsigned long flags;
8b955b0d 40 spin_lock_irqsave(&ht_irq_lock, flags);
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41 if (cfg->msg.address_lo != msg->address_lo) {
42 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
43 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_lo);
44 }
45 if (cfg->msg.address_hi != msg->address_hi) {
46 pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
47 pci_write_config_dword(cfg->dev, cfg->pos + 4, msg->address_hi);
48 }
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49 if (cfg->update)
50 cfg->update(cfg->dev, irq, msg);
8b955b0d 51 spin_unlock_irqrestore(&ht_irq_lock, flags);
ec68307c 52 cfg->msg = *msg;
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53}
54
ec68307c 55void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg)
8b955b0d 56{
dced35ae 57 struct ht_irq_cfg *cfg = irq_get_handler_data(irq);
ec68307c 58 *msg = cfg->msg;
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59}
60
e9f7ac66 61void mask_ht_irq(struct irq_data *data)
8b955b0d 62{
dced35ae 63 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
e9f7ac66 64 struct ht_irq_msg msg = cfg->msg;
8b955b0d 65
ec68307c 66 msg.address_lo |= 1;
e9f7ac66 67 write_ht_irq_msg(data->irq, &msg);
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68}
69
e9f7ac66 70void unmask_ht_irq(struct irq_data *data)
8b955b0d 71{
dced35ae 72 struct ht_irq_cfg *cfg = irq_data_get_irq_handler_data(data);
e9f7ac66 73 struct ht_irq_msg msg = cfg->msg;
8b955b0d 74
ec68307c 75 msg.address_lo &= ~1;
e9f7ac66 76 write_ht_irq_msg(data->irq, &msg);
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77}
78
79/**
43539c38 80 * __ht_create_irq - create an irq and attach it to a device.
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81 * @dev: The hypertransport device to find the irq capability on.
82 * @idx: Which of the possible irqs to attach to.
43539c38 83 * @update: Function to be called when changing the htirq message
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84 *
85 * The irq number of the new irq or a negative error value is returned.
86 */
43539c38 87int __ht_create_irq(struct pci_dev *dev, int idx, ht_irq_update_t *update)
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88{
89 struct ht_irq_cfg *cfg;
59b47ddc 90 int max_irq, pos, irq;
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91 unsigned long flags;
92 u32 data;
8b955b0d 93
120a50df 94 pos = pci_find_ht_capability(dev, HT_CAPTYPE_IRQ);
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95 if (!pos)
96 return -EINVAL;
97
98 /* Verify the idx I want to use is in range */
99 spin_lock_irqsave(&ht_irq_lock, flags);
100 pci_write_config_byte(dev, pos + 2, 1);
101 pci_read_config_dword(dev, pos + 4, &data);
102 spin_unlock_irqrestore(&ht_irq_lock, flags);
103
104 max_irq = (data >> 16) & 0xff;
3c78bc61 105 if (idx > max_irq)
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106 return -EINVAL;
107
108 cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
109 if (!cfg)
110 return -ENOMEM;
111
112 cfg->dev = dev;
43539c38 113 cfg->update = update;
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114 cfg->pos = pos;
115 cfg->idx = 0x10 + (idx * 2);
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116 /* Initialize msg to a value that will never match the first write. */
117 cfg->msg.address_lo = 0xffffffff;
118 cfg->msg.address_hi = 0xffffffff;
8b955b0d 119
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120 irq = irq_alloc_hwirq(dev_to_node(&dev->dev));
121 if (!irq) {
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122 kfree(cfg);
123 return -EBUSY;
124 }
dced35ae 125 irq_set_handler_data(irq, cfg);
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126
127 if (arch_setup_ht_irq(irq, dev) < 0) {
128 ht_destroy_irq(irq);
129 return -EBUSY;
130 }
131
132 return irq;
133}
b7fe9434 134EXPORT_SYMBOL(__ht_create_irq);
8b955b0d 135
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136/**
137 * ht_create_irq - create an irq and attach it to a device.
138 * @dev: The hypertransport device to find the irq capability on.
139 * @idx: Which of the possible irqs to attach to.
140 *
141 * ht_create_irq needs to be called for all hypertransport devices
142 * that generate irqs.
143 *
144 * The irq number of the new irq or a negative error value is returned.
145 */
146int ht_create_irq(struct pci_dev *dev, int idx)
147{
148 return __ht_create_irq(dev, idx, NULL);
149}
b7fe9434 150EXPORT_SYMBOL(ht_create_irq);
43539c38 151
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152/**
153 * ht_destroy_irq - destroy an irq created with ht_create_irq
cffb2faf 154 * @irq: irq to be destroyed
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155 *
156 * This reverses ht_create_irq removing the specified irq from
157 * existence. The irq should be free before this happens.
158 */
159void ht_destroy_irq(unsigned int irq)
160{
161 struct ht_irq_cfg *cfg;
162
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163 cfg = irq_get_handler_data(irq);
164 irq_set_chip(irq, NULL);
165 irq_set_handler_data(irq, NULL);
59b47ddc 166 irq_free_hwirq(irq);
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167
168 kfree(cfg);
169}
8b955b0d 170EXPORT_SYMBOL(ht_destroy_irq);