Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs...
[linux-2.6-block.git] / drivers / pci / hotplug / pciehp.h
CommitLineData
1da177e4
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1/*
2 * PCI Express Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM Corp.
7 * Copyright (C) 2003-2004 Intel Corporation
8 *
9 * All rights reserved.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19 * NON INFRINGEMENT. See the GNU General Public License for more
20 * details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
8cf4c195 26 * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
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27 *
28 */
29#ifndef _PCIEHP_H
30#define _PCIEHP_H
31
32#include <linux/types.h>
33#include <linux/pci.h>
7a54f25c 34#include <linux/pci_hotplug.h>
1da177e4 35#include <linux/delay.h>
de25968c 36#include <linux/sched.h> /* signal_pending() */
1da177e4 37#include <linux/pcieport_if.h>
6aa4cdd0 38#include <linux/mutex.h>
a827ea30 39#include <linux/workqueue.h>
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40
41#define MY_NAME "pciehp"
42
43extern int pciehp_poll_mode;
44extern int pciehp_poll_time;
45extern int pciehp_debug;
a3a45ec8 46extern int pciehp_force;
5d386e1a 47extern struct workqueue_struct *pciehp_wq;
a827ea30 48extern struct workqueue_struct *pciehp_ordered_wq;
1da177e4 49
15232ece 50#define dbg(format, arg...) \
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51do { \
52 if (pciehp_debug) \
53 printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); \
54} while (0)
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55#define err(format, arg...) \
56 printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
57#define info(format, arg...) \
58 printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
59#define warn(format, arg...) \
60 printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
1da177e4 61
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62#define ctrl_dbg(ctrl, format, arg...) \
63 do { \
64 if (pciehp_debug) \
1c35b8e5 65 dev_printk(KERN_DEBUG, &ctrl->pcie->device, \
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66 format, ## arg); \
67 } while (0)
68#define ctrl_err(ctrl, format, arg...) \
69 dev_err(&ctrl->pcie->device, format, ## arg)
70#define ctrl_info(ctrl, format, arg...) \
71 dev_info(&ctrl->pcie->device, format, ## arg)
72#define ctrl_warn(ctrl, format, arg...) \
73 dev_warn(&ctrl->pcie->device, format, ## arg)
74
a0b17257 75#define SLOT_NAME_SIZE 10
1da177e4 76struct slot {
1da177e4 77 u8 state;
1da177e4 78 struct controller *ctrl;
1da177e4 79 struct hotplug_slot *hotplug_slot;
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80 struct delayed_work work; /* work for button event */
81 struct mutex lock;
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82};
83
1da177e4
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84struct event_info {
85 u32 event_type;
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86 struct slot *p_slot;
87 struct work_struct work;
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88};
89
90struct controller {
dd5619cb 91 struct mutex ctrl_lock; /* controller lock */
f7a10e32 92 struct pcie_device *pcie; /* PCI Express port service */
8720d27d 93 struct slot *slot;
1da177e4 94 wait_queue_head_t queue; /* sleep & wake process */
ae416e6b 95 u32 slot_cap;
48fe3915 96 struct timer_list poll_timer;
6a82e218 97 unsigned int cmd_busy:1;
5808639b 98 unsigned int no_cmd_complete:1;
f18e9625 99 unsigned int link_active_reporting:1;
dbc7e1e5 100 unsigned int notification_enabled:1;
99f0169c 101 unsigned int power_fault_detected;
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102};
103
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104#define INT_BUTTON_IGNORE 0
105#define INT_PRESENCE_ON 1
106#define INT_PRESENCE_OFF 2
107#define INT_SWITCH_CLOSE 3
108#define INT_SWITCH_OPEN 4
109#define INT_POWER_FAULT 5
110#define INT_POWER_FAULT_CLEAR 6
111#define INT_BUTTON_PRESS 7
112#define INT_BUTTON_RELEASE 8
113#define INT_BUTTON_CANCEL 9
114
115#define STATIC_STATE 0
116#define BLINKINGON_STATE 1
117#define BLINKINGOFF_STATE 2
118#define POWERON_STATE 3
119#define POWEROFF_STATE 4
120
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121#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
122#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
123#define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
124#define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
125#define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
126#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
127#define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
128#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
d54798f0 129#define PSN(ctrl) ((ctrl)->slot_cap >> 19)
1da177e4 130
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131extern int pciehp_sysfs_enable_slot(struct slot *slot);
132extern int pciehp_sysfs_disable_slot(struct slot *slot);
dbd79aed 133extern u8 pciehp_handle_attention_button(struct slot *p_slot);
82a9e79e 134extern u8 pciehp_handle_switch_change(struct slot *p_slot);
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135extern u8 pciehp_handle_presence_change(struct slot *p_slot);
136extern u8 pciehp_handle_power_fault(struct slot *p_slot);
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137extern int pciehp_configure_device(struct slot *p_slot);
138extern int pciehp_unconfigure_device(struct slot *p_slot);
e325e1f0 139extern void pciehp_queue_pushbutton_work(struct work_struct *work);
c4635eb0 140struct controller *pcie_init(struct pcie_device *dev);
dbc7e1e5 141int pcie_init_notification(struct controller *ctrl);
0a3c33d7 142int pciehp_enable_slot(struct slot *p_slot);
cd2fe83a 143int pciehp_disable_slot(struct slot *p_slot);
c4635eb0 144int pcie_enable_notification(struct controller *ctrl);
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145int pciehp_power_on_slot(struct slot *slot);
146int pciehp_power_off_slot(struct slot *slot);
147int pciehp_get_power_status(struct slot *slot, u8 *status);
148int pciehp_get_attention_status(struct slot *slot, u8 *status);
149
150int pciehp_set_attention_status(struct slot *slot, u8 status);
151int pciehp_get_latch_status(struct slot *slot, u8 *status);
152int pciehp_get_adapter_status(struct slot *slot, u8 *status);
153int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *speed);
154int pciehp_get_max_link_width(struct slot *slot, enum pcie_link_width *val);
155int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *speed);
156int pciehp_get_cur_link_width(struct slot *slot, enum pcie_link_width *val);
157int pciehp_query_power_fault(struct slot *slot);
158void pciehp_green_led_on(struct slot *slot);
159void pciehp_green_led_off(struct slot *slot);
160void pciehp_green_led_blink(struct slot *slot);
161int pciehp_check_link_status(struct controller *ctrl);
162void pciehp_release_ctrl(struct controller *ctrl);
1da177e4 163
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164static inline const char *slot_name(struct slot *slot)
165{
166 return hotplug_slot_name(slot->hotplug_slot);
167}
168
783c49fc 169#ifdef CONFIG_ACPI
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170#include <acpi/acpi.h>
171#include <acpi/acpi_bus.h>
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172#include <linux/pci-acpi.h>
173
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174extern void __init pciehp_acpi_slot_detection_init(void);
175extern int pciehp_acpi_slot_detection_check(struct pci_dev *dev);
176
177static inline void pciehp_firmware_init(void)
178{
179 pciehp_acpi_slot_detection_init();
180}
783c49fc 181#else
c9ffa5a5 182#define pciehp_firmware_init() do {} while (0)
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183static inline int pciehp_acpi_slot_detection_check(struct pci_dev *dev)
184{
185 return 0;
186}
783c49fc 187#endif /* CONFIG_ACPI */
1da177e4 188#endif /* _PCIEHP_H */