[linux-2.6-block.git] / drivers / parport / parport_gsc.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *      Low-level parallel-support for PC-style hardware integrated in the 
 *	LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
 *
 *	(C) 1999-2001 by Helge Deller <deller@gmx.de>
 * 
 * based on parport_pc.c by 
 * 	    Grant Guenther <grant@torque.net>
 * 	    Phil Blundell <philb@gnu.org>
 *          Tim Waugh <tim@cyberelk.demon.co.uk>
 *	    Jose Renau <renau@acm.org>
 *          David Campbell
 *          Andrea Arcangeli
 */

#undef DEBUG	/* undef for production */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/sysctl.h>

#include <asm/io.h>
#include <asm/dma.h>
#include <linux/uaccess.h>
#include <asm/superio.h>

#include <linux/parport.h>
#include <asm/pdc.h>
#include <asm/parisc-device.h>
#include <asm/hardware.h>
#include "parport_gsc.h"


MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
MODULE_LICENSE("GPL");


/*
 * Clear TIMEOUT BIT in EPP MODE
 *
 * This is also used in SPP detection.
 */
static int clear_epp_timeout(struct parport *pb)
{
	unsigned char r;

	if (!(parport_gsc_read_status(pb) & 0x01))
		return 1;

	/* To clear timeout some chips require double read */
	parport_gsc_read_status(pb);
	r = parport_gsc_read_status(pb);
	parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
	parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
	r = parport_gsc_read_status(pb);

	return !(r & 0x01);
}

/*
 * Access functions.
 *
 * Most of these aren't static because they may be used by the
 * parport_xxx_yyy macros.  extern __inline__ versions of several
 * of these are in parport_gsc.h.
 */

void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
{
	s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
}

void parport_gsc_save_state(struct parport *p, struct parport_state *s)
{
	s->u.pc.ctr = parport_readb (CONTROL (p));
}

void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
{
	parport_writeb (s->u.pc.ctr, CONTROL (p));
}

struct parport_operations parport_gsc_ops = 
{
	.write_data	= parport_gsc_write_data,
	.read_data	= parport_gsc_read_data,

	.write_control	= parport_gsc_write_control,
	.read_control	= parport_gsc_read_control,
	.frob_control	= parport_gsc_frob_control,

	.read_status	= parport_gsc_read_status,

	.enable_irq	= parport_gsc_enable_irq,
	.disable_irq	= parport_gsc_disable_irq,

	.data_forward	= parport_gsc_data_forward,
	.data_reverse	= parport_gsc_data_reverse,

	.init_state	= parport_gsc_init_state,
	.save_state	= parport_gsc_save_state,
	.restore_state	= parport_gsc_restore_state,

	.epp_write_data	= parport_ieee1284_epp_write_data,
	.epp_read_data	= parport_ieee1284_epp_read_data,
	.epp_write_addr	= parport_ieee1284_epp_write_addr,
	.epp_read_addr	= parport_ieee1284_epp_read_addr,

	.ecp_write_data	= parport_ieee1284_ecp_write_data,
	.ecp_read_data	= parport_ieee1284_ecp_read_data,
	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,

	.compat_write_data 	= parport_ieee1284_write_compat,
	.nibble_read_data	= parport_ieee1284_read_nibble,
	.byte_read_data		= parport_ieee1284_read_byte,

	.owner		= THIS_MODULE,
};

/* --- Mode detection ------------------------------------- */

/*
 * Checks for port existence, all ports support SPP MODE
 */
static int parport_SPP_supported(struct parport *pb)
{
	unsigned char r, w;

	/*
	 * first clear an eventually pending EPP timeout 
	 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
	 * that does not even respond to SPP cycles if an EPP
	 * timeout is pending
	 */
	clear_epp_timeout(pb);

	/* Do a simple read-write test to make sure the port exists. */
	w = 0xc;
	parport_writeb (w, CONTROL (pb));

	/* Is there a control register that we can read from?  Some
	 * ports don't allow reads, so read_control just returns a
	 * software copy. Some ports _do_ allow reads, so bypass the
	 * software copy here.  In addition, some bits aren't
	 * writable. */
	r = parport_readb (CONTROL (pb));
	if ((r & 0xf) == w) {
		w = 0xe;
		parport_writeb (w, CONTROL (pb));
		r = parport_readb (CONTROL (pb));
		parport_writeb (0xc, CONTROL (pb));
		if ((r & 0xf) == w)
			return PARPORT_MODE_PCSPP;
	}

	/* Try the data register.  The data lines aren't tri-stated at
	 * this stage, so we expect back what we wrote. */
	w = 0xaa;
	parport_gsc_write_data (pb, w);
	r = parport_gsc_read_data (pb);
	if (r == w) {
		w = 0x55;
		parport_gsc_write_data (pb, w);
		r = parport_gsc_read_data (pb);
		if (r == w)
			return PARPORT_MODE_PCSPP;
	}

	return 0;
}

/* Detect PS/2 support.
 *
 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
 * allows us to read data from the data lines.  In theory we would get back
 * 0xff but any peripheral attached to the port may drag some or all of the
 * lines down to zero.  So if we get back anything that isn't the contents
 * of the data register we deem PS/2 support to be present. 
 *
 * Some SPP ports have "half PS/2" ability - you can't turn off the line
 * drivers, but an external peripheral with sufficiently beefy drivers of
 * its own can overpower them and assert its own levels onto the bus, from
 * where they can then be read back as normal.  Ports with this property
 * and the right type of device attached are likely to fail the SPP test,
 * (as they will appear to have stuck bits) and so the fact that they might
 * be misdetected here is rather academic. 
 */

static int parport_PS2_supported(struct parport *pb)
{
	int ok = 0;
  
	clear_epp_timeout(pb);

	/* try to tri-state the buffer */
	parport_gsc_data_reverse (pb);
	
	parport_gsc_write_data(pb, 0x55);
	if (parport_gsc_read_data(pb) != 0x55) ok++;

	parport_gsc_write_data(pb, 0xaa);
	if (parport_gsc_read_data(pb) != 0xaa) ok++;

	/* cancel input mode */
	parport_gsc_data_forward (pb);

	if (ok) {
		pb->modes |= PARPORT_MODE_TRISTATE;
	} else {
		struct parport_gsc_private *priv = pb->private_data;
		priv->ctr_writable &= ~0x20;
	}

	return ok;
}


/* --- Initialisation code -------------------------------- */

struct parport *parport_gsc_probe_port(unsigned long base,
				       unsigned long base_hi, int irq,
				       int dma, struct parisc_device *padev)
{
	struct parport_gsc_private *priv;
	struct parport_operations *ops;
	struct parport tmp;
	struct parport *p = &tmp;

	priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
	if (!priv) {
		printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
		return NULL;
	}
	ops = kmemdup(&parport_gsc_ops, sizeof(struct parport_operations),
		      GFP_KERNEL);
	if (!ops) {
		printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
			base);
		kfree (priv);
		return NULL;
	}
	priv->ctr = 0xc;
	priv->ctr_writable = 0xff;
	priv->dma_buf = NULL;
	priv->dma_handle = 0;
	p->base = base;
	p->base_hi = base_hi;
	p->irq = irq;
	p->dma = dma;
	p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
	p->ops = ops;
	p->private_data = priv;
	p->physport = p;
	if (!parport_SPP_supported (p)) {
		/* No port. */
		kfree (priv);
		kfree(ops);
		return NULL;
	}
	parport_PS2_supported (p);

	if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
					PARPORT_DMA_NONE, ops))) {
		kfree (priv);
		kfree (ops);
		return NULL;
	}

	p->dev = &padev->dev;
	p->base_hi = base_hi;
	p->modes = tmp.modes;
	p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
	p->private_data = priv;

	printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
	p->irq = irq;
	if (p->irq == PARPORT_IRQ_AUTO) {
		p->irq = PARPORT_IRQ_NONE;
	}
	if (p->irq != PARPORT_IRQ_NONE) {
		pr_cont(", irq %d", p->irq);

		if (p->dma == PARPORT_DMA_AUTO) {
			p->dma = PARPORT_DMA_NONE;
		}
	}
	if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
                                           is mandatory (see above) */
		p->dma = PARPORT_DMA_NONE;

	pr_cont(" [");
#define printmode(x) {if(p->modes&PARPORT_MODE_##x){pr_cont("%s%s",f?",":"",#x);f++;}}
	{
		int f = 0;
		printmode(PCSPP);
		printmode(TRISTATE);
		printmode(COMPAT)
		printmode(EPP);
//		printmode(ECP);
//		printmode(DMA);
	}
#undef printmode
	pr_cont("]\n");

	if (p->irq != PARPORT_IRQ_NONE) {
		if (request_irq (p->irq, parport_irq_handler,
				 0, p->name, p)) {
			printk (KERN_WARNING "%s: irq %d in use, "
				"resorting to polled operation\n",
				p->name, p->irq);
			p->irq = PARPORT_IRQ_NONE;
			p->dma = PARPORT_DMA_NONE;
		}
	}

	/* Done probing.  Now put the port into a sensible start-up state. */

	parport_gsc_write_data(p, 0);
	parport_gsc_data_forward (p);

	/* Now that we've told the sharing engine about the port, and
	   found out its characteristics, let the high-level drivers
	   know about it. */
	parport_announce_port (p);

	return p;
}


#define PARPORT_GSC_OFFSET 0x800

static int parport_count;

static int __init parport_init_chip(struct parisc_device *dev)
{
	struct parport *p;
	unsigned long port;

	if (!dev->irq) {
		printk(KERN_WARNING "IRQ not found for parallel device at 0x%llx\n",
			(unsigned long long)dev->hpa.start);
		return -ENODEV;
	}

	port = dev->hpa.start + PARPORT_GSC_OFFSET;
	
	/* some older machines with ASP-chip don't support
	 * the enhanced parport modes.
	 */
	if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {

		/* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
		printk("%s: initialize bidirectional-mode.\n", __func__);
		parport_writeb ( (0x10 + 0x20), port + 4);

	} else {
		printk("%s: enhanced parport-modes not supported.\n", __func__);
	}
	
	p = parport_gsc_probe_port(port, 0, dev->irq,
			/* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, dev);
	if (p)
		parport_count++;
	dev_set_drvdata(&dev->dev, p);

	return 0;
}

static int __exit parport_remove_chip(struct parisc_device *dev)
{
	struct parport *p = dev_get_drvdata(&dev->dev);
	if (p) {
		struct parport_gsc_private *priv = p->private_data;
		struct parport_operations *ops = p->ops;
		parport_remove_port(p);
		if (p->dma != PARPORT_DMA_NONE)
			free_dma(p->dma);
		if (p->irq != PARPORT_IRQ_NONE)
			free_irq(p->irq, p);
		if (priv->dma_buf)
			pci_free_consistent(priv->dev, PAGE_SIZE,
					    priv->dma_buf,
					    priv->dma_handle);
		kfree (p->private_data);
		parport_put_port(p);
		kfree (ops); /* hope no-one cached it */
	}
	return 0;
}

static const struct parisc_device_id parport_tbl[] __initconst = {
	{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
	{ 0, }
};

MODULE_DEVICE_TABLE(parisc, parport_tbl);

static struct parisc_driver parport_driver __refdata = {
	.name		= "Parallel",
	.id_table	= parport_tbl,
	.probe		= parport_init_chip,
	.remove		= __exit_p(parport_remove_chip),
};

int parport_gsc_init(void)
{
	return register_parisc_driver(&parport_driver);
}

static void parport_gsc_exit(void)
{
	unregister_parisc_driver(&parport_driver);
}

module_init(parport_gsc_init);
module_exit(parport_gsc_exit);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 LT	2	/*
	3	* Low-level parallel-support for PC-style hardware integrated in the
	4	* LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
	5	*
1da177e4	6	* (C) 1999-2001 by Helge Deller <deller@gmx.de>
1da177e4 LT	7	*
	8	* based on parport_pc.c by
	9	* Grant Guenther <grant@torque.net>
	10	* Phil Blundell <philb@gnu.org>
	11	* Tim Waugh <tim@cyberelk.demon.co.uk>
	12	* Jose Renau <renau@acm.org>
bdca3f20	13	* David Campbell
1da177e4 LT	14	* Andrea Arcangeli
	15	*/
	16
	17	#undef DEBUG /* undef for production */
	18
	19	#include <linux/module.h>
	20	#include <linux/init.h>
1da177e4 LT	21	#include <linux/delay.h>
	22	#include <linux/errno.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/ioport.h>
	25	#include <linux/kernel.h>
	26	#include <linux/slab.h>
	27	#include <linux/pci.h>
	28	#include <linux/sysctl.h>
	29
	30	#include <asm/io.h>
	31	#include <asm/dma.h>
7c0f6ba6	32	#include <linux/uaccess.h>
1da177e4 LT	33	#include <asm/superio.h>
	34
	35	#include <linux/parport.h>
	36	#include <asm/pdc.h>
	37	#include <asm/parisc-device.h>
	38	#include <asm/hardware.h>
	39	#include "parport_gsc.h"
	40
	41
	42	MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
	43	MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
	44	MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
	45	MODULE_LICENSE("GPL");
	46
	47
	48	/*
	49	* Clear TIMEOUT BIT in EPP MODE
	50	*
	51	* This is also used in SPP detection.
	52	*/
	53	static int clear_epp_timeout(struct parport *pb)
	54	{
	55	unsigned char r;
	56
	57	if (!(parport_gsc_read_status(pb) & 0x01))
	58	return 1;
	59
	60	/* To clear timeout some chips require double read */
	61	parport_gsc_read_status(pb);
	62	r = parport_gsc_read_status(pb);
	63	parport_writeb (r \| 0x01, STATUS (pb)); /* Some reset by writing 1 */
	64	parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
	65	r = parport_gsc_read_status(pb);
	66
	67	return !(r & 0x01);
	68	}
	69
	70	/*
	71	* Access functions.
	72	*
	73	* Most of these aren't static because they may be used by the
	74	* parport_xxx_yyy macros. extern __inline__ versions of several
	75	* of these are in parport_gsc.h.
	76	*/
	77
1da177e4 LT	78	void parport_gsc_init_state(struct pardevice dev, struct parport_state s)
	79	{
	80	s->u.pc.ctr = 0xc \| (dev->irq_func ? 0x10 : 0x0);
	81	}
	82
	83	void parport_gsc_save_state(struct parport p, struct parport_state s)
	84	{
	85	s->u.pc.ctr = parport_readb (CONTROL (p));
	86	}
	87
	88	void parport_gsc_restore_state(struct parport p, struct parport_state s)
	89	{
	90	parport_writeb (s->u.pc.ctr, CONTROL (p));
	91	}
	92
	93	struct parport_operations parport_gsc_ops =
	94	{
	95	.write_data = parport_gsc_write_data,
	96	.read_data = parport_gsc_read_data,
	97
	98	.write_control = parport_gsc_write_control,
	99	.read_control = parport_gsc_read_control,
	100	.frob_control = parport_gsc_frob_control,
	101
	102	.read_status = parport_gsc_read_status,
	103
	104	.enable_irq = parport_gsc_enable_irq,
	105	.disable_irq = parport_gsc_disable_irq,
	106
	107	.data_forward = parport_gsc_data_forward,
	108	.data_reverse = parport_gsc_data_reverse,
	109
	110	.init_state = parport_gsc_init_state,
	111	.save_state = parport_gsc_save_state,
	112	.restore_state = parport_gsc_restore_state,
	113
	114	.epp_write_data = parport_ieee1284_epp_write_data,
	115	.epp_read_data = parport_ieee1284_epp_read_data,
	116	.epp_write_addr = parport_ieee1284_epp_write_addr,
	117	.epp_read_addr = parport_ieee1284_epp_read_addr,
	118
	119	.ecp_write_data = parport_ieee1284_ecp_write_data,
	120	.ecp_read_data = parport_ieee1284_ecp_read_data,
	121	.ecp_write_addr = parport_ieee1284_ecp_write_addr,
	122
	123	.compat_write_data = parport_ieee1284_write_compat,
	124	.nibble_read_data = parport_ieee1284_read_nibble,
	125	.byte_read_data = parport_ieee1284_read_byte,
	126
	127	.owner = THIS_MODULE,
	128	};
	129
	130	/* --- Mode detection ------------------------------------- */
	131
	132	/*
	133	* Checks for port existence, all ports support SPP MODE
	134	*/
312facaf	135	static int parport_SPP_supported(struct parport *pb)
1da177e4 LT	136	{
	137	unsigned char r, w;
	138
	139	/*
	140	* first clear an eventually pending EPP timeout
	141	* I (sailer@ife.ee.ethz.ch) have an SMSC chipset
	142	* that does not even respond to SPP cycles if an EPP
	143	* timeout is pending
	144	*/
	145	clear_epp_timeout(pb);
	146
	147	/* Do a simple read-write test to make sure the port exists. */
	148	w = 0xc;
	149	parport_writeb (w, CONTROL (pb));
	150
	151	/* Is there a control register that we can read from? Some
	152	* ports don't allow reads, so read_control just returns a
	153	* software copy. Some ports _do_ allow reads, so bypass the
	154	* software copy here. In addition, some bits aren't
	155	* writable. */
	156	r = parport_readb (CONTROL (pb));
	157	if ((r & 0xf) == w) {
	158	w = 0xe;
	159	parport_writeb (w, CONTROL (pb));
	160	r = parport_readb (CONTROL (pb));
	161	parport_writeb (0xc, CONTROL (pb));
	162	if ((r & 0xf) == w)
	163	return PARPORT_MODE_PCSPP;
	164	}
	165
	166	/* Try the data register. The data lines aren't tri-stated at
	167	* this stage, so we expect back what we wrote. */
	168	w = 0xaa;
	169	parport_gsc_write_data (pb, w);
	170	r = parport_gsc_read_data (pb);
	171	if (r == w) {
	172	w = 0x55;
	173	parport_gsc_write_data (pb, w);
	174	r = parport_gsc_read_data (pb);
	175	if (r == w)
	176	return PARPORT_MODE_PCSPP;
	177	}
	178
	179	return 0;
	180	}
	181
	182	/* Detect PS/2 support.
	183	*
	184	* Bit 5 (0x20) sets the PS/2 data direction; setting this high
	185	* allows us to read data from the data lines. In theory we would get back
	186	* 0xff but any peripheral attached to the port may drag some or all of the
	187	* lines down to zero. So if we get back anything that isn't the contents
	188	* of the data register we deem PS/2 support to be present.
	189	*
	190	* Some SPP ports have "half PS/2" ability - you can't turn off the line
	191	* drivers, but an external peripheral with sufficiently beefy drivers of
	192	* its own can overpower them and assert its own levels onto the bus, from
	193	* where they can then be read back as normal. Ports with this property
	194	* and the right type of device attached are likely to fail the SPP test,
	195	* (as they will appear to have stuck bits) and so the fact that they might
	196	* be misdetected here is rather academic.
	197	*/
	198
312facaf	199	static int parport_PS2_supported(struct parport *pb)
1da177e4 LT	200	{
	201	int ok = 0;
	202
	203	clear_epp_timeout(pb);
	204
	205	/* try to tri-state the buffer */
	206	parport_gsc_data_reverse (pb);
	207
	208	parport_gsc_write_data(pb, 0x55);
	209	if (parport_gsc_read_data(pb) != 0x55) ok++;
	210
	211	parport_gsc_write_data(pb, 0xaa);
	212	if (parport_gsc_read_data(pb) != 0xaa) ok++;
	213
	214	/* cancel input mode */
	215	parport_gsc_data_forward (pb);
	216
	217	if (ok) {
	218	pb->modes \|= PARPORT_MODE_TRISTATE;
	219	} else {
	220	struct parport_gsc_private *priv = pb->private_data;
	221	priv->ctr_writable &= ~0x20;
	222	}
	223
	224	return ok;
	225	}
	226
	227
	228	/* --- Initialisation code -------------------------------- */
	229
312facaf GKH	230	struct parport *parport_gsc_probe_port(unsigned long base,
312facaf GKH	231	unsigned long base_hi, int irq,
4edb3869	232	int dma, struct parisc_device *padev)
1da177e4 LT	233	{
	234	struct parport_gsc_private *priv;
	235	struct parport_operations *ops;
	236	struct parport tmp;
	237	struct parport *p = &tmp;
	238
cb6fc18e	239	priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
1da177e4 LT	240	if (!priv) {
	241	printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
	242	return NULL;
	243	}
2451a848 SMP	244	ops = kmemdup(&parport_gsc_ops, sizeof(struct parport_operations),
2451a848 SMP	245	GFP_KERNEL);
1da177e4 LT	246	if (!ops) {
	247	printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
	248	base);
	249	kfree (priv);
	250	return NULL;
	251	}
1da177e4 LT	252	priv->ctr = 0xc;
1da177e4 LT	253	priv->ctr_writable = 0xff;
c92826ef	254	priv->dma_buf = NULL;
1da177e4	255	priv->dma_handle = 0;
1da177e4 LT	256	p->base = base;
	257	p->base_hi = base_hi;
	258	p->irq = irq;
	259	p->dma = dma;
	260	p->modes = PARPORT_MODE_PCSPP \| PARPORT_MODE_SAFEININT;
	261	p->ops = ops;
	262	p->private_data = priv;
	263	p->physport = p;
	264	if (!parport_SPP_supported (p)) {
	265	/* No port. */
	266	kfree (priv);
9986ffd9	267	kfree(ops);
1da177e4 LT	268	return NULL;
	269	}
	270	parport_PS2_supported (p);
	271
	272	if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
	273	PARPORT_DMA_NONE, ops))) {
	274	kfree (priv);
	275	kfree (ops);
	276	return NULL;
	277	}
	278
4edb3869	279	p->dev = &padev->dev;
1da177e4 LT	280	p->base_hi = base_hi;
	281	p->modes = tmp.modes;
	282	p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
	283	p->private_data = priv;
	284
	285	printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
	286	p->irq = irq;
	287	if (p->irq == PARPORT_IRQ_AUTO) {
	288	p->irq = PARPORT_IRQ_NONE;
	289	}
	290	if (p->irq != PARPORT_IRQ_NONE) {
83b5d1e3	291	pr_cont(", irq %d", p->irq);
1da177e4 LT	292
	293	if (p->dma == PARPORT_DMA_AUTO) {
	294	p->dma = PARPORT_DMA_NONE;
	295	}
	296	}
	297	if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
	298	is mandatory (see above) */
	299	p->dma = PARPORT_DMA_NONE;
	300
83b5d1e3 HD	301	pr_cont(" [");
83b5d1e3 HD	302	#define printmode(x) {if(p->modes&PARPORT_MODE_##x){pr_cont("%s%s",f?",":"",#x);f++;}}
1da177e4 LT	303	{
	304	int f = 0;
	305	printmode(PCSPP);
	306	printmode(TRISTATE);
	307	printmode(COMPAT)
	308	printmode(EPP);
	309	// printmode(ECP);
	310	// printmode(DMA);
	311	}
	312	#undef printmode
83b5d1e3	313	pr_cont("]\n");
1da177e4 LT	314
1da177e4 LT	315	if (p->irq != PARPORT_IRQ_NONE) {
3f2e40df	316	if (request_irq (p->irq, parport_irq_handler,
1da177e4 LT	317	0, p->name, p)) {
	318	printk (KERN_WARNING "%s: irq %d in use, "
	319	"resorting to polled operation\n",
	320	p->name, p->irq);
	321	p->irq = PARPORT_IRQ_NONE;
	322	p->dma = PARPORT_DMA_NONE;
	323	}
	324	}
	325
	326	/* Done probing. Now put the port into a sensible start-up state. */
	327
	328	parport_gsc_write_data(p, 0);
	329	parport_gsc_data_forward (p);
	330
	331	/* Now that we've told the sharing engine about the port, and
	332	found out its characteristics, let the high-level drivers
	333	know about it. */
	334	parport_announce_port (p);
	335
	336	return p;
	337	}
	338
	339
	340	#define PARPORT_GSC_OFFSET 0x800
	341
312facaf	342	static int parport_count;
1da177e4	343
f0973443	344	static int __init parport_init_chip(struct parisc_device *dev)
1da177e4 LT	345	{
	346	struct parport *p;
	347	unsigned long port;
	348
	349	if (!dev->irq) {
b5d598b4 AB	350	printk(KERN_WARNING "IRQ not found for parallel device at 0x%llx\n",
b5d598b4 AB	351	(unsigned long long)dev->hpa.start);
1da177e4 LT	352	return -ENODEV;
	353	}
	354
53f01bba	355	port = dev->hpa.start + PARPORT_GSC_OFFSET;
1da177e4 LT	356
	357	/* some older machines with ASP-chip don't support
	358	* the enhanced parport modes.
	359	*/
	360	if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
	361
	362	/* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
145980a0	363	printk("%s: initialize bidirectional-mode.\n", __func__);
1da177e4 LT	364	parport_writeb ( (0x10 + 0x20), port + 4);
	365
	366	} else {
145980a0	367	printk("%s: enhanced parport-modes not supported.\n", __func__);
1da177e4 LT	368	}
	369
	370	p = parport_gsc_probe_port(port, 0, dev->irq,
4edb3869	371	/* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, dev);
1da177e4 LT	372	if (p)
1da177e4 LT	373	parport_count++;
61616115	374	dev_set_drvdata(&dev->dev, p);
1da177e4 LT	375
	376	return 0;
	377	}
	378
f0973443	379	static int __exit parport_remove_chip(struct parisc_device *dev)
1da177e4	380	{
61616115	381	struct parport *p = dev_get_drvdata(&dev->dev);
1da177e4 LT	382	if (p) {
	383	struct parport_gsc_private *priv = p->private_data;
	384	struct parport_operations *ops = p->ops;
	385	parport_remove_port(p);
	386	if (p->dma != PARPORT_DMA_NONE)
	387	free_dma(p->dma);
	388	if (p->irq != PARPORT_IRQ_NONE)
	389	free_irq(p->irq, p);
	390	if (priv->dma_buf)
	391	pci_free_consistent(priv->dev, PAGE_SIZE,
	392	priv->dma_buf,
	393	priv->dma_handle);
	394	kfree (p->private_data);
	395	parport_put_port(p);
	396	kfree (ops); /* hope no-one cached it */
	397	}
	398	return 0;
	399	}
	400
f0973443	401	static const struct parisc_device_id parport_tbl[] __initconst = {
1da177e4 LT	402	{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
	403	{ 0, }
	404	};
	405
	406	MODULE_DEVICE_TABLE(parisc, parport_tbl);
	407
f0973443	408	static struct parisc_driver parport_driver __refdata = {
1da177e4 LT	409	.name = "Parallel",
	410	.id_table = parport_tbl,
	411	.probe = parport_init_chip,
f0973443	412	.remove = __exit_p(parport_remove_chip),
1da177e4 LT	413	};
1da177e4 LT	414
312facaf	415	int parport_gsc_init(void)
1da177e4 LT	416	{
	417	return register_parisc_driver(&parport_driver);
	418	}
	419
312facaf	420	static void parport_gsc_exit(void)
1da177e4 LT	421	{
	422	unregister_parisc_driver(&parport_driver);
	423	}
	424
	425	module_init(parport_gsc_init);
	426	module_exit(parport_gsc_exit);