Commit | Line | Data |
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6b884a8d | 1 | |
5019f0b1 | 2 | #include <linux/device.h> |
6b884a8d GL |
3 | #include <linux/io.h> |
4 | #include <linux/ioport.h> | |
dbbdee94 | 5 | #include <linux/module.h> |
6b884a8d | 6 | #include <linux/of_address.h> |
dbbdee94 GL |
7 | #include <linux/pci_regs.h> |
8 | #include <linux/string.h> | |
6b884a8d | 9 | |
dbbdee94 GL |
10 | /* Max address size we deal with */ |
11 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
12 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
13 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 GL |
14 | |
15 | static struct of_bus *of_match_bus(struct device_node *np); | |
0131d897 SAS |
16 | static int __of_address_to_resource(struct device_node *dev, |
17 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 18 | const char *name, struct resource *r); |
dbbdee94 GL |
19 | |
20 | /* Debug utility */ | |
21 | #ifdef DEBUG | |
0131d897 | 22 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 GL |
23 | { |
24 | printk(KERN_DEBUG "%s", s); | |
25 | while (na--) | |
154063a9 | 26 | printk(" %08x", be32_to_cpu(*(addr++))); |
dbbdee94 GL |
27 | printk("\n"); |
28 | } | |
29 | #else | |
0131d897 | 30 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
31 | #endif |
32 | ||
33 | /* Callbacks for bus specific translators */ | |
34 | struct of_bus { | |
35 | const char *name; | |
36 | const char *addresses; | |
37 | int (*match)(struct device_node *parent); | |
38 | void (*count_cells)(struct device_node *child, | |
39 | int *addrc, int *sizec); | |
47b1e689 | 40 | u64 (*map)(__be32 *addr, const __be32 *range, |
dbbdee94 | 41 | int na, int ns, int pna); |
47b1e689 | 42 | int (*translate)(__be32 *addr, u64 offset, int na); |
0131d897 | 43 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
44 | }; |
45 | ||
46 | /* | |
47 | * Default translator (generic bus) | |
48 | */ | |
49 | ||
50 | static void of_bus_default_count_cells(struct device_node *dev, | |
51 | int *addrc, int *sizec) | |
52 | { | |
53 | if (addrc) | |
54 | *addrc = of_n_addr_cells(dev); | |
55 | if (sizec) | |
56 | *sizec = of_n_size_cells(dev); | |
57 | } | |
58 | ||
47b1e689 | 59 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
dbbdee94 GL |
60 | int na, int ns, int pna) |
61 | { | |
62 | u64 cp, s, da; | |
63 | ||
64 | cp = of_read_number(range, na); | |
65 | s = of_read_number(range + na + pna, ns); | |
66 | da = of_read_number(addr, na); | |
67 | ||
68 | pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", | |
69 | (unsigned long long)cp, (unsigned long long)s, | |
70 | (unsigned long long)da); | |
71 | ||
72 | if (da < cp || da >= (cp + s)) | |
73 | return OF_BAD_ADDR; | |
74 | return da - cp; | |
75 | } | |
76 | ||
47b1e689 | 77 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
78 | { |
79 | u64 a = of_read_number(addr, na); | |
80 | memset(addr, 0, na * 4); | |
81 | a += offset; | |
82 | if (na > 1) | |
154063a9 GL |
83 | addr[na - 2] = cpu_to_be32(a >> 32); |
84 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
85 | |
86 | return 0; | |
87 | } | |
88 | ||
0131d897 | 89 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
90 | { |
91 | return IORESOURCE_MEM; | |
92 | } | |
93 | ||
94 | #ifdef CONFIG_PCI | |
95 | /* | |
96 | * PCI bus specific translator | |
97 | */ | |
98 | ||
99 | static int of_bus_pci_match(struct device_node *np) | |
100 | { | |
6dd18e46 BH |
101 | /* |
102 | * "vci" is for the /chaos bridge on 1st-gen PCI powermacs | |
103 | * "ht" is hypertransport | |
104 | */ | |
105 | return !strcmp(np->type, "pci") || !strcmp(np->type, "vci") || | |
106 | !strcmp(np->type, "ht"); | |
dbbdee94 GL |
107 | } |
108 | ||
109 | static void of_bus_pci_count_cells(struct device_node *np, | |
110 | int *addrc, int *sizec) | |
111 | { | |
112 | if (addrc) | |
113 | *addrc = 3; | |
114 | if (sizec) | |
115 | *sizec = 2; | |
116 | } | |
117 | ||
0131d897 | 118 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
dbbdee94 GL |
119 | { |
120 | unsigned int flags = 0; | |
0131d897 | 121 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
122 | |
123 | switch((w >> 24) & 0x03) { | |
124 | case 0x01: | |
125 | flags |= IORESOURCE_IO; | |
126 | break; | |
127 | case 0x02: /* 32 bits */ | |
128 | case 0x03: /* 64 bits */ | |
129 | flags |= IORESOURCE_MEM; | |
130 | break; | |
131 | } | |
132 | if (w & 0x40000000) | |
133 | flags |= IORESOURCE_PREFETCH; | |
134 | return flags; | |
135 | } | |
136 | ||
47b1e689 | 137 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 138 | int pna) |
dbbdee94 GL |
139 | { |
140 | u64 cp, s, da; | |
141 | unsigned int af, rf; | |
142 | ||
143 | af = of_bus_pci_get_flags(addr); | |
144 | rf = of_bus_pci_get_flags(range); | |
145 | ||
146 | /* Check address type match */ | |
147 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
148 | return OF_BAD_ADDR; | |
149 | ||
150 | /* Read address values, skipping high cell */ | |
151 | cp = of_read_number(range + 1, na - 1); | |
152 | s = of_read_number(range + na + pna, ns); | |
153 | da = of_read_number(addr + 1, na - 1); | |
154 | ||
155 | pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", | |
156 | (unsigned long long)cp, (unsigned long long)s, | |
157 | (unsigned long long)da); | |
158 | ||
159 | if (da < cp || da >= (cp + s)) | |
160 | return OF_BAD_ADDR; | |
161 | return da - cp; | |
162 | } | |
163 | ||
47b1e689 | 164 | static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
165 | { |
166 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
167 | } | |
168 | ||
0131d897 | 169 | const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
dbbdee94 GL |
170 | unsigned int *flags) |
171 | { | |
a9fadeef | 172 | const __be32 *prop; |
dbbdee94 GL |
173 | unsigned int psize; |
174 | struct device_node *parent; | |
175 | struct of_bus *bus; | |
176 | int onesize, i, na, ns; | |
177 | ||
178 | /* Get parent & match bus type */ | |
179 | parent = of_get_parent(dev); | |
180 | if (parent == NULL) | |
181 | return NULL; | |
182 | bus = of_match_bus(parent); | |
183 | if (strcmp(bus->name, "pci")) { | |
184 | of_node_put(parent); | |
185 | return NULL; | |
186 | } | |
187 | bus->count_cells(dev, &na, &ns); | |
188 | of_node_put(parent); | |
5d61b165 | 189 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
190 | return NULL; |
191 | ||
192 | /* Get "reg" or "assigned-addresses" property */ | |
193 | prop = of_get_property(dev, bus->addresses, &psize); | |
194 | if (prop == NULL) | |
195 | return NULL; | |
196 | psize /= 4; | |
197 | ||
198 | onesize = na + ns; | |
154063a9 GL |
199 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
200 | u32 val = be32_to_cpu(prop[0]); | |
201 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
202 | if (size) |
203 | *size = of_read_number(prop + na, ns); | |
204 | if (flags) | |
205 | *flags = bus->get_flags(prop); | |
206 | return prop; | |
207 | } | |
154063a9 | 208 | } |
dbbdee94 GL |
209 | return NULL; |
210 | } | |
211 | EXPORT_SYMBOL(of_get_pci_address); | |
212 | ||
213 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
214 | struct resource *r) | |
215 | { | |
0131d897 | 216 | const __be32 *addrp; |
dbbdee94 GL |
217 | u64 size; |
218 | unsigned int flags; | |
219 | ||
220 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
221 | if (addrp == NULL) | |
222 | return -EINVAL; | |
35f3da32 | 223 | return __of_address_to_resource(dev, addrp, size, flags, NULL, r); |
dbbdee94 GL |
224 | } |
225 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
29b635c0 AM |
226 | |
227 | int of_pci_range_parser_init(struct of_pci_range_parser *parser, | |
228 | struct device_node *node) | |
229 | { | |
230 | const int na = 3, ns = 2; | |
231 | int rlen; | |
232 | ||
233 | parser->node = node; | |
234 | parser->pna = of_n_addr_cells(node); | |
235 | parser->np = parser->pna + na + ns; | |
236 | ||
237 | parser->range = of_get_property(node, "ranges", &rlen); | |
238 | if (parser->range == NULL) | |
239 | return -ENOENT; | |
240 | ||
241 | parser->end = parser->range + rlen / sizeof(__be32); | |
242 | ||
243 | return 0; | |
244 | } | |
245 | EXPORT_SYMBOL_GPL(of_pci_range_parser_init); | |
246 | ||
247 | struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, | |
248 | struct of_pci_range *range) | |
249 | { | |
250 | const int na = 3, ns = 2; | |
251 | ||
252 | if (!range) | |
253 | return NULL; | |
254 | ||
255 | if (!parser->range || parser->range + parser->np > parser->end) | |
256 | return NULL; | |
257 | ||
258 | range->pci_space = parser->range[0]; | |
259 | range->flags = of_bus_pci_get_flags(parser->range); | |
260 | range->pci_addr = of_read_number(parser->range + 1, ns); | |
261 | range->cpu_addr = of_translate_address(parser->node, | |
262 | parser->range + na); | |
263 | range->size = of_read_number(parser->range + parser->pna + na, ns); | |
264 | ||
265 | parser->range += parser->np; | |
266 | ||
267 | /* Now consume following elements while they are contiguous */ | |
268 | while (parser->range + parser->np <= parser->end) { | |
269 | u32 flags, pci_space; | |
270 | u64 pci_addr, cpu_addr, size; | |
271 | ||
272 | pci_space = be32_to_cpup(parser->range); | |
273 | flags = of_bus_pci_get_flags(parser->range); | |
274 | pci_addr = of_read_number(parser->range + 1, ns); | |
275 | cpu_addr = of_translate_address(parser->node, | |
276 | parser->range + na); | |
277 | size = of_read_number(parser->range + parser->pna + na, ns); | |
278 | ||
279 | if (flags != range->flags) | |
280 | break; | |
281 | if (pci_addr != range->pci_addr + range->size || | |
282 | cpu_addr != range->cpu_addr + range->size) | |
283 | break; | |
284 | ||
285 | range->size += size; | |
286 | parser->range += parser->np; | |
287 | } | |
288 | ||
289 | return range; | |
290 | } | |
291 | EXPORT_SYMBOL_GPL(of_pci_range_parser_one); | |
292 | ||
dbbdee94 GL |
293 | #endif /* CONFIG_PCI */ |
294 | ||
295 | /* | |
296 | * ISA bus specific translator | |
297 | */ | |
298 | ||
299 | static int of_bus_isa_match(struct device_node *np) | |
300 | { | |
301 | return !strcmp(np->name, "isa"); | |
302 | } | |
303 | ||
304 | static void of_bus_isa_count_cells(struct device_node *child, | |
305 | int *addrc, int *sizec) | |
306 | { | |
307 | if (addrc) | |
308 | *addrc = 2; | |
309 | if (sizec) | |
310 | *sizec = 1; | |
311 | } | |
312 | ||
47b1e689 | 313 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 314 | int pna) |
dbbdee94 GL |
315 | { |
316 | u64 cp, s, da; | |
317 | ||
318 | /* Check address type match */ | |
0131d897 | 319 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
320 | return OF_BAD_ADDR; |
321 | ||
322 | /* Read address values, skipping high cell */ | |
323 | cp = of_read_number(range + 1, na - 1); | |
324 | s = of_read_number(range + na + pna, ns); | |
325 | da = of_read_number(addr + 1, na - 1); | |
326 | ||
327 | pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", | |
328 | (unsigned long long)cp, (unsigned long long)s, | |
329 | (unsigned long long)da); | |
330 | ||
331 | if (da < cp || da >= (cp + s)) | |
332 | return OF_BAD_ADDR; | |
333 | return da - cp; | |
334 | } | |
335 | ||
47b1e689 | 336 | static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
337 | { |
338 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
339 | } | |
340 | ||
0131d897 | 341 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
342 | { |
343 | unsigned int flags = 0; | |
0131d897 | 344 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
345 | |
346 | if (w & 1) | |
347 | flags |= IORESOURCE_IO; | |
348 | else | |
349 | flags |= IORESOURCE_MEM; | |
350 | return flags; | |
351 | } | |
352 | ||
353 | /* | |
354 | * Array of bus specific translators | |
355 | */ | |
356 | ||
357 | static struct of_bus of_busses[] = { | |
358 | #ifdef CONFIG_PCI | |
359 | /* PCI */ | |
360 | { | |
361 | .name = "pci", | |
362 | .addresses = "assigned-addresses", | |
363 | .match = of_bus_pci_match, | |
364 | .count_cells = of_bus_pci_count_cells, | |
365 | .map = of_bus_pci_map, | |
366 | .translate = of_bus_pci_translate, | |
367 | .get_flags = of_bus_pci_get_flags, | |
368 | }, | |
369 | #endif /* CONFIG_PCI */ | |
370 | /* ISA */ | |
371 | { | |
372 | .name = "isa", | |
373 | .addresses = "reg", | |
374 | .match = of_bus_isa_match, | |
375 | .count_cells = of_bus_isa_count_cells, | |
376 | .map = of_bus_isa_map, | |
377 | .translate = of_bus_isa_translate, | |
378 | .get_flags = of_bus_isa_get_flags, | |
379 | }, | |
380 | /* Default */ | |
381 | { | |
382 | .name = "default", | |
383 | .addresses = "reg", | |
384 | .match = NULL, | |
385 | .count_cells = of_bus_default_count_cells, | |
386 | .map = of_bus_default_map, | |
387 | .translate = of_bus_default_translate, | |
388 | .get_flags = of_bus_default_get_flags, | |
389 | }, | |
390 | }; | |
391 | ||
392 | static struct of_bus *of_match_bus(struct device_node *np) | |
393 | { | |
394 | int i; | |
395 | ||
396 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
397 | if (!of_busses[i].match || of_busses[i].match(np)) | |
398 | return &of_busses[i]; | |
399 | BUG(); | |
400 | return NULL; | |
401 | } | |
402 | ||
403 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |
47b1e689 | 404 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
405 | int na, int ns, int pna, const char *rprop) |
406 | { | |
0131d897 | 407 | const __be32 *ranges; |
dbbdee94 GL |
408 | unsigned int rlen; |
409 | int rone; | |
410 | u64 offset = OF_BAD_ADDR; | |
411 | ||
412 | /* Normally, an absence of a "ranges" property means we are | |
413 | * crossing a non-translatable boundary, and thus the addresses | |
414 | * below the current not cannot be converted to CPU physical ones. | |
415 | * Unfortunately, while this is very clear in the spec, it's not | |
416 | * what Apple understood, and they do have things like /uni-n or | |
417 | * /ht nodes with no "ranges" property and a lot of perfectly | |
418 | * useable mapped devices below them. Thus we treat the absence of | |
419 | * "ranges" as equivalent to an empty "ranges" property which means | |
420 | * a 1:1 translation at that level. It's up to the caller not to try | |
421 | * to translate addresses that aren't supposed to be translated in | |
422 | * the first place. --BenH. | |
3930f294 GL |
423 | * |
424 | * As far as we know, this damage only exists on Apple machines, so | |
425 | * This code is only enabled on powerpc. --gcl | |
dbbdee94 GL |
426 | */ |
427 | ranges = of_get_property(parent, rprop, &rlen); | |
3930f294 GL |
428 | #if !defined(CONFIG_PPC) |
429 | if (ranges == NULL) { | |
430 | pr_err("OF: no ranges; cannot translate\n"); | |
431 | return 1; | |
432 | } | |
433 | #endif /* !defined(CONFIG_PPC) */ | |
dbbdee94 GL |
434 | if (ranges == NULL || rlen == 0) { |
435 | offset = of_read_number(addr, na); | |
436 | memset(addr, 0, pna * 4); | |
3930f294 | 437 | pr_debug("OF: empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
438 | goto finish; |
439 | } | |
440 | ||
441 | pr_debug("OF: walking ranges...\n"); | |
442 | ||
443 | /* Now walk through the ranges */ | |
444 | rlen /= 4; | |
445 | rone = na + pna + ns; | |
446 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
447 | offset = bus->map(addr, ranges, na, ns, pna); | |
448 | if (offset != OF_BAD_ADDR) | |
449 | break; | |
450 | } | |
451 | if (offset == OF_BAD_ADDR) { | |
452 | pr_debug("OF: not found !\n"); | |
453 | return 1; | |
454 | } | |
455 | memcpy(addr, ranges + na, 4 * pna); | |
456 | ||
457 | finish: | |
458 | of_dump_addr("OF: parent translation for:", addr, pna); | |
459 | pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); | |
460 | ||
461 | /* Translate it into parent bus space */ | |
462 | return pbus->translate(addr, offset, pna); | |
463 | } | |
464 | ||
465 | /* | |
466 | * Translate an address from the device-tree into a CPU physical address, | |
467 | * this walks up the tree and applies the various bus mappings on the | |
468 | * way. | |
469 | * | |
470 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
471 | * that translation is impossible (that is we are not dealing with a value | |
472 | * that can be mapped to a cpu physical address). This is not really specified | |
473 | * that way, but this is traditionally the way IBM at least do things | |
474 | */ | |
47b1e689 KP |
475 | static u64 __of_translate_address(struct device_node *dev, |
476 | const __be32 *in_addr, const char *rprop) | |
dbbdee94 GL |
477 | { |
478 | struct device_node *parent = NULL; | |
479 | struct of_bus *bus, *pbus; | |
47b1e689 | 480 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
481 | int na, ns, pna, pns; |
482 | u64 result = OF_BAD_ADDR; | |
483 | ||
8804827b | 484 | pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev)); |
dbbdee94 GL |
485 | |
486 | /* Increase refcount at current level */ | |
487 | of_node_get(dev); | |
488 | ||
489 | /* Get parent & match bus type */ | |
490 | parent = of_get_parent(dev); | |
491 | if (parent == NULL) | |
492 | goto bail; | |
493 | bus = of_match_bus(parent); | |
494 | ||
59f5ca48 | 495 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
496 | bus->count_cells(dev, &na, &ns); |
497 | if (!OF_CHECK_COUNTS(na, ns)) { | |
498 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
8804827b | 499 | of_node_full_name(dev)); |
dbbdee94 GL |
500 | goto bail; |
501 | } | |
502 | memcpy(addr, in_addr, na * 4); | |
503 | ||
504 | pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
8804827b | 505 | bus->name, na, ns, of_node_full_name(parent)); |
dbbdee94 GL |
506 | of_dump_addr("OF: translating address:", addr, na); |
507 | ||
508 | /* Translate */ | |
509 | for (;;) { | |
510 | /* Switch to parent bus */ | |
511 | of_node_put(dev); | |
512 | dev = parent; | |
513 | parent = of_get_parent(dev); | |
514 | ||
515 | /* If root, we have finished */ | |
516 | if (parent == NULL) { | |
517 | pr_debug("OF: reached root node\n"); | |
518 | result = of_read_number(addr, na); | |
519 | break; | |
520 | } | |
521 | ||
522 | /* Get new parent bus and counts */ | |
523 | pbus = of_match_bus(parent); | |
524 | pbus->count_cells(dev, &pna, &pns); | |
525 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
526 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
0c02c800 | 527 | of_node_full_name(dev)); |
dbbdee94 GL |
528 | break; |
529 | } | |
530 | ||
531 | pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
0c02c800 | 532 | pbus->name, pna, pns, of_node_full_name(parent)); |
dbbdee94 GL |
533 | |
534 | /* Apply bus translation */ | |
535 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
536 | break; | |
537 | ||
538 | /* Complete the move up one level */ | |
539 | na = pna; | |
540 | ns = pns; | |
541 | bus = pbus; | |
542 | ||
543 | of_dump_addr("OF: one level translation:", addr, na); | |
544 | } | |
545 | bail: | |
546 | of_node_put(parent); | |
547 | of_node_put(dev); | |
548 | ||
549 | return result; | |
550 | } | |
551 | ||
0131d897 | 552 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
553 | { |
554 | return __of_translate_address(dev, in_addr, "ranges"); | |
555 | } | |
556 | EXPORT_SYMBOL(of_translate_address); | |
557 | ||
0131d897 | 558 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
559 | { |
560 | return __of_translate_address(dev, in_addr, "dma-ranges"); | |
561 | } | |
562 | EXPORT_SYMBOL(of_translate_dma_address); | |
563 | ||
5d61b165 SW |
564 | bool of_can_translate_address(struct device_node *dev) |
565 | { | |
566 | struct device_node *parent; | |
567 | struct of_bus *bus; | |
568 | int na, ns; | |
569 | ||
570 | parent = of_get_parent(dev); | |
571 | if (parent == NULL) | |
572 | return false; | |
573 | ||
574 | bus = of_match_bus(parent); | |
575 | bus->count_cells(dev, &na, &ns); | |
576 | ||
577 | of_node_put(parent); | |
578 | ||
579 | return OF_CHECK_COUNTS(na, ns); | |
580 | } | |
581 | EXPORT_SYMBOL(of_can_translate_address); | |
582 | ||
0131d897 | 583 | const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, |
dbbdee94 GL |
584 | unsigned int *flags) |
585 | { | |
0131d897 | 586 | const __be32 *prop; |
dbbdee94 GL |
587 | unsigned int psize; |
588 | struct device_node *parent; | |
589 | struct of_bus *bus; | |
590 | int onesize, i, na, ns; | |
591 | ||
592 | /* Get parent & match bus type */ | |
593 | parent = of_get_parent(dev); | |
594 | if (parent == NULL) | |
595 | return NULL; | |
596 | bus = of_match_bus(parent); | |
597 | bus->count_cells(dev, &na, &ns); | |
598 | of_node_put(parent); | |
5d61b165 | 599 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
600 | return NULL; |
601 | ||
602 | /* Get "reg" or "assigned-addresses" property */ | |
603 | prop = of_get_property(dev, bus->addresses, &psize); | |
604 | if (prop == NULL) | |
605 | return NULL; | |
606 | psize /= 4; | |
607 | ||
608 | onesize = na + ns; | |
609 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
610 | if (i == index) { | |
611 | if (size) | |
612 | *size = of_read_number(prop + na, ns); | |
613 | if (flags) | |
614 | *flags = bus->get_flags(prop); | |
615 | return prop; | |
616 | } | |
617 | return NULL; | |
618 | } | |
619 | EXPORT_SYMBOL(of_get_address); | |
620 | ||
25ff7944 RH |
621 | unsigned long __weak pci_address_to_pio(phys_addr_t address) |
622 | { | |
623 | if (address > IO_SPACE_LIMIT) | |
624 | return (unsigned long)-1; | |
625 | ||
626 | return (unsigned long) address; | |
627 | } | |
628 | ||
0131d897 SAS |
629 | static int __of_address_to_resource(struct device_node *dev, |
630 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 631 | const char *name, struct resource *r) |
1f5bef30 GL |
632 | { |
633 | u64 taddr; | |
634 | ||
635 | if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) | |
636 | return -EINVAL; | |
637 | taddr = of_translate_address(dev, addrp); | |
638 | if (taddr == OF_BAD_ADDR) | |
639 | return -EINVAL; | |
640 | memset(r, 0, sizeof(struct resource)); | |
641 | if (flags & IORESOURCE_IO) { | |
642 | unsigned long port; | |
643 | port = pci_address_to_pio(taddr); | |
644 | if (port == (unsigned long)-1) | |
645 | return -EINVAL; | |
646 | r->start = port; | |
647 | r->end = port + size - 1; | |
648 | } else { | |
649 | r->start = taddr; | |
650 | r->end = taddr + size - 1; | |
651 | } | |
652 | r->flags = flags; | |
35f3da32 BC |
653 | r->name = name ? name : dev->full_name; |
654 | ||
1f5bef30 GL |
655 | return 0; |
656 | } | |
657 | ||
658 | /** | |
659 | * of_address_to_resource - Translate device tree address and return as resource | |
660 | * | |
661 | * Note that if your address is a PIO address, the conversion will fail if | |
662 | * the physical address can't be internally converted to an IO token with | |
663 | * pci_address_to_pio(), that is because it's either called to early or it | |
664 | * can't be matched to any host bridge IO space | |
665 | */ | |
666 | int of_address_to_resource(struct device_node *dev, int index, | |
667 | struct resource *r) | |
668 | { | |
0131d897 | 669 | const __be32 *addrp; |
1f5bef30 GL |
670 | u64 size; |
671 | unsigned int flags; | |
35f3da32 | 672 | const char *name = NULL; |
1f5bef30 GL |
673 | |
674 | addrp = of_get_address(dev, index, &size, &flags); | |
675 | if (addrp == NULL) | |
676 | return -EINVAL; | |
35f3da32 BC |
677 | |
678 | /* Get optional "reg-names" property to add a name to a resource */ | |
679 | of_property_read_string_index(dev, "reg-names", index, &name); | |
680 | ||
681 | return __of_address_to_resource(dev, addrp, size, flags, name, r); | |
1f5bef30 GL |
682 | } |
683 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
684 | ||
90e33f62 GL |
685 | struct device_node *of_find_matching_node_by_address(struct device_node *from, |
686 | const struct of_device_id *matches, | |
687 | u64 base_address) | |
688 | { | |
689 | struct device_node *dn = of_find_matching_node(from, matches); | |
690 | struct resource res; | |
691 | ||
692 | while (dn) { | |
693 | if (of_address_to_resource(dn, 0, &res)) | |
694 | continue; | |
695 | if (res.start == base_address) | |
696 | return dn; | |
697 | dn = of_find_matching_node(dn, matches); | |
698 | } | |
699 | ||
700 | return NULL; | |
701 | } | |
702 | ||
1f5bef30 | 703 | |
6b884a8d GL |
704 | /** |
705 | * of_iomap - Maps the memory mapped IO for a given device_node | |
706 | * @device: the device whose io range will be mapped | |
707 | * @index: index of the io range | |
708 | * | |
709 | * Returns a pointer to the mapped memory | |
710 | */ | |
711 | void __iomem *of_iomap(struct device_node *np, int index) | |
712 | { | |
713 | struct resource res; | |
714 | ||
715 | if (of_address_to_resource(np, index, &res)) | |
716 | return NULL; | |
717 | ||
28c1b6d6 | 718 | return ioremap(res.start, resource_size(&res)); |
6b884a8d GL |
719 | } |
720 | EXPORT_SYMBOL(of_iomap); |