Commit | Line | Data |
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6b884a8d GL |
1 | |
2 | #include <linux/io.h> | |
3 | #include <linux/ioport.h> | |
dbbdee94 | 4 | #include <linux/module.h> |
6b884a8d | 5 | #include <linux/of_address.h> |
dbbdee94 GL |
6 | #include <linux/pci_regs.h> |
7 | #include <linux/string.h> | |
6b884a8d | 8 | |
dbbdee94 GL |
9 | /* Max address size we deal with */ |
10 | #define OF_MAX_ADDR_CELLS 4 | |
11 | #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ | |
12 | (ns) > 0) | |
13 | ||
14 | static struct of_bus *of_match_bus(struct device_node *np); | |
15 | static int __of_address_to_resource(struct device_node *dev, const u32 *addrp, | |
16 | u64 size, unsigned int flags, | |
17 | struct resource *r); | |
18 | ||
19 | /* Debug utility */ | |
20 | #ifdef DEBUG | |
21 | static void of_dump_addr(const char *s, const u32 *addr, int na) | |
22 | { | |
23 | printk(KERN_DEBUG "%s", s); | |
24 | while (na--) | |
154063a9 | 25 | printk(" %08x", be32_to_cpu(*(addr++))); |
dbbdee94 GL |
26 | printk("\n"); |
27 | } | |
28 | #else | |
29 | static void of_dump_addr(const char *s, const u32 *addr, int na) { } | |
30 | #endif | |
31 | ||
32 | /* Callbacks for bus specific translators */ | |
33 | struct of_bus { | |
34 | const char *name; | |
35 | const char *addresses; | |
36 | int (*match)(struct device_node *parent); | |
37 | void (*count_cells)(struct device_node *child, | |
38 | int *addrc, int *sizec); | |
39 | u64 (*map)(u32 *addr, const u32 *range, | |
40 | int na, int ns, int pna); | |
41 | int (*translate)(u32 *addr, u64 offset, int na); | |
42 | unsigned int (*get_flags)(const u32 *addr); | |
43 | }; | |
44 | ||
45 | /* | |
46 | * Default translator (generic bus) | |
47 | */ | |
48 | ||
49 | static void of_bus_default_count_cells(struct device_node *dev, | |
50 | int *addrc, int *sizec) | |
51 | { | |
52 | if (addrc) | |
53 | *addrc = of_n_addr_cells(dev); | |
54 | if (sizec) | |
55 | *sizec = of_n_size_cells(dev); | |
56 | } | |
57 | ||
58 | static u64 of_bus_default_map(u32 *addr, const u32 *range, | |
59 | int na, int ns, int pna) | |
60 | { | |
61 | u64 cp, s, da; | |
62 | ||
63 | cp = of_read_number(range, na); | |
64 | s = of_read_number(range + na + pna, ns); | |
65 | da = of_read_number(addr, na); | |
66 | ||
67 | pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", | |
68 | (unsigned long long)cp, (unsigned long long)s, | |
69 | (unsigned long long)da); | |
70 | ||
71 | if (da < cp || da >= (cp + s)) | |
72 | return OF_BAD_ADDR; | |
73 | return da - cp; | |
74 | } | |
75 | ||
76 | static int of_bus_default_translate(u32 *addr, u64 offset, int na) | |
77 | { | |
78 | u64 a = of_read_number(addr, na); | |
79 | memset(addr, 0, na * 4); | |
80 | a += offset; | |
81 | if (na > 1) | |
154063a9 GL |
82 | addr[na - 2] = cpu_to_be32(a >> 32); |
83 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
84 | |
85 | return 0; | |
86 | } | |
87 | ||
88 | static unsigned int of_bus_default_get_flags(const u32 *addr) | |
89 | { | |
90 | return IORESOURCE_MEM; | |
91 | } | |
92 | ||
93 | #ifdef CONFIG_PCI | |
94 | /* | |
95 | * PCI bus specific translator | |
96 | */ | |
97 | ||
98 | static int of_bus_pci_match(struct device_node *np) | |
99 | { | |
100 | /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ | |
101 | return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); | |
102 | } | |
103 | ||
104 | static void of_bus_pci_count_cells(struct device_node *np, | |
105 | int *addrc, int *sizec) | |
106 | { | |
107 | if (addrc) | |
108 | *addrc = 3; | |
109 | if (sizec) | |
110 | *sizec = 2; | |
111 | } | |
112 | ||
113 | static unsigned int of_bus_pci_get_flags(const u32 *addr) | |
114 | { | |
115 | unsigned int flags = 0; | |
116 | u32 w = addr[0]; | |
117 | ||
118 | switch((w >> 24) & 0x03) { | |
119 | case 0x01: | |
120 | flags |= IORESOURCE_IO; | |
121 | break; | |
122 | case 0x02: /* 32 bits */ | |
123 | case 0x03: /* 64 bits */ | |
124 | flags |= IORESOURCE_MEM; | |
125 | break; | |
126 | } | |
127 | if (w & 0x40000000) | |
128 | flags |= IORESOURCE_PREFETCH; | |
129 | return flags; | |
130 | } | |
131 | ||
132 | static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna) | |
133 | { | |
134 | u64 cp, s, da; | |
135 | unsigned int af, rf; | |
136 | ||
137 | af = of_bus_pci_get_flags(addr); | |
138 | rf = of_bus_pci_get_flags(range); | |
139 | ||
140 | /* Check address type match */ | |
141 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
142 | return OF_BAD_ADDR; | |
143 | ||
144 | /* Read address values, skipping high cell */ | |
145 | cp = of_read_number(range + 1, na - 1); | |
146 | s = of_read_number(range + na + pna, ns); | |
147 | da = of_read_number(addr + 1, na - 1); | |
148 | ||
149 | pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", | |
150 | (unsigned long long)cp, (unsigned long long)s, | |
151 | (unsigned long long)da); | |
152 | ||
153 | if (da < cp || da >= (cp + s)) | |
154 | return OF_BAD_ADDR; | |
155 | return da - cp; | |
156 | } | |
157 | ||
158 | static int of_bus_pci_translate(u32 *addr, u64 offset, int na) | |
159 | { | |
160 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
161 | } | |
162 | ||
163 | const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, | |
164 | unsigned int *flags) | |
165 | { | |
a9fadeef | 166 | const __be32 *prop; |
dbbdee94 GL |
167 | unsigned int psize; |
168 | struct device_node *parent; | |
169 | struct of_bus *bus; | |
170 | int onesize, i, na, ns; | |
171 | ||
172 | /* Get parent & match bus type */ | |
173 | parent = of_get_parent(dev); | |
174 | if (parent == NULL) | |
175 | return NULL; | |
176 | bus = of_match_bus(parent); | |
177 | if (strcmp(bus->name, "pci")) { | |
178 | of_node_put(parent); | |
179 | return NULL; | |
180 | } | |
181 | bus->count_cells(dev, &na, &ns); | |
182 | of_node_put(parent); | |
183 | if (!OF_CHECK_COUNTS(na, ns)) | |
184 | return NULL; | |
185 | ||
186 | /* Get "reg" or "assigned-addresses" property */ | |
187 | prop = of_get_property(dev, bus->addresses, &psize); | |
188 | if (prop == NULL) | |
189 | return NULL; | |
190 | psize /= 4; | |
191 | ||
192 | onesize = na + ns; | |
154063a9 GL |
193 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
194 | u32 val = be32_to_cpu(prop[0]); | |
195 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
196 | if (size) |
197 | *size = of_read_number(prop + na, ns); | |
198 | if (flags) | |
199 | *flags = bus->get_flags(prop); | |
200 | return prop; | |
201 | } | |
154063a9 | 202 | } |
dbbdee94 GL |
203 | return NULL; |
204 | } | |
205 | EXPORT_SYMBOL(of_get_pci_address); | |
206 | ||
207 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
208 | struct resource *r) | |
209 | { | |
210 | const u32 *addrp; | |
211 | u64 size; | |
212 | unsigned int flags; | |
213 | ||
214 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
215 | if (addrp == NULL) | |
216 | return -EINVAL; | |
217 | return __of_address_to_resource(dev, addrp, size, flags, r); | |
218 | } | |
219 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
220 | #endif /* CONFIG_PCI */ | |
221 | ||
222 | /* | |
223 | * ISA bus specific translator | |
224 | */ | |
225 | ||
226 | static int of_bus_isa_match(struct device_node *np) | |
227 | { | |
228 | return !strcmp(np->name, "isa"); | |
229 | } | |
230 | ||
231 | static void of_bus_isa_count_cells(struct device_node *child, | |
232 | int *addrc, int *sizec) | |
233 | { | |
234 | if (addrc) | |
235 | *addrc = 2; | |
236 | if (sizec) | |
237 | *sizec = 1; | |
238 | } | |
239 | ||
240 | static u64 of_bus_isa_map(u32 *addr, const u32 *range, int na, int ns, int pna) | |
241 | { | |
242 | u64 cp, s, da; | |
243 | ||
244 | /* Check address type match */ | |
245 | if ((addr[0] ^ range[0]) & 0x00000001) | |
246 | return OF_BAD_ADDR; | |
247 | ||
248 | /* Read address values, skipping high cell */ | |
249 | cp = of_read_number(range + 1, na - 1); | |
250 | s = of_read_number(range + na + pna, ns); | |
251 | da = of_read_number(addr + 1, na - 1); | |
252 | ||
253 | pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", | |
254 | (unsigned long long)cp, (unsigned long long)s, | |
255 | (unsigned long long)da); | |
256 | ||
257 | if (da < cp || da >= (cp + s)) | |
258 | return OF_BAD_ADDR; | |
259 | return da - cp; | |
260 | } | |
261 | ||
262 | static int of_bus_isa_translate(u32 *addr, u64 offset, int na) | |
263 | { | |
264 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
265 | } | |
266 | ||
267 | static unsigned int of_bus_isa_get_flags(const u32 *addr) | |
268 | { | |
269 | unsigned int flags = 0; | |
270 | u32 w = addr[0]; | |
271 | ||
272 | if (w & 1) | |
273 | flags |= IORESOURCE_IO; | |
274 | else | |
275 | flags |= IORESOURCE_MEM; | |
276 | return flags; | |
277 | } | |
278 | ||
279 | /* | |
280 | * Array of bus specific translators | |
281 | */ | |
282 | ||
283 | static struct of_bus of_busses[] = { | |
284 | #ifdef CONFIG_PCI | |
285 | /* PCI */ | |
286 | { | |
287 | .name = "pci", | |
288 | .addresses = "assigned-addresses", | |
289 | .match = of_bus_pci_match, | |
290 | .count_cells = of_bus_pci_count_cells, | |
291 | .map = of_bus_pci_map, | |
292 | .translate = of_bus_pci_translate, | |
293 | .get_flags = of_bus_pci_get_flags, | |
294 | }, | |
295 | #endif /* CONFIG_PCI */ | |
296 | /* ISA */ | |
297 | { | |
298 | .name = "isa", | |
299 | .addresses = "reg", | |
300 | .match = of_bus_isa_match, | |
301 | .count_cells = of_bus_isa_count_cells, | |
302 | .map = of_bus_isa_map, | |
303 | .translate = of_bus_isa_translate, | |
304 | .get_flags = of_bus_isa_get_flags, | |
305 | }, | |
306 | /* Default */ | |
307 | { | |
308 | .name = "default", | |
309 | .addresses = "reg", | |
310 | .match = NULL, | |
311 | .count_cells = of_bus_default_count_cells, | |
312 | .map = of_bus_default_map, | |
313 | .translate = of_bus_default_translate, | |
314 | .get_flags = of_bus_default_get_flags, | |
315 | }, | |
316 | }; | |
317 | ||
318 | static struct of_bus *of_match_bus(struct device_node *np) | |
319 | { | |
320 | int i; | |
321 | ||
322 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
323 | if (!of_busses[i].match || of_busses[i].match(np)) | |
324 | return &of_busses[i]; | |
325 | BUG(); | |
326 | return NULL; | |
327 | } | |
328 | ||
329 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |
330 | struct of_bus *pbus, u32 *addr, | |
331 | int na, int ns, int pna, const char *rprop) | |
332 | { | |
333 | const u32 *ranges; | |
334 | unsigned int rlen; | |
335 | int rone; | |
336 | u64 offset = OF_BAD_ADDR; | |
337 | ||
338 | /* Normally, an absence of a "ranges" property means we are | |
339 | * crossing a non-translatable boundary, and thus the addresses | |
340 | * below the current not cannot be converted to CPU physical ones. | |
341 | * Unfortunately, while this is very clear in the spec, it's not | |
342 | * what Apple understood, and they do have things like /uni-n or | |
343 | * /ht nodes with no "ranges" property and a lot of perfectly | |
344 | * useable mapped devices below them. Thus we treat the absence of | |
345 | * "ranges" as equivalent to an empty "ranges" property which means | |
346 | * a 1:1 translation at that level. It's up to the caller not to try | |
347 | * to translate addresses that aren't supposed to be translated in | |
348 | * the first place. --BenH. | |
3930f294 GL |
349 | * |
350 | * As far as we know, this damage only exists on Apple machines, so | |
351 | * This code is only enabled on powerpc. --gcl | |
dbbdee94 GL |
352 | */ |
353 | ranges = of_get_property(parent, rprop, &rlen); | |
3930f294 GL |
354 | #if !defined(CONFIG_PPC) |
355 | if (ranges == NULL) { | |
356 | pr_err("OF: no ranges; cannot translate\n"); | |
357 | return 1; | |
358 | } | |
359 | #endif /* !defined(CONFIG_PPC) */ | |
dbbdee94 GL |
360 | if (ranges == NULL || rlen == 0) { |
361 | offset = of_read_number(addr, na); | |
362 | memset(addr, 0, pna * 4); | |
3930f294 | 363 | pr_debug("OF: empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
364 | goto finish; |
365 | } | |
366 | ||
367 | pr_debug("OF: walking ranges...\n"); | |
368 | ||
369 | /* Now walk through the ranges */ | |
370 | rlen /= 4; | |
371 | rone = na + pna + ns; | |
372 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
373 | offset = bus->map(addr, ranges, na, ns, pna); | |
374 | if (offset != OF_BAD_ADDR) | |
375 | break; | |
376 | } | |
377 | if (offset == OF_BAD_ADDR) { | |
378 | pr_debug("OF: not found !\n"); | |
379 | return 1; | |
380 | } | |
381 | memcpy(addr, ranges + na, 4 * pna); | |
382 | ||
383 | finish: | |
384 | of_dump_addr("OF: parent translation for:", addr, pna); | |
385 | pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); | |
386 | ||
387 | /* Translate it into parent bus space */ | |
388 | return pbus->translate(addr, offset, pna); | |
389 | } | |
390 | ||
391 | /* | |
392 | * Translate an address from the device-tree into a CPU physical address, | |
393 | * this walks up the tree and applies the various bus mappings on the | |
394 | * way. | |
395 | * | |
396 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
397 | * that translation is impossible (that is we are not dealing with a value | |
398 | * that can be mapped to a cpu physical address). This is not really specified | |
399 | * that way, but this is traditionally the way IBM at least do things | |
400 | */ | |
401 | u64 __of_translate_address(struct device_node *dev, const u32 *in_addr, | |
402 | const char *rprop) | |
403 | { | |
404 | struct device_node *parent = NULL; | |
405 | struct of_bus *bus, *pbus; | |
406 | u32 addr[OF_MAX_ADDR_CELLS]; | |
407 | int na, ns, pna, pns; | |
408 | u64 result = OF_BAD_ADDR; | |
409 | ||
410 | pr_debug("OF: ** translation for device %s **\n", dev->full_name); | |
411 | ||
412 | /* Increase refcount at current level */ | |
413 | of_node_get(dev); | |
414 | ||
415 | /* Get parent & match bus type */ | |
416 | parent = of_get_parent(dev); | |
417 | if (parent == NULL) | |
418 | goto bail; | |
419 | bus = of_match_bus(parent); | |
420 | ||
421 | /* Cound address cells & copy address locally */ | |
422 | bus->count_cells(dev, &na, &ns); | |
423 | if (!OF_CHECK_COUNTS(na, ns)) { | |
424 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
425 | dev->full_name); | |
426 | goto bail; | |
427 | } | |
428 | memcpy(addr, in_addr, na * 4); | |
429 | ||
430 | pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
431 | bus->name, na, ns, parent->full_name); | |
432 | of_dump_addr("OF: translating address:", addr, na); | |
433 | ||
434 | /* Translate */ | |
435 | for (;;) { | |
436 | /* Switch to parent bus */ | |
437 | of_node_put(dev); | |
438 | dev = parent; | |
439 | parent = of_get_parent(dev); | |
440 | ||
441 | /* If root, we have finished */ | |
442 | if (parent == NULL) { | |
443 | pr_debug("OF: reached root node\n"); | |
444 | result = of_read_number(addr, na); | |
445 | break; | |
446 | } | |
447 | ||
448 | /* Get new parent bus and counts */ | |
449 | pbus = of_match_bus(parent); | |
450 | pbus->count_cells(dev, &pna, &pns); | |
451 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
452 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
453 | dev->full_name); | |
454 | break; | |
455 | } | |
456 | ||
457 | pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
458 | pbus->name, pna, pns, parent->full_name); | |
459 | ||
460 | /* Apply bus translation */ | |
461 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
462 | break; | |
463 | ||
464 | /* Complete the move up one level */ | |
465 | na = pna; | |
466 | ns = pns; | |
467 | bus = pbus; | |
468 | ||
469 | of_dump_addr("OF: one level translation:", addr, na); | |
470 | } | |
471 | bail: | |
472 | of_node_put(parent); | |
473 | of_node_put(dev); | |
474 | ||
475 | return result; | |
476 | } | |
477 | ||
478 | u64 of_translate_address(struct device_node *dev, const u32 *in_addr) | |
479 | { | |
480 | return __of_translate_address(dev, in_addr, "ranges"); | |
481 | } | |
482 | EXPORT_SYMBOL(of_translate_address); | |
483 | ||
484 | u64 of_translate_dma_address(struct device_node *dev, const u32 *in_addr) | |
485 | { | |
486 | return __of_translate_address(dev, in_addr, "dma-ranges"); | |
487 | } | |
488 | EXPORT_SYMBOL(of_translate_dma_address); | |
489 | ||
490 | const u32 *of_get_address(struct device_node *dev, int index, u64 *size, | |
491 | unsigned int *flags) | |
492 | { | |
493 | const u32 *prop; | |
494 | unsigned int psize; | |
495 | struct device_node *parent; | |
496 | struct of_bus *bus; | |
497 | int onesize, i, na, ns; | |
498 | ||
499 | /* Get parent & match bus type */ | |
500 | parent = of_get_parent(dev); | |
501 | if (parent == NULL) | |
502 | return NULL; | |
503 | bus = of_match_bus(parent); | |
504 | bus->count_cells(dev, &na, &ns); | |
505 | of_node_put(parent); | |
506 | if (!OF_CHECK_COUNTS(na, ns)) | |
507 | return NULL; | |
508 | ||
509 | /* Get "reg" or "assigned-addresses" property */ | |
510 | prop = of_get_property(dev, bus->addresses, &psize); | |
511 | if (prop == NULL) | |
512 | return NULL; | |
513 | psize /= 4; | |
514 | ||
515 | onesize = na + ns; | |
516 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
517 | if (i == index) { | |
518 | if (size) | |
519 | *size = of_read_number(prop + na, ns); | |
520 | if (flags) | |
521 | *flags = bus->get_flags(prop); | |
522 | return prop; | |
523 | } | |
524 | return NULL; | |
525 | } | |
526 | EXPORT_SYMBOL(of_get_address); | |
527 | ||
528 | static int __of_address_to_resource(struct device_node *dev, const u32 *addrp, | |
529 | u64 size, unsigned int flags, | |
530 | struct resource *r) | |
1f5bef30 GL |
531 | { |
532 | u64 taddr; | |
533 | ||
534 | if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) | |
535 | return -EINVAL; | |
536 | taddr = of_translate_address(dev, addrp); | |
537 | if (taddr == OF_BAD_ADDR) | |
538 | return -EINVAL; | |
539 | memset(r, 0, sizeof(struct resource)); | |
540 | if (flags & IORESOURCE_IO) { | |
541 | unsigned long port; | |
542 | port = pci_address_to_pio(taddr); | |
543 | if (port == (unsigned long)-1) | |
544 | return -EINVAL; | |
545 | r->start = port; | |
546 | r->end = port + size - 1; | |
547 | } else { | |
548 | r->start = taddr; | |
549 | r->end = taddr + size - 1; | |
550 | } | |
551 | r->flags = flags; | |
d3571c3a | 552 | r->name = dev->full_name; |
1f5bef30 GL |
553 | return 0; |
554 | } | |
555 | ||
556 | /** | |
557 | * of_address_to_resource - Translate device tree address and return as resource | |
558 | * | |
559 | * Note that if your address is a PIO address, the conversion will fail if | |
560 | * the physical address can't be internally converted to an IO token with | |
561 | * pci_address_to_pio(), that is because it's either called to early or it | |
562 | * can't be matched to any host bridge IO space | |
563 | */ | |
564 | int of_address_to_resource(struct device_node *dev, int index, | |
565 | struct resource *r) | |
566 | { | |
567 | const u32 *addrp; | |
568 | u64 size; | |
569 | unsigned int flags; | |
570 | ||
571 | addrp = of_get_address(dev, index, &size, &flags); | |
572 | if (addrp == NULL) | |
573 | return -EINVAL; | |
574 | return __of_address_to_resource(dev, addrp, size, flags, r); | |
575 | } | |
576 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
577 | ||
578 | ||
6b884a8d GL |
579 | /** |
580 | * of_iomap - Maps the memory mapped IO for a given device_node | |
581 | * @device: the device whose io range will be mapped | |
582 | * @index: index of the io range | |
583 | * | |
584 | * Returns a pointer to the mapped memory | |
585 | */ | |
586 | void __iomem *of_iomap(struct device_node *np, int index) | |
587 | { | |
588 | struct resource res; | |
589 | ||
590 | if (of_address_to_resource(np, index, &res)) | |
591 | return NULL; | |
592 | ||
593 | return ioremap(res.start, 1 + res.end - res.start); | |
594 | } | |
595 | EXPORT_SYMBOL(of_iomap); |