Commit | Line | Data |
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af6074fc | 1 | // SPDX-License-Identifier: GPL-2.0 |
606ad42a RH |
2 | #define pr_fmt(fmt) "OF: " fmt |
3 | ||
5019f0b1 | 4 | #include <linux/device.h> |
fcfaab30 | 5 | #include <linux/fwnode.h> |
6b884a8d GL |
6 | #include <linux/io.h> |
7 | #include <linux/ioport.h> | |
65af618d | 8 | #include <linux/logic_pio.h> |
dbbdee94 | 9 | #include <linux/module.h> |
6b884a8d | 10 | #include <linux/of_address.h> |
c5076cfe | 11 | #include <linux/pci.h> |
dbbdee94 | 12 | #include <linux/pci_regs.h> |
41f8bba7 LD |
13 | #include <linux/sizes.h> |
14 | #include <linux/slab.h> | |
dbbdee94 | 15 | #include <linux/string.h> |
e0d07278 | 16 | #include <linux/dma-direct.h> /* for bus_dma_region */ |
6b884a8d | 17 | |
b68ac8dc RM |
18 | #include "of_private.h" |
19 | ||
dbbdee94 GL |
20 | /* Max address size we deal with */ |
21 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
22 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
23 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 | 24 | |
dbbdee94 GL |
25 | /* Debug utility */ |
26 | #ifdef DEBUG | |
0131d897 | 27 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 | 28 | { |
606ad42a | 29 | pr_debug("%s", s); |
dbbdee94 | 30 | while (na--) |
606ad42a RH |
31 | pr_cont(" %08x", be32_to_cpu(*(addr++))); |
32 | pr_cont("\n"); | |
dbbdee94 GL |
33 | } |
34 | #else | |
0131d897 | 35 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
36 | #endif |
37 | ||
38 | /* Callbacks for bus specific translators */ | |
39 | struct of_bus { | |
40 | const char *name; | |
41 | const char *addresses; | |
42 | int (*match)(struct device_node *parent); | |
43 | void (*count_cells)(struct device_node *child, | |
44 | int *addrc, int *sizec); | |
47b1e689 | 45 | u64 (*map)(__be32 *addr, const __be32 *range, |
dbbdee94 | 46 | int na, int ns, int pna); |
47b1e689 | 47 | int (*translate)(__be32 *addr, u64 offset, int na); |
2f96593e | 48 | bool has_flags; |
0131d897 | 49 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
50 | }; |
51 | ||
52 | /* | |
53 | * Default translator (generic bus) | |
54 | */ | |
55 | ||
56 | static void of_bus_default_count_cells(struct device_node *dev, | |
57 | int *addrc, int *sizec) | |
58 | { | |
59 | if (addrc) | |
60 | *addrc = of_n_addr_cells(dev); | |
61 | if (sizec) | |
62 | *sizec = of_n_size_cells(dev); | |
63 | } | |
64 | ||
47b1e689 | 65 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
dbbdee94 GL |
66 | int na, int ns, int pna) |
67 | { | |
68 | u64 cp, s, da; | |
69 | ||
70 | cp = of_read_number(range, na); | |
71 | s = of_read_number(range + na + pna, ns); | |
72 | da = of_read_number(addr, na); | |
73 | ||
0e407a9a | 74 | pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
dbbdee94 GL |
75 | |
76 | if (da < cp || da >= (cp + s)) | |
77 | return OF_BAD_ADDR; | |
78 | return da - cp; | |
79 | } | |
80 | ||
47b1e689 | 81 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
82 | { |
83 | u64 a = of_read_number(addr, na); | |
84 | memset(addr, 0, na * 4); | |
85 | a += offset; | |
86 | if (na > 1) | |
154063a9 GL |
87 | addr[na - 2] = cpu_to_be32(a >> 32); |
88 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
89 | |
90 | return 0; | |
91 | } | |
92 | ||
3d5089c4 RH |
93 | static unsigned int of_bus_default_flags_get_flags(const __be32 *addr) |
94 | { | |
95 | return of_read_number(addr, 1); | |
96 | } | |
97 | ||
0131d897 | 98 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
99 | { |
100 | return IORESOURCE_MEM; | |
101 | } | |
102 | ||
3d5089c4 | 103 | |
0fc0ead3 | 104 | #ifdef CONFIG_PCI |
67ccd2b9 RH |
105 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
106 | { | |
107 | unsigned int flags = 0; | |
108 | u32 w = be32_to_cpup(addr); | |
109 | ||
110 | if (!IS_ENABLED(CONFIG_PCI)) | |
111 | return 0; | |
112 | ||
113 | switch((w >> 24) & 0x03) { | |
114 | case 0x01: | |
115 | flags |= IORESOURCE_IO; | |
116 | break; | |
117 | case 0x02: /* 32 bits */ | |
67ccd2b9 RH |
118 | flags |= IORESOURCE_MEM; |
119 | break; | |
9d57e61b LB |
120 | |
121 | case 0x03: /* 64 bits */ | |
122 | flags |= IORESOURCE_MEM | IORESOURCE_MEM_64; | |
123 | break; | |
67ccd2b9 RH |
124 | } |
125 | if (w & 0x40000000) | |
126 | flags |= IORESOURCE_PREFETCH; | |
127 | return flags; | |
128 | } | |
129 | ||
dbbdee94 GL |
130 | /* |
131 | * PCI bus specific translator | |
132 | */ | |
133 | ||
d1ac0002 MZ |
134 | static bool of_node_is_pcie(struct device_node *np) |
135 | { | |
136 | bool is_pcie = of_node_name_eq(np, "pcie"); | |
137 | ||
138 | if (is_pcie) | |
139 | pr_warn_once("%pOF: Missing device_type\n", np); | |
140 | ||
141 | return is_pcie; | |
142 | } | |
143 | ||
dbbdee94 GL |
144 | static int of_bus_pci_match(struct device_node *np) |
145 | { | |
6dd18e46 | 146 | /* |
14e2abb7 | 147 | * "pciex" is PCI Express |
6dd18e46 BH |
148 | * "vci" is for the /chaos bridge on 1st-gen PCI powermacs |
149 | * "ht" is hypertransport | |
d1ac0002 MZ |
150 | * |
151 | * If none of the device_type match, and that the node name is | |
152 | * "pcie", accept the device as PCI (with a warning). | |
6dd18e46 | 153 | */ |
e8b1dee2 | 154 | return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || |
d1ac0002 MZ |
155 | of_node_is_type(np, "vci") || of_node_is_type(np, "ht") || |
156 | of_node_is_pcie(np); | |
dbbdee94 GL |
157 | } |
158 | ||
159 | static void of_bus_pci_count_cells(struct device_node *np, | |
160 | int *addrc, int *sizec) | |
161 | { | |
162 | if (addrc) | |
163 | *addrc = 3; | |
164 | if (sizec) | |
165 | *sizec = 2; | |
166 | } | |
167 | ||
47b1e689 | 168 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 169 | int pna) |
dbbdee94 GL |
170 | { |
171 | u64 cp, s, da; | |
172 | unsigned int af, rf; | |
173 | ||
174 | af = of_bus_pci_get_flags(addr); | |
175 | rf = of_bus_pci_get_flags(range); | |
176 | ||
177 | /* Check address type match */ | |
178 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
179 | return OF_BAD_ADDR; | |
180 | ||
181 | /* Read address values, skipping high cell */ | |
182 | cp = of_read_number(range + 1, na - 1); | |
183 | s = of_read_number(range + na + pna, ns); | |
184 | da = of_read_number(addr + 1, na - 1); | |
185 | ||
0e407a9a | 186 | pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
dbbdee94 GL |
187 | |
188 | if (da < cp || da >= (cp + s)) | |
189 | return OF_BAD_ADDR; | |
190 | return da - cp; | |
191 | } | |
192 | ||
47b1e689 | 193 | static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
194 | { |
195 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
196 | } | |
c3c0dc75 | 197 | #endif /* CONFIG_PCI */ |
dbbdee94 | 198 | |
0b0b0893 LD |
199 | /* |
200 | * of_pci_range_to_resource - Create a resource from an of_pci_range | |
201 | * @range: the PCI range that describes the resource | |
202 | * @np: device node where the range belongs to | |
203 | * @res: pointer to a valid resource that will be updated to | |
204 | * reflect the values contained in the range. | |
205 | * | |
65b6b046 | 206 | * Returns -EINVAL if the range cannot be converted to resource. |
0b0b0893 LD |
207 | * |
208 | * Note that if the range is an IO range, the resource will be converted | |
209 | * using pci_address_to_pio() which can fail if it is called too early or | |
210 | * if the range cannot be matched to any host bridge IO space (our case here). | |
211 | * To guard against that we try to register the IO range first. | |
212 | * If that fails we know that pci_address_to_pio() will do too. | |
213 | */ | |
214 | int of_pci_range_to_resource(struct of_pci_range *range, | |
215 | struct device_node *np, struct resource *res) | |
83bbde1c | 216 | { |
0b0b0893 | 217 | int err; |
83bbde1c | 218 | res->flags = range->flags; |
83bbde1c LD |
219 | res->parent = res->child = res->sibling = NULL; |
220 | res->name = np->full_name; | |
0b0b0893 LD |
221 | |
222 | if (res->flags & IORESOURCE_IO) { | |
223 | unsigned long port; | |
fcfaab30 GP |
224 | err = pci_register_io_range(&np->fwnode, range->cpu_addr, |
225 | range->size); | |
0b0b0893 LD |
226 | if (err) |
227 | goto invalid_range; | |
228 | port = pci_address_to_pio(range->cpu_addr); | |
229 | if (port == (unsigned long)-1) { | |
230 | err = -EINVAL; | |
231 | goto invalid_range; | |
232 | } | |
233 | res->start = port; | |
234 | } else { | |
4af97106 PF |
235 | if ((sizeof(resource_size_t) < 8) && |
236 | upper_32_bits(range->cpu_addr)) { | |
237 | err = -EINVAL; | |
238 | goto invalid_range; | |
239 | } | |
240 | ||
0b0b0893 LD |
241 | res->start = range->cpu_addr; |
242 | } | |
243 | res->end = res->start + range->size - 1; | |
244 | return 0; | |
245 | ||
246 | invalid_range: | |
247 | res->start = (resource_size_t)OF_BAD_ADDR; | |
248 | res->end = (resource_size_t)OF_BAD_ADDR; | |
249 | return err; | |
83bbde1c | 250 | } |
bf6681ea | 251 | EXPORT_SYMBOL(of_pci_range_to_resource); |
dbbdee94 | 252 | |
c75a7949 RH |
253 | /* |
254 | * of_range_to_resource - Create a resource from a ranges entry | |
255 | * @np: device node where the range belongs to | |
256 | * @index: the 'ranges' index to convert to a resource | |
257 | * @res: pointer to a valid resource that will be updated to | |
258 | * reflect the values contained in the range. | |
259 | * | |
260 | * Returns ENOENT if the entry is not found or EINVAL if the range cannot be | |
261 | * converted to resource. | |
262 | */ | |
263 | int of_range_to_resource(struct device_node *np, int index, struct resource *res) | |
264 | { | |
265 | int ret, i = 0; | |
266 | struct of_range_parser parser; | |
267 | struct of_range range; | |
268 | ||
269 | ret = of_range_parser_init(&parser, np); | |
270 | if (ret) | |
271 | return ret; | |
272 | ||
273 | for_each_of_range(&parser, &range) | |
274 | if (i++ == index) | |
275 | return of_pci_range_to_resource(&range, np, res); | |
276 | ||
277 | return -ENOENT; | |
278 | } | |
279 | EXPORT_SYMBOL(of_range_to_resource); | |
280 | ||
dbbdee94 GL |
281 | /* |
282 | * ISA bus specific translator | |
283 | */ | |
284 | ||
285 | static int of_bus_isa_match(struct device_node *np) | |
286 | { | |
b3e46d1a | 287 | return of_node_name_eq(np, "isa"); |
dbbdee94 GL |
288 | } |
289 | ||
290 | static void of_bus_isa_count_cells(struct device_node *child, | |
291 | int *addrc, int *sizec) | |
292 | { | |
293 | if (addrc) | |
294 | *addrc = 2; | |
295 | if (sizec) | |
296 | *sizec = 1; | |
297 | } | |
298 | ||
47b1e689 | 299 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 300 | int pna) |
dbbdee94 GL |
301 | { |
302 | u64 cp, s, da; | |
303 | ||
304 | /* Check address type match */ | |
0131d897 | 305 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
306 | return OF_BAD_ADDR; |
307 | ||
308 | /* Read address values, skipping high cell */ | |
309 | cp = of_read_number(range + 1, na - 1); | |
310 | s = of_read_number(range + na + pna, ns); | |
311 | da = of_read_number(addr + 1, na - 1); | |
312 | ||
0e407a9a | 313 | pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
dbbdee94 GL |
314 | |
315 | if (da < cp || da >= (cp + s)) | |
316 | return OF_BAD_ADDR; | |
317 | return da - cp; | |
318 | } | |
319 | ||
47b1e689 | 320 | static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
321 | { |
322 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
323 | } | |
324 | ||
0131d897 | 325 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
326 | { |
327 | unsigned int flags = 0; | |
0131d897 | 328 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
329 | |
330 | if (w & 1) | |
331 | flags |= IORESOURCE_IO; | |
332 | else | |
333 | flags |= IORESOURCE_MEM; | |
334 | return flags; | |
335 | } | |
336 | ||
3d5089c4 RH |
337 | static int of_bus_default_flags_match(struct device_node *np) |
338 | { | |
339 | return of_bus_n_addr_cells(np) == 3; | |
340 | } | |
341 | ||
dbbdee94 GL |
342 | /* |
343 | * Array of bus specific translators | |
344 | */ | |
345 | ||
346 | static struct of_bus of_busses[] = { | |
4670d610 | 347 | #ifdef CONFIG_PCI |
dbbdee94 GL |
348 | /* PCI */ |
349 | { | |
350 | .name = "pci", | |
351 | .addresses = "assigned-addresses", | |
352 | .match = of_bus_pci_match, | |
353 | .count_cells = of_bus_pci_count_cells, | |
354 | .map = of_bus_pci_map, | |
355 | .translate = of_bus_pci_translate, | |
2f96593e | 356 | .has_flags = true, |
dbbdee94 GL |
357 | .get_flags = of_bus_pci_get_flags, |
358 | }, | |
4670d610 | 359 | #endif /* CONFIG_PCI */ |
dbbdee94 GL |
360 | /* ISA */ |
361 | { | |
362 | .name = "isa", | |
363 | .addresses = "reg", | |
364 | .match = of_bus_isa_match, | |
365 | .count_cells = of_bus_isa_count_cells, | |
366 | .map = of_bus_isa_map, | |
367 | .translate = of_bus_isa_translate, | |
2f96593e | 368 | .has_flags = true, |
dbbdee94 GL |
369 | .get_flags = of_bus_isa_get_flags, |
370 | }, | |
3d5089c4 RH |
371 | /* Default with flags cell */ |
372 | { | |
373 | .name = "default-flags", | |
374 | .addresses = "reg", | |
375 | .match = of_bus_default_flags_match, | |
376 | .count_cells = of_bus_default_count_cells, | |
377 | .map = of_bus_default_map, | |
378 | .translate = of_bus_default_translate, | |
379 | .has_flags = true, | |
380 | .get_flags = of_bus_default_flags_get_flags, | |
381 | }, | |
dbbdee94 GL |
382 | /* Default */ |
383 | { | |
384 | .name = "default", | |
385 | .addresses = "reg", | |
386 | .match = NULL, | |
387 | .count_cells = of_bus_default_count_cells, | |
388 | .map = of_bus_default_map, | |
389 | .translate = of_bus_default_translate, | |
390 | .get_flags = of_bus_default_get_flags, | |
391 | }, | |
392 | }; | |
393 | ||
394 | static struct of_bus *of_match_bus(struct device_node *np) | |
395 | { | |
396 | int i; | |
397 | ||
398 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
399 | if (!of_busses[i].match || of_busses[i].match(np)) | |
400 | return &of_busses[i]; | |
401 | BUG(); | |
402 | return NULL; | |
403 | } | |
404 | ||
41d94893 | 405 | static int of_empty_ranges_quirk(struct device_node *np) |
746c9e9f BH |
406 | { |
407 | if (IS_ENABLED(CONFIG_PPC)) { | |
41d94893 | 408 | /* To save cycles, we cache the result for global "Mac" setting */ |
746c9e9f BH |
409 | static int quirk_state = -1; |
410 | ||
41d94893 BH |
411 | /* PA-SEMI sdc DT bug */ |
412 | if (of_device_is_compatible(np, "1682m-sdc")) | |
413 | return true; | |
414 | ||
415 | /* Make quirk cached */ | |
746c9e9f BH |
416 | if (quirk_state < 0) |
417 | quirk_state = | |
418 | of_machine_is_compatible("Power Macintosh") || | |
419 | of_machine_is_compatible("MacRISC"); | |
420 | return quirk_state; | |
421 | } | |
422 | return false; | |
423 | } | |
424 | ||
dbbdee94 | 425 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, |
47b1e689 | 426 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
427 | int na, int ns, int pna, const char *rprop) |
428 | { | |
0131d897 | 429 | const __be32 *ranges; |
dbbdee94 GL |
430 | unsigned int rlen; |
431 | int rone; | |
432 | u64 offset = OF_BAD_ADDR; | |
433 | ||
ba85edbe MY |
434 | /* |
435 | * Normally, an absence of a "ranges" property means we are | |
dbbdee94 | 436 | * crossing a non-translatable boundary, and thus the addresses |
ba85edbe | 437 | * below the current cannot be converted to CPU physical ones. |
dbbdee94 GL |
438 | * Unfortunately, while this is very clear in the spec, it's not |
439 | * what Apple understood, and they do have things like /uni-n or | |
440 | * /ht nodes with no "ranges" property and a lot of perfectly | |
441 | * useable mapped devices below them. Thus we treat the absence of | |
442 | * "ranges" as equivalent to an empty "ranges" property which means | |
443 | * a 1:1 translation at that level. It's up to the caller not to try | |
444 | * to translate addresses that aren't supposed to be translated in | |
445 | * the first place. --BenH. | |
3930f294 GL |
446 | * |
447 | * As far as we know, this damage only exists on Apple machines, so | |
448 | * This code is only enabled on powerpc. --gcl | |
81db12ee RH |
449 | * |
450 | * This quirk also applies for 'dma-ranges' which frequently exist in | |
451 | * child nodes without 'dma-ranges' in the parent nodes. --RobH | |
dbbdee94 GL |
452 | */ |
453 | ranges = of_get_property(parent, rprop, &rlen); | |
81db12ee RH |
454 | if (ranges == NULL && !of_empty_ranges_quirk(parent) && |
455 | strcmp(rprop, "dma-ranges")) { | |
606ad42a | 456 | pr_debug("no ranges; cannot translate\n"); |
3930f294 GL |
457 | return 1; |
458 | } | |
dbbdee94 GL |
459 | if (ranges == NULL || rlen == 0) { |
460 | offset = of_read_number(addr, na); | |
461 | memset(addr, 0, pna * 4); | |
606ad42a | 462 | pr_debug("empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
463 | goto finish; |
464 | } | |
465 | ||
606ad42a | 466 | pr_debug("walking ranges...\n"); |
dbbdee94 GL |
467 | |
468 | /* Now walk through the ranges */ | |
469 | rlen /= 4; | |
470 | rone = na + pna + ns; | |
471 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
472 | offset = bus->map(addr, ranges, na, ns, pna); | |
473 | if (offset != OF_BAD_ADDR) | |
474 | break; | |
475 | } | |
476 | if (offset == OF_BAD_ADDR) { | |
606ad42a | 477 | pr_debug("not found !\n"); |
dbbdee94 GL |
478 | return 1; |
479 | } | |
480 | memcpy(addr, ranges + na, 4 * pna); | |
481 | ||
482 | finish: | |
606ad42a | 483 | of_dump_addr("parent translation for:", addr, pna); |
0e407a9a | 484 | pr_debug("with offset: %llx\n", offset); |
dbbdee94 GL |
485 | |
486 | /* Translate it into parent bus space */ | |
487 | return pbus->translate(addr, offset, pna); | |
488 | } | |
489 | ||
490 | /* | |
491 | * Translate an address from the device-tree into a CPU physical address, | |
492 | * this walks up the tree and applies the various bus mappings on the | |
493 | * way. | |
494 | * | |
495 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
496 | * that translation is impossible (that is we are not dealing with a value | |
497 | * that can be mapped to a cpu physical address). This is not really specified | |
498 | * that way, but this is traditionally the way IBM at least do things | |
65af618d ZY |
499 | * |
500 | * Whenever the translation fails, the *host pointer will be set to the | |
501 | * device that had registered logical PIO mapping, and the return code is | |
502 | * relative to that node. | |
dbbdee94 | 503 | */ |
47b1e689 | 504 | static u64 __of_translate_address(struct device_node *dev, |
95835a8d | 505 | struct device_node *(*get_parent)(const struct device_node *), |
65af618d ZY |
506 | const __be32 *in_addr, const char *rprop, |
507 | struct device_node **host) | |
dbbdee94 GL |
508 | { |
509 | struct device_node *parent = NULL; | |
510 | struct of_bus *bus, *pbus; | |
47b1e689 | 511 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
512 | int na, ns, pna, pns; |
513 | u64 result = OF_BAD_ADDR; | |
514 | ||
0d638a07 | 515 | pr_debug("** translation for device %pOF **\n", dev); |
dbbdee94 GL |
516 | |
517 | /* Increase refcount at current level */ | |
518 | of_node_get(dev); | |
519 | ||
65af618d | 520 | *host = NULL; |
dbbdee94 | 521 | /* Get parent & match bus type */ |
95835a8d | 522 | parent = get_parent(dev); |
dbbdee94 GL |
523 | if (parent == NULL) |
524 | goto bail; | |
525 | bus = of_match_bus(parent); | |
526 | ||
59f5ca48 | 527 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
528 | bus->count_cells(dev, &na, &ns); |
529 | if (!OF_CHECK_COUNTS(na, ns)) { | |
0d638a07 | 530 | pr_debug("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
531 | goto bail; |
532 | } | |
533 | memcpy(addr, in_addr, na * 4); | |
534 | ||
0d638a07 RH |
535 | pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n", |
536 | bus->name, na, ns, parent); | |
606ad42a | 537 | of_dump_addr("translating address:", addr, na); |
dbbdee94 GL |
538 | |
539 | /* Translate */ | |
540 | for (;;) { | |
65af618d ZY |
541 | struct logic_pio_hwaddr *iorange; |
542 | ||
dbbdee94 GL |
543 | /* Switch to parent bus */ |
544 | of_node_put(dev); | |
545 | dev = parent; | |
95835a8d | 546 | parent = get_parent(dev); |
dbbdee94 GL |
547 | |
548 | /* If root, we have finished */ | |
549 | if (parent == NULL) { | |
606ad42a | 550 | pr_debug("reached root node\n"); |
dbbdee94 GL |
551 | result = of_read_number(addr, na); |
552 | break; | |
553 | } | |
554 | ||
65af618d ZY |
555 | /* |
556 | * For indirectIO device which has no ranges property, get | |
557 | * the address from reg directly. | |
558 | */ | |
559 | iorange = find_io_range_by_fwnode(&dev->fwnode); | |
560 | if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) { | |
561 | result = of_read_number(addr + 1, na - 1); | |
562 | pr_debug("indirectIO matched(%pOF) 0x%llx\n", | |
563 | dev, result); | |
564 | *host = of_node_get(dev); | |
565 | break; | |
566 | } | |
567 | ||
dbbdee94 GL |
568 | /* Get new parent bus and counts */ |
569 | pbus = of_match_bus(parent); | |
570 | pbus->count_cells(dev, &pna, &pns); | |
571 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
0d638a07 | 572 | pr_err("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
573 | break; |
574 | } | |
575 | ||
0d638a07 RH |
576 | pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n", |
577 | pbus->name, pna, pns, parent); | |
dbbdee94 GL |
578 | |
579 | /* Apply bus translation */ | |
580 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
581 | break; | |
582 | ||
583 | /* Complete the move up one level */ | |
584 | na = pna; | |
585 | ns = pns; | |
586 | bus = pbus; | |
587 | ||
606ad42a | 588 | of_dump_addr("one level translation:", addr, na); |
dbbdee94 GL |
589 | } |
590 | bail: | |
591 | of_node_put(parent); | |
592 | of_node_put(dev); | |
593 | ||
594 | return result; | |
595 | } | |
596 | ||
0131d897 | 597 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 598 | { |
65af618d ZY |
599 | struct device_node *host; |
600 | u64 ret; | |
601 | ||
95835a8d MR |
602 | ret = __of_translate_address(dev, of_get_parent, |
603 | in_addr, "ranges", &host); | |
65af618d ZY |
604 | if (host) { |
605 | of_node_put(host); | |
606 | return OF_BAD_ADDR; | |
607 | } | |
608 | ||
609 | return ret; | |
dbbdee94 GL |
610 | } |
611 | EXPORT_SYMBOL(of_translate_address); | |
612 | ||
f1ad5338 RM |
613 | #ifdef CONFIG_HAS_DMA |
614 | struct device_node *__of_get_dma_parent(const struct device_node *np) | |
f83a6e5d MR |
615 | { |
616 | struct of_phandle_args args; | |
617 | int ret, index; | |
618 | ||
619 | index = of_property_match_string(np, "interconnect-names", "dma-mem"); | |
620 | if (index < 0) | |
621 | return of_get_parent(np); | |
622 | ||
623 | ret = of_parse_phandle_with_args(np, "interconnects", | |
624 | "#interconnect-cells", | |
625 | index, &args); | |
626 | if (ret < 0) | |
627 | return of_get_parent(np); | |
628 | ||
629 | return of_node_get(args.np); | |
630 | } | |
f1ad5338 | 631 | #endif |
f83a6e5d | 632 | |
862ab557 RM |
633 | static struct device_node *of_get_next_dma_parent(struct device_node *np) |
634 | { | |
635 | struct device_node *parent; | |
636 | ||
637 | parent = __of_get_dma_parent(np); | |
638 | of_node_put(np); | |
639 | ||
640 | return parent; | |
641 | } | |
642 | ||
0131d897 | 643 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 644 | { |
65af618d ZY |
645 | struct device_node *host; |
646 | u64 ret; | |
647 | ||
f83a6e5d | 648 | ret = __of_translate_address(dev, __of_get_dma_parent, |
95835a8d | 649 | in_addr, "dma-ranges", &host); |
65af618d ZY |
650 | |
651 | if (host) { | |
652 | of_node_put(host); | |
653 | return OF_BAD_ADDR; | |
654 | } | |
655 | ||
656 | return ret; | |
dbbdee94 GL |
657 | } |
658 | EXPORT_SYMBOL(of_translate_dma_address); | |
659 | ||
e251c213 TR |
660 | /** |
661 | * of_translate_dma_region - Translate device tree address and size tuple | |
662 | * @dev: device tree node for which to translate | |
663 | * @prop: pointer into array of cells | |
664 | * @start: return value for the start of the DMA range | |
665 | * @length: return value for the length of the DMA range | |
666 | * | |
667 | * Returns a pointer to the cell immediately following the translated DMA region. | |
668 | */ | |
669 | const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *prop, | |
670 | phys_addr_t *start, size_t *length) | |
671 | { | |
672 | struct device_node *parent; | |
673 | u64 address, size; | |
674 | int na, ns; | |
675 | ||
676 | parent = __of_get_dma_parent(dev); | |
677 | if (!parent) | |
678 | return NULL; | |
679 | ||
680 | na = of_bus_n_addr_cells(parent); | |
681 | ns = of_bus_n_size_cells(parent); | |
682 | ||
683 | of_node_put(parent); | |
684 | ||
685 | address = of_translate_dma_address(dev, prop); | |
686 | if (address == OF_BAD_ADDR) | |
687 | return NULL; | |
688 | ||
689 | size = of_read_number(prop + na, ns); | |
690 | ||
691 | if (start) | |
692 | *start = address; | |
693 | ||
694 | if (length) | |
695 | *length = size; | |
696 | ||
697 | return prop + na + ns; | |
698 | } | |
699 | EXPORT_SYMBOL(of_translate_dma_region); | |
700 | ||
050a2c62 RH |
701 | const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no, |
702 | u64 *size, unsigned int *flags) | |
dbbdee94 | 703 | { |
0131d897 | 704 | const __be32 *prop; |
dbbdee94 GL |
705 | unsigned int psize; |
706 | struct device_node *parent; | |
707 | struct of_bus *bus; | |
708 | int onesize, i, na, ns; | |
709 | ||
710 | /* Get parent & match bus type */ | |
711 | parent = of_get_parent(dev); | |
712 | if (parent == NULL) | |
713 | return NULL; | |
714 | bus = of_match_bus(parent); | |
050a2c62 RH |
715 | if (strcmp(bus->name, "pci") && (bar_no >= 0)) { |
716 | of_node_put(parent); | |
717 | return NULL; | |
718 | } | |
dbbdee94 GL |
719 | bus->count_cells(dev, &na, &ns); |
720 | of_node_put(parent); | |
5d61b165 | 721 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
722 | return NULL; |
723 | ||
724 | /* Get "reg" or "assigned-addresses" property */ | |
725 | prop = of_get_property(dev, bus->addresses, &psize); | |
726 | if (prop == NULL) | |
727 | return NULL; | |
728 | psize /= 4; | |
729 | ||
730 | onesize = na + ns; | |
050a2c62 RH |
731 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
732 | u32 val = be32_to_cpu(prop[0]); | |
733 | /* PCI bus matches on BAR number instead of index */ | |
734 | if (((bar_no >= 0) && ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0))) || | |
735 | ((index >= 0) && (i == index))) { | |
dbbdee94 GL |
736 | if (size) |
737 | *size = of_read_number(prop + na, ns); | |
738 | if (flags) | |
739 | *flags = bus->get_flags(prop); | |
740 | return prop; | |
741 | } | |
050a2c62 | 742 | } |
dbbdee94 GL |
743 | return NULL; |
744 | } | |
050a2c62 | 745 | EXPORT_SYMBOL(__of_get_address); |
dbbdee94 | 746 | |
ff61bacd RH |
747 | /** |
748 | * of_property_read_reg - Retrieve the specified "reg" entry index without translating | |
749 | * @np: device tree node for which to retrieve "reg" from | |
750 | * @idx: "reg" entry index to read | |
751 | * @addr: return value for the untranslated address | |
752 | * @size: return value for the entry size | |
753 | * | |
754 | * Returns -EINVAL if "reg" is not found. Returns 0 on success with addr and | |
755 | * size values filled in. | |
756 | */ | |
757 | int of_property_read_reg(struct device_node *np, int idx, u64 *addr, u64 *size) | |
758 | { | |
759 | const __be32 *prop = of_get_address(np, idx, size, NULL); | |
760 | ||
761 | if (!prop) | |
762 | return -EINVAL; | |
763 | ||
764 | *addr = of_read_number(prop, of_n_addr_cells(np)); | |
765 | ||
766 | return 0; | |
767 | } | |
768 | EXPORT_SYMBOL(of_property_read_reg); | |
769 | ||
67ccd2b9 RH |
770 | static int parser_init(struct of_pci_range_parser *parser, |
771 | struct device_node *node, const char *name) | |
772 | { | |
67ccd2b9 RH |
773 | int rlen; |
774 | ||
775 | parser->node = node; | |
776 | parser->pna = of_n_addr_cells(node); | |
bc5e522e RH |
777 | parser->na = of_bus_n_addr_cells(node); |
778 | parser->ns = of_bus_n_size_cells(node); | |
67ccd2b9 | 779 | parser->dma = !strcmp(name, "dma-ranges"); |
2f96593e | 780 | parser->bus = of_match_bus(node); |
67ccd2b9 RH |
781 | |
782 | parser->range = of_get_property(node, name, &rlen); | |
783 | if (parser->range == NULL) | |
784 | return -ENOENT; | |
785 | ||
786 | parser->end = parser->range + rlen / sizeof(__be32); | |
787 | ||
788 | return 0; | |
789 | } | |
790 | ||
791 | int of_pci_range_parser_init(struct of_pci_range_parser *parser, | |
792 | struct device_node *node) | |
793 | { | |
794 | return parser_init(parser, node, "ranges"); | |
795 | } | |
796 | EXPORT_SYMBOL_GPL(of_pci_range_parser_init); | |
797 | ||
798 | int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, | |
799 | struct device_node *node) | |
800 | { | |
801 | return parser_init(parser, node, "dma-ranges"); | |
802 | } | |
803 | EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init); | |
bc5e522e | 804 | #define of_dma_range_parser_init of_pci_dma_range_parser_init |
67ccd2b9 RH |
805 | |
806 | struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, | |
807 | struct of_pci_range *range) | |
808 | { | |
bc5e522e RH |
809 | int na = parser->na; |
810 | int ns = parser->ns; | |
811 | int np = parser->pna + na + ns; | |
2f96593e | 812 | int busflag_na = 0; |
67ccd2b9 RH |
813 | |
814 | if (!range) | |
815 | return NULL; | |
816 | ||
bc5e522e | 817 | if (!parser->range || parser->range + np > parser->end) |
67ccd2b9 RH |
818 | return NULL; |
819 | ||
2f96593e JY |
820 | range->flags = parser->bus->get_flags(parser->range); |
821 | ||
822 | /* A extra cell for resource flags */ | |
823 | if (parser->bus->has_flags) | |
824 | busflag_na = 1; | |
bc5e522e | 825 | |
2f96593e | 826 | range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); |
bc5e522e | 827 | |
67ccd2b9 RH |
828 | if (parser->dma) |
829 | range->cpu_addr = of_translate_dma_address(parser->node, | |
830 | parser->range + na); | |
831 | else | |
832 | range->cpu_addr = of_translate_address(parser->node, | |
833 | parser->range + na); | |
834 | range->size = of_read_number(parser->range + parser->pna + na, ns); | |
835 | ||
bc5e522e | 836 | parser->range += np; |
67ccd2b9 RH |
837 | |
838 | /* Now consume following elements while they are contiguous */ | |
bc5e522e RH |
839 | while (parser->range + np <= parser->end) { |
840 | u32 flags = 0; | |
2f96593e | 841 | u64 bus_addr, cpu_addr, size; |
67ccd2b9 | 842 | |
2f96593e JY |
843 | flags = parser->bus->get_flags(parser->range); |
844 | bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); | |
67ccd2b9 RH |
845 | if (parser->dma) |
846 | cpu_addr = of_translate_dma_address(parser->node, | |
847 | parser->range + na); | |
848 | else | |
849 | cpu_addr = of_translate_address(parser->node, | |
850 | parser->range + na); | |
851 | size = of_read_number(parser->range + parser->pna + na, ns); | |
852 | ||
853 | if (flags != range->flags) | |
854 | break; | |
2f96593e | 855 | if (bus_addr != range->bus_addr + range->size || |
67ccd2b9 RH |
856 | cpu_addr != range->cpu_addr + range->size) |
857 | break; | |
858 | ||
859 | range->size += size; | |
bc5e522e | 860 | parser->range += np; |
67ccd2b9 RH |
861 | } |
862 | ||
863 | return range; | |
864 | } | |
865 | EXPORT_SYMBOL_GPL(of_pci_range_parser_one); | |
866 | ||
65af618d ZY |
867 | static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr, |
868 | u64 size) | |
869 | { | |
870 | u64 taddr; | |
871 | unsigned long port; | |
872 | struct device_node *host; | |
873 | ||
95835a8d MR |
874 | taddr = __of_translate_address(dev, of_get_parent, |
875 | in_addr, "ranges", &host); | |
65af618d ZY |
876 | if (host) { |
877 | /* host-specific port access */ | |
878 | port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size); | |
879 | of_node_put(host); | |
880 | } else { | |
881 | /* memory-mapped I/O range */ | |
882 | port = pci_address_to_pio(taddr); | |
883 | } | |
884 | ||
885 | if (port == (unsigned long)-1) | |
886 | return OF_BAD_ADDR; | |
887 | ||
888 | return port; | |
889 | } | |
890 | ||
e0d07278 | 891 | #ifdef CONFIG_HAS_DMA |
18308c94 | 892 | /** |
e0d07278 | 893 | * of_dma_get_range - Get DMA range info and put it into a map array |
18308c94 | 894 | * @np: device node to get DMA range info |
e0d07278 | 895 | * @map: dma range structure to return |
18308c94 GS |
896 | * |
897 | * Look in bottom up direction for the first "dma-ranges" property | |
e0d07278 JQ |
898 | * and parse it. Put the information into a DMA offset map array. |
899 | * | |
900 | * dma-ranges format: | |
18308c94 GS |
901 | * DMA addr (dma_addr) : naddr cells |
902 | * CPU addr (phys_addr_t) : pna cells | |
903 | * size : nsize cells | |
904 | * | |
e0d07278 JQ |
905 | * It returns -ENODEV if "dma-ranges" property was not found for this |
906 | * device in the DT. | |
18308c94 | 907 | */ |
e0d07278 | 908 | int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map) |
18308c94 GS |
909 | { |
910 | struct device_node *node = of_node_get(np); | |
911 | const __be32 *ranges = NULL; | |
951d4885 | 912 | bool found_dma_ranges = false; |
7a8b64d1 RH |
913 | struct of_range_parser parser; |
914 | struct of_range range; | |
e0d07278 JQ |
915 | struct bus_dma_region *r; |
916 | int len, num_ranges = 0; | |
917 | int ret = 0; | |
18308c94 | 918 | |
951d4885 | 919 | while (node) { |
18308c94 GS |
920 | ranges = of_get_property(node, "dma-ranges", &len); |
921 | ||
922 | /* Ignore empty ranges, they imply no translation required */ | |
923 | if (ranges && len > 0) | |
924 | break; | |
925 | ||
951d4885 RM |
926 | /* Once we find 'dma-ranges', then a missing one is an error */ |
927 | if (found_dma_ranges && !ranges) { | |
928 | ret = -ENODEV; | |
929 | goto out; | |
930 | } | |
931 | found_dma_ranges = true; | |
932 | ||
933 | node = of_get_next_dma_parent(node); | |
18308c94 GS |
934 | } |
935 | ||
951d4885 | 936 | if (!node || !ranges) { |
0d638a07 | 937 | pr_debug("no dma-ranges found for node(%pOF)\n", np); |
18308c94 GS |
938 | ret = -ENODEV; |
939 | goto out; | |
940 | } | |
941 | ||
7a8b64d1 | 942 | of_dma_range_parser_init(&parser, node); |
f6933c01 MB |
943 | for_each_of_range(&parser, &range) { |
944 | if (range.cpu_addr == OF_BAD_ADDR) { | |
945 | pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n", | |
946 | range.bus_addr, node); | |
947 | continue; | |
948 | } | |
e0d07278 | 949 | num_ranges++; |
f6933c01 MB |
950 | } |
951 | ||
952 | if (!num_ranges) { | |
953 | ret = -EINVAL; | |
954 | goto out; | |
955 | } | |
e0d07278 JQ |
956 | |
957 | r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL); | |
958 | if (!r) { | |
959 | ret = -ENOMEM; | |
960 | goto out; | |
961 | } | |
7a8b64d1 | 962 | |
e0d07278 | 963 | /* |
f6933c01 MB |
964 | * Record all info in the generic DMA ranges array for struct device, |
965 | * returning an error if we don't find any parsable ranges. | |
e0d07278 JQ |
966 | */ |
967 | *map = r; | |
968 | of_dma_range_parser_init(&parser, node); | |
7a8b64d1 RH |
969 | for_each_of_range(&parser, &range) { |
970 | pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", | |
971 | range.bus_addr, range.cpu_addr, range.size); | |
f6933c01 | 972 | if (range.cpu_addr == OF_BAD_ADDR) |
f49c7faf | 973 | continue; |
e0d07278 JQ |
974 | r->cpu_start = range.cpu_addr; |
975 | r->dma_start = range.bus_addr; | |
976 | r->size = range.size; | |
977 | r->offset = range.cpu_addr - range.bus_addr; | |
978 | r++; | |
18308c94 | 979 | } |
18308c94 GS |
980 | out: |
981 | of_node_put(node); | |
18308c94 GS |
982 | return ret; |
983 | } | |
e0d07278 | 984 | #endif /* CONFIG_HAS_DMA */ |
92ea637e | 985 | |
964db79d NSJ |
986 | /** |
987 | * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA | |
988 | * @np: The node to start searching from or NULL to start from the root | |
989 | * | |
990 | * Gets the highest CPU physical address that is addressable by all DMA masters | |
991 | * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no | |
992 | * DMA constrained device is found, it returns PHYS_ADDR_MAX. | |
993 | */ | |
994 | phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np) | |
995 | { | |
996 | phys_addr_t max_cpu_addr = PHYS_ADDR_MAX; | |
997 | struct of_range_parser parser; | |
998 | phys_addr_t subtree_max_addr; | |
999 | struct device_node *child; | |
1000 | struct of_range range; | |
1001 | const __be32 *ranges; | |
1002 | u64 cpu_end = 0; | |
1003 | int len; | |
1004 | ||
1005 | if (!np) | |
1006 | np = of_root; | |
1007 | ||
1008 | ranges = of_get_property(np, "dma-ranges", &len); | |
1009 | if (ranges && len) { | |
1010 | of_dma_range_parser_init(&parser, np); | |
1011 | for_each_of_range(&parser, &range) | |
1012 | if (range.cpu_addr + range.size > cpu_end) | |
1013 | cpu_end = range.cpu_addr + range.size - 1; | |
1014 | ||
1015 | if (max_cpu_addr > cpu_end) | |
1016 | max_cpu_addr = cpu_end; | |
1017 | } | |
1018 | ||
1019 | for_each_available_child_of_node(np, child) { | |
1020 | subtree_max_addr = of_dma_get_max_cpu_address(child); | |
1021 | if (max_cpu_addr > subtree_max_addr) | |
1022 | max_cpu_addr = subtree_max_addr; | |
1023 | } | |
1024 | ||
1025 | return max_cpu_addr; | |
1026 | } | |
1027 | ||
92ea637e SS |
1028 | /** |
1029 | * of_dma_is_coherent - Check if device is coherent | |
1030 | * @np: device node | |
1031 | * | |
1032 | * It returns true if "dma-coherent" property was found | |
dabf6b36 | 1033 | * for this device in the DT, or if DMA is coherent by |
12b82775 HS |
1034 | * default for OF devices on the current platform and no |
1035 | * "dma-noncoherent" property was found for this device. | |
92ea637e SS |
1036 | */ |
1037 | bool of_dma_is_coherent(struct device_node *np) | |
1038 | { | |
a5bea04f | 1039 | struct device_node *node; |
c00a60d6 | 1040 | bool is_coherent = dma_default_coherent; |
dabf6b36 | 1041 | |
a5bea04f EN |
1042 | node = of_node_get(np); |
1043 | ||
92ea637e SS |
1044 | while (node) { |
1045 | if (of_property_read_bool(node, "dma-coherent")) { | |
12b82775 HS |
1046 | is_coherent = true; |
1047 | break; | |
1048 | } | |
1049 | if (of_property_read_bool(node, "dma-noncoherent")) { | |
1050 | is_coherent = false; | |
1051 | break; | |
92ea637e | 1052 | } |
c60bf3eb | 1053 | node = of_get_next_dma_parent(node); |
92ea637e SS |
1054 | } |
1055 | of_node_put(node); | |
12b82775 | 1056 | return is_coherent; |
92ea637e | 1057 | } |
eb3d3ec5 | 1058 | EXPORT_SYMBOL_GPL(of_dma_is_coherent); |
89897f73 HM |
1059 | |
1060 | /** | |
1061 | * of_mmio_is_nonposted - Check if device uses non-posted MMIO | |
1062 | * @np: device node | |
1063 | * | |
1064 | * Returns true if the "nonposted-mmio" property was found for | |
1065 | * the device's bus. | |
1066 | * | |
1067 | * This is currently only enabled on builds that support Apple ARM devices, as | |
1068 | * an optimization. | |
1069 | */ | |
1070 | static bool of_mmio_is_nonposted(struct device_node *np) | |
1071 | { | |
1072 | struct device_node *parent; | |
1073 | bool nonposted; | |
1074 | ||
1075 | if (!IS_ENABLED(CONFIG_ARCH_APPLE)) | |
1076 | return false; | |
1077 | ||
1078 | parent = of_get_parent(np); | |
1079 | if (!parent) | |
1080 | return false; | |
1081 | ||
1082 | nonposted = of_property_read_bool(parent, "nonposted-mmio"); | |
1083 | ||
1084 | of_node_put(parent); | |
1085 | return nonposted; | |
1086 | } | |
5eac0bdc GU |
1087 | |
1088 | static int __of_address_to_resource(struct device_node *dev, int index, int bar_no, | |
1089 | struct resource *r) | |
1090 | { | |
1091 | u64 taddr; | |
1092 | const __be32 *addrp; | |
1093 | u64 size; | |
1094 | unsigned int flags; | |
1095 | const char *name = NULL; | |
1096 | ||
1097 | addrp = __of_get_address(dev, index, bar_no, &size, &flags); | |
1098 | if (addrp == NULL) | |
1099 | return -EINVAL; | |
1100 | ||
1101 | /* Get optional "reg-names" property to add a name to a resource */ | |
1102 | if (index >= 0) | |
1103 | of_property_read_string_index(dev, "reg-names", index, &name); | |
1104 | ||
1105 | if (flags & IORESOURCE_MEM) | |
1106 | taddr = of_translate_address(dev, addrp); | |
1107 | else if (flags & IORESOURCE_IO) | |
1108 | taddr = of_translate_ioport(dev, addrp, size); | |
1109 | else | |
1110 | return -EINVAL; | |
1111 | ||
1112 | if (taddr == OF_BAD_ADDR) | |
1113 | return -EINVAL; | |
1114 | memset(r, 0, sizeof(struct resource)); | |
1115 | ||
1116 | if (of_mmio_is_nonposted(dev)) | |
1117 | flags |= IORESOURCE_MEM_NONPOSTED; | |
1118 | ||
1119 | r->start = taddr; | |
1120 | r->end = taddr + size - 1; | |
1121 | r->flags = flags; | |
1122 | r->name = name ? name : dev->full_name; | |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
1127 | /** | |
1128 | * of_address_to_resource - Translate device tree address and return as resource | |
1129 | * @dev: Caller's Device Node | |
1130 | * @index: Index into the array | |
1131 | * @r: Pointer to resource array | |
1132 | * | |
1133 | * Returns -EINVAL if the range cannot be converted to resource. | |
1134 | * | |
1135 | * Note that if your address is a PIO address, the conversion will fail if | |
1136 | * the physical address can't be internally converted to an IO token with | |
1137 | * pci_address_to_pio(), that is because it's either called too early or it | |
1138 | * can't be matched to any host bridge IO space | |
1139 | */ | |
1140 | int of_address_to_resource(struct device_node *dev, int index, | |
1141 | struct resource *r) | |
1142 | { | |
1143 | return __of_address_to_resource(dev, index, -1, r); | |
1144 | } | |
1145 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
1146 | ||
1147 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
1148 | struct resource *r) | |
1149 | { | |
1150 | ||
1151 | if (!IS_ENABLED(CONFIG_PCI)) | |
1152 | return -ENOSYS; | |
1153 | ||
1154 | return __of_address_to_resource(dev, -1, bar, r); | |
1155 | } | |
1156 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
1157 | ||
1158 | /** | |
1159 | * of_iomap - Maps the memory mapped IO for a given device_node | |
1160 | * @np: the device whose io range will be mapped | |
1161 | * @index: index of the io range | |
1162 | * | |
1163 | * Returns a pointer to the mapped memory | |
1164 | */ | |
1165 | void __iomem *of_iomap(struct device_node *np, int index) | |
1166 | { | |
1167 | struct resource res; | |
1168 | ||
1169 | if (of_address_to_resource(np, index, &res)) | |
1170 | return NULL; | |
1171 | ||
1172 | if (res.flags & IORESOURCE_MEM_NONPOSTED) | |
1173 | return ioremap_np(res.start, resource_size(&res)); | |
1174 | else | |
1175 | return ioremap(res.start, resource_size(&res)); | |
1176 | } | |
1177 | EXPORT_SYMBOL(of_iomap); | |
1178 | ||
1179 | /* | |
1180 | * of_io_request_and_map - Requests a resource and maps the memory mapped IO | |
1181 | * for a given device_node | |
1182 | * @device: the device whose io range will be mapped | |
1183 | * @index: index of the io range | |
1184 | * @name: name "override" for the memory region request or NULL | |
1185 | * | |
1186 | * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded | |
1187 | * error code on failure. Usage example: | |
1188 | * | |
1189 | * base = of_io_request_and_map(node, 0, "foo"); | |
1190 | * if (IS_ERR(base)) | |
1191 | * return PTR_ERR(base); | |
1192 | */ | |
1193 | void __iomem *of_io_request_and_map(struct device_node *np, int index, | |
1194 | const char *name) | |
1195 | { | |
1196 | struct resource res; | |
1197 | void __iomem *mem; | |
1198 | ||
1199 | if (of_address_to_resource(np, index, &res)) | |
1200 | return IOMEM_ERR_PTR(-EINVAL); | |
1201 | ||
1202 | if (!name) | |
1203 | name = res.name; | |
1204 | if (!request_mem_region(res.start, resource_size(&res), name)) | |
1205 | return IOMEM_ERR_PTR(-EBUSY); | |
1206 | ||
1207 | if (res.flags & IORESOURCE_MEM_NONPOSTED) | |
1208 | mem = ioremap_np(res.start, resource_size(&res)); | |
1209 | else | |
1210 | mem = ioremap(res.start, resource_size(&res)); | |
1211 | ||
1212 | if (!mem) { | |
1213 | release_mem_region(res.start, resource_size(&res)); | |
1214 | return IOMEM_ERR_PTR(-ENOMEM); | |
1215 | } | |
1216 | ||
1217 | return mem; | |
1218 | } | |
1219 | EXPORT_SYMBOL(of_io_request_and_map); |