Commit | Line | Data |
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af6074fc | 1 | // SPDX-License-Identifier: GPL-2.0 |
606ad42a RH |
2 | #define pr_fmt(fmt) "OF: " fmt |
3 | ||
5019f0b1 | 4 | #include <linux/device.h> |
fcfaab30 | 5 | #include <linux/fwnode.h> |
6b884a8d GL |
6 | #include <linux/io.h> |
7 | #include <linux/ioport.h> | |
65af618d | 8 | #include <linux/logic_pio.h> |
dbbdee94 | 9 | #include <linux/module.h> |
6b884a8d | 10 | #include <linux/of_address.h> |
c5076cfe | 11 | #include <linux/pci.h> |
dbbdee94 | 12 | #include <linux/pci_regs.h> |
41f8bba7 LD |
13 | #include <linux/sizes.h> |
14 | #include <linux/slab.h> | |
dbbdee94 | 15 | #include <linux/string.h> |
6b884a8d | 16 | |
b68ac8dc RM |
17 | #include "of_private.h" |
18 | ||
dbbdee94 GL |
19 | /* Max address size we deal with */ |
20 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
21 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
22 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 GL |
23 | |
24 | static struct of_bus *of_match_bus(struct device_node *np); | |
0131d897 SAS |
25 | static int __of_address_to_resource(struct device_node *dev, |
26 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 27 | const char *name, struct resource *r); |
dbbdee94 GL |
28 | |
29 | /* Debug utility */ | |
30 | #ifdef DEBUG | |
0131d897 | 31 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 | 32 | { |
606ad42a | 33 | pr_debug("%s", s); |
dbbdee94 | 34 | while (na--) |
606ad42a RH |
35 | pr_cont(" %08x", be32_to_cpu(*(addr++))); |
36 | pr_cont("\n"); | |
dbbdee94 GL |
37 | } |
38 | #else | |
0131d897 | 39 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
40 | #endif |
41 | ||
42 | /* Callbacks for bus specific translators */ | |
43 | struct of_bus { | |
44 | const char *name; | |
45 | const char *addresses; | |
46 | int (*match)(struct device_node *parent); | |
47 | void (*count_cells)(struct device_node *child, | |
48 | int *addrc, int *sizec); | |
47b1e689 | 49 | u64 (*map)(__be32 *addr, const __be32 *range, |
dbbdee94 | 50 | int na, int ns, int pna); |
47b1e689 | 51 | int (*translate)(__be32 *addr, u64 offset, int na); |
2f96593e | 52 | bool has_flags; |
0131d897 | 53 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
54 | }; |
55 | ||
56 | /* | |
57 | * Default translator (generic bus) | |
58 | */ | |
59 | ||
60 | static void of_bus_default_count_cells(struct device_node *dev, | |
61 | int *addrc, int *sizec) | |
62 | { | |
63 | if (addrc) | |
64 | *addrc = of_n_addr_cells(dev); | |
65 | if (sizec) | |
66 | *sizec = of_n_size_cells(dev); | |
67 | } | |
68 | ||
47b1e689 | 69 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
dbbdee94 GL |
70 | int na, int ns, int pna) |
71 | { | |
72 | u64 cp, s, da; | |
73 | ||
74 | cp = of_read_number(range, na); | |
75 | s = of_read_number(range + na + pna, ns); | |
76 | da = of_read_number(addr, na); | |
77 | ||
606ad42a | 78 | pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", |
dbbdee94 GL |
79 | (unsigned long long)cp, (unsigned long long)s, |
80 | (unsigned long long)da); | |
81 | ||
82 | if (da < cp || da >= (cp + s)) | |
83 | return OF_BAD_ADDR; | |
84 | return da - cp; | |
85 | } | |
86 | ||
47b1e689 | 87 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
88 | { |
89 | u64 a = of_read_number(addr, na); | |
90 | memset(addr, 0, na * 4); | |
91 | a += offset; | |
92 | if (na > 1) | |
154063a9 GL |
93 | addr[na - 2] = cpu_to_be32(a >> 32); |
94 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
95 | |
96 | return 0; | |
97 | } | |
98 | ||
0131d897 | 99 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
100 | { |
101 | return IORESOURCE_MEM; | |
102 | } | |
103 | ||
0fc0ead3 | 104 | #ifdef CONFIG_PCI |
67ccd2b9 RH |
105 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
106 | { | |
107 | unsigned int flags = 0; | |
108 | u32 w = be32_to_cpup(addr); | |
109 | ||
110 | if (!IS_ENABLED(CONFIG_PCI)) | |
111 | return 0; | |
112 | ||
113 | switch((w >> 24) & 0x03) { | |
114 | case 0x01: | |
115 | flags |= IORESOURCE_IO; | |
116 | break; | |
117 | case 0x02: /* 32 bits */ | |
118 | case 0x03: /* 64 bits */ | |
119 | flags |= IORESOURCE_MEM; | |
120 | break; | |
121 | } | |
122 | if (w & 0x40000000) | |
123 | flags |= IORESOURCE_PREFETCH; | |
124 | return flags; | |
125 | } | |
126 | ||
dbbdee94 GL |
127 | /* |
128 | * PCI bus specific translator | |
129 | */ | |
130 | ||
d1ac0002 MZ |
131 | static bool of_node_is_pcie(struct device_node *np) |
132 | { | |
133 | bool is_pcie = of_node_name_eq(np, "pcie"); | |
134 | ||
135 | if (is_pcie) | |
136 | pr_warn_once("%pOF: Missing device_type\n", np); | |
137 | ||
138 | return is_pcie; | |
139 | } | |
140 | ||
dbbdee94 GL |
141 | static int of_bus_pci_match(struct device_node *np) |
142 | { | |
6dd18e46 | 143 | /* |
14e2abb7 | 144 | * "pciex" is PCI Express |
6dd18e46 BH |
145 | * "vci" is for the /chaos bridge on 1st-gen PCI powermacs |
146 | * "ht" is hypertransport | |
d1ac0002 MZ |
147 | * |
148 | * If none of the device_type match, and that the node name is | |
149 | * "pcie", accept the device as PCI (with a warning). | |
6dd18e46 | 150 | */ |
e8b1dee2 | 151 | return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || |
d1ac0002 MZ |
152 | of_node_is_type(np, "vci") || of_node_is_type(np, "ht") || |
153 | of_node_is_pcie(np); | |
dbbdee94 GL |
154 | } |
155 | ||
156 | static void of_bus_pci_count_cells(struct device_node *np, | |
157 | int *addrc, int *sizec) | |
158 | { | |
159 | if (addrc) | |
160 | *addrc = 3; | |
161 | if (sizec) | |
162 | *sizec = 2; | |
163 | } | |
164 | ||
47b1e689 | 165 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 166 | int pna) |
dbbdee94 GL |
167 | { |
168 | u64 cp, s, da; | |
169 | unsigned int af, rf; | |
170 | ||
171 | af = of_bus_pci_get_flags(addr); | |
172 | rf = of_bus_pci_get_flags(range); | |
173 | ||
174 | /* Check address type match */ | |
175 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
176 | return OF_BAD_ADDR; | |
177 | ||
178 | /* Read address values, skipping high cell */ | |
179 | cp = of_read_number(range + 1, na - 1); | |
180 | s = of_read_number(range + na + pna, ns); | |
181 | da = of_read_number(addr + 1, na - 1); | |
182 | ||
606ad42a | 183 | pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n", |
dbbdee94 GL |
184 | (unsigned long long)cp, (unsigned long long)s, |
185 | (unsigned long long)da); | |
186 | ||
187 | if (da < cp || da >= (cp + s)) | |
188 | return OF_BAD_ADDR; | |
189 | return da - cp; | |
190 | } | |
191 | ||
47b1e689 | 192 | static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
193 | { |
194 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
195 | } | |
196 | ||
0131d897 | 197 | const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
dbbdee94 GL |
198 | unsigned int *flags) |
199 | { | |
a9fadeef | 200 | const __be32 *prop; |
dbbdee94 GL |
201 | unsigned int psize; |
202 | struct device_node *parent; | |
203 | struct of_bus *bus; | |
204 | int onesize, i, na, ns; | |
205 | ||
206 | /* Get parent & match bus type */ | |
207 | parent = of_get_parent(dev); | |
208 | if (parent == NULL) | |
209 | return NULL; | |
210 | bus = of_match_bus(parent); | |
211 | if (strcmp(bus->name, "pci")) { | |
212 | of_node_put(parent); | |
213 | return NULL; | |
214 | } | |
215 | bus->count_cells(dev, &na, &ns); | |
216 | of_node_put(parent); | |
5d61b165 | 217 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
218 | return NULL; |
219 | ||
220 | /* Get "reg" or "assigned-addresses" property */ | |
221 | prop = of_get_property(dev, bus->addresses, &psize); | |
222 | if (prop == NULL) | |
223 | return NULL; | |
224 | psize /= 4; | |
225 | ||
226 | onesize = na + ns; | |
154063a9 GL |
227 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
228 | u32 val = be32_to_cpu(prop[0]); | |
229 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
230 | if (size) |
231 | *size = of_read_number(prop + na, ns); | |
232 | if (flags) | |
233 | *flags = bus->get_flags(prop); | |
234 | return prop; | |
235 | } | |
154063a9 | 236 | } |
dbbdee94 GL |
237 | return NULL; |
238 | } | |
239 | EXPORT_SYMBOL(of_get_pci_address); | |
240 | ||
241 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
242 | struct resource *r) | |
243 | { | |
0131d897 | 244 | const __be32 *addrp; |
dbbdee94 GL |
245 | u64 size; |
246 | unsigned int flags; | |
247 | ||
248 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
249 | if (addrp == NULL) | |
250 | return -EINVAL; | |
35f3da32 | 251 | return __of_address_to_resource(dev, addrp, size, flags, NULL, r); |
dbbdee94 GL |
252 | } |
253 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
29b635c0 | 254 | |
0b0b0893 LD |
255 | /* |
256 | * of_pci_range_to_resource - Create a resource from an of_pci_range | |
257 | * @range: the PCI range that describes the resource | |
258 | * @np: device node where the range belongs to | |
259 | * @res: pointer to a valid resource that will be updated to | |
260 | * reflect the values contained in the range. | |
261 | * | |
262 | * Returns EINVAL if the range cannot be converted to resource. | |
263 | * | |
264 | * Note that if the range is an IO range, the resource will be converted | |
265 | * using pci_address_to_pio() which can fail if it is called too early or | |
266 | * if the range cannot be matched to any host bridge IO space (our case here). | |
267 | * To guard against that we try to register the IO range first. | |
268 | * If that fails we know that pci_address_to_pio() will do too. | |
269 | */ | |
270 | int of_pci_range_to_resource(struct of_pci_range *range, | |
271 | struct device_node *np, struct resource *res) | |
83bbde1c | 272 | { |
0b0b0893 | 273 | int err; |
83bbde1c | 274 | res->flags = range->flags; |
83bbde1c LD |
275 | res->parent = res->child = res->sibling = NULL; |
276 | res->name = np->full_name; | |
0b0b0893 LD |
277 | |
278 | if (res->flags & IORESOURCE_IO) { | |
279 | unsigned long port; | |
fcfaab30 GP |
280 | err = pci_register_io_range(&np->fwnode, range->cpu_addr, |
281 | range->size); | |
0b0b0893 LD |
282 | if (err) |
283 | goto invalid_range; | |
284 | port = pci_address_to_pio(range->cpu_addr); | |
285 | if (port == (unsigned long)-1) { | |
286 | err = -EINVAL; | |
287 | goto invalid_range; | |
288 | } | |
289 | res->start = port; | |
290 | } else { | |
4af97106 PF |
291 | if ((sizeof(resource_size_t) < 8) && |
292 | upper_32_bits(range->cpu_addr)) { | |
293 | err = -EINVAL; | |
294 | goto invalid_range; | |
295 | } | |
296 | ||
0b0b0893 LD |
297 | res->start = range->cpu_addr; |
298 | } | |
299 | res->end = res->start + range->size - 1; | |
300 | return 0; | |
301 | ||
302 | invalid_range: | |
303 | res->start = (resource_size_t)OF_BAD_ADDR; | |
304 | res->end = (resource_size_t)OF_BAD_ADDR; | |
305 | return err; | |
83bbde1c | 306 | } |
bf6681ea | 307 | EXPORT_SYMBOL(of_pci_range_to_resource); |
dbbdee94 GL |
308 | #endif /* CONFIG_PCI */ |
309 | ||
310 | /* | |
311 | * ISA bus specific translator | |
312 | */ | |
313 | ||
314 | static int of_bus_isa_match(struct device_node *np) | |
315 | { | |
b3e46d1a | 316 | return of_node_name_eq(np, "isa"); |
dbbdee94 GL |
317 | } |
318 | ||
319 | static void of_bus_isa_count_cells(struct device_node *child, | |
320 | int *addrc, int *sizec) | |
321 | { | |
322 | if (addrc) | |
323 | *addrc = 2; | |
324 | if (sizec) | |
325 | *sizec = 1; | |
326 | } | |
327 | ||
47b1e689 | 328 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 329 | int pna) |
dbbdee94 GL |
330 | { |
331 | u64 cp, s, da; | |
332 | ||
333 | /* Check address type match */ | |
0131d897 | 334 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
335 | return OF_BAD_ADDR; |
336 | ||
337 | /* Read address values, skipping high cell */ | |
338 | cp = of_read_number(range + 1, na - 1); | |
339 | s = of_read_number(range + na + pna, ns); | |
340 | da = of_read_number(addr + 1, na - 1); | |
341 | ||
606ad42a | 342 | pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n", |
dbbdee94 GL |
343 | (unsigned long long)cp, (unsigned long long)s, |
344 | (unsigned long long)da); | |
345 | ||
346 | if (da < cp || da >= (cp + s)) | |
347 | return OF_BAD_ADDR; | |
348 | return da - cp; | |
349 | } | |
350 | ||
47b1e689 | 351 | static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
352 | { |
353 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
354 | } | |
355 | ||
0131d897 | 356 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
357 | { |
358 | unsigned int flags = 0; | |
0131d897 | 359 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
360 | |
361 | if (w & 1) | |
362 | flags |= IORESOURCE_IO; | |
363 | else | |
364 | flags |= IORESOURCE_MEM; | |
365 | return flags; | |
366 | } | |
367 | ||
368 | /* | |
369 | * Array of bus specific translators | |
370 | */ | |
371 | ||
372 | static struct of_bus of_busses[] = { | |
4670d610 | 373 | #ifdef CONFIG_PCI |
dbbdee94 GL |
374 | /* PCI */ |
375 | { | |
376 | .name = "pci", | |
377 | .addresses = "assigned-addresses", | |
378 | .match = of_bus_pci_match, | |
379 | .count_cells = of_bus_pci_count_cells, | |
380 | .map = of_bus_pci_map, | |
381 | .translate = of_bus_pci_translate, | |
2f96593e | 382 | .has_flags = true, |
dbbdee94 GL |
383 | .get_flags = of_bus_pci_get_flags, |
384 | }, | |
4670d610 | 385 | #endif /* CONFIG_PCI */ |
dbbdee94 GL |
386 | /* ISA */ |
387 | { | |
388 | .name = "isa", | |
389 | .addresses = "reg", | |
390 | .match = of_bus_isa_match, | |
391 | .count_cells = of_bus_isa_count_cells, | |
392 | .map = of_bus_isa_map, | |
393 | .translate = of_bus_isa_translate, | |
2f96593e | 394 | .has_flags = true, |
dbbdee94 GL |
395 | .get_flags = of_bus_isa_get_flags, |
396 | }, | |
397 | /* Default */ | |
398 | { | |
399 | .name = "default", | |
400 | .addresses = "reg", | |
401 | .match = NULL, | |
402 | .count_cells = of_bus_default_count_cells, | |
403 | .map = of_bus_default_map, | |
404 | .translate = of_bus_default_translate, | |
405 | .get_flags = of_bus_default_get_flags, | |
406 | }, | |
407 | }; | |
408 | ||
409 | static struct of_bus *of_match_bus(struct device_node *np) | |
410 | { | |
411 | int i; | |
412 | ||
413 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
414 | if (!of_busses[i].match || of_busses[i].match(np)) | |
415 | return &of_busses[i]; | |
416 | BUG(); | |
417 | return NULL; | |
418 | } | |
419 | ||
41d94893 | 420 | static int of_empty_ranges_quirk(struct device_node *np) |
746c9e9f BH |
421 | { |
422 | if (IS_ENABLED(CONFIG_PPC)) { | |
41d94893 | 423 | /* To save cycles, we cache the result for global "Mac" setting */ |
746c9e9f BH |
424 | static int quirk_state = -1; |
425 | ||
41d94893 BH |
426 | /* PA-SEMI sdc DT bug */ |
427 | if (of_device_is_compatible(np, "1682m-sdc")) | |
428 | return true; | |
429 | ||
430 | /* Make quirk cached */ | |
746c9e9f BH |
431 | if (quirk_state < 0) |
432 | quirk_state = | |
433 | of_machine_is_compatible("Power Macintosh") || | |
434 | of_machine_is_compatible("MacRISC"); | |
435 | return quirk_state; | |
436 | } | |
437 | return false; | |
438 | } | |
439 | ||
dbbdee94 | 440 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, |
47b1e689 | 441 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
442 | int na, int ns, int pna, const char *rprop) |
443 | { | |
0131d897 | 444 | const __be32 *ranges; |
dbbdee94 GL |
445 | unsigned int rlen; |
446 | int rone; | |
447 | u64 offset = OF_BAD_ADDR; | |
448 | ||
ba85edbe MY |
449 | /* |
450 | * Normally, an absence of a "ranges" property means we are | |
dbbdee94 | 451 | * crossing a non-translatable boundary, and thus the addresses |
ba85edbe | 452 | * below the current cannot be converted to CPU physical ones. |
dbbdee94 GL |
453 | * Unfortunately, while this is very clear in the spec, it's not |
454 | * what Apple understood, and they do have things like /uni-n or | |
455 | * /ht nodes with no "ranges" property and a lot of perfectly | |
456 | * useable mapped devices below them. Thus we treat the absence of | |
457 | * "ranges" as equivalent to an empty "ranges" property which means | |
458 | * a 1:1 translation at that level. It's up to the caller not to try | |
459 | * to translate addresses that aren't supposed to be translated in | |
460 | * the first place. --BenH. | |
3930f294 GL |
461 | * |
462 | * As far as we know, this damage only exists on Apple machines, so | |
463 | * This code is only enabled on powerpc. --gcl | |
81db12ee RH |
464 | * |
465 | * This quirk also applies for 'dma-ranges' which frequently exist in | |
466 | * child nodes without 'dma-ranges' in the parent nodes. --RobH | |
dbbdee94 GL |
467 | */ |
468 | ranges = of_get_property(parent, rprop, &rlen); | |
81db12ee RH |
469 | if (ranges == NULL && !of_empty_ranges_quirk(parent) && |
470 | strcmp(rprop, "dma-ranges")) { | |
606ad42a | 471 | pr_debug("no ranges; cannot translate\n"); |
3930f294 GL |
472 | return 1; |
473 | } | |
dbbdee94 GL |
474 | if (ranges == NULL || rlen == 0) { |
475 | offset = of_read_number(addr, na); | |
476 | memset(addr, 0, pna * 4); | |
606ad42a | 477 | pr_debug("empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
478 | goto finish; |
479 | } | |
480 | ||
606ad42a | 481 | pr_debug("walking ranges...\n"); |
dbbdee94 GL |
482 | |
483 | /* Now walk through the ranges */ | |
484 | rlen /= 4; | |
485 | rone = na + pna + ns; | |
486 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
487 | offset = bus->map(addr, ranges, na, ns, pna); | |
488 | if (offset != OF_BAD_ADDR) | |
489 | break; | |
490 | } | |
491 | if (offset == OF_BAD_ADDR) { | |
606ad42a | 492 | pr_debug("not found !\n"); |
dbbdee94 GL |
493 | return 1; |
494 | } | |
495 | memcpy(addr, ranges + na, 4 * pna); | |
496 | ||
497 | finish: | |
606ad42a RH |
498 | of_dump_addr("parent translation for:", addr, pna); |
499 | pr_debug("with offset: %llx\n", (unsigned long long)offset); | |
dbbdee94 GL |
500 | |
501 | /* Translate it into parent bus space */ | |
502 | return pbus->translate(addr, offset, pna); | |
503 | } | |
504 | ||
505 | /* | |
506 | * Translate an address from the device-tree into a CPU physical address, | |
507 | * this walks up the tree and applies the various bus mappings on the | |
508 | * way. | |
509 | * | |
510 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
511 | * that translation is impossible (that is we are not dealing with a value | |
512 | * that can be mapped to a cpu physical address). This is not really specified | |
513 | * that way, but this is traditionally the way IBM at least do things | |
65af618d ZY |
514 | * |
515 | * Whenever the translation fails, the *host pointer will be set to the | |
516 | * device that had registered logical PIO mapping, and the return code is | |
517 | * relative to that node. | |
dbbdee94 | 518 | */ |
47b1e689 | 519 | static u64 __of_translate_address(struct device_node *dev, |
95835a8d | 520 | struct device_node *(*get_parent)(const struct device_node *), |
65af618d ZY |
521 | const __be32 *in_addr, const char *rprop, |
522 | struct device_node **host) | |
dbbdee94 GL |
523 | { |
524 | struct device_node *parent = NULL; | |
525 | struct of_bus *bus, *pbus; | |
47b1e689 | 526 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
527 | int na, ns, pna, pns; |
528 | u64 result = OF_BAD_ADDR; | |
529 | ||
0d638a07 | 530 | pr_debug("** translation for device %pOF **\n", dev); |
dbbdee94 GL |
531 | |
532 | /* Increase refcount at current level */ | |
533 | of_node_get(dev); | |
534 | ||
65af618d | 535 | *host = NULL; |
dbbdee94 | 536 | /* Get parent & match bus type */ |
95835a8d | 537 | parent = get_parent(dev); |
dbbdee94 GL |
538 | if (parent == NULL) |
539 | goto bail; | |
540 | bus = of_match_bus(parent); | |
541 | ||
59f5ca48 | 542 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
543 | bus->count_cells(dev, &na, &ns); |
544 | if (!OF_CHECK_COUNTS(na, ns)) { | |
0d638a07 | 545 | pr_debug("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
546 | goto bail; |
547 | } | |
548 | memcpy(addr, in_addr, na * 4); | |
549 | ||
0d638a07 RH |
550 | pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n", |
551 | bus->name, na, ns, parent); | |
606ad42a | 552 | of_dump_addr("translating address:", addr, na); |
dbbdee94 GL |
553 | |
554 | /* Translate */ | |
555 | for (;;) { | |
65af618d ZY |
556 | struct logic_pio_hwaddr *iorange; |
557 | ||
dbbdee94 GL |
558 | /* Switch to parent bus */ |
559 | of_node_put(dev); | |
560 | dev = parent; | |
95835a8d | 561 | parent = get_parent(dev); |
dbbdee94 GL |
562 | |
563 | /* If root, we have finished */ | |
564 | if (parent == NULL) { | |
606ad42a | 565 | pr_debug("reached root node\n"); |
dbbdee94 GL |
566 | result = of_read_number(addr, na); |
567 | break; | |
568 | } | |
569 | ||
65af618d ZY |
570 | /* |
571 | * For indirectIO device which has no ranges property, get | |
572 | * the address from reg directly. | |
573 | */ | |
574 | iorange = find_io_range_by_fwnode(&dev->fwnode); | |
575 | if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) { | |
576 | result = of_read_number(addr + 1, na - 1); | |
577 | pr_debug("indirectIO matched(%pOF) 0x%llx\n", | |
578 | dev, result); | |
579 | *host = of_node_get(dev); | |
580 | break; | |
581 | } | |
582 | ||
dbbdee94 GL |
583 | /* Get new parent bus and counts */ |
584 | pbus = of_match_bus(parent); | |
585 | pbus->count_cells(dev, &pna, &pns); | |
586 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
0d638a07 | 587 | pr_err("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
588 | break; |
589 | } | |
590 | ||
0d638a07 RH |
591 | pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n", |
592 | pbus->name, pna, pns, parent); | |
dbbdee94 GL |
593 | |
594 | /* Apply bus translation */ | |
595 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
596 | break; | |
597 | ||
598 | /* Complete the move up one level */ | |
599 | na = pna; | |
600 | ns = pns; | |
601 | bus = pbus; | |
602 | ||
606ad42a | 603 | of_dump_addr("one level translation:", addr, na); |
dbbdee94 GL |
604 | } |
605 | bail: | |
606 | of_node_put(parent); | |
607 | of_node_put(dev); | |
608 | ||
609 | return result; | |
610 | } | |
611 | ||
0131d897 | 612 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 613 | { |
65af618d ZY |
614 | struct device_node *host; |
615 | u64 ret; | |
616 | ||
95835a8d MR |
617 | ret = __of_translate_address(dev, of_get_parent, |
618 | in_addr, "ranges", &host); | |
65af618d ZY |
619 | if (host) { |
620 | of_node_put(host); | |
621 | return OF_BAD_ADDR; | |
622 | } | |
623 | ||
624 | return ret; | |
dbbdee94 GL |
625 | } |
626 | EXPORT_SYMBOL(of_translate_address); | |
627 | ||
f83a6e5d MR |
628 | static struct device_node *__of_get_dma_parent(const struct device_node *np) |
629 | { | |
630 | struct of_phandle_args args; | |
631 | int ret, index; | |
632 | ||
633 | index = of_property_match_string(np, "interconnect-names", "dma-mem"); | |
634 | if (index < 0) | |
635 | return of_get_parent(np); | |
636 | ||
637 | ret = of_parse_phandle_with_args(np, "interconnects", | |
638 | "#interconnect-cells", | |
639 | index, &args); | |
640 | if (ret < 0) | |
641 | return of_get_parent(np); | |
642 | ||
643 | return of_node_get(args.np); | |
644 | } | |
645 | ||
862ab557 RM |
646 | static struct device_node *of_get_next_dma_parent(struct device_node *np) |
647 | { | |
648 | struct device_node *parent; | |
649 | ||
650 | parent = __of_get_dma_parent(np); | |
651 | of_node_put(np); | |
652 | ||
653 | return parent; | |
654 | } | |
655 | ||
0131d897 | 656 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 657 | { |
65af618d ZY |
658 | struct device_node *host; |
659 | u64 ret; | |
660 | ||
f83a6e5d | 661 | ret = __of_translate_address(dev, __of_get_dma_parent, |
95835a8d | 662 | in_addr, "dma-ranges", &host); |
65af618d ZY |
663 | |
664 | if (host) { | |
665 | of_node_put(host); | |
666 | return OF_BAD_ADDR; | |
667 | } | |
668 | ||
669 | return ret; | |
dbbdee94 GL |
670 | } |
671 | EXPORT_SYMBOL(of_translate_dma_address); | |
672 | ||
0131d897 | 673 | const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, |
dbbdee94 GL |
674 | unsigned int *flags) |
675 | { | |
0131d897 | 676 | const __be32 *prop; |
dbbdee94 GL |
677 | unsigned int psize; |
678 | struct device_node *parent; | |
679 | struct of_bus *bus; | |
680 | int onesize, i, na, ns; | |
681 | ||
682 | /* Get parent & match bus type */ | |
683 | parent = of_get_parent(dev); | |
684 | if (parent == NULL) | |
685 | return NULL; | |
686 | bus = of_match_bus(parent); | |
687 | bus->count_cells(dev, &na, &ns); | |
688 | of_node_put(parent); | |
5d61b165 | 689 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
690 | return NULL; |
691 | ||
692 | /* Get "reg" or "assigned-addresses" property */ | |
693 | prop = of_get_property(dev, bus->addresses, &psize); | |
694 | if (prop == NULL) | |
695 | return NULL; | |
696 | psize /= 4; | |
697 | ||
698 | onesize = na + ns; | |
699 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
700 | if (i == index) { | |
701 | if (size) | |
702 | *size = of_read_number(prop + na, ns); | |
703 | if (flags) | |
704 | *flags = bus->get_flags(prop); | |
705 | return prop; | |
706 | } | |
707 | return NULL; | |
708 | } | |
709 | EXPORT_SYMBOL(of_get_address); | |
710 | ||
67ccd2b9 RH |
711 | static int parser_init(struct of_pci_range_parser *parser, |
712 | struct device_node *node, const char *name) | |
713 | { | |
67ccd2b9 RH |
714 | int rlen; |
715 | ||
716 | parser->node = node; | |
717 | parser->pna = of_n_addr_cells(node); | |
bc5e522e RH |
718 | parser->na = of_bus_n_addr_cells(node); |
719 | parser->ns = of_bus_n_size_cells(node); | |
67ccd2b9 | 720 | parser->dma = !strcmp(name, "dma-ranges"); |
2f96593e | 721 | parser->bus = of_match_bus(node); |
67ccd2b9 RH |
722 | |
723 | parser->range = of_get_property(node, name, &rlen); | |
724 | if (parser->range == NULL) | |
725 | return -ENOENT; | |
726 | ||
727 | parser->end = parser->range + rlen / sizeof(__be32); | |
728 | ||
729 | return 0; | |
730 | } | |
731 | ||
732 | int of_pci_range_parser_init(struct of_pci_range_parser *parser, | |
733 | struct device_node *node) | |
734 | { | |
735 | return parser_init(parser, node, "ranges"); | |
736 | } | |
737 | EXPORT_SYMBOL_GPL(of_pci_range_parser_init); | |
738 | ||
739 | int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, | |
740 | struct device_node *node) | |
741 | { | |
742 | return parser_init(parser, node, "dma-ranges"); | |
743 | } | |
744 | EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init); | |
bc5e522e | 745 | #define of_dma_range_parser_init of_pci_dma_range_parser_init |
67ccd2b9 RH |
746 | |
747 | struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, | |
748 | struct of_pci_range *range) | |
749 | { | |
bc5e522e RH |
750 | int na = parser->na; |
751 | int ns = parser->ns; | |
752 | int np = parser->pna + na + ns; | |
2f96593e | 753 | int busflag_na = 0; |
67ccd2b9 RH |
754 | |
755 | if (!range) | |
756 | return NULL; | |
757 | ||
bc5e522e | 758 | if (!parser->range || parser->range + np > parser->end) |
67ccd2b9 RH |
759 | return NULL; |
760 | ||
2f96593e JY |
761 | range->flags = parser->bus->get_flags(parser->range); |
762 | ||
763 | /* A extra cell for resource flags */ | |
764 | if (parser->bus->has_flags) | |
765 | busflag_na = 1; | |
bc5e522e | 766 | |
2f96593e | 767 | range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); |
bc5e522e | 768 | |
67ccd2b9 RH |
769 | if (parser->dma) |
770 | range->cpu_addr = of_translate_dma_address(parser->node, | |
771 | parser->range + na); | |
772 | else | |
773 | range->cpu_addr = of_translate_address(parser->node, | |
774 | parser->range + na); | |
775 | range->size = of_read_number(parser->range + parser->pna + na, ns); | |
776 | ||
bc5e522e | 777 | parser->range += np; |
67ccd2b9 RH |
778 | |
779 | /* Now consume following elements while they are contiguous */ | |
bc5e522e RH |
780 | while (parser->range + np <= parser->end) { |
781 | u32 flags = 0; | |
2f96593e | 782 | u64 bus_addr, cpu_addr, size; |
67ccd2b9 | 783 | |
2f96593e JY |
784 | flags = parser->bus->get_flags(parser->range); |
785 | bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); | |
67ccd2b9 RH |
786 | if (parser->dma) |
787 | cpu_addr = of_translate_dma_address(parser->node, | |
788 | parser->range + na); | |
789 | else | |
790 | cpu_addr = of_translate_address(parser->node, | |
791 | parser->range + na); | |
792 | size = of_read_number(parser->range + parser->pna + na, ns); | |
793 | ||
794 | if (flags != range->flags) | |
795 | break; | |
2f96593e | 796 | if (bus_addr != range->bus_addr + range->size || |
67ccd2b9 RH |
797 | cpu_addr != range->cpu_addr + range->size) |
798 | break; | |
799 | ||
800 | range->size += size; | |
bc5e522e | 801 | parser->range += np; |
67ccd2b9 RH |
802 | } |
803 | ||
804 | return range; | |
805 | } | |
806 | EXPORT_SYMBOL_GPL(of_pci_range_parser_one); | |
807 | ||
65af618d ZY |
808 | static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr, |
809 | u64 size) | |
810 | { | |
811 | u64 taddr; | |
812 | unsigned long port; | |
813 | struct device_node *host; | |
814 | ||
95835a8d MR |
815 | taddr = __of_translate_address(dev, of_get_parent, |
816 | in_addr, "ranges", &host); | |
65af618d ZY |
817 | if (host) { |
818 | /* host-specific port access */ | |
819 | port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size); | |
820 | of_node_put(host); | |
821 | } else { | |
822 | /* memory-mapped I/O range */ | |
823 | port = pci_address_to_pio(taddr); | |
824 | } | |
825 | ||
826 | if (port == (unsigned long)-1) | |
827 | return OF_BAD_ADDR; | |
828 | ||
829 | return port; | |
830 | } | |
831 | ||
0131d897 SAS |
832 | static int __of_address_to_resource(struct device_node *dev, |
833 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 834 | const char *name, struct resource *r) |
1f5bef30 GL |
835 | { |
836 | u64 taddr; | |
837 | ||
65af618d ZY |
838 | if (flags & IORESOURCE_MEM) |
839 | taddr = of_translate_address(dev, addrp); | |
840 | else if (flags & IORESOURCE_IO) | |
841 | taddr = of_translate_ioport(dev, addrp, size); | |
842 | else | |
1f5bef30 | 843 | return -EINVAL; |
65af618d | 844 | |
1f5bef30 GL |
845 | if (taddr == OF_BAD_ADDR) |
846 | return -EINVAL; | |
847 | memset(r, 0, sizeof(struct resource)); | |
65af618d ZY |
848 | |
849 | r->start = taddr; | |
850 | r->end = taddr + size - 1; | |
1f5bef30 | 851 | r->flags = flags; |
35f3da32 BC |
852 | r->name = name ? name : dev->full_name; |
853 | ||
1f5bef30 GL |
854 | return 0; |
855 | } | |
856 | ||
857 | /** | |
858 | * of_address_to_resource - Translate device tree address and return as resource | |
859 | * | |
860 | * Note that if your address is a PIO address, the conversion will fail if | |
861 | * the physical address can't be internally converted to an IO token with | |
7602f422 | 862 | * pci_address_to_pio(), that is because it's either called too early or it |
1f5bef30 GL |
863 | * can't be matched to any host bridge IO space |
864 | */ | |
865 | int of_address_to_resource(struct device_node *dev, int index, | |
866 | struct resource *r) | |
867 | { | |
0131d897 | 868 | const __be32 *addrp; |
1f5bef30 GL |
869 | u64 size; |
870 | unsigned int flags; | |
35f3da32 | 871 | const char *name = NULL; |
1f5bef30 GL |
872 | |
873 | addrp = of_get_address(dev, index, &size, &flags); | |
874 | if (addrp == NULL) | |
875 | return -EINVAL; | |
35f3da32 BC |
876 | |
877 | /* Get optional "reg-names" property to add a name to a resource */ | |
878 | of_property_read_string_index(dev, "reg-names", index, &name); | |
879 | ||
880 | return __of_address_to_resource(dev, addrp, size, flags, name, r); | |
1f5bef30 GL |
881 | } |
882 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
883 | ||
6b884a8d GL |
884 | /** |
885 | * of_iomap - Maps the memory mapped IO for a given device_node | |
1094d5db | 886 | * @np: the device whose io range will be mapped |
6b884a8d GL |
887 | * @index: index of the io range |
888 | * | |
889 | * Returns a pointer to the mapped memory | |
890 | */ | |
891 | void __iomem *of_iomap(struct device_node *np, int index) | |
892 | { | |
893 | struct resource res; | |
894 | ||
895 | if (of_address_to_resource(np, index, &res)) | |
896 | return NULL; | |
897 | ||
28c1b6d6 | 898 | return ioremap(res.start, resource_size(&res)); |
6b884a8d GL |
899 | } |
900 | EXPORT_SYMBOL(of_iomap); | |
18308c94 | 901 | |
efd342fb MB |
902 | /* |
903 | * of_io_request_and_map - Requests a resource and maps the memory mapped IO | |
904 | * for a given device_node | |
905 | * @device: the device whose io range will be mapped | |
906 | * @index: index of the io range | |
b01dcdd8 | 907 | * @name: name "override" for the memory region request or NULL |
efd342fb MB |
908 | * |
909 | * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded | |
910 | * error code on failure. Usage example: | |
911 | * | |
912 | * base = of_io_request_and_map(node, 0, "foo"); | |
913 | * if (IS_ERR(base)) | |
914 | * return PTR_ERR(base); | |
915 | */ | |
916 | void __iomem *of_io_request_and_map(struct device_node *np, int index, | |
b01dcdd8 | 917 | const char *name) |
efd342fb MB |
918 | { |
919 | struct resource res; | |
920 | void __iomem *mem; | |
921 | ||
922 | if (of_address_to_resource(np, index, &res)) | |
923 | return IOMEM_ERR_PTR(-EINVAL); | |
924 | ||
b01dcdd8 BH |
925 | if (!name) |
926 | name = res.name; | |
efd342fb MB |
927 | if (!request_mem_region(res.start, resource_size(&res), name)) |
928 | return IOMEM_ERR_PTR(-EBUSY); | |
929 | ||
930 | mem = ioremap(res.start, resource_size(&res)); | |
931 | if (!mem) { | |
932 | release_mem_region(res.start, resource_size(&res)); | |
933 | return IOMEM_ERR_PTR(-ENOMEM); | |
934 | } | |
935 | ||
936 | return mem; | |
937 | } | |
938 | EXPORT_SYMBOL(of_io_request_and_map); | |
939 | ||
18308c94 GS |
940 | /** |
941 | * of_dma_get_range - Get DMA range info | |
942 | * @np: device node to get DMA range info | |
943 | * @dma_addr: pointer to store initial DMA address of DMA range | |
944 | * @paddr: pointer to store initial CPU address of DMA range | |
945 | * @size: pointer to store size of DMA range | |
946 | * | |
947 | * Look in bottom up direction for the first "dma-ranges" property | |
948 | * and parse it. | |
949 | * dma-ranges format: | |
950 | * DMA addr (dma_addr) : naddr cells | |
951 | * CPU addr (phys_addr_t) : pna cells | |
952 | * size : nsize cells | |
953 | * | |
954 | * It returns -ENODEV if "dma-ranges" property was not found | |
955 | * for this device in DT. | |
956 | */ | |
957 | int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size) | |
958 | { | |
959 | struct device_node *node = of_node_get(np); | |
960 | const __be32 *ranges = NULL; | |
7a8b64d1 | 961 | int len; |
18308c94 | 962 | int ret = 0; |
951d4885 | 963 | bool found_dma_ranges = false; |
7a8b64d1 RH |
964 | struct of_range_parser parser; |
965 | struct of_range range; | |
9d55bebd | 966 | u64 dma_start = U64_MAX, dma_end = 0, dma_offset = 0; |
18308c94 | 967 | |
951d4885 | 968 | while (node) { |
18308c94 GS |
969 | ranges = of_get_property(node, "dma-ranges", &len); |
970 | ||
971 | /* Ignore empty ranges, they imply no translation required */ | |
972 | if (ranges && len > 0) | |
973 | break; | |
974 | ||
951d4885 RM |
975 | /* Once we find 'dma-ranges', then a missing one is an error */ |
976 | if (found_dma_ranges && !ranges) { | |
977 | ret = -ENODEV; | |
978 | goto out; | |
979 | } | |
980 | found_dma_ranges = true; | |
981 | ||
982 | node = of_get_next_dma_parent(node); | |
18308c94 GS |
983 | } |
984 | ||
951d4885 | 985 | if (!node || !ranges) { |
0d638a07 | 986 | pr_debug("no dma-ranges found for node(%pOF)\n", np); |
18308c94 GS |
987 | ret = -ENODEV; |
988 | goto out; | |
989 | } | |
990 | ||
7a8b64d1 RH |
991 | of_dma_range_parser_init(&parser, node); |
992 | ||
993 | for_each_of_range(&parser, &range) { | |
994 | pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", | |
995 | range.bus_addr, range.cpu_addr, range.size); | |
996 | ||
9d55bebd RH |
997 | if (dma_offset && range.cpu_addr - range.bus_addr != dma_offset) { |
998 | pr_warn("Can't handle multiple dma-ranges with different offsets on node(%pOF)\n", node); | |
999 | /* Don't error out as we'd break some existing DTs */ | |
1000 | continue; | |
1001 | } | |
f49c7faf CIK |
1002 | if (range.cpu_addr == OF_BAD_ADDR) { |
1003 | pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n", | |
1004 | range.bus_addr, node); | |
1005 | continue; | |
1006 | } | |
9d55bebd RH |
1007 | dma_offset = range.cpu_addr - range.bus_addr; |
1008 | ||
1009 | /* Take lower and upper limits */ | |
1010 | if (range.bus_addr < dma_start) | |
1011 | dma_start = range.bus_addr; | |
1012 | if (range.bus_addr + range.size > dma_end) | |
1013 | dma_end = range.bus_addr + range.size; | |
1014 | } | |
18308c94 | 1015 | |
9d55bebd RH |
1016 | if (dma_start >= dma_end) { |
1017 | ret = -EINVAL; | |
1018 | pr_debug("Invalid DMA ranges configuration on node(%pOF)\n", | |
1019 | node); | |
18308c94 GS |
1020 | goto out; |
1021 | } | |
18308c94 | 1022 | |
9d55bebd RH |
1023 | *dma_addr = dma_start; |
1024 | *size = dma_end - dma_start; | |
1025 | *paddr = dma_start + dma_offset; | |
1026 | ||
1027 | pr_debug("final: dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", | |
1028 | *dma_addr, *paddr, *size); | |
18308c94 GS |
1029 | |
1030 | out: | |
1031 | of_node_put(node); | |
1032 | ||
1033 | return ret; | |
1034 | } | |
92ea637e SS |
1035 | |
1036 | /** | |
1037 | * of_dma_is_coherent - Check if device is coherent | |
1038 | * @np: device node | |
1039 | * | |
1040 | * It returns true if "dma-coherent" property was found | |
dabf6b36 ME |
1041 | * for this device in the DT, or if DMA is coherent by |
1042 | * default for OF devices on the current platform. | |
92ea637e SS |
1043 | */ |
1044 | bool of_dma_is_coherent(struct device_node *np) | |
1045 | { | |
1046 | struct device_node *node = of_node_get(np); | |
1047 | ||
dabf6b36 ME |
1048 | if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT)) |
1049 | return true; | |
1050 | ||
92ea637e SS |
1051 | while (node) { |
1052 | if (of_property_read_bool(node, "dma-coherent")) { | |
1053 | of_node_put(node); | |
1054 | return true; | |
1055 | } | |
c60bf3eb | 1056 | node = of_get_next_dma_parent(node); |
92ea637e SS |
1057 | } |
1058 | of_node_put(node); | |
1059 | return false; | |
1060 | } | |
eb3d3ec5 | 1061 | EXPORT_SYMBOL_GPL(of_dma_is_coherent); |