Commit | Line | Data |
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af6074fc | 1 | // SPDX-License-Identifier: GPL-2.0 |
606ad42a RH |
2 | #define pr_fmt(fmt) "OF: " fmt |
3 | ||
5019f0b1 | 4 | #include <linux/device.h> |
fcfaab30 | 5 | #include <linux/fwnode.h> |
6b884a8d GL |
6 | #include <linux/io.h> |
7 | #include <linux/ioport.h> | |
65af618d | 8 | #include <linux/logic_pio.h> |
dbbdee94 | 9 | #include <linux/module.h> |
6b884a8d | 10 | #include <linux/of_address.h> |
c5076cfe | 11 | #include <linux/pci.h> |
dbbdee94 | 12 | #include <linux/pci_regs.h> |
41f8bba7 LD |
13 | #include <linux/sizes.h> |
14 | #include <linux/slab.h> | |
dbbdee94 | 15 | #include <linux/string.h> |
e0d07278 | 16 | #include <linux/dma-direct.h> /* for bus_dma_region */ |
6b884a8d | 17 | |
b68ac8dc RM |
18 | #include "of_private.h" |
19 | ||
dbbdee94 GL |
20 | /* Max address size we deal with */ |
21 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
22 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
23 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 | 24 | |
dbbdee94 GL |
25 | /* Debug utility */ |
26 | #ifdef DEBUG | |
0131d897 | 27 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 | 28 | { |
606ad42a | 29 | pr_debug("%s", s); |
dbbdee94 | 30 | while (na--) |
606ad42a RH |
31 | pr_cont(" %08x", be32_to_cpu(*(addr++))); |
32 | pr_cont("\n"); | |
dbbdee94 GL |
33 | } |
34 | #else | |
0131d897 | 35 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
36 | #endif |
37 | ||
38 | /* Callbacks for bus specific translators */ | |
39 | struct of_bus { | |
40 | const char *name; | |
41 | const char *addresses; | |
42 | int (*match)(struct device_node *parent); | |
43 | void (*count_cells)(struct device_node *child, | |
44 | int *addrc, int *sizec); | |
47b1e689 | 45 | u64 (*map)(__be32 *addr, const __be32 *range, |
73ae3088 | 46 | int na, int ns, int pna, int fna); |
47b1e689 | 47 | int (*translate)(__be32 *addr, u64 offset, int na); |
88696db0 | 48 | int flag_cells; |
0131d897 | 49 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
50 | }; |
51 | ||
52 | /* | |
53 | * Default translator (generic bus) | |
54 | */ | |
55 | ||
56 | static void of_bus_default_count_cells(struct device_node *dev, | |
57 | int *addrc, int *sizec) | |
58 | { | |
59 | if (addrc) | |
60 | *addrc = of_n_addr_cells(dev); | |
61 | if (sizec) | |
62 | *sizec = of_n_size_cells(dev); | |
63 | } | |
64 | ||
47b1e689 | 65 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
73ae3088 | 66 | int na, int ns, int pna, int fna) |
dbbdee94 GL |
67 | { |
68 | u64 cp, s, da; | |
69 | ||
73ae3088 | 70 | cp = of_read_number(range + fna, na - fna); |
dbbdee94 | 71 | s = of_read_number(range + na + pna, ns); |
73ae3088 | 72 | da = of_read_number(addr + fna, na - fna); |
dbbdee94 | 73 | |
0e407a9a | 74 | pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); |
dbbdee94 GL |
75 | |
76 | if (da < cp || da >= (cp + s)) | |
77 | return OF_BAD_ADDR; | |
78 | return da - cp; | |
79 | } | |
80 | ||
47b1e689 | 81 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
82 | { |
83 | u64 a = of_read_number(addr, na); | |
84 | memset(addr, 0, na * 4); | |
85 | a += offset; | |
86 | if (na > 1) | |
154063a9 GL |
87 | addr[na - 2] = cpu_to_be32(a >> 32); |
88 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
89 | |
90 | return 0; | |
91 | } | |
92 | ||
3d5089c4 RH |
93 | static unsigned int of_bus_default_flags_get_flags(const __be32 *addr) |
94 | { | |
95 | return of_read_number(addr, 1); | |
96 | } | |
97 | ||
0131d897 | 98 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
99 | { |
100 | return IORESOURCE_MEM; | |
101 | } | |
102 | ||
42604f8e | 103 | static u64 of_bus_default_flags_map(__be32 *addr, const __be32 *range, int na, |
73ae3088 | 104 | int ns, int pna, int fna) |
42604f8e | 105 | { |
42604f8e HC |
106 | /* Check that flags match */ |
107 | if (*addr != *range) | |
108 | return OF_BAD_ADDR; | |
109 | ||
73ae3088 | 110 | return of_bus_default_map(addr, range, na, ns, pna, fna); |
42604f8e HC |
111 | } |
112 | ||
113 | static int of_bus_default_flags_translate(__be32 *addr, u64 offset, int na) | |
114 | { | |
115 | /* Keep "flags" part (high cell) in translated address */ | |
116 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
117 | } | |
3d5089c4 | 118 | |
0fc0ead3 | 119 | #ifdef CONFIG_PCI |
67ccd2b9 RH |
120 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
121 | { | |
122 | unsigned int flags = 0; | |
123 | u32 w = be32_to_cpup(addr); | |
124 | ||
125 | if (!IS_ENABLED(CONFIG_PCI)) | |
126 | return 0; | |
127 | ||
128 | switch((w >> 24) & 0x03) { | |
129 | case 0x01: | |
130 | flags |= IORESOURCE_IO; | |
131 | break; | |
132 | case 0x02: /* 32 bits */ | |
67ccd2b9 RH |
133 | flags |= IORESOURCE_MEM; |
134 | break; | |
9d57e61b LB |
135 | |
136 | case 0x03: /* 64 bits */ | |
137 | flags |= IORESOURCE_MEM | IORESOURCE_MEM_64; | |
138 | break; | |
67ccd2b9 RH |
139 | } |
140 | if (w & 0x40000000) | |
141 | flags |= IORESOURCE_PREFETCH; | |
142 | return flags; | |
143 | } | |
144 | ||
dbbdee94 GL |
145 | /* |
146 | * PCI bus specific translator | |
147 | */ | |
148 | ||
d1ac0002 MZ |
149 | static bool of_node_is_pcie(struct device_node *np) |
150 | { | |
151 | bool is_pcie = of_node_name_eq(np, "pcie"); | |
152 | ||
153 | if (is_pcie) | |
154 | pr_warn_once("%pOF: Missing device_type\n", np); | |
155 | ||
156 | return is_pcie; | |
157 | } | |
158 | ||
dbbdee94 GL |
159 | static int of_bus_pci_match(struct device_node *np) |
160 | { | |
6dd18e46 | 161 | /* |
14e2abb7 | 162 | * "pciex" is PCI Express |
6dd18e46 BH |
163 | * "vci" is for the /chaos bridge on 1st-gen PCI powermacs |
164 | * "ht" is hypertransport | |
d1ac0002 MZ |
165 | * |
166 | * If none of the device_type match, and that the node name is | |
167 | * "pcie", accept the device as PCI (with a warning). | |
6dd18e46 | 168 | */ |
e8b1dee2 | 169 | return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || |
d1ac0002 MZ |
170 | of_node_is_type(np, "vci") || of_node_is_type(np, "ht") || |
171 | of_node_is_pcie(np); | |
dbbdee94 GL |
172 | } |
173 | ||
174 | static void of_bus_pci_count_cells(struct device_node *np, | |
175 | int *addrc, int *sizec) | |
176 | { | |
177 | if (addrc) | |
178 | *addrc = 3; | |
179 | if (sizec) | |
180 | *sizec = 2; | |
181 | } | |
182 | ||
47b1e689 | 183 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
73ae3088 | 184 | int pna, int fna) |
dbbdee94 | 185 | { |
dbbdee94 GL |
186 | unsigned int af, rf; |
187 | ||
188 | af = of_bus_pci_get_flags(addr); | |
189 | rf = of_bus_pci_get_flags(range); | |
190 | ||
191 | /* Check address type match */ | |
192 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
193 | return OF_BAD_ADDR; | |
194 | ||
73ae3088 | 195 | return of_bus_default_map(addr, range, na, ns, pna, fna); |
dbbdee94 GL |
196 | } |
197 | ||
c3c0dc75 | 198 | #endif /* CONFIG_PCI */ |
dbbdee94 | 199 | |
0b0b0893 LD |
200 | /* |
201 | * of_pci_range_to_resource - Create a resource from an of_pci_range | |
202 | * @range: the PCI range that describes the resource | |
203 | * @np: device node where the range belongs to | |
204 | * @res: pointer to a valid resource that will be updated to | |
205 | * reflect the values contained in the range. | |
206 | * | |
65b6b046 | 207 | * Returns -EINVAL if the range cannot be converted to resource. |
0b0b0893 LD |
208 | * |
209 | * Note that if the range is an IO range, the resource will be converted | |
210 | * using pci_address_to_pio() which can fail if it is called too early or | |
211 | * if the range cannot be matched to any host bridge IO space (our case here). | |
212 | * To guard against that we try to register the IO range first. | |
213 | * If that fails we know that pci_address_to_pio() will do too. | |
214 | */ | |
215 | int of_pci_range_to_resource(struct of_pci_range *range, | |
216 | struct device_node *np, struct resource *res) | |
83bbde1c | 217 | { |
0b0b0893 | 218 | int err; |
83bbde1c | 219 | res->flags = range->flags; |
83bbde1c LD |
220 | res->parent = res->child = res->sibling = NULL; |
221 | res->name = np->full_name; | |
0b0b0893 LD |
222 | |
223 | if (res->flags & IORESOURCE_IO) { | |
224 | unsigned long port; | |
fcfaab30 GP |
225 | err = pci_register_io_range(&np->fwnode, range->cpu_addr, |
226 | range->size); | |
0b0b0893 LD |
227 | if (err) |
228 | goto invalid_range; | |
229 | port = pci_address_to_pio(range->cpu_addr); | |
230 | if (port == (unsigned long)-1) { | |
231 | err = -EINVAL; | |
232 | goto invalid_range; | |
233 | } | |
234 | res->start = port; | |
235 | } else { | |
4af97106 PF |
236 | if ((sizeof(resource_size_t) < 8) && |
237 | upper_32_bits(range->cpu_addr)) { | |
238 | err = -EINVAL; | |
239 | goto invalid_range; | |
240 | } | |
241 | ||
0b0b0893 LD |
242 | res->start = range->cpu_addr; |
243 | } | |
244 | res->end = res->start + range->size - 1; | |
245 | return 0; | |
246 | ||
247 | invalid_range: | |
248 | res->start = (resource_size_t)OF_BAD_ADDR; | |
249 | res->end = (resource_size_t)OF_BAD_ADDR; | |
250 | return err; | |
83bbde1c | 251 | } |
bf6681ea | 252 | EXPORT_SYMBOL(of_pci_range_to_resource); |
dbbdee94 | 253 | |
c75a7949 RH |
254 | /* |
255 | * of_range_to_resource - Create a resource from a ranges entry | |
256 | * @np: device node where the range belongs to | |
257 | * @index: the 'ranges' index to convert to a resource | |
258 | * @res: pointer to a valid resource that will be updated to | |
259 | * reflect the values contained in the range. | |
260 | * | |
261 | * Returns ENOENT if the entry is not found or EINVAL if the range cannot be | |
262 | * converted to resource. | |
263 | */ | |
264 | int of_range_to_resource(struct device_node *np, int index, struct resource *res) | |
265 | { | |
266 | int ret, i = 0; | |
267 | struct of_range_parser parser; | |
268 | struct of_range range; | |
269 | ||
270 | ret = of_range_parser_init(&parser, np); | |
271 | if (ret) | |
272 | return ret; | |
273 | ||
274 | for_each_of_range(&parser, &range) | |
275 | if (i++ == index) | |
276 | return of_pci_range_to_resource(&range, np, res); | |
277 | ||
278 | return -ENOENT; | |
279 | } | |
280 | EXPORT_SYMBOL(of_range_to_resource); | |
281 | ||
dbbdee94 GL |
282 | /* |
283 | * ISA bus specific translator | |
284 | */ | |
285 | ||
286 | static int of_bus_isa_match(struct device_node *np) | |
287 | { | |
b3e46d1a | 288 | return of_node_name_eq(np, "isa"); |
dbbdee94 GL |
289 | } |
290 | ||
291 | static void of_bus_isa_count_cells(struct device_node *child, | |
292 | int *addrc, int *sizec) | |
293 | { | |
294 | if (addrc) | |
295 | *addrc = 2; | |
296 | if (sizec) | |
297 | *sizec = 1; | |
298 | } | |
299 | ||
47b1e689 | 300 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
73ae3088 | 301 | int pna, int fna) |
dbbdee94 | 302 | { |
dbbdee94 | 303 | /* Check address type match */ |
0131d897 | 304 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
305 | return OF_BAD_ADDR; |
306 | ||
73ae3088 | 307 | return of_bus_default_map(addr, range, na, ns, pna, fna); |
dbbdee94 GL |
308 | } |
309 | ||
0131d897 | 310 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
311 | { |
312 | unsigned int flags = 0; | |
0131d897 | 313 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
314 | |
315 | if (w & 1) | |
316 | flags |= IORESOURCE_IO; | |
317 | else | |
318 | flags |= IORESOURCE_MEM; | |
319 | return flags; | |
320 | } | |
321 | ||
3d5089c4 RH |
322 | static int of_bus_default_flags_match(struct device_node *np) |
323 | { | |
324 | return of_bus_n_addr_cells(np) == 3; | |
325 | } | |
326 | ||
dbbdee94 GL |
327 | /* |
328 | * Array of bus specific translators | |
329 | */ | |
330 | ||
331 | static struct of_bus of_busses[] = { | |
4670d610 | 332 | #ifdef CONFIG_PCI |
dbbdee94 GL |
333 | /* PCI */ |
334 | { | |
335 | .name = "pci", | |
336 | .addresses = "assigned-addresses", | |
337 | .match = of_bus_pci_match, | |
338 | .count_cells = of_bus_pci_count_cells, | |
339 | .map = of_bus_pci_map, | |
3eb030c6 | 340 | .translate = of_bus_default_flags_translate, |
88696db0 | 341 | .flag_cells = 1, |
dbbdee94 GL |
342 | .get_flags = of_bus_pci_get_flags, |
343 | }, | |
4670d610 | 344 | #endif /* CONFIG_PCI */ |
dbbdee94 GL |
345 | /* ISA */ |
346 | { | |
347 | .name = "isa", | |
348 | .addresses = "reg", | |
349 | .match = of_bus_isa_match, | |
350 | .count_cells = of_bus_isa_count_cells, | |
351 | .map = of_bus_isa_map, | |
3eb030c6 | 352 | .translate = of_bus_default_flags_translate, |
88696db0 | 353 | .flag_cells = 1, |
dbbdee94 GL |
354 | .get_flags = of_bus_isa_get_flags, |
355 | }, | |
3d5089c4 RH |
356 | /* Default with flags cell */ |
357 | { | |
358 | .name = "default-flags", | |
359 | .addresses = "reg", | |
360 | .match = of_bus_default_flags_match, | |
361 | .count_cells = of_bus_default_count_cells, | |
42604f8e HC |
362 | .map = of_bus_default_flags_map, |
363 | .translate = of_bus_default_flags_translate, | |
88696db0 | 364 | .flag_cells = 1, |
3d5089c4 RH |
365 | .get_flags = of_bus_default_flags_get_flags, |
366 | }, | |
dbbdee94 GL |
367 | /* Default */ |
368 | { | |
369 | .name = "default", | |
370 | .addresses = "reg", | |
371 | .match = NULL, | |
372 | .count_cells = of_bus_default_count_cells, | |
373 | .map = of_bus_default_map, | |
374 | .translate = of_bus_default_translate, | |
375 | .get_flags = of_bus_default_get_flags, | |
376 | }, | |
377 | }; | |
378 | ||
379 | static struct of_bus *of_match_bus(struct device_node *np) | |
380 | { | |
381 | int i; | |
382 | ||
383 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
384 | if (!of_busses[i].match || of_busses[i].match(np)) | |
385 | return &of_busses[i]; | |
386 | BUG(); | |
387 | return NULL; | |
388 | } | |
389 | ||
41d94893 | 390 | static int of_empty_ranges_quirk(struct device_node *np) |
746c9e9f BH |
391 | { |
392 | if (IS_ENABLED(CONFIG_PPC)) { | |
41d94893 | 393 | /* To save cycles, we cache the result for global "Mac" setting */ |
746c9e9f BH |
394 | static int quirk_state = -1; |
395 | ||
41d94893 BH |
396 | /* PA-SEMI sdc DT bug */ |
397 | if (of_device_is_compatible(np, "1682m-sdc")) | |
398 | return true; | |
399 | ||
400 | /* Make quirk cached */ | |
746c9e9f BH |
401 | if (quirk_state < 0) |
402 | quirk_state = | |
403 | of_machine_is_compatible("Power Macintosh") || | |
404 | of_machine_is_compatible("MacRISC"); | |
405 | return quirk_state; | |
406 | } | |
407 | return false; | |
408 | } | |
409 | ||
dbbdee94 | 410 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, |
47b1e689 | 411 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
412 | int na, int ns, int pna, const char *rprop) |
413 | { | |
0131d897 | 414 | const __be32 *ranges; |
dbbdee94 GL |
415 | unsigned int rlen; |
416 | int rone; | |
417 | u64 offset = OF_BAD_ADDR; | |
418 | ||
ba85edbe MY |
419 | /* |
420 | * Normally, an absence of a "ranges" property means we are | |
dbbdee94 | 421 | * crossing a non-translatable boundary, and thus the addresses |
ba85edbe | 422 | * below the current cannot be converted to CPU physical ones. |
dbbdee94 GL |
423 | * Unfortunately, while this is very clear in the spec, it's not |
424 | * what Apple understood, and they do have things like /uni-n or | |
425 | * /ht nodes with no "ranges" property and a lot of perfectly | |
426 | * useable mapped devices below them. Thus we treat the absence of | |
427 | * "ranges" as equivalent to an empty "ranges" property which means | |
428 | * a 1:1 translation at that level. It's up to the caller not to try | |
429 | * to translate addresses that aren't supposed to be translated in | |
430 | * the first place. --BenH. | |
3930f294 GL |
431 | * |
432 | * As far as we know, this damage only exists on Apple machines, so | |
433 | * This code is only enabled on powerpc. --gcl | |
81db12ee RH |
434 | * |
435 | * This quirk also applies for 'dma-ranges' which frequently exist in | |
436 | * child nodes without 'dma-ranges' in the parent nodes. --RobH | |
dbbdee94 GL |
437 | */ |
438 | ranges = of_get_property(parent, rprop, &rlen); | |
81db12ee RH |
439 | if (ranges == NULL && !of_empty_ranges_quirk(parent) && |
440 | strcmp(rprop, "dma-ranges")) { | |
606ad42a | 441 | pr_debug("no ranges; cannot translate\n"); |
3930f294 GL |
442 | return 1; |
443 | } | |
dbbdee94 GL |
444 | if (ranges == NULL || rlen == 0) { |
445 | offset = of_read_number(addr, na); | |
446 | memset(addr, 0, pna * 4); | |
606ad42a | 447 | pr_debug("empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
448 | goto finish; |
449 | } | |
450 | ||
606ad42a | 451 | pr_debug("walking ranges...\n"); |
dbbdee94 GL |
452 | |
453 | /* Now walk through the ranges */ | |
454 | rlen /= 4; | |
455 | rone = na + pna + ns; | |
456 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
73ae3088 | 457 | offset = bus->map(addr, ranges, na, ns, pna, bus->flag_cells); |
dbbdee94 GL |
458 | if (offset != OF_BAD_ADDR) |
459 | break; | |
460 | } | |
461 | if (offset == OF_BAD_ADDR) { | |
606ad42a | 462 | pr_debug("not found !\n"); |
dbbdee94 GL |
463 | return 1; |
464 | } | |
465 | memcpy(addr, ranges + na, 4 * pna); | |
466 | ||
467 | finish: | |
606ad42a | 468 | of_dump_addr("parent translation for:", addr, pna); |
0e407a9a | 469 | pr_debug("with offset: %llx\n", offset); |
dbbdee94 GL |
470 | |
471 | /* Translate it into parent bus space */ | |
472 | return pbus->translate(addr, offset, pna); | |
473 | } | |
474 | ||
475 | /* | |
476 | * Translate an address from the device-tree into a CPU physical address, | |
477 | * this walks up the tree and applies the various bus mappings on the | |
478 | * way. | |
479 | * | |
480 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
481 | * that translation is impossible (that is we are not dealing with a value | |
482 | * that can be mapped to a cpu physical address). This is not really specified | |
483 | * that way, but this is traditionally the way IBM at least do things | |
65af618d ZY |
484 | * |
485 | * Whenever the translation fails, the *host pointer will be set to the | |
486 | * device that had registered logical PIO mapping, and the return code is | |
487 | * relative to that node. | |
dbbdee94 | 488 | */ |
47b1e689 | 489 | static u64 __of_translate_address(struct device_node *dev, |
95835a8d | 490 | struct device_node *(*get_parent)(const struct device_node *), |
65af618d ZY |
491 | const __be32 *in_addr, const char *rprop, |
492 | struct device_node **host) | |
dbbdee94 GL |
493 | { |
494 | struct device_node *parent = NULL; | |
495 | struct of_bus *bus, *pbus; | |
47b1e689 | 496 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
497 | int na, ns, pna, pns; |
498 | u64 result = OF_BAD_ADDR; | |
499 | ||
0d638a07 | 500 | pr_debug("** translation for device %pOF **\n", dev); |
dbbdee94 GL |
501 | |
502 | /* Increase refcount at current level */ | |
503 | of_node_get(dev); | |
504 | ||
65af618d | 505 | *host = NULL; |
dbbdee94 | 506 | /* Get parent & match bus type */ |
95835a8d | 507 | parent = get_parent(dev); |
dbbdee94 GL |
508 | if (parent == NULL) |
509 | goto bail; | |
510 | bus = of_match_bus(parent); | |
511 | ||
59f5ca48 | 512 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
513 | bus->count_cells(dev, &na, &ns); |
514 | if (!OF_CHECK_COUNTS(na, ns)) { | |
0d638a07 | 515 | pr_debug("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
516 | goto bail; |
517 | } | |
518 | memcpy(addr, in_addr, na * 4); | |
519 | ||
0d638a07 RH |
520 | pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n", |
521 | bus->name, na, ns, parent); | |
606ad42a | 522 | of_dump_addr("translating address:", addr, na); |
dbbdee94 GL |
523 | |
524 | /* Translate */ | |
525 | for (;;) { | |
65af618d ZY |
526 | struct logic_pio_hwaddr *iorange; |
527 | ||
dbbdee94 GL |
528 | /* Switch to parent bus */ |
529 | of_node_put(dev); | |
530 | dev = parent; | |
95835a8d | 531 | parent = get_parent(dev); |
dbbdee94 GL |
532 | |
533 | /* If root, we have finished */ | |
534 | if (parent == NULL) { | |
606ad42a | 535 | pr_debug("reached root node\n"); |
dbbdee94 GL |
536 | result = of_read_number(addr, na); |
537 | break; | |
538 | } | |
539 | ||
65af618d ZY |
540 | /* |
541 | * For indirectIO device which has no ranges property, get | |
542 | * the address from reg directly. | |
543 | */ | |
544 | iorange = find_io_range_by_fwnode(&dev->fwnode); | |
545 | if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) { | |
546 | result = of_read_number(addr + 1, na - 1); | |
547 | pr_debug("indirectIO matched(%pOF) 0x%llx\n", | |
548 | dev, result); | |
549 | *host = of_node_get(dev); | |
550 | break; | |
551 | } | |
552 | ||
dbbdee94 GL |
553 | /* Get new parent bus and counts */ |
554 | pbus = of_match_bus(parent); | |
555 | pbus->count_cells(dev, &pna, &pns); | |
556 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
0d638a07 | 557 | pr_err("Bad cell count for %pOF\n", dev); |
dbbdee94 GL |
558 | break; |
559 | } | |
560 | ||
0d638a07 RH |
561 | pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n", |
562 | pbus->name, pna, pns, parent); | |
dbbdee94 GL |
563 | |
564 | /* Apply bus translation */ | |
565 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
566 | break; | |
567 | ||
568 | /* Complete the move up one level */ | |
569 | na = pna; | |
570 | ns = pns; | |
571 | bus = pbus; | |
572 | ||
606ad42a | 573 | of_dump_addr("one level translation:", addr, na); |
dbbdee94 GL |
574 | } |
575 | bail: | |
576 | of_node_put(parent); | |
577 | of_node_put(dev); | |
578 | ||
579 | return result; | |
580 | } | |
581 | ||
0131d897 | 582 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 583 | { |
65af618d ZY |
584 | struct device_node *host; |
585 | u64 ret; | |
586 | ||
95835a8d MR |
587 | ret = __of_translate_address(dev, of_get_parent, |
588 | in_addr, "ranges", &host); | |
65af618d ZY |
589 | if (host) { |
590 | of_node_put(host); | |
591 | return OF_BAD_ADDR; | |
592 | } | |
593 | ||
594 | return ret; | |
dbbdee94 GL |
595 | } |
596 | EXPORT_SYMBOL(of_translate_address); | |
597 | ||
f1ad5338 RM |
598 | #ifdef CONFIG_HAS_DMA |
599 | struct device_node *__of_get_dma_parent(const struct device_node *np) | |
f83a6e5d MR |
600 | { |
601 | struct of_phandle_args args; | |
602 | int ret, index; | |
603 | ||
604 | index = of_property_match_string(np, "interconnect-names", "dma-mem"); | |
605 | if (index < 0) | |
606 | return of_get_parent(np); | |
607 | ||
608 | ret = of_parse_phandle_with_args(np, "interconnects", | |
609 | "#interconnect-cells", | |
610 | index, &args); | |
611 | if (ret < 0) | |
612 | return of_get_parent(np); | |
613 | ||
614 | return of_node_get(args.np); | |
615 | } | |
f1ad5338 | 616 | #endif |
f83a6e5d | 617 | |
862ab557 RM |
618 | static struct device_node *of_get_next_dma_parent(struct device_node *np) |
619 | { | |
620 | struct device_node *parent; | |
621 | ||
622 | parent = __of_get_dma_parent(np); | |
623 | of_node_put(np); | |
624 | ||
625 | return parent; | |
626 | } | |
627 | ||
0131d897 | 628 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 | 629 | { |
65af618d ZY |
630 | struct device_node *host; |
631 | u64 ret; | |
632 | ||
f83a6e5d | 633 | ret = __of_translate_address(dev, __of_get_dma_parent, |
95835a8d | 634 | in_addr, "dma-ranges", &host); |
65af618d ZY |
635 | |
636 | if (host) { | |
637 | of_node_put(host); | |
638 | return OF_BAD_ADDR; | |
639 | } | |
640 | ||
641 | return ret; | |
dbbdee94 GL |
642 | } |
643 | EXPORT_SYMBOL(of_translate_dma_address); | |
644 | ||
e251c213 TR |
645 | /** |
646 | * of_translate_dma_region - Translate device tree address and size tuple | |
647 | * @dev: device tree node for which to translate | |
648 | * @prop: pointer into array of cells | |
649 | * @start: return value for the start of the DMA range | |
650 | * @length: return value for the length of the DMA range | |
651 | * | |
652 | * Returns a pointer to the cell immediately following the translated DMA region. | |
653 | */ | |
654 | const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *prop, | |
655 | phys_addr_t *start, size_t *length) | |
656 | { | |
657 | struct device_node *parent; | |
658 | u64 address, size; | |
659 | int na, ns; | |
660 | ||
661 | parent = __of_get_dma_parent(dev); | |
662 | if (!parent) | |
663 | return NULL; | |
664 | ||
665 | na = of_bus_n_addr_cells(parent); | |
666 | ns = of_bus_n_size_cells(parent); | |
667 | ||
668 | of_node_put(parent); | |
669 | ||
670 | address = of_translate_dma_address(dev, prop); | |
671 | if (address == OF_BAD_ADDR) | |
672 | return NULL; | |
673 | ||
674 | size = of_read_number(prop + na, ns); | |
675 | ||
676 | if (start) | |
677 | *start = address; | |
678 | ||
679 | if (length) | |
680 | *length = size; | |
681 | ||
682 | return prop + na + ns; | |
683 | } | |
684 | EXPORT_SYMBOL(of_translate_dma_region); | |
685 | ||
050a2c62 RH |
686 | const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no, |
687 | u64 *size, unsigned int *flags) | |
dbbdee94 | 688 | { |
0131d897 | 689 | const __be32 *prop; |
dbbdee94 GL |
690 | unsigned int psize; |
691 | struct device_node *parent; | |
692 | struct of_bus *bus; | |
693 | int onesize, i, na, ns; | |
694 | ||
695 | /* Get parent & match bus type */ | |
696 | parent = of_get_parent(dev); | |
697 | if (parent == NULL) | |
698 | return NULL; | |
699 | bus = of_match_bus(parent); | |
050a2c62 RH |
700 | if (strcmp(bus->name, "pci") && (bar_no >= 0)) { |
701 | of_node_put(parent); | |
702 | return NULL; | |
703 | } | |
dbbdee94 GL |
704 | bus->count_cells(dev, &na, &ns); |
705 | of_node_put(parent); | |
5d61b165 | 706 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
707 | return NULL; |
708 | ||
709 | /* Get "reg" or "assigned-addresses" property */ | |
710 | prop = of_get_property(dev, bus->addresses, &psize); | |
711 | if (prop == NULL) | |
712 | return NULL; | |
713 | psize /= 4; | |
714 | ||
715 | onesize = na + ns; | |
050a2c62 RH |
716 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
717 | u32 val = be32_to_cpu(prop[0]); | |
718 | /* PCI bus matches on BAR number instead of index */ | |
719 | if (((bar_no >= 0) && ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0))) || | |
720 | ((index >= 0) && (i == index))) { | |
dbbdee94 GL |
721 | if (size) |
722 | *size = of_read_number(prop + na, ns); | |
723 | if (flags) | |
724 | *flags = bus->get_flags(prop); | |
725 | return prop; | |
726 | } | |
050a2c62 | 727 | } |
dbbdee94 GL |
728 | return NULL; |
729 | } | |
050a2c62 | 730 | EXPORT_SYMBOL(__of_get_address); |
dbbdee94 | 731 | |
ff61bacd RH |
732 | /** |
733 | * of_property_read_reg - Retrieve the specified "reg" entry index without translating | |
734 | * @np: device tree node for which to retrieve "reg" from | |
735 | * @idx: "reg" entry index to read | |
736 | * @addr: return value for the untranslated address | |
737 | * @size: return value for the entry size | |
738 | * | |
739 | * Returns -EINVAL if "reg" is not found. Returns 0 on success with addr and | |
740 | * size values filled in. | |
741 | */ | |
742 | int of_property_read_reg(struct device_node *np, int idx, u64 *addr, u64 *size) | |
743 | { | |
744 | const __be32 *prop = of_get_address(np, idx, size, NULL); | |
745 | ||
746 | if (!prop) | |
747 | return -EINVAL; | |
748 | ||
749 | *addr = of_read_number(prop, of_n_addr_cells(np)); | |
750 | ||
751 | return 0; | |
752 | } | |
753 | EXPORT_SYMBOL(of_property_read_reg); | |
754 | ||
67ccd2b9 RH |
755 | static int parser_init(struct of_pci_range_parser *parser, |
756 | struct device_node *node, const char *name) | |
757 | { | |
67ccd2b9 RH |
758 | int rlen; |
759 | ||
760 | parser->node = node; | |
761 | parser->pna = of_n_addr_cells(node); | |
bc5e522e RH |
762 | parser->na = of_bus_n_addr_cells(node); |
763 | parser->ns = of_bus_n_size_cells(node); | |
67ccd2b9 | 764 | parser->dma = !strcmp(name, "dma-ranges"); |
2f96593e | 765 | parser->bus = of_match_bus(node); |
67ccd2b9 RH |
766 | |
767 | parser->range = of_get_property(node, name, &rlen); | |
768 | if (parser->range == NULL) | |
769 | return -ENOENT; | |
770 | ||
771 | parser->end = parser->range + rlen / sizeof(__be32); | |
772 | ||
773 | return 0; | |
774 | } | |
775 | ||
776 | int of_pci_range_parser_init(struct of_pci_range_parser *parser, | |
777 | struct device_node *node) | |
778 | { | |
779 | return parser_init(parser, node, "ranges"); | |
780 | } | |
781 | EXPORT_SYMBOL_GPL(of_pci_range_parser_init); | |
782 | ||
783 | int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, | |
784 | struct device_node *node) | |
785 | { | |
786 | return parser_init(parser, node, "dma-ranges"); | |
787 | } | |
788 | EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init); | |
bc5e522e | 789 | #define of_dma_range_parser_init of_pci_dma_range_parser_init |
67ccd2b9 RH |
790 | |
791 | struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, | |
792 | struct of_pci_range *range) | |
793 | { | |
bc5e522e RH |
794 | int na = parser->na; |
795 | int ns = parser->ns; | |
796 | int np = parser->pna + na + ns; | |
88696db0 | 797 | int busflag_na = parser->bus->flag_cells; |
67ccd2b9 RH |
798 | |
799 | if (!range) | |
800 | return NULL; | |
801 | ||
bc5e522e | 802 | if (!parser->range || parser->range + np > parser->end) |
67ccd2b9 RH |
803 | return NULL; |
804 | ||
2f96593e JY |
805 | range->flags = parser->bus->get_flags(parser->range); |
806 | ||
2f96593e | 807 | range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); |
bc5e522e | 808 | |
67ccd2b9 RH |
809 | if (parser->dma) |
810 | range->cpu_addr = of_translate_dma_address(parser->node, | |
811 | parser->range + na); | |
812 | else | |
813 | range->cpu_addr = of_translate_address(parser->node, | |
814 | parser->range + na); | |
815 | range->size = of_read_number(parser->range + parser->pna + na, ns); | |
816 | ||
bc5e522e | 817 | parser->range += np; |
67ccd2b9 RH |
818 | |
819 | /* Now consume following elements while they are contiguous */ | |
bc5e522e RH |
820 | while (parser->range + np <= parser->end) { |
821 | u32 flags = 0; | |
2f96593e | 822 | u64 bus_addr, cpu_addr, size; |
67ccd2b9 | 823 | |
2f96593e JY |
824 | flags = parser->bus->get_flags(parser->range); |
825 | bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); | |
67ccd2b9 RH |
826 | if (parser->dma) |
827 | cpu_addr = of_translate_dma_address(parser->node, | |
828 | parser->range + na); | |
829 | else | |
830 | cpu_addr = of_translate_address(parser->node, | |
831 | parser->range + na); | |
832 | size = of_read_number(parser->range + parser->pna + na, ns); | |
833 | ||
834 | if (flags != range->flags) | |
835 | break; | |
2f96593e | 836 | if (bus_addr != range->bus_addr + range->size || |
67ccd2b9 RH |
837 | cpu_addr != range->cpu_addr + range->size) |
838 | break; | |
839 | ||
840 | range->size += size; | |
bc5e522e | 841 | parser->range += np; |
67ccd2b9 RH |
842 | } |
843 | ||
844 | return range; | |
845 | } | |
846 | EXPORT_SYMBOL_GPL(of_pci_range_parser_one); | |
847 | ||
65af618d ZY |
848 | static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr, |
849 | u64 size) | |
850 | { | |
851 | u64 taddr; | |
852 | unsigned long port; | |
853 | struct device_node *host; | |
854 | ||
95835a8d MR |
855 | taddr = __of_translate_address(dev, of_get_parent, |
856 | in_addr, "ranges", &host); | |
65af618d ZY |
857 | if (host) { |
858 | /* host-specific port access */ | |
859 | port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size); | |
860 | of_node_put(host); | |
861 | } else { | |
862 | /* memory-mapped I/O range */ | |
863 | port = pci_address_to_pio(taddr); | |
864 | } | |
865 | ||
866 | if (port == (unsigned long)-1) | |
867 | return OF_BAD_ADDR; | |
868 | ||
869 | return port; | |
870 | } | |
871 | ||
e0d07278 | 872 | #ifdef CONFIG_HAS_DMA |
18308c94 | 873 | /** |
e0d07278 | 874 | * of_dma_get_range - Get DMA range info and put it into a map array |
18308c94 | 875 | * @np: device node to get DMA range info |
e0d07278 | 876 | * @map: dma range structure to return |
18308c94 GS |
877 | * |
878 | * Look in bottom up direction for the first "dma-ranges" property | |
e0d07278 JQ |
879 | * and parse it. Put the information into a DMA offset map array. |
880 | * | |
881 | * dma-ranges format: | |
18308c94 GS |
882 | * DMA addr (dma_addr) : naddr cells |
883 | * CPU addr (phys_addr_t) : pna cells | |
884 | * size : nsize cells | |
885 | * | |
e0d07278 JQ |
886 | * It returns -ENODEV if "dma-ranges" property was not found for this |
887 | * device in the DT. | |
18308c94 | 888 | */ |
e0d07278 | 889 | int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map) |
18308c94 GS |
890 | { |
891 | struct device_node *node = of_node_get(np); | |
892 | const __be32 *ranges = NULL; | |
951d4885 | 893 | bool found_dma_ranges = false; |
7a8b64d1 RH |
894 | struct of_range_parser parser; |
895 | struct of_range range; | |
e0d07278 JQ |
896 | struct bus_dma_region *r; |
897 | int len, num_ranges = 0; | |
898 | int ret = 0; | |
18308c94 | 899 | |
951d4885 | 900 | while (node) { |
18308c94 GS |
901 | ranges = of_get_property(node, "dma-ranges", &len); |
902 | ||
903 | /* Ignore empty ranges, they imply no translation required */ | |
904 | if (ranges && len > 0) | |
905 | break; | |
906 | ||
951d4885 RM |
907 | /* Once we find 'dma-ranges', then a missing one is an error */ |
908 | if (found_dma_ranges && !ranges) { | |
909 | ret = -ENODEV; | |
910 | goto out; | |
911 | } | |
912 | found_dma_ranges = true; | |
913 | ||
914 | node = of_get_next_dma_parent(node); | |
18308c94 GS |
915 | } |
916 | ||
951d4885 | 917 | if (!node || !ranges) { |
0d638a07 | 918 | pr_debug("no dma-ranges found for node(%pOF)\n", np); |
18308c94 GS |
919 | ret = -ENODEV; |
920 | goto out; | |
921 | } | |
922 | ||
7a8b64d1 | 923 | of_dma_range_parser_init(&parser, node); |
f6933c01 MB |
924 | for_each_of_range(&parser, &range) { |
925 | if (range.cpu_addr == OF_BAD_ADDR) { | |
926 | pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n", | |
927 | range.bus_addr, node); | |
928 | continue; | |
929 | } | |
e0d07278 | 930 | num_ranges++; |
f6933c01 MB |
931 | } |
932 | ||
933 | if (!num_ranges) { | |
934 | ret = -EINVAL; | |
935 | goto out; | |
936 | } | |
e0d07278 JQ |
937 | |
938 | r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL); | |
939 | if (!r) { | |
940 | ret = -ENOMEM; | |
941 | goto out; | |
942 | } | |
7a8b64d1 | 943 | |
e0d07278 | 944 | /* |
f6933c01 MB |
945 | * Record all info in the generic DMA ranges array for struct device, |
946 | * returning an error if we don't find any parsable ranges. | |
e0d07278 JQ |
947 | */ |
948 | *map = r; | |
949 | of_dma_range_parser_init(&parser, node); | |
7a8b64d1 RH |
950 | for_each_of_range(&parser, &range) { |
951 | pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", | |
952 | range.bus_addr, range.cpu_addr, range.size); | |
f6933c01 | 953 | if (range.cpu_addr == OF_BAD_ADDR) |
f49c7faf | 954 | continue; |
e0d07278 JQ |
955 | r->cpu_start = range.cpu_addr; |
956 | r->dma_start = range.bus_addr; | |
957 | r->size = range.size; | |
e0d07278 | 958 | r++; |
18308c94 | 959 | } |
18308c94 GS |
960 | out: |
961 | of_node_put(node); | |
18308c94 GS |
962 | return ret; |
963 | } | |
e0d07278 | 964 | #endif /* CONFIG_HAS_DMA */ |
92ea637e | 965 | |
964db79d NSJ |
966 | /** |
967 | * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA | |
968 | * @np: The node to start searching from or NULL to start from the root | |
969 | * | |
970 | * Gets the highest CPU physical address that is addressable by all DMA masters | |
971 | * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no | |
972 | * DMA constrained device is found, it returns PHYS_ADDR_MAX. | |
973 | */ | |
974 | phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np) | |
975 | { | |
976 | phys_addr_t max_cpu_addr = PHYS_ADDR_MAX; | |
977 | struct of_range_parser parser; | |
978 | phys_addr_t subtree_max_addr; | |
979 | struct device_node *child; | |
980 | struct of_range range; | |
981 | const __be32 *ranges; | |
982 | u64 cpu_end = 0; | |
983 | int len; | |
984 | ||
985 | if (!np) | |
986 | np = of_root; | |
987 | ||
988 | ranges = of_get_property(np, "dma-ranges", &len); | |
989 | if (ranges && len) { | |
990 | of_dma_range_parser_init(&parser, np); | |
991 | for_each_of_range(&parser, &range) | |
992 | if (range.cpu_addr + range.size > cpu_end) | |
993 | cpu_end = range.cpu_addr + range.size - 1; | |
994 | ||
995 | if (max_cpu_addr > cpu_end) | |
996 | max_cpu_addr = cpu_end; | |
997 | } | |
998 | ||
999 | for_each_available_child_of_node(np, child) { | |
1000 | subtree_max_addr = of_dma_get_max_cpu_address(child); | |
1001 | if (max_cpu_addr > subtree_max_addr) | |
1002 | max_cpu_addr = subtree_max_addr; | |
1003 | } | |
1004 | ||
1005 | return max_cpu_addr; | |
1006 | } | |
1007 | ||
92ea637e SS |
1008 | /** |
1009 | * of_dma_is_coherent - Check if device is coherent | |
1010 | * @np: device node | |
1011 | * | |
1012 | * It returns true if "dma-coherent" property was found | |
dabf6b36 | 1013 | * for this device in the DT, or if DMA is coherent by |
12b82775 HS |
1014 | * default for OF devices on the current platform and no |
1015 | * "dma-noncoherent" property was found for this device. | |
92ea637e SS |
1016 | */ |
1017 | bool of_dma_is_coherent(struct device_node *np) | |
1018 | { | |
a5bea04f | 1019 | struct device_node *node; |
c00a60d6 | 1020 | bool is_coherent = dma_default_coherent; |
dabf6b36 | 1021 | |
a5bea04f EN |
1022 | node = of_node_get(np); |
1023 | ||
92ea637e SS |
1024 | while (node) { |
1025 | if (of_property_read_bool(node, "dma-coherent")) { | |
12b82775 HS |
1026 | is_coherent = true; |
1027 | break; | |
1028 | } | |
1029 | if (of_property_read_bool(node, "dma-noncoherent")) { | |
1030 | is_coherent = false; | |
1031 | break; | |
92ea637e | 1032 | } |
c60bf3eb | 1033 | node = of_get_next_dma_parent(node); |
92ea637e SS |
1034 | } |
1035 | of_node_put(node); | |
12b82775 | 1036 | return is_coherent; |
92ea637e | 1037 | } |
eb3d3ec5 | 1038 | EXPORT_SYMBOL_GPL(of_dma_is_coherent); |
89897f73 HM |
1039 | |
1040 | /** | |
1041 | * of_mmio_is_nonposted - Check if device uses non-posted MMIO | |
1042 | * @np: device node | |
1043 | * | |
1044 | * Returns true if the "nonposted-mmio" property was found for | |
1045 | * the device's bus. | |
1046 | * | |
1047 | * This is currently only enabled on builds that support Apple ARM devices, as | |
1048 | * an optimization. | |
1049 | */ | |
1050 | static bool of_mmio_is_nonposted(struct device_node *np) | |
1051 | { | |
1052 | struct device_node *parent; | |
1053 | bool nonposted; | |
1054 | ||
1055 | if (!IS_ENABLED(CONFIG_ARCH_APPLE)) | |
1056 | return false; | |
1057 | ||
1058 | parent = of_get_parent(np); | |
1059 | if (!parent) | |
1060 | return false; | |
1061 | ||
1062 | nonposted = of_property_read_bool(parent, "nonposted-mmio"); | |
1063 | ||
1064 | of_node_put(parent); | |
1065 | return nonposted; | |
1066 | } | |
5eac0bdc GU |
1067 | |
1068 | static int __of_address_to_resource(struct device_node *dev, int index, int bar_no, | |
1069 | struct resource *r) | |
1070 | { | |
1071 | u64 taddr; | |
1072 | const __be32 *addrp; | |
1073 | u64 size; | |
1074 | unsigned int flags; | |
1075 | const char *name = NULL; | |
1076 | ||
1077 | addrp = __of_get_address(dev, index, bar_no, &size, &flags); | |
1078 | if (addrp == NULL) | |
1079 | return -EINVAL; | |
1080 | ||
1081 | /* Get optional "reg-names" property to add a name to a resource */ | |
1082 | if (index >= 0) | |
1083 | of_property_read_string_index(dev, "reg-names", index, &name); | |
1084 | ||
1085 | if (flags & IORESOURCE_MEM) | |
1086 | taddr = of_translate_address(dev, addrp); | |
1087 | else if (flags & IORESOURCE_IO) | |
1088 | taddr = of_translate_ioport(dev, addrp, size); | |
1089 | else | |
1090 | return -EINVAL; | |
1091 | ||
1092 | if (taddr == OF_BAD_ADDR) | |
1093 | return -EINVAL; | |
1094 | memset(r, 0, sizeof(struct resource)); | |
1095 | ||
1096 | if (of_mmio_is_nonposted(dev)) | |
1097 | flags |= IORESOURCE_MEM_NONPOSTED; | |
1098 | ||
1099 | r->start = taddr; | |
1100 | r->end = taddr + size - 1; | |
1101 | r->flags = flags; | |
1102 | r->name = name ? name : dev->full_name; | |
1103 | ||
1104 | return 0; | |
1105 | } | |
1106 | ||
1107 | /** | |
1108 | * of_address_to_resource - Translate device tree address and return as resource | |
1109 | * @dev: Caller's Device Node | |
1110 | * @index: Index into the array | |
1111 | * @r: Pointer to resource array | |
1112 | * | |
1113 | * Returns -EINVAL if the range cannot be converted to resource. | |
1114 | * | |
1115 | * Note that if your address is a PIO address, the conversion will fail if | |
1116 | * the physical address can't be internally converted to an IO token with | |
1117 | * pci_address_to_pio(), that is because it's either called too early or it | |
1118 | * can't be matched to any host bridge IO space | |
1119 | */ | |
1120 | int of_address_to_resource(struct device_node *dev, int index, | |
1121 | struct resource *r) | |
1122 | { | |
1123 | return __of_address_to_resource(dev, index, -1, r); | |
1124 | } | |
1125 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
1126 | ||
1127 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
1128 | struct resource *r) | |
1129 | { | |
1130 | ||
1131 | if (!IS_ENABLED(CONFIG_PCI)) | |
1132 | return -ENOSYS; | |
1133 | ||
1134 | return __of_address_to_resource(dev, -1, bar, r); | |
1135 | } | |
1136 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
1137 | ||
1138 | /** | |
1139 | * of_iomap - Maps the memory mapped IO for a given device_node | |
1140 | * @np: the device whose io range will be mapped | |
1141 | * @index: index of the io range | |
1142 | * | |
1143 | * Returns a pointer to the mapped memory | |
1144 | */ | |
1145 | void __iomem *of_iomap(struct device_node *np, int index) | |
1146 | { | |
1147 | struct resource res; | |
1148 | ||
1149 | if (of_address_to_resource(np, index, &res)) | |
1150 | return NULL; | |
1151 | ||
1152 | if (res.flags & IORESOURCE_MEM_NONPOSTED) | |
1153 | return ioremap_np(res.start, resource_size(&res)); | |
1154 | else | |
1155 | return ioremap(res.start, resource_size(&res)); | |
1156 | } | |
1157 | EXPORT_SYMBOL(of_iomap); | |
1158 | ||
1159 | /* | |
1160 | * of_io_request_and_map - Requests a resource and maps the memory mapped IO | |
1161 | * for a given device_node | |
1162 | * @device: the device whose io range will be mapped | |
1163 | * @index: index of the io range | |
1164 | * @name: name "override" for the memory region request or NULL | |
1165 | * | |
1166 | * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded | |
1167 | * error code on failure. Usage example: | |
1168 | * | |
1169 | * base = of_io_request_and_map(node, 0, "foo"); | |
1170 | * if (IS_ERR(base)) | |
1171 | * return PTR_ERR(base); | |
1172 | */ | |
1173 | void __iomem *of_io_request_and_map(struct device_node *np, int index, | |
1174 | const char *name) | |
1175 | { | |
1176 | struct resource res; | |
1177 | void __iomem *mem; | |
1178 | ||
1179 | if (of_address_to_resource(np, index, &res)) | |
1180 | return IOMEM_ERR_PTR(-EINVAL); | |
1181 | ||
1182 | if (!name) | |
1183 | name = res.name; | |
1184 | if (!request_mem_region(res.start, resource_size(&res), name)) | |
1185 | return IOMEM_ERR_PTR(-EBUSY); | |
1186 | ||
1187 | if (res.flags & IORESOURCE_MEM_NONPOSTED) | |
1188 | mem = ioremap_np(res.start, resource_size(&res)); | |
1189 | else | |
1190 | mem = ioremap(res.start, resource_size(&res)); | |
1191 | ||
1192 | if (!mem) { | |
1193 | release_mem_region(res.start, resource_size(&res)); | |
1194 | return IOMEM_ERR_PTR(-ENOMEM); | |
1195 | } | |
1196 | ||
1197 | return mem; | |
1198 | } | |
1199 | EXPORT_SYMBOL(of_io_request_and_map); |